KR20230100136A - Method for peripheral device sharing using multi-core processor and electronic apparatus using same - Google Patents

Abstract

An electronic device is disclosed. The present electronic device includes a multi-core processor including a multi-core CPU, a plurality of peripheral devices operating according to control commands of the multi-core processor, information on a current application mode among a plurality of application modes, and a plurality of cores for each of a plurality of application modes. A memory for storing information on peripheral devices assigned to each CPU, wherein the multi-core processor determines a current application mode based on information about the current application mode stored in the memory during booting, and determines the current application mode based on the stored peripheral device information. Peripheral devices to be used by each core CPU are allocated based on the

Description

Peripheral device sharing method using multi-core processor and electronic device using the same

The present disclosure relates to a method for sharing peripheral devices using a multi-core processor and an electronic device using the same, and more specifically, to a method for sharing peripheral devices capable of dynamically allocating peripheral devices to each core CPU for each application mode and an electronic device using the same. will be.

A multi-core processor integrates two or more core CPUs into one package. Each core CPU within the multi-core processor can share peripheral devices (eg, CAN, CAN-FD, Ethernet, etc.), and the purpose of the core CPU is According to this, each peripheral device can be allocated in advance and used.

However, in the conventional multi-core processor, since each core CPU initializes and uses the peripheral device assigned to it during the booting process using software, the peripheral device assigned to each core CPU cannot be changed before software is upgraded.

In this respect, conventionally, there has been difficulty in utilizing peripheral devices within a multi-core processor.

Therefore, the present disclosure has been conceived to solve the above problems, and to provide a method for sharing peripheral devices using a multi-core processor capable of dynamically allocating peripheral devices to each core CPU for each application mode and an electronic device using the same. there is.

The present disclosure is to achieve the above object, and the present electronic device includes a multi-core processor including a plurality of core CPUs, a plurality of peripheral devices operating according to control commands of the multi-core processor, and a plurality of application modes. and a memory for storing information on a current application mode and information on a peripheral device assigned to each of the plurality of core CPUs for each of the plurality of application modes, wherein the multi-core processor accesses the current application mode stored in the memory when booting. A current application mode is determined based on information about the peripheral device, and a peripheral device to be used in each core CPU is allocated based on the stored peripheral device information.

In this case, a first core CPU among the plurality of core CPUs determines to switch the application mode, and when the decision to switch the application mode is made, requests another core CPU to switch the application mode, and the other core CPU responds to the switch of the application mode. Upon reception of , information on an application mode to be switched may be stored in the memory.

In this case, each of the plurality of core CPUs may initialize a peripheral device to be used for each core CPU based on the information about the current application mode stored in the memory and the stored information on the peripheral device.

In this case, each of the plurality of core CPUs identifies a peripheral device to be used by each core CPU based on the current application mode and the stored peripheral device information, and when a new peripheral device that has not been used before is allocated, the new peripheral device You can perform initialization for .

Meanwhile, the first core CPU may restart the multi-core processor when information about an application mode to be switched is stored in a memory.

Meanwhile, the peripheral device may include at least one of CAN, CAN-FD, and Ethernet.

Meanwhile, a peripheral device sharing method in a multi-core processor including a plurality of core CPUs according to an embodiment of the present disclosure includes determining a current application mode based on information about a current application mode stored in a memory at booting time; Allocating a peripheral device to be used in each core CPU based on information stored in the memory and assigned to each of the plurality of core CPUs for each of the plurality of application modes; and peripheral devices assigned to each of the plurality of core CPUs. Including the step of initializing.

In this case, the peripheral device sharing method includes the step of determining, by a first core CPU among the plurality of core CPUs, switching of the application mode, and when the first core CPU determines to switch the application mode, switching of the application mode to another core CPU. The method may further include requesting, and storing information on an application mode to be switched by the first core CPU in the memory when receiving an application mode switching response from another core CPU.

In this case, the peripheral device sharing method includes the step of initializing peripheral devices to be used for each core CPU based on the information about the current application mode stored in the memory and the stored peripheral device information, by each of the plurality of core CPUs. can include more.

In this case, in the initialization step, each of the plurality of core CPUs identifies a peripheral device to be used in each core CPU based on the current application mode and the stored peripheral device information, and a new peripheral device that has not been previously used is selected. When additionally allocated, initialization of the new peripheral device may be performed.

Meanwhile, in the peripheral device sharing method, when information on an application mode to be switched is stored in a memory, the first core CPU may restart the multicore processor.

In the multi-core processor according to the present disclosure, each core CPU within the multi-core processor can dynamically allocate and use peripheral devices for each application mode without upgrading software, thereby maximizing the utilization of peripheral devices within the multi-core processor. .

1 is a block diagram showing the configuration of an electronic device according to an embodiment of the present disclosure;
2 is a diagram for explaining a first application mode according to an embodiment of the present disclosure;
3 is a diagram for explaining a second application mode according to an embodiment of the present disclosure, and
4 is a flowchart illustrating a method for sharing a peripheral device according to an embodiment of the present disclosure.

Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings. Encryption/decryption may be applied to the information (data) transmission process performed in the present disclosure, if necessary, and expressions describing the information (data) transmission process in the present disclosure and claims are all encryption/decryption, even if not separately mentioned. It should be interpreted as including the case. In the present disclosure, expressions such as “transmission (delivery) from A to B” or “A receiving from B” include transmission (transmission) or reception with another medium included in the middle, and must be transmitted from A to B. It does not represent only what is directly transmitted (delivered) or received.

In the description of the present disclosure, the order of each step should be understood as non-limiting, unless the preceding step must logically and temporally necessarily precede the succeeding step. In other words, except for the above exceptional cases, even if the process described as the later step is performed before the process described as the preceding step, the nature of the disclosure is not affected, and the scope of rights must also be defined regardless of the order of the steps. And, in this specification, "A or B" is defined to mean not only selectively indicating either one of A and B, but also including both A and B. In addition, in the present disclosure, the term "include" has a meaning encompassing further including other components in addition to the elements listed as included.

In this disclosure, only essential components necessary for the description of the present disclosure are described, and components unrelated to the essence of the present disclosure are not mentioned. In addition, it should not be interpreted as an exclusive meaning that includes only the mentioned components, but should be interpreted as a non-exclusive meaning that may include other components.

Hereinafter, various embodiments of the present disclosure will be described in detail using the accompanying drawings.

1 is a block diagram showing the configuration of an electronic device according to an embodiment of the present disclosure.

Referring to FIG. 1 , an electronic device 100 may include a memory 110 , a peripheral device 120 , and a multi-core processor 130 . Such electronic devices may include devices such as PCs, notebooks, and servers, as well as electronic devices for vehicles.

The memory 110 may store at least one instruction related to the electronic device 100 . Specifically, various programs (or software) for operating the electronic device 100 according to various embodiments of the present disclosure may be stored in the memory 110 .

The memory 110 may be implemented in various forms such as RAM, ROM, flash memory, HDD, external memory, memory card, etc., but is not limited to any one.

The memory 110 may store information on a current application mode (hereinafter, mode information) and information on peripheral devices allocated to a plurality of core CPUs for each of a plurality of application modes (hereinafter, peripheral device information).

Here, the mode information is information indicating an application mode (or state) of the current electronic device. In addition, the application mode may include a normal mode, a diagnosis mode, an upgrade mode, and the like. Here, the terms normal mode, diagnosis mode, and upgrade mode cannot be exemplified, and may be a plurality of modes according to the state of peripheral devices to be allocated to each core CPU. Also, only some of the above three applications may be used. Characteristics and operation of an application mode according to an embodiment of the present disclosure will be described later with reference to FIGS. 2 and 3 .

Also, the peripheral device mode is information storing peripheral device information allocated (or to be assigned) to each CPU for each application mode. For example, when the first core CPU uses Ethernet in normal mode and the second core CPU uses Ethernet in diagnosis mode, Ethernet is assigned to the first core in normal mode, and Ethernet is assigned to the first core in diagnosis mode. Information that Ethernet should be allocated to 2 cores may be stored. Meanwhile, in the above, it has been described that information on peripheral devices assigned based on a core CPU is stored, but in implementation, core CPU information may be stored based on a peripheral device.

The peripheral device 120 operates according to the control command of the multi-core processor. Specifically, the peripheral device may be a controller area network (CAN), CAN-FD, Ethernet, or the like for communication with other devices. Here, CAN is a communication standard for microcontrollers or devices to communicate with each other without a host computer in the vehicle, and CAN-FD is a new communication standard with improved maximum transmission rate and maximum information size while maintaining the CAN method. In addition, in addition to the aforementioned peripheral devices, Flexray, local area network, wireless communication (WiFi 802.11a/b/g/n, NFC, Bluetooth), 4G, 5G, etc. may be used.

On the other hand, in the present disclosure, only a communication network is cited as an example of a peripheral device, but in implementation, other devices (eg, EMS ECU, TMS ECU, ABS ECU, sound device, lighting device, etc.) connected through a communication standard such as CAN will be may be

The multi-core processor 130 controls overall operations of the electronic device 100 . Specifically, the processor 150 may overall control the operation of the electronic device 100 by executing at least one instruction stored in the memory 110 . The processor 150 may be configured as a single device such as a central processing unit (CPU), an application-specific integrated circuit (ASIC), or an electronic control unit (ECU), or a plurality of devices such as a CPU, a graphics processing unit (GPU), or the like. It may also consist of a device.

The multi-core processor 130 integrates two or more independent cores (or core CPUs) into one package. That is, each of these core CPUs can perform calculation processing or control operations independent of each other.

The multi-core processor 130 may perform a booting operation based on the instructions stored in the memory 110 during initial booting, and during the booting operation, each core may use mode information and peripheral device information stored in the memory 110. You can assign peripherals to be assigned to the CPU.

Specifically, the multi-core processor 130 checks the current application mode based on the mode information stored in the memory 110 during booting, and peripheral devices to be assigned to each core CPU based on the peripheral device information and the identified application mode. You can assign peripherals by checking .

Meanwhile, such an assignment operation may be performed in a separate controller separate from the core CPU in the multi-core processor 130, and may be performed by one of a plurality of core CPUs or individually by each of a plurality of core CPUs. .

For example, when a plurality of core CPUs individually perform an allocation operation, each core CPU checks the current application mode based on mode information stored in the memory 110, and stores the checked application mode and stored peripheral device information. You can use it to check the peripheral device you want to use. Also, each core CPU may allocate peripheral devices as described above by initializing the peripheral devices to be used.

When the peripheral device allocation is completed, each core CPU may initialize the peripheral device assigned to itself and perform an operation using each peripheral device.

Also, the multi-core processor 130 may determine whether application mode switching is required, and if mode switching is required, the application mode switching may be performed. Such an operation may be performed by a separate controller within the multi-core processor 130 as described above, or may be performed by any one of a plurality of core CPUs.

For example, if a first core CPU among the plurality of core CPUs detects an error and determines that a peripheral device needs to be diagnosed, the first core CPU may determine that an application mode should be switched to a diagnosis mode.

Upon making such a decision, the first core CPU notifies the other core CPUs (eg, the second core CPU) that the application mode needs to be switched, and the other core CPUs, upon receiving such a conversion request, stop the currently ongoing task. When the process ends and the transition becomes possible, the first core CPU may be notified that the transition is possible.

Upon receiving a response that the application mode can be switched, the first core CPU may modify mode information stored in the memory 110 to correspond to the application mode to be changed (eg, diagnosis mode).

When the mode information of the memory 110 is changed in this way, each core CPU can check the current operation mode in the same way as in the initial booting process, and perform an initialization operation to use each operation mode and peripheral devices assigned to it. there is. For example, if the second core CPU uses only the first peripheral device in the normal mode but uses the first and second peripheral devices in the diagnostic mode and peripheral device information is stored, the second core CPU uses the existing peripheral device information. It is possible to perform an initialization operation for only the second peripheral device used by the user without performing an initialization operation for the first peripheral device used for the second peripheral device. Meanwhile, upon implementation, the initialization operation may be performed on all peripheral devices regardless of the previously used peripheral devices.

Further, in implementation, a rebooting operation may be performed when an application mode conversion is required instead of an initialization operation for a peripheral device as described above.

As described above, in the electronic device according to the present embodiment, each core CPU in a multi-core processor can dynamically allocate and use peripheral devices for each application mode without upgrading software, maximizing the utilization of peripheral devices in the multi-core processor. can do.

Meanwhile, in the drawing and description of FIG. 1, the electronic device 100 has been illustrated and described as including only the memory 110, the peripheral device 120, and the multi-core processor 130, but in implementation other than the above-described configuration. Other configurations may be added and used. In addition, although the memory 110 is illustrated and described as existing outside the multi-core processor 130 in FIG. 1, in the implementation, the above-described mode information, the degree of peripheral devices, etc. are stored in the cache inside the multi-core processor 130. may have been

2 is a diagram for explaining a first application mode according to an embodiment of the present disclosure. Specifically, FIG. 2 is a diagram for explaining an operation in normal mode.

Referring to FIG. 2 , the multi-core processor 130 includes a first core CPU 130-1 and a second core CPU 130-2, and four peripheral devices 120-1, 120-2, and 120 -3, 120-4) is used. Meanwhile, in FIG. 2, it is illustrated and described as including only two core CPUs 130-1 and 130-2, but this is not illustrative, and the multi-core processor 130 may include three or more core CPUs. . In addition, although it is shown that four peripheral devices are used, in implementation, they may be two or three, and may be five or more.

This refers to a time when the electronic device 100 of FIG. 2 operates in a general state. For example, when the electronic device 100 is mounted in a vehicle, it may be in a vehicle driving state.

In this normal mode state, the first and second peripheral devices 120-1 and 120-2 are allocated to the first core CPU 130-1, and the third and second peripheral devices 120-1 are allocated to the second core CPU 130-2. 4 peripheral devices 120-3 and 120-4 may be allocated. Information on peripheral devices to be used in such a normal mode may be stored in the memory 110 as shown.

Therefore, at the time of initial booting, each of the core CPUs 130-1 and 130-2 performs an assignment operation using the current normal mode and the peripheral devices allocated thereto, using the peripheral device information stored in the memory 110. can do. For example, the first core CPU 130-1 confirms that the current application mode is the normal mode in an initial booting process, and uses peripheral device information to determine the first peripheral device 120-1 allocated to the first peripheral device 120-1 in the normal mode. ) and the second peripheral device 120-2. Also, the first core CPU 130-1 performs initialization on the first peripheral device 120-1 and the second peripheral device 120-2, so that the first peripheral device 120-1 and the second peripheral device 120-1 are initialized. The device 120-2 may be allocated and used. Also, the second core CPU 130-2 may perform assignment (or initialization) operations for the third peripheral device 120-3 and the fourth peripheral device 120-4 in the same manner.

3 is a diagram for explaining a second application mode according to an embodiment of the present disclosure. Specifically, FIG. 3 is a diagram for explaining an operation in a diagnosis mode.

Referring to FIG. 3 , the core CPUs 130-1 and 130-2 and the peripheral devices 120-1, 120-2, 120-3 and 120-4 included in the multi-core processor 130 are shown in FIG. Since it is the same, the description thereof is omitted.

The diagnosis mode refers to a mode for checking the state of the electronic device, and may be, for example, a vehicle diagnosis mode when the electronic device 100 is mounted in a vehicle. Meanwhile, the term and operation of the diagnosis mode are not illustrative, and may be any name or purpose if the peripheral device needs to be allocated in a form different from that in the normal mode.

For example, when the second peripheral device 120-2 is Ethernet, the first core CPU 130-1 is allocated and used in the normal mode, but the second core CPU 130-2 is used in the diagnosis mode. The case where is allocated and used is assumed below.

In this diagnosis mode, the first peripheral device is allocated to the first core CPU 130-1, and the second, third, and fourth peripheral devices 120-2, 120-2, 120-3) may be assigned. Information on peripheral devices to be used in such a normal mode may be stored in the memory 110 as shown.

Therefore, at the time of initial booting, each of the core CPUs 130-1 and 130-2 performs an assignment operation using the current normal mode and the peripheral devices allocated thereto, using the peripheral device information stored in the memory 110. can do. For example, the second core CPU 130-2 confirms that the current application mode is the diagnosis mode in an initial booting process, and second to fourth peripheral devices assigned to the second core CPU 130-2 in the diagnosis mode using peripheral device information ( 120-2, 120-3, 120-4). Further, the second core CPU 130-2 performs initialization of the second to fourth peripheral devices 120-2, 120-3, and 120-4, so that the second to fourth peripheral devices 120-2, 120-3, 120-4) can be allocated and used. Also, the first core CPU 130-1 may perform an assignment (or initialization) operation for the first peripheral device 120-1 in the same manner.

Hereinafter, with reference to FIGS. 2 and 3 , a process of switching an application mode (eg, a switching operation from a normal mode to a diagnosis mode) will be described.

Hereinafter, in the normal mode, the first core CPU 130-1 receives and uses the Ethernet device 120-2, but in the diagnosis mode, the second core CPU 130-2 uses the Ethernet device 120-2. Assume a case in which it must be allocated and used.

When the second core CPU 130-2 needs to use the Ethernet device 120-2, the second core CPU can confirm that the application mode needs to be switched. The need for switching may be determined exclusively by one core CPU, or may be individually confirmed by each core CPU. Hereinafter, it is assumed that the second core CPU 130-2 confirms that there is such a need.

When the second core CPU 130-2 confirms that it is necessary to switch the application mode from the current normal mode to the diagnosis mode (for example, when the second core CPU 130-2 needs to use Ethernet, the current Ethernet is not allocated and the mode in which Ethernet can be used is a diagnosis mode), the second core CPU 130-2 may inform the first core CPU 130-1 that switching of the application mode is necessary. When the first core CPU 130-1 receiving such a request enters a state in which the application mode can be switched (that is, the current operation is completed or stopped), the first core CPU 130-1 transmits a switch response to the second core CPU 130-2. can inform

Upon receiving the switch response, the second core CPU 130 - 2 may store the application mode to be changed in the memory 110 . When the application mode is changed and stored in the memory 110 as described above, each of the core CPUs 130-1 and 130-2 may perform initialization of peripheral devices according to the changed application mode. Meanwhile, this conversion operation may be performed in various ways. For example, each of the core CPUs 130-1 and 130-2 checks the application mode stored in the memory 110 at regular time intervals, The core CPU 130-2 confirming the conversion or confirming the conversion of the application mode as described above may perform the conversion operation according to a request to the other core CPU 130-1.

According to this conversion operation, the second core CPU 130-2 can operate by receiving an additional allocation of Ethernet, and when the operation using Ethernet is completed, that is, when it is necessary to return to the conversion from the diagnosis mode to the normal mode, as described above. As described above, the above-described process such as storing the application mode to be changed in the memory 110 may be performed.

4 is a flowchart illustrating a method for sharing a peripheral device according to an embodiment of the present disclosure.

First, the current application mode is determined based on information about the current application mode stored in the memory at the time of booting (S410).

Peripheral devices to be used in each core CPU are allocated based on peripheral device information stored in the memory and allocated to each of the plurality of core CPUs for each of the plurality of application modes (S420).

In addition, the peripheral devices assigned to each of the plurality of core CPUs may be initialized to use the peripheral devices assigned to each core CPU (S430).

On the other hand, if switching of the application mode is required in such an assigned state, specifically, a first core CPU among a plurality of core CPUs may determine switching of the application mode. Further, when the first core CPU determines to switch the application mode, the first core CPU requests another core CPU to switch the application mode, and when receiving an application mode switching response from the other core CPU, information about the application mode to be switched by the first core CPU. can be stored in memory.

Further, each of the plurality of core CPUs may perform initialization of a peripheral device to be used for each core CPU based on the current mode information stored in the memory and the stored peripheral device information. At this time, in the initialization, each of the plurality of core CPUs checks the peripheral device to be used in each core CPU based on the current application mode and stored peripheral device information, and when a new peripheral device that has not been used before is additionally allocated, the new peripheral device Initialization may be performed only on the device or all peripheral devices may be initialized.

Therefore, the peripheral device sharing method as described above enables each core CPU within a multi-core processor to dynamically allocate and use peripheral devices for each application mode without upgrading software, thereby maximizing the utilization of peripheral devices within the multi-core processor. can do.

Also, the method for sharing a peripheral device as described above may be implemented in the form of program code for performing each step, stored in a recording medium, and distributed. In this case, the device loaded with the recording medium can perform the above-described processing operations.

Such a recording medium may be various types of computer readable media such as ROM, RAM, memory chip, memory card, external hard drive, hard drive, CD, DVD, magnetic disk or magnetic tape.

Although the present disclosure has been described with reference to the accompanying drawings, the scope of the present disclosure is determined by the claims described below and should not be construed as being limited to the foregoing embodiments and/or drawings. And it should be clearly understood that improvements, changes and modifications obvious to those skilled in the art of the disclosure described in the claims are also included in the scope of the present disclosure.

100: electronic device 110: memory
120: peripheral device 130: multi-core processor

Claims (11)

In electronic devices,
a multi-core processor including a plurality of core CPUs;
a plurality of peripheral devices operating according to a control command of the multi-core processor; and
A memory for storing information on a current application mode among a plurality of application modes and information on a peripheral device allocated to each of the plurality of core CPUs for each of the plurality of application modes;
The multi-core processor,
An electronic device that determines a current application mode based on information about the current application mode stored in the memory upon booting, and allocates a peripheral device to be used in each core CPU based on the stored peripheral device information. According to claim 1,
A first core CPU among the plurality of core CPUs,
It is determined to switch the application mode, and if the conversion of the application mode is determined, a request for switching the application mode is made to another core CPU, and upon receiving an application mode switching response from the other core CPU, information on the application mode to be switched is stored in the memory. electronic device for storage. According to claim 2,
Each of the plurality of core CPUs,
An electronic device that initializes a peripheral device to be used for each core CPU based on information about a current application mode stored in the memory and information about the peripheral device stored in the memory. According to claim 3,
Each of the plurality of core CPUs,
An electronic device that identifies a peripheral device to be used in each core CPU based on a current application mode and the stored peripheral device information, and initializes the new peripheral device when a new peripheral device that has not previously been used is allocated. According to claim 2,
The first core CPU,
An electronic device that restarts a multi-core processor when information about an application mode to be switched is stored in a memory. According to claim 1,
The peripheral device is
An electronic device that includes at least one of CAN, CAN-FD, and Ethernet. A peripheral device sharing method in a multi-core processor including a plurality of core CPUs,
determining a current application mode based on information about a current application mode stored in a memory at booting;
allocating a peripheral device to be used by each core CPU based on the peripheral device information stored in the memory and assigned to each of the plurality of core CPUs for each of the plurality of application modes; and
A peripheral device sharing method comprising: initializing a peripheral device to which each of a plurality of core CPUs is assigned. According to claim 7,
determining, by a first core CPU among the plurality of core CPUs, switching of an application mode;
requesting, by the first core CPU, to switch the application mode to another core CPU when it is determined that the switch of the application mode is to be performed;
and storing, by the first core CPU, information on the application mode to be switched to in the memory when receiving a response to change the application mode from another core CPU. According to claim 8,
and performing, by each of the plurality of core CPUs, initialization of a peripheral device to be used for each core CPU based on the information about the current application mode stored in the memory and the stored information on the peripheral device. According to claim 9,
Performing the initialization step,
Each of the plurality of core CPUs identifies a peripheral device to be used by each core CPU based on the current application mode and the stored peripheral device information, and if a new peripheral device that has not been previously used is additionally allocated, information on the new peripheral device is determined. Peripheral sharing method to perform initialization According to claim 8,
When information on an application mode to be switched is stored in a memory, the first core CPU restarts the multi-core processor.

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