KR20230092252A - Low power switching power converter - Google Patents

Abstract

A standby power system for a flyback converter is disclosed. The flyback converter includes a primary side, a secondary side, an output terminal at the secondary side, and a secondary side controller, the output terminal being configured to electrically connect to a load. The standby power system includes a comparator on the secondary side; an opto-coupler in signal communication with the primary side, the secondary side and the comparator; and a cable disconnection detector (or load detector). The cable disconnection detector is configured to determine whether the device is electrically connected to the flyback converter via the charging cable and to set the flyback converter to standby mode when the device is disconnected from the charging cable.

Description

Low power switching power converter {LOW POWER SWITCHING POWER CONVERTER}

This application relates to switching power converters, and more specifically to systems that reduce power consumption of switching power converters in standby mode.

A flyback converter, such as one for charging batteries in mobile devices, includes a feedback loop that regulates the output voltage in both normal and standby modes of operation. In both modes of operation, the flyback converter is connected to AC power lines (ie AC mains). In normal operating mode, the mobile device is connected to the flyback converter. However, in standby mode of operation, the flyback converter is disconnected from the mobile device (e.g. smart phone). To regulate the output voltage in both of these modes of operation, the flyback converter includes a feedback loop with an error amplifier that generates an error voltage based on the difference between the output voltage and the desired value for the output voltage. A loop filter filters the error voltage to generate a control voltage. Because the feedback loop must be active during standby mode to regulate the output voltage, the flyback converter still consumes power during standby mode, commonly referred to as standby power or standby losses.

To reduce standby losses, prior art methods generally focus on reducing integrated circuit (IC) current. When a no-load condition is detected by the flyback converter, known approaches include shutting down various functional blocks of circuitry to reduce IC quiescent current. However, the feedback loop must still be on, which consumes most of the power during standby mode of operation. Also, in embodiments where the control voltage is generated on the secondary side of the flyback converter and transmitted through an opto-coupler, the opto-coupler conducts a continuous current, which also increases losses.

Accordingly, there is a need in the art for flyback converters with reduced power consumption during standby mode.

To provide reduced standby mode power consumption, a standby power system is provided that may be implemented on both sides (or both sides) of the transformer of the flyback converter. The standby power system uses a comparator to control the switching of the power switch transistor after the cable disconnection detector triggers the standby mode of operation. A cable disconnect detector is whether a device (e.g., a mobile device or a wireless charger for a mobile device) is electrically connected to a flyback converter via a charging interface such as a USB cable or a Lightning cable, for example by monitoring a data channel within the charging interface. is configured to determine When the cable disconnect detector detects that the device has been disconnected, the cable disconnect detector sets the flyback converter to a standby mode of operation where the feedback loop to the normal operating mode is powered off. For example, a cable disconnection detector triggers the shutdown of the error amplifier and loop filter in the feedback loop in response to the disconnection of the device. In alternative embodiments, the cable disconnect detector may be replaced with a load detector that determines whether the device is applying a load. When the load detector detects that no load is present or below a threshold load level, the load detector sets the flyback converter to standby mode of operation.

In embodiments where the comparator is a secondary side comparator, the secondary side comparator functions during standby mode to compare the flyback converter output voltage to a threshold voltage. When the secondary-side comparator detects that the output voltage is below the threshold voltage, the secondary-side comparator drives the digital signal through the ground isolation channel. For example, the secondary side comparator may cause current to flow through the photodiode of the opto-coupler. However, when the output voltage is greater than the threshold voltage, no current flows in the opto-coupler. In response to the photodiode current, the primary side controller triggers the power switch transistor to cycle the output voltage to charge. Since there is no load during standby mode, the output voltage will charge very quickly above the threshold voltage. Thus, the duty cycle for signaling through the opto-coupler is relatively small as it does not conduct current except for relatively-short periods of time where the output voltage is below the threshold voltage.

A primary side comparator may be used instead of or in combination with a secondary side comparator. A cable disconnect detector (or load detector) remains on the secondary side to signal to the standby power system via (eg) an opto-isolator that the device has disconnected from the charging cable. In response to this detection, the normal mode feedback loop is powered down. The primary side controller is powered by the power supply voltage generated by the auxiliary winding in the flyback converter's transformer. To keep the output voltage in regulation, the primary side comparator compares the power supply voltage to a threshold voltage. Thus, the power supply voltage serves as a proxy for the output voltage with respect to regulation by the primary side comparator. When the power supply voltage drops below the threshold voltage, the primary side comparator cycles the power switch transistor until the desired peak primary current is reached. Thus, the resulting standby mode is advantageously very-low power in that the primary side comparator does not trigger any opto-coupler signaling.

These and other aspects of the invention will be more fully understood upon review of the detailed description that follows. Other aspects, features, and embodiments will be apparent to those skilled in the art upon reviewing the following description of specific, exemplary embodiments, in conjunction with the accompanying drawings. Although features may be described with respect to specific embodiments and figures below, all embodiments may include one or more of the advantageous features described herein. In other words, while one or more embodiments may be described as having certain advantageous features, one or more of these features may also be used in accordance with various embodiments described herein. In a similar manner, although example embodiments may be described below as device, system, or method embodiments, it should be understood that such example embodiments may be implemented in a variety of devices, systems, and methods.

The invention may be better understood by referring to the following drawings. Embodiments of the present disclosure and their advantages are best understood by referring to the following detailed description. Components in the drawings are not necessarily drawn to scale, emphasis instead focused on illustrating the principles of the present invention. In the drawings, like numbers indicate corresponding parts throughout the different views.
1A illustrates a system block diagram of a standby power system for a flyback converter utilizing a comparator on the secondary side of the flyback converter, in accordance with an aspect of the present disclosure.
1B illustrates a normal mode portion of a feedback loop in a secondary side controller, in accordance with an aspect of the present disclosure.
2 illustrates some example waveforms for a flyback converter during a standby mode, in accordance with an aspect of the present disclosure.
3 illustrates a flowchart of a method performed by the standby power system shown in FIG. 1A, in accordance with an aspect of the present disclosure.
4 illustrates a system block diagram for a flyback converter using a primary side comparator, in accordance with an aspect of the present disclosure.

To provide reduced standby mode power consumption, a standby power system is provided that includes a secondary side comparator and/or a primary side comparator. A cable disconnection detector may, for example, monitor the data channel of the charging interface so that a device (eg a mobile device such as a smartphone or a wireless charger for a mobile device) flies through a charging interface to a charging cable such as a USB cable or a lightning cable. It functions to determine whether it is electrically connected to the bag converter. In alternative embodiments, the cable disconnect detector may be replaced with a load detector that detects whether the device is drawing a load. When the cable disconnection detector detects that the device is disconnected, the cable disconnection detector sets the flyback converter to a standby mode of operation where the feedback loop to the normal operating mode is powered off. For example, a cable disconnection detector triggers the power down of the error amplifier and loop filter in the feedback loop in response to disconnection of the device. As used herein, the term “device” refers to a mobile device or a wireless charger for a mobile device. The load detector functions similarly to set the flyback converter to standby mode in response to detecting that the load is either absent or below a threshold load value.

A standby power system with a secondary side comparator is first described, followed by a description of a standby power system with a primary side comparator. However, it will be appreciated that the standby power system may include both primary side and secondary side comparators. Compared to the feedback loop used during normal operation mode, the comparator consumes relatively small power so that "zero standby power" (standby power consumption of 5 mW or less) is easily achieved. In contrast, conventional standby mode power consumption does not provide zero standby power because the standby power consumption of the feedback loop and associated circuitry exceeds 5 mW.

A feedback loop during normal operating mode uses (eg) an error amplifier and loop filter to generate a control voltage. If a control voltage is generated on the secondary side of the flyback converter, the flyback converter may be considered using secondary side regulation. In normal operating mode, the secondary side controller regulates the output voltage from the output terminal by sending an analog signal representative of the control voltage to the primary side of the flyback converter through an opto-coupler. The primary side controller receives the analog signal and uses it as an input to control the cycling of the power switch transistor. Note that this control signal communication has a 100% duty cycle. This is a problem in conventional standby operation modes in which the output voltage is adjusted using a feedback loop since the opto-coupler continuously consumes power.

However, in the standby mode of operation disclosed herein with secondary side regulation, the secondary side comparator monitors the output voltage to send a digital (on/off) signal through the opto-coupler. A digital signal is generated by the secondary side comparator by comparing the output voltage to a threshold voltage. When the output voltage drops below the threshold voltage, the secondary side comparator switches on the current through the photodiode of the opto-coupler (ON part of the digital signal). However, when the output voltage is greater than the threshold voltage, the secondary side comparator switches off the photodiode current (OFF part of the digital signal). Typically, the threshold voltage is preset or defined such that the power supply voltage to the secondary side controller is greater than an under-voltage lock out (UVLO) value. The UVLO value is the voltage required to keep the integrated circuit (IC) functional in response to reconnection of the device to the charging interface of the flyback converter. This allows the flyback converter to exit standby mode almost immediately and resume normal operation mode.

The on digital signal transmitted through the opto-coupler is received by the primary side portion of the standby power system so that the primary side portion can cycle the power switch transistor. For example, the primary side portion may switch on the power switch transistor until the primary current measured by the voltage across the sense resistor exceeds the voltage corresponding to the desired peak primary current. When the primary side senses that the peak primary current has been reached, it switches off the power switch transistor. The resulting power delivered to the secondary side of the flyback converter quickly increases the output voltage as there is no load during the standby mode of operation. Thus, the secondary side comparator responds to the output voltage exceeding the threshold voltage by switching off the photodiode current. Thus, the on portion of the digital signal transmitted by the opto-coupler has a relatively small duty cycle. For example, in one embodiment, the on portion of the digital signal may be between 200 and 400 microseconds, while the off portion is approximately 0.5 second. This very low duty cycle results in relatively low power dissipated in the opto-coupler. In other embodiments, the opto-coupler may be replaced with other types of ground isolation channels such as signal transformers or capacitors. However, regardless of how the ground isolation channel is implemented, the secondary side comparator will advantageously drive the ground isolation channel with a relatively low duty cycle digital on/off signal so that standby power is conserved. The following description, without loss of generality, relates to an embodiment in which the ground isolation channel is an opto-coupler. The charging cable may be a Universal Serial Bus (USB) power adapter or a Lightning cable.

An exemplary flyback converter 103 is shown in FIG. 1A along with a standby power system 100 that includes secondary side regulation and a secondary side comparator 104 according to the present disclosure. The flyback converter 102 includes a transformer T having a primary winding 110 and a secondary winding 112 . The primary winding 110 is in series with the primary side power switch transistor SW. During the normal operating mode, the primary side controller 114 responds to a control current sent by the secondary side controller 116 through the opto-coupler 122 driven through the opto-coupler (OPTO) terminal to the power switch transistor ( The gate of the power switch transistor (SW) is driven to control the cycling of SW). The secondary side controller 116 may also function as a synchronous rectifier (SR) controller to control the cycling of the SR switch transistor. In alternative embodiments, the SR switch transistor may be replaced with an output diode to rectify the secondary side current.

A rectified input voltage (V _IN ), such as that generated by diode bridge rectification of the AC mains, is received at input terminal 118 and, when power switch transistor SW is switched on, passes through power switch transistor SW to the primary Filtered by the input capacitor (C _IN ) to drive the winding current. While the power switch transistor (SW) conducts, the SR switch transistor remains off. When the desired peak primary winding current is reached, as detected through the V _ipk voltage across the sense resistor (R _S ) coupled between the source of the power switch transistor (SW) and ground, the power switch transistor (SW) cycles. As it is off and the SR switch transistor is cycled on, the secondary winding current flows to generate an output voltage (V _OUT ) at the output terminal 120 supported by the output capacitor (C _OUT ).

Cable disconnection detector 123 monitors the data channel (eg, CC1/CC2 pins on USB interface 124) to determine whether device 144 is electrically connected to a USB cable (or other suitable charging interface). And, when the device 144 is disconnected, it sets the flyback converter 102 to standby mode. In this example, cable disconnection detector 123 is part of secondary side controller 116 that includes an input/output (I/O) terminal for connection to a data channel in the charging interface for charging device 144. may be implemented as

During standby mode, the secondary side comparator 104 receives the output voltage V _OUT , eg, through a voltage divider comprising a first resistor R ₁ , a second resistor R ₂ , and ground 146 . do. The output terminal of secondary side comparator 104 drives the gate of transistor 150 in series with photodiode 152 in opto-coupler 122 . The secondary-side comparator 104 compares the reduced output voltage (V _OUT ) with a threshold voltage (V _LOW ) through a voltage divider. When the reduced version of V _OUT is greater than V _LOW , secondary-side comparator 104 shuts off transistor 150 so that opto-coupler 122 does not dissipate power. However, when the reduced version of V _OUT is less than V _LOW , secondary side comparator 104 switches on transistor 150 to conduct photodiode current. Although the following description assumes that the secondary side comparator 104 directly compares the output voltage to the threshold voltage, it will be appreciated that this comparison may be indirect, such as by comparing a reduced version of the output voltage. Since photodiode 152 is coupled between output terminal 120 and transistor 150, the output voltage drives photodiode current through photodiode 152 when transistor 150 conducts.

Thus, opto-coupler 122 is a digital on that is ON when secondary-side comparator 104 asserts its output signal and OFF when secondary-side comparator 104 grounds its output signal. It may be considered to transmit an /off signal. To respond to this digital signal transmission, standby power system 100 includes a primary side portion that may include second comparator 156 in signal communication with photodetector 158 of opto-coupler 122 . In this example, photodetector 158 is a bipolar junction transistor (BJT) with its collector electrically connected to primary side power supply voltage (V _DD ) through resistor R ₃ and its emitter electrically connected to ground. . Second comparator 156 compares the voltage at the emitter of photodetector 158 to a predetermined on-voltage (V _ON ) and, in response thereto, outputs an output used to control cycling of power switch transistor SW. and generate a signal (also referred to as an enable signal EN). More generally, the primary side portion of standby power system 100 functions to detect whether current is flowing through photodetector 158 .

In this example, the second comparator 156 is in signal communication with a sequential logic circuit or storage element such as, for example, a set-reset flip-flop (also known as an SR flip-flop or SR latch) 170 and , the output signal of the second comparator 156 drives the set terminal of the SR flip-flop 170. Second comparator 156 may be in signal communication with the SR latch via oscillator 172, which responsive to an assertion of the output signal from second comparator 156 generates pulse signal 174. is configured to generate The pulse signal 174 drives the set input (S) of the SR flip-flop 170 to set the flip-flop 170.

The Q output 180 of the SR flip-flop 170 drives the gate of the power switch transistor SW. Accordingly, while the SR flip-flop 170 is being set, the power switch transistor SW is switched on to conduct. To reset the flop 170 (which may also be denoted as an SR latch), the primary side portion of the standby power system 100 also has a first circuit in signal communication with the reset input (R) of the SR flip-flop 170. 3 comparators 176 may be included. A third comparator 176 compares the sense resistor voltage across sense resistor R _S against a predetermined peak current voltage reference value V _ipk and drives the reset input R of SR flip-flop 170. configured to generate a reset signal 178 . Accordingly, when the sense resistor voltage is equal to V _ipk , power switch transistor SW is switched off by resetting flop 170 .

The term “signal communication” refers to circuits, components, components, modules, and/or devices that enable a circuit, component, module, and/or device to communicate and/or receive signals and/or information from another circuit, component, module, and/or device. refers to any kind of communication and/or connection between fields, modules, and/or devices. Communication and/or connectivity may cause signals and/or information to be transferred from one circuit, component, module, and/or device to another circuit, component, module, and/or device. , and/or devices, including wireless or wired signal paths. Signal paths may include, for example, conductive wires, electromagnetic wave guides, cables, attached and/or electromagnetically or mechanically coupled terminals, semi-conductive or dielectric materials or devices, or other similar physical connections or Like couplings, it may be physical. Additionally, signal paths enable communication information to pass from one circuit, component, module, and/or device to another circuit, component, module, and/or device in a variety of digital formats, without passing through a direct electromagnetic connection. It may also be non-physical, such as free-space (in the case of electromagnetic propagation) or information paths through components.

The portion of the normal mode feedback loop in secondary side controller 116 is shown in more detail in FIG. 1B. The error amplifier 200 forms an error signal by comparing the output voltage with the reference voltage Vref. The output of secondary side comparator 104 is a digital signal, whereas the error signal is an analog signal. Loop filter 205 filters the error signal into a control voltage driving opto-coupler 122 . Note that the duty cycle of this control voltage is 100%, so its transmission during the conventional standby mode of operation results in constant power consumption by the opto-coupler 122. However, during the standby mode of operation disclosed herein, both the error amplifier 200 and the loop filter 205 are powered down. Secondary side comparator 104 then controls the feedback via opto-coupler 122. Not only is the power consumption of the secondary side comparator 104 relatively low compared to the normal mode feedback loop power consumption, but the duty cycle for the on portion of the digital control signal sent through the opto-coupler 122 is close to zero, Opto-coupler power consumption is also greatly reduced. During normal operating mode, primary-side controller 114 processes the control signal received from opto-coupler 122, eg, through a proportional-integral-derivative (PID) control algorithm, and thereby powers the power switch transistor SW. Control your cycling.

Some operating waveforms for the flyback converter 102 are shown in FIG. 2 , including a graph of the primary side power supply voltage (VCC), the output voltage, and the gate voltage of the power switch (SW) during standby mode. As further described herein, the primary-side power supply voltage (VCC) is generated in the auxiliary winding and is connected to a VCC capacitor, which may have a capacitance that is significantly smaller (eg, 100 times smaller) than the capacitance for the output capacitor. filtered by Thus, the ripple in the primary-side power supply voltage (VCC) may be relatively prominent compared to the ripple in the output voltage. Since there is no load, the power switch transistor (SW) is cycled once approximately every 0.5 seconds in this example. The output voltage is then restored to the desired value (approximately 5.5 V in this example). Thereafter, the output voltage decreases relatively slowly until triggering another pulsing of the power switch transistor SW. However, the power supply voltage (VCC) may drop several volts from one pulse to another during this approximately 0.5 second dead time. The low duty cycle of the digital control signal transmitted through opto-coupler 122 is evidenced by the gate voltage of power switch transistor SW. The duty cycle in this example is approximately 300 to 400 microseconds divided by 0.5 seconds, which is significantly lower and thus reduces opto-coupler power consumption.

An exemplary method of operation for the flyback converter 102 will now be discussed with respect to the flowchart shown in FIG. 3 . Method 300 begins 302 by determining whether device 144 is electrically connected to a charging interface of flyback converter 102 . When device 144 is electrically connected, the feedback loop described with respect to FIG. 1B operates in its normal mode of operation. In normal operating mode, primary side controller 114 and secondary side controller 116 are fully powered. Instead, if device 144 is not connected to a charging interface, the method sets flyback converter 102 to a standby mode of operation in which the normal mode feedback loop is powered down (306). During the standby mode, the method determines at step 308 whether the output voltage is V _OUT above the threshold voltage V _LOW and, in response, keeps the photodiode current off (310). If V _OUT is less than V _LOW , the method turns on the photodiode current (312), and a digital control signal is delivered to the primary side of the flyback converter 102 so that the power switch transistor (SW) is cycled at step 314. The method then returns to step 308 of monitoring V _OUT from output terminal 120 .

Referring again to FIG. 2 , ripple on the primary-side power supply voltage (VCC) may risk triggering an undervoltage lockout. The standby mode of operation of the primary side comparator 403 monitoring the primary side power supply voltage (VCC) is shown in FIG. 4 for a flyback converter 402 with a standby power system 400 . Primary-side comparator 403 functions similarly to that described with respect to comparator 156, except that comparator 403 is comparing the primary-side power supply voltage (VCC) to a threshold voltage (V _LOW ). For example, this comparison may be performed indirectly by using a reduced version of the power supply voltage, such as obtained using a voltage divider formed by the first resistor R ₁ and the second resistor R ₂ . The rest of the primary side portion of the standby power system 400 is as described with respect to the standby power system 100 . The primary controller 114 and the primary side portion of the standby power system 400 may be considered to form a primary side system for the flyback converter 402 . Comparators 404 and 156 may be considered comparing the feedback signal to a threshold voltage. For comparator 403, the feedback signal is the primary side power supply voltage (VCC). For comparator 156, the feedback signal is the voltage generated by the received opto-coupler signal.

Many modifications, substitutions and variations may now be made to and in the materials, apparatus, constructions and uses of the devices of this disclosure by some skilled in the art without departing from the scope of this invention. you will find that there is In view of this, as these are merely some examples of the invention, the scope of the invention should not be limited to that of the specific embodiments illustrated and described herein, but rather, the scope of the following appended claims and their functional equivalents It must fully correspond to the scope.

Claims (20)

As a secondary side controller for a flyback converter,
a feedback loop configured to operate during a normal operating mode to generate a control signal based on an error between an output voltage and a reference voltage for the flyback converter;
control the feedback loop during the normal mode of operation in response to detecting coupling of the device to the flyback converter, and control the feedback loop during a standby mode of operation in response to detection of disconnection of the device from the flyback converter; a cable disconnection detector configured to cut power; and
switching on photodiode current through a photodiode in an opto-coupler in response to the output voltage being less than the threshold voltage during the standby operation mode and switching off the photodiode current in response to the output voltage being greater than the threshold voltage; A secondary side controller for a flyback converter comprising a comparator configured to: According to claim 1,
and a transistor in series with the photodiode, wherein the comparator is configured to turn on the transistor in response to the output voltage being below a threshold voltage to switch on the photodiode current. According to claim 1,
further comprising a data channel;
wherein the cable disconnection detector is configured to monitor the data channel to detect whether the device is disconnected from the flyback converter. According to claim 3,
The data channel is a data channel for a USB cable, a secondary side controller for a flyback converter. According to claim 1,
The secondary controller for a flyback converter, wherein the secondary controller includes a synchronous rectifier controller. According to claim 1,
wherein the feedback loop includes a loop filter configured to drive the opto-coupler with the control signal during the normal operating mode. As a primary side system for a flyback converter,
a controller configured to control cycling of the power switch transistor by processing a control signal during a normal operating mode and configured to power down during a standby operating mode; and
including a standby system;
The standby mode system,
a storage element configured to cycle the power switch transistor on in response to being set and to cycle the power switch transistor off in response to being reset;
a first comparator configured to set the storage element in response to a feedback signal being below a threshold voltage; and
and a second comparator configured to reset the storage element after the storage element has been set. According to claim 7,
wherein the first comparator is configured to set the storage element in response to an opto-coupler current being less than a threshold current. According to claim 7,
wherein the first comparator is configured to set the storage element in response to a power supply voltage being less than the threshold voltage. According to claim 7,
Further comprising an oscillator,
wherein the first comparator is configured to set the storage element by switching on the oscillator. According to claim 10,
wherein the storage element is a flip-flop. According to claim 7,
wherein the controller is further configured to generate the control signal during primary-only feedback. According to claim 7,
wherein the controller is further configured to receive the control signal from an opto-coupler. A method of powering down parts of a flyback converter with an opto-coupler in standby mode, comprising:
setting the flyback converter to a standby mode in response to the device being disconnected from the charging interface to the flyback converter;
conducting photodiode current at an opto-coupler in response to an output voltage to the flyback converter being less than a first threshold voltage during the standby mode; and
switching off the photodiode current while the output voltage is greater than the first threshold voltage during the standby mode. According to claim 14,
and detecting that the device is disconnected from the charging interface by monitoring a data channel at the charging interface. According to claim 14,
cycling a power switch transistor in response to conduction of the photodiode current. According to claim 16,
the cycling of the power switch transistor,
switching on an oscillator to set the flip-flop by generating a pulse signal at the set input of the flip-flop;
switching on the power switch transistor in response to the setting of the flip-flop;
resetting the flip-flop in response to the sense resistor voltage exceeding the peak current voltage; and
and switching off the power switch transistor in response to the reset of the flip-flop. According to claim 14,
comparing a power supply voltage to a second threshold voltage during the standby mode; and
cycling a power switch transistor in response to the power supply voltage being less than the second threshold voltage during the standby mode. According to claim 18,
and cycling the power switch transistor in response to the power supply voltage being less than the second threshold voltage during the standby mode comprises setting a flip-flop to switch the power switch transistor on. According to claim 19,
wherein the setting of the flip-flop is responsive to a pulse signal from an oscillator.

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