KR20230082519A - Method for optical proximity correction and method of manufacturing semiconductor device having the same - Google Patents

Abstract

An optical proximity correction method according to an embodiment of the present invention includes the steps of inputting curved layout data for forming a target layer, performing manhattanization based on the curved layout data, and acquiring the stepped data. Step of performing fragmentation on the stepped data and decomposing the stepped data into a plurality of data components, generating an OPC model based on the plurality of data components and performing simulation extracting the contour of the OPC model, calculating an overlap score between the contour of the OPC model and an adjacent layer adjacent to the target layer and reflecting it to the OPC model, and based on the simulation result and obtaining design data for forming the target layer by doing so. Therefore, through the optical proximity correction method according to an embodiment of the present invention, it is possible to obtain optimal design data close to the target layer in consideration of the adjacent layer.

Description

Optical proximity correction method and method of manufacturing a semiconductor device including the same

The present invention relates to an optical proximity correction method and a method of manufacturing a semiconductor device including the same.

Among manufacturing processes of semiconductor devices, a lithography process is a technique of transferring a circuit pattern previously formed on a photo mask to a photoresist formed on a substrate through exposure and development. Recently, as the patterns constituting semiconductor devices are miniaturized, the use of lithography technology using extreme ultraviolet rays and electron beams is gradually increasing. Meanwhile, as the pattern is miniaturized, an optical proximity effect (OPE) may occur in which the pattern formed on the photo mask is distorted and transferred to the substrate due to the influence of neighboring patterns. Optical Proximity Correction (OPC) may be performed to overcome the optical proximity phenomenon and minimize the difference between layout data and patterns formed on the semiconductor substrate.

One of the problems to be achieved by the technical idea of the present invention is to input curved layout data having the same shape as the target layer, perform stepping, and generate an OPC model in consideration of adjacent layers to accurately form the target layer. It is an object of the present invention to provide an optical proximity correction method capable of manufacturing a photomask.

An optical proximity correction method according to an embodiment of the present invention includes the steps of inputting curved layout data for forming a target layer, performing manhattanization based on the curved layout data, and generating the stepped data. Obtaining, performing fragmentation on the stepped data and decomposing the stepped data into a plurality of data components, generating an OPC model based on the plurality of data components and performing simulation extracting the contour of the OPC model by performing a step of calculating an overlap score between the contour of the OPC model and an adjacent layer adjacent to the target layer and reflecting the result to the OPC model; and and acquiring design data for forming the target layer based on the method.

An optical proximity correction method according to an embodiment of the present invention includes the steps of inputting curved layout data for forming a target layer, performing manhattanization based on the curved layout data, and generating the stepped data. Obtaining, performing a simulation for correcting the optical proximity effect based on the stepped data, obtaining design data for forming the target layer without modifying the curved layout data based on the simulation result It includes steps to

A method of manufacturing a semiconductor device according to an embodiment of the present invention performs manhattanization on curved layout data for a target layer, and performs optical proximity correction (OPC) based on the stepped data. and forming a photoresist pattern on a substrate using a photomask fabricated based on the design data.

In the optical proximity correction method according to an embodiment of the present invention, design data close to a target layer may be obtained by using curved layout data as input data and performing stair stepping.

In the optical proximity correction method according to an embodiment of the present invention, OPC matching may be improved by calculating an overlap score between a contour of an OPC model and an adjacent layer in a simulation step.

Various advantageous advantages and effects of the present invention are not limited to the above description, and will be more easily understood in the process of describing specific embodiments of the present invention.

1 is a block diagram simply illustrating a computer system for performing an optical proximity correction method according to an embodiment of the present invention.
2 is a flowchart illustrating a method of manufacturing a semiconductor device according to an exemplary embodiment of the present invention.
3 is a diagram for explaining a photolithography system using a photomask fabricated according to an optical proximity correction method according to an embodiment of the present invention.
4 is a diagram for explaining a general optical proximity correction method.
5 is a flowchart illustrating an optical proximity correction method according to an embodiment of the present invention.
6 is a diagram for explaining layout data input to an optical proximity correction method according to an embodiment of the present invention.
7 to 9 are diagrams for explaining a step step included in an optical proximity correction method according to an embodiment of the present invention.
10 and 11 are diagrams for explaining a fragmentation step included in an optical proximity correction method according to an embodiment of the present invention.
12 to 15 are diagrams for explaining a simulation step included in an optical proximity correction method according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a block diagram simply illustrating a computer system for performing an optical proximity correction method according to an embodiment of the present invention.

Referring to FIG. 1 , a computer system may include a CPU 10 , a working memory 30 , an input/output device 50 , and a secondary storage device 70 . The computer system may be provided as a dedicated device for performing the optical proximity correction method according to an embodiment of the present invention. As an example, the computer system may have various design and verification simulation programs.

The CPU 10 may execute software (application programs, operating systems, device drivers) to be executed in a computer system. The CPU 10 may execute an operating system (OS) loaded into the working memory 30 . The CPU 10 may execute various application programs to be driven based on an operating system. For example, the CPU 10 may execute the layout design tool 32 and/or OPC rules 34 loaded into the working memory 30 .

An operating system or application programs may be loaded into the working memory 30 . When booting the computer system, the OS image stored in the auxiliary storage device 70 may be loaded into the working memory 30 according to a booting sequence. All input/output operations of a computer system may be supported by an operating system. Application programs selected by the user and/or application programs for providing basic services may be loaded into the working memory 30 . Layout design tool 32 and/or OPC tool 34 may be loaded into working memory 30 from secondary storage 70 .

The working memory 30 is a volatile memory such as a static random access memory (SRAM) or a dynamic random access memory (DRAM), or a phase-change random access memory (Phase-change random access memory). , PRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), and NOR flash memory.

The layout design tool 32 may have a bias function that can change the shape and location of specific layout patterns differently from those defined by design rules. The layout design tool 32 may perform a Design Rule Check (DRC) under the changed bias data condition.

In the optical proximity correction method according to an embodiment of the present invention, layout data may have a curved shape. For example, the layout data may have the same shape as a target layer to be formed using the manufactured photomask. However, this is merely an example and may not be limited. Meanwhile, the OPC tool 34 may perform optical proximity correction (OPC) on the layout data output from the layout design rule 32 .

The input/output device 50 may control user input and output from user interface devices. For example, the input/output device 50 may include a keyboard or a monitor, through which information may be received from a designer. The input/output device 50 may display the processing process and processing results of the OPC tool 34 .

The secondary storage device 70 may be provided as a storage medium of a computer system. The auxiliary storage device 70 may store application programs, operating system images, and various data. The auxiliary storage device 70 may be provided as a memory card such as MMC, eMMC, SD, or MicroSD or a hard disk drive (HDD). Alternatively, the secondary memory device 70 may include non-volatile memory such as PRAM, MRAM, and NOR flash memory.

The system interconnector 90 may be a system bus for providing a network inside the computer system. The CPU 10 , the working memory 30 , the input/output device 50 , and the auxiliary storage device 70 may be electrically connected to each other through the system interconnector 90 and may exchange data with each other. However, the configuration of the computer system may not be limited to that shown in FIG. 1 and may further include additional configurations.

2 is a flowchart illustrating a method of manufacturing a semiconductor device according to an exemplary embodiment of the present invention.

Referring to FIG. 2 , a method of manufacturing a semiconductor device according to an embodiment of the present invention forms various patterns on a semiconductor substrate and/or layers formed on the semiconductor substrate by various semiconductor processes such as a deposition process, an etching process, and a polishing process. formation process may be included. Accordingly, a method of manufacturing a semiconductor device is a lithography process for manufacturing a photomask based on layout data having a shape corresponding to a pattern of a target layer and forming a pattern on a semiconductor substrate in a semiconductor process using the manufactured photomask. It may include the step of performing.

In order to manufacture a photo mask, first, a required circuit may be designed (S110) and a layout for a circuit pattern may be designed (S120). At this time, the pattern of the designed circuit may correspond to a circuit, interconnection, etc. directly related to the operation of the semiconductor device, and the layout may mean a physical structure in which the circuit can be transferred onto a wafer. there is.

Thereafter, optical proximity correction may be performed on the pattern layout (S130). In the optical proximity correction method according to an embodiment of the present invention, curved layout data corresponding to a target layer may be used as input data, and after performing Manhattanization on the input curved layout data, the stepped It can be done based on the data. In addition, the simulation included in the optical proximity correction method according to an embodiment of the present invention may be performed using an overlap score calculated based on an overlap degree between the contour of the OPC model and an adjacent layer adjacent to the target layer. there is.

When the design data acquired through the optical proximity correction method is design data suitable for fabricating a photomask (S140), the design data may be transmitted as MTO (Mask Tape-Out) design data (S150). For example, the MTO design data may be data for requesting mask manufacturing based on design data of a photomask on which optical proximity correction is performed. MTO design data may have a graphic data format used in electronic design automation software or the like.

When the MTO design data is transmitted, mask data preparation (MDP) may be performed (S160). MDP may include format conversion, augmentation and verification. After performing the MDP, a photo mask may be manufactured through a front process (FEOL) and a back process (BEOL) (S170). For example, the front process (FEOL) may include a mask exposure process, a chemical treatment process, and a measurement process, and the post process (BEOL) may include processes such as defect inspection, defect repair, and pellicle application.

Meanwhile, a semiconductor process of forming a photoresist pattern on a semiconductor substrate may be performed using a photomask manufactured based on design data (S180). Referring to the etching process as an example, an etching process may be performed to remove at least a portion of the semiconductor substrate or layers on the semiconductor substrate from a region exposed by the patterns included in the mask. Through the etching process as described above, predetermined patterns may be formed on the semiconductor substrate.

Existing optical proximity correction methods used linear layout data as input data, but as the types of semiconductor devices are complicated and the degree of integration increases, the process of manufacturing a photo mask from the layout data and/or the semiconductor process using the photo mask Errors that occur during the process may increase. For this reason, in the case of manufacturing a photomask according to the existing optical proximity correction method, problems such as changing input data or changing process conditions due to a difference between a pattern of an actually formed layer and a target layer have occurred.

In one embodiment of the present invention, curved layout data is used as input data, an overlapping score is calculated based on overlapping between a target layer and an adjacent layer adjacent to the target layer and the contour of the OPC model, and is reflected in the next repeated simulation. can Accordingly, the optical proximity correction method according to an embodiment of the present invention can improve the matching between the actually formed layer and the pattern of the target layer without changing the input data.

3 is a diagram for explaining a photolithography system using a photomask fabricated according to an optical proximity correction method according to an embodiment of the present invention.

Referring to FIG. 3 , the photolithography system 100 may include a light source 110, a photo mask 120, a reduction projection device 130, and a substrate stage 140. However, the photolithography system 100 may further include components not shown in FIG. 3 . For example, the photolithography system 100 may further include a sensor for measuring the height and slope of the surface of the semiconductor substrate W.

The light source 110 may emit light of a specific wavelength. Light emitted from the light source 110 may be irradiated onto the photo mask 120 . For example, a lens may be disposed between the light source 110 and the photo mask 120 to adjust the light focus. The light source 110 may include an ultraviolet light source (eg, a KrF light source having a wavelength of 234 nm, an ArF light source having a wavelength of 193 nm, etc.). The light source 110 may include one point light source or a plurality of point light sources.

The light source 110 may be a light source that emits extreme ultraviolet (EUV) having a wavelength between 4 nm and 124 nm. For example, the light source 110 may emit extreme ultraviolet rays having a wavelength between 4 nm and 20 nm, and according to embodiments, the wavelength of the extreme ultraviolet rays may be 13.5 nm. When the light source 110 emits extreme ultraviolet rays, the photomask 120 may be made of a material different from that when the light source 110 emits extreme ultraviolet rays. For example, with respect to the light source 110 that emits extreme ultraviolet rays, the mask 120 may include a plurality of silicon layers and a plurality of molybdenum layers that are alternately stacked, and a plurality of silicon layers and a plurality of molybdenum layers. A ruthenium layer may be further disposed on top of the layers. However, this is only one embodiment and is not limited, and the material and laminated structure of the photomask 120 applied to the light source 110 emitting extreme ultraviolet rays may be variously modified.

In order to implement a pre-designed circuit layout on the semiconductor substrate W, the photo mask 120 may include patterns having various sizes and shapes. The patterns may be formed based on design data obtained by optical proximity correction performed by an OPC tool 34 or the like based on layout data generated by the layout design tool 32 or the like shown in FIG. 1 . Patterns can be defined by transparent and opaque regions. The transparent region may be formed by etching a metal layer (eg, a Cr film) on the photo mask 120 . The transparent area may pass light emitted from the light source 110 . On the other hand, the opaque region may be a region that blocks light without passing through.

Light passing through the transparent area of the photo mask 120 may be incident to the reduction projection device 130 . The reduction projection device 130 may match patterns to be formed on the semiconductor substrate W with patterns of the photo mask 120 . Light passing through the transparent region of the photo mask 120 may be irradiated onto the semiconductor substrate W through the reduction projection device 130 . Accordingly, patterns corresponding to the patterns of the photo mask 120 may be formed on the semiconductor substrate W.

The substrate stage 140 may support the semiconductor substrate W. For example, the semiconductor substrate W may include a silicon wafer. The reduction projection device 130 may include an aperture. The aperture may be used to increase the depth of focus of ultraviolet light or extreme ultraviolet light emitted from the light source 110 . For example, the aperture may include a dipole aperture or a quadruple aperture. The reduction projection device 130 may further include a lens to adjust a light focus.

As the size of a semiconductor device decreases and the degree of integration increases, a distance between image patterns of the photo mask 120 may be relatively small. Due to this proximity, interference and diffraction of light may occur, and a distorted pattern different from an actual design may be formed on the semiconductor substrate W. When the distorted pattern is printed on the substrate W, the designed circuit may not operate or may operate abnormally.

In order to prevent pattern distortion, a resolution enhancement technology such as optical proximity correction may be used. In optical proximity correction, the degree of distortion caused by interference and diffraction of light is predicted in advance by simulation of the OPC model, and the layout for manufacturing the photomask 120 can be adjusted based on the predicted result. Patterns may be formed on the mask 120 based on the changed layout, and the patterns may be accurately formed on the semiconductor substrate W.

A layout of a semiconductor device may include a plurality of layers. An optical proximity correction method according to an embodiment of the present invention may be performed to adjust the layout of a single layer. In other words, optical proximity correction may be performed independently for each of the plurality of layers. A semiconductor device may be formed by sequentially implementing a plurality of layers on a substrate through a semiconductor process.

Optical proximity correction for each of the plurality of layers may be performed by an OPC model generated for each of the plurality of layers. Since the performance of optical proximity correction is determined according to the accuracy of the OPC model, an operation of pre-verifying and correcting an error of the OPC model may be performed to improve accuracy and yield of a semiconductor process.

For example, the photomask 120 manufactured by the optical proximity correction method according to an embodiment of the present invention may be used to form an ion implantation layer of an image sensor, for example, a layer corresponding to a floating diffusion region. That is, in the optical proximity correction method according to an embodiment of the present invention, the target layer may correspond to the floating diffusion region constituting the image sensor.

Accordingly, the adjacent layer may include a contact and a transfer gate structure constituting the image sensor. In this case, the transfer gate structure may be a vertical transfer gate (VTG) constituting the transfer transistor. However, this is only one embodiment and may not be limited, and the optical proximity correction method according to an embodiment of the present invention may be used for manufacturing various semiconductor devices other than image sensors. For example, the effect of the optical proximity correction method according to an embodiment of the present invention can be maximized when the target layer formed in the manufacturing process of a semiconductor device has a complex structure, such as having a curved shape or a 'c' shape. can

4 is a diagram for explaining a general optical proximity correction method.

Referring to (a) of FIG. 4 , in general, the optical proximity correction method may use polygon type layout data having a pattern of 0°, 45°, or 90° as input data. For example, polygonal layout data may be defined as first layout data LD1. In this case, the first layout data LD1 is used to form a target layer that overlaps with at least one of the plurality of contacts CA and does not overlap with the other plurality of contacts CA and the transfer gate structure VTG. It may be layout data.

Meanwhile, referring to (b) of FIG. 4 , a first OPC model OM1 is generated by performing fragmentation on the first layout data LD1, and simulation is performed using the first OPC model OM1. Optical proximity correction can be performed by a method of performing. Simulation of optical proximity correction may be repeatedly performed so that the first design data DD1 obtained as a result of optical proximity correction corresponds to the target layer.

However, as shown in (c) of FIG. 4 , despite performing optical proximity correction, the first design data DD1 obtained based on the first layout data LD1 may not properly correspond to the target layer. can For example, the first design data DD1 may not completely overlap at least one contact CA overlapping the target layer. Accordingly, a defect may occur in a pattern of a layer formed according to the first design data DD1.

Referring to (d) of FIG. 4 , in order to solve the pattern defect problem of the layer, the compensated first design data DD1' may be obtained by changing process conditions such as increasing a photo dose. there is. However, this is only an example and is not limited thereto, and the problem of defective layer patterns may be solved by modifying the shape of the first layout data LD1. This problem solving method may result in an increase in time cost and economic cost.

5 is a flowchart illustrating an optical proximity correction method according to an embodiment of the present invention.

Referring to FIG. 5 , the optical proximity correction method according to an embodiment of the present invention may change the shape of layout data in order to solve the pattern defect problem of the layer while minimizing the increase in time cost and economic cost. For example, layout data input to form a target layer may be curved layout data (S210).

On the other hand, if optical proximity correction is performed directly based on the curved layout data, additional cost may be consumed. Accordingly, the method for correcting optical proximity according to an embodiment of the present invention may acquire manhattanized data by performing manhattanization on the basis of the curved layout data (S220).

For example, the cascading process may be a process of converting curve-type data into polygon-type data including a 0°, 45°, or 90° pattern according to a predetermined rule. However, a specific method of stepping may not be limited to the method disclosed in this specification. For example, stepping may be performed in various ways depending on the type of semiconductor device, the complexity of the pattern, and the type of semiconductor process.

The stepped data may be decomposed into a plurality of data components through fragmentation (S230). For example, fragmentation may correspond to a process of defining stepwise data into a plurality of data components in order to generate an OPC model suitable for optical proximity correction by performing compensation on the stepwise data.

The OPC model may be a simulation model for forming the target layer. For example, information on a plurality of data components may be reflected in the OPC model, and information data such as photoresist thickness, refractive index, and dielectric constant as well as source map information on the shape of an illumination system may be reflected. can However, this is merely an example and may not be limited.

The OPC model may be generated based on a plurality of data components defined by fragmentation, and simulation may be performed using the generated OPC model (S240). As shown in FIG. 5, the first OPC model is generated without special compensation and is shown to be the basis of the simulation, but this is only one embodiment and may not be limited. For example, the OPC model is a plurality of data It can be created involving the movement of components, such as fragments.

In the optical proximity correction method according to an embodiment of the present invention, a contour may be extracted through simulation of an OPC model after fragmentation is performed. The contour of the OPC model is a result obtained through simulation using the OPC model, and may correspond to a layer formed on a semiconductor substrate through an exposure process using a photo mask. Therefore, making the contour as similar as possible to the shape of the target layer may correspond to the purpose of the optical proximity correction method.

In order to make the shape of the target layer and the contour of the OPC model as similar as possible, a step of calculating an edge placement error (EPE) between the target layer and the contour of the OPC model may be included (S250). As an example, EPE may mean a difference between a contour and an edge of a target layer. Whether design data acquired through optical proximity correction is suitable for fabricating a photomask may be determined according to the size of the EPE (S260).

For example, if the EPE is large, the difference between the contour and the target layer may be large, which may mean that the layout of the photomask is not suitable for forming the target layer. Therefore, in order to implement a photomask suitable for forming the target layer, a process of lowering the EPE below a set reference value by modifying the OPC model may be required.

In the optical proximity correction method according to an embodiment of the present invention, the fragment is moved based on the EPE calculated to lower the EPE to a set reference value or less (S270), and/or the contour of the OPC model and the adjacent adjacent target layer. An overlap score reflecting the degree of overlap between layers may be calculated (S280). The calculated overlap score may be reflected in the OPC model, and thus the difference between the contour and the target layer may be reduced.

Steps S240 to S280 of performing a simulation based on the OPC model to optimize design data and acquiring design data corresponding thereto may be repeatedly performed. When the design data obtained by the optical proximity correction in steps S210 to S280 is design data suitable for manufacturing a photomask for forming a target layer, the corresponding design data may be output as MTO data. At this time, as the design data is optimized, the design data may become closer to the curved layout data corresponding to the input data.

According to the optical proximity correction method according to an embodiment of the present invention, optimal design data for forming a target layer may be obtained without modifying curved layout data used as input data. Therefore, it is possible to solve the pattern defect problem of the target layer by making the contour as similar as possible to the shape of the target layer while minimizing the increase in time cost and economic cost.

6 is a diagram for explaining layout data input to an optical proximity correction method according to an embodiment of the present invention.

As described above, in the optical proximity correction method according to an embodiment of the present invention, input data may be curved layout data. Referring to FIG. 6 , the curved layout data may be defined as second layout data LD2. In this case, the second layout data LD2 may have the same shape as the image of the target layer.

The target layer may be formed to overlap the first contact CA1 formed inside the target layer in a first direction (eg, a Z direction). Meanwhile, the target layer may be formed so as not to overlap the second contact CA2 formed outside the target layer in the first direction. In addition, the target layer may be formed so as not to overlap the transfer gate structure VTG formed as a vertical transfer gate in a second direction (eg, X direction) and a third direction (eg, Y direction) perpendicular to the first direction. there is.

Accordingly, the layout data LD2 overlaps the first contact CA1 in the first direction (eg, the Z direction), does not overlap the second contact CA2 in the first direction, and does not overlap the transfer gate structure VTG. It may be data that does not overlap in a second direction (eg, X direction) and a third direction (eg, Y direction) perpendicular to the first direction.

The optical proximity correction method according to an embodiment of the present invention may be performed in consideration of an overlapping degree between a target layer and an adjacent layer adjacent to a contour obtained through optical proximity correction. For example, the adjacent layer may include a first layer overlapping the target layer and a second layer not overlapping the target layer. In one embodiment, the optical proximity correction method may proceed to extract a contour that overlaps the first layer as much as possible and does not overlap as much as possible as the second layer as a result of the simulation.

In FIG. 6 , the second layer includes at least one first pattern that does not overlap with the target layer on the same plane (eg, X-Y plane) as the target layer, for example, a transfer gate structure (VTG), and a first pattern perpendicular to the upper surface of the target layer. It may include at least one second pattern that does not overlap the target layer in the direction, for example, the second contact CA2.

7 to 9 are diagrams for explaining a step step included in an optical proximity correction method according to an embodiment of the present invention.

7 to 9 may be diagrams for explaining step S220 of FIG. 5 . As described above, in the optical proximity correction method according to an embodiment of the present invention, the curved layout data corresponding to the input data may be converted into data on which optical proximity correction may be performed through manhattanization.

Referring to FIGS. 7 and 8 , in order to perform stair stepping, first, arbitrary adjacent points may be set in curved layout data (S310). For example, adjacent first and second points P1 and P2 may be set in the second layout data LD2.

Meanwhile, after extracting an angle formed by two tangent lines at arbitrary adjacent points (S320), when the extracted angle is smaller than a critical angle (S330), stepping may be performed based on the two tangent lines. For example, when the angle α formed by the tangents of the first and second points P1 and P2 is smaller than the critical angle, manhattanized data MD2 having a polygonal shape based on the two tangents is obtained. can do. For example, the critical angle may be an acute angle greater than 0° and less than 90°.

However, the stair stepping method may not be limited to the methods shown in FIGS. 7 and 8 . In one example, stepping of curvilinear layout data may be performed in a way that does not use any adjacent points and/or tangents.

Referring to FIG. 9 , curvilinear layout data may be transformed into stepped data MD2. The stepped data MD2 may be polygon-shaped data. In FIG. 9 , it is shown that the stepped data MD2 overlaps the first contact CA1 in the first direction (eg, the Z direction) and does not overlap the second contact CA2 and the transfer gate structure VTG. is, but may not be limited thereto.

10 and 11 are diagrams for explaining a fragmentation step included in an optical proximity correction method according to an embodiment of the present invention.

10 and 11 may be diagrams for explaining step S230 of FIG. 5 . As described above, in the optical proximity correction method according to an embodiment of the present invention, the stepped data MD2 may be decomposed into a plurality of data components d through fragmentation. Meanwhile, information on the plurality of data components (d) may be reflected in the OPC model, and design data capable of manufacturing a photomask for forming a target layer may be obtained through optical proximity correction based on simulation of the OPC model. can do.

Referring to FIG. 10 , the stepped data MD2 may be divided into a plurality of data elements d, for example, fragments, based on a plurality of set dividing points. However, although the plurality of data elements (d) shown in FIG. 10 are shown as physically divided, this is conceptually provided for convenience and is not limited, and the fragmentation disclosed herein may not mean physical division. there is.

In the optical proximity correction method according to an embodiment of the present invention, each of the plurality of divided data components (d) may be subject to independent bias. For example, any one of the plurality of divided data elements (d) is biased in one direction (eg, X direction) and other data elements (d) biased in a different direction (eg, -X direction, Y direction, or - Y direction). Meanwhile, at least one of the plurality of data elements (d) may not be biased.

Referring to FIG. 11 , the second OPC model OM2 may be an example of an OPC model generated based on a plurality of biased data elements d. Each of the plurality of divided data elements (d) may be biased to reduce an error between an actual pattern of a layer implemented on a semiconductor substrate and a pattern of a target layer. Generating the second OPC model OM2 by biasing the divided plurality of data elements d may be performed by the OPC tool 34 shown in FIG. 1 .

12 to 15 are diagrams for explaining a simulation step included in an optical proximity correction method according to an embodiment of the present invention.

12 to 15 may be diagrams for explaining steps S240 to S280 of FIG. 5 . As described above, by performing a simulation using the second OPC model (OM2) generated by the optical proximity correction method according to an embodiment of the present invention, the contour (CON2) is extracted, and design data is obtained based on the contour (CON2). can

Referring to FIG. 12 , the second OPC model OM2 may be compensated to make the contour CON2 similar to the shape of the target layer. In the optical proximity correction method according to an embodiment of the present invention, compensation of the second OPC model OM2 may be performed based on the movement of the fragment based on the EPE and/or the overlap score.

For example, compensation of the second OPC model OM2 may be performed according to the size of the EPE between the contour CON2 based on the second OPC model OM2 and the target layer, that is, the curved layout data LD2. Also, the compensation of the second OPC model OM2 may be performed according to the size of the overlap score of the contour CON2 based on the second OPC model OM2 and an adjacent layer adjacent to the target layer.

Referring to FIG. 13 , the contour CON2 based on the second OPC model may be approximated to the curved layout data LD2 having the same shape as the target layer through optical proximity correction.

13(a) is an example of a case where the size of the contour CON2 is smaller than the curved layout data LD2, and FIG. 13(b) shows an example in which the size of the contour CON2 is smaller than the curved layout data LD2. This is an example of a similar case, and FIG. 13(c) may be an example of a case in which the size of the contour CON2 is larger than that of the curved layout data LD2. Since EPE means the difference between the contour CON2 and the edge of the target layer, the size of EPE in (a) and (c) may be larger than that in (b). Accordingly, the second OPC model having the contour CON2 in (a) and (c) as a simulation result can compensate for the direction of reducing the size of the EPE.

Referring to FIG. 14 , even if the contour CON2 based on the second OPC model does not have the exact same shape as the target layer, it overlaps with a first layer (eg, first contact CA1) overlapping the target layer among adjacent layers. And, by not overlapping with a second layer (eg, the second contact CA2) that does not overlap with the target layer among adjacent layers, occurrence of pattern defects can be minimized.

14(a) is an example of a case in which the contour CON2 does not completely overlap the first layer (eg, the first contact CA1), and FIG. 14(b) shows an example in which the contour CON2 does not completely overlap the first layer This is an example of a case that completely overlaps the second layer (eg, the first contact CA1) but does not completely overlap the second layer (eg, the second contact CA2). In (c) of FIG. 14, the contour CON2 is This may be an example of partially overlapping with two layers (eg, the second contact CA2).

In the optical proximity correction method according to an embodiment of the present invention, the larger the overlapping area of the contour CON2 and the first layer (eg, the first contact CA1), the higher the overlap score. For example, since A1 in (a) is smaller than A2 in (b), the overlapping score in (b) may be greater than the overlapping score in (a).

Meanwhile, the overlapping score may have a higher value as the overlapping area between the contour CON2 and the second layer (eg, the second contact CA2) is narrower. For example, in (b) and (c), the contour CON2 completely overlaps the first layer (eg, the first contact CA1), but since A3 in (c) is greater than A2 in (b), ( The overlap score in b) may be greater than the overlap score in (c). However, the method of calculating the overlap score may not be limited to the method disclosed in this specification.

Referring to FIG. 15 , design data obtained by the optical proximity correction method according to an embodiment of the present invention may be second design data DD2 different from the first design data DD1 shown in FIG. 4 . . In order to obtain data similar to the target layer, the first design data DD1 must be compensated with the first design data DD1', but the second design data DD2 does not require additional compensation such as correction of input data. may not be

An optical proximity correction method according to an embodiment of the present invention manufactures a photomask for accurately forming a target layer without modifying the input layout data by inputting curved layout data having the same shape as the target layer and performing stair stepping. It is possible to obtain the optimal design data possible. In addition, design data can be further optimized by calculating an overlap score in consideration of adjacent layers in an optical proximity correction process and generating an OPC model based on the calculated overlap score.

The present invention is not limited by the above-described embodiments and accompanying drawings, but is intended to be limited by the appended claims. Therefore, various forms of substitution, modification, and change will be possible by those skilled in the art within the scope of the technical spirit of the present invention described in the claims, which also falls within the scope of the present invention. something to do.

10: CPU 30: working memory
32: layout design tool 34: OPC tool
50: I/O device 70: auxiliary storage device
90: system interconnector 100: photolithography system
110: light source 120: photo mask
130: reduction projection device 140: stage
W: semiconductor substrate CA, CA1, CA2: contact
VTG: transfer transistor LD1: first layout data
LD2: Second Layout Data MD2: Staircase Data
OM1: 1st OPC model OM2: 2nd OPC model
CON2: contour DD1: first design data
DD1': compensated first design data DD2: second design data

Claims (10)

inputting curved layout data for forming a target layer;
performing manhattanization based on the curvilinear layout data and obtaining terraced data;
performing fragmentation on the stepped data and decomposing the stepped data into a plurality of data components;
generating an OPC model based on the plurality of data components and performing a simulation to extract a contour of the OPC model;
calculating an overlap score between the contour of the OPC model and an adjacent layer adjacent to the target layer and reflecting the calculated overlap score to the OPC model; and
obtaining design data for forming the target layer based on the simulation result; Optical proximity correction method comprising a.
According to claim 1,
An optical proximity correction method for optimizing the design data by repeatedly performing the steps of performing the simulation and acquiring the design data.
According to claim 1,
After performing the simulation, calculating an edge placement error (EPE) between the target layer and the contour of the OPC model.
According to claim 3,
and moving the plurality of data elements based on the edge placement error after performing the simulation.
According to claim 1,
The optical proximity correction method of claim 1 , wherein the curved layout data has the same shape as the image of the target layer.
performing manhattanization on curved layout data for a target layer, and performing optical proximity correction (OPC) based on the stepped data;
acquiring design data by the optical proximity correction; and
forming a photoresist pattern on a substrate using a photomask manufactured based on the design data; Method of manufacturing a semiconductor device comprising a.
According to claim 6,
The method of claim 1 , wherein the target layer corresponds to a floating diffusion region constituting an image sensor.
According to claim 6,
The optical proximity correction method of manufacturing a semiconductor device further comprising calculating an overlap score between a contour of the OPC model and an adjacent layer adjacent to the target layer and reflecting the calculated overlap score to the OPC model.
According to claim 8,
The method of claim 1 , wherein the adjacent layer includes a contact and transfer gate structure constituting an image sensor.
According to claim 6,
The method of manufacturing a semiconductor device in which the target layer has a curved shape or a 'c' shape.

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