KR20230036600A - Electronic device - Google Patents

Abstract

An electronic device comprises: a display module divided into a first area comprising a pixel, a second area bent based on a virtual axis extending in a first direction, and a third area wherein a driving chip connected to the pixel is mounted; a flexible circuit board disposed on at least one part of the third area of the display module and connected to the display module; and a cover layer that covers at least one part of the second area of the display module and the flexible circuit board. The cover layer covers the entirety of the driving chip. Therefore, the present invention is capable of providing the electronic device with improved reliability.

Description

Electronic device {ELECTRONIC DEVICE}

The present invention relates to an electronic device, and more particularly, to an electronic device having improved reliability and simplified processes.

A display module included in an electronic device includes a plurality of pixels displaying an image and a driving chip for driving the pixels. The pixels are disposed in the display area of the display module, and the driving chip is disposed in the peripheral area of the display module surrounding the display area. In the display module, a bending area is defined between the driving chip and the display area, and the bending area is bent so that the driving chip is disposed under the display module.

According to the present invention, the rigidity of the bending area of the display module can be supplemented and cracks of wires disposed in the bending area can be prevented.

An electronic device according to the present invention displays a display divided into a first area including pixels, a second area bent based on a virtual axis extending in a first direction, and a third area in which a driving chip connected to the pixel is mounted. module, a flexible circuit board disposed on at least a portion of the third region of the display module and connected to the display module, and a cover layer covering the second region of the display module and at least a portion of the flexible circuit board. and the cover layer covers all of the driving chip.

The cover layer may include a first cover insulating layer, an intermediate layer disposed on the first cover insulating layer, and a second cover insulating layer disposed on the intermediate layer.

The intermediate layer is characterized in that it includes any one of metal and conductive fibers.

Each of the first cover insulating layer and the second cover insulating layer may include a polymer material.

The second cover insulating layer is characterized in that it has a black color.

The cover layer includes a first cover adhesive layer disposed under the first cover insulating layer, a second cover adhesive layer disposed between the first cover insulating layer and the intermediate layer, and disposed between the intermediate layer and the second cover insulating layer. It is characterized in that it comprises a third cover adhesive layer.

The first cover insulating layer may include a metal material, and the first cover adhesive layer may include an insulating adhesive.

The cover layer is characterized in that it has a thickness of 30 micrometers or more and 120 micrometers or less.

A window disposed above the display module and including a bezel pattern, and one end of the bezel pattern defines a boundary between a transmission area through which light provided from the display module passes and a bezel area where the light is blocked. characterized by

The cover layer extends into the first area, and one end of the cover layer overlaps the bezel area.

It may further include an optical film disposed between the window and the display module.

One end of the optical film and one end of the cover layer facing each other in the first area may be spaced apart from each other.

The optical film may contact the cover layer in the bezel area.

The window is characterized in that it includes a flat portion and a curved portion bent with a predetermined curvature from the flat portion.

A width of the cover layer in the first direction may be greater than a width of the second region of the display module.

The cover layer includes a cutout formed by removing at least a portion of the cover layer, and the cutout is spaced apart from the second area of the display module in the first direction and does not overlap the second area. characterized by

and an organic layer disposed between the display module and the cover layer and overlapping the second region.

A width of the cover layer overlapping the second region in the first direction on a plane may be smaller than or equal to a width of the second region in the first direction.

The first region of the display module may have a circular shape on a plane, and a width of the second region of the display module in the first direction may be smaller than a diameter of the first region of the display module.

An electronic device according to the present invention displays a display divided into a first area including pixels, a second area bent based on a virtual axis extending in a first direction, and a third area in which a driving chip connected to the pixel is mounted. A module and a cover layer covering at least a portion of the third region and the second region, wherein the cover layer includes a conductive material.

A flexible circuit board disposed on at least a portion of the third region of the display module and connected to the display module, wherein the cover layer covers at least a portion of the flexible circuit board and all of the driving chip. to be characterized

The cover layer may include a first cover insulating layer, an intermediate layer disposed on the first cover insulating layer and including the conductive material, and a second cover insulating layer disposed on the intermediate layer.

Each of the first cover insulating layer and the second cover insulating layer may include a polymer material, and the conductive material may include any one of metal and conductive fiber.

The cover layer includes a first cover adhesive layer disposed under the first cover insulating layer, a second cover adhesive layer disposed between the first cover insulating layer and the intermediate layer, and disposed between the intermediate layer and the second cover insulating layer. and a third cover adhesive layer, wherein the second cover adhesive layer includes a conductive adhesive.

and a window disposed above the display module and including a flat portion and a curved portion surrounding at least a portion of the flat portion and bent with a predetermined curvature.

In the first direction, a width of the cover layer may be greater than a width of the second region of the display module.

The display module may further include an organic layer disposed between the display module and the cover layer and overlapping the second region, wherein the organic layer is covered by the cover layer.

A width of the cover layer in the first direction overlapping the second region on a plane may be equal to or smaller than a width of the second region in the first direction.

According to the present invention, by extending the cover layer covering the flexible circuit board and the driving chip to the bending area of the display module, it is possible to omit the process of attaching a protective member covering the bending area and to reduce costs through a simplified process. device can be provided.

In addition, the present invention can provide an electronic device with improved reliability by preventing cracks in wires disposed in the bending area by supplementing the rigidity of the bending area.

1A is a perspective view of an electronic device according to an embodiment of the present invention.
1B is an exploded perspective view illustrating some components of an electronic device according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view taken along line II′ of FIG. 1B.
3A is a plan view of a display panel according to an exemplary embodiment of the present invention.
3B is a plan view of an input sensing layer according to an embodiment of the present invention.
4A is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention.
FIG. 4B is an enlarged cross-sectional view of area AA' of FIG. 4A.
5A is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention.
5B is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention.
6A is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention.
6B is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention.
6C is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention.
6D is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention.
7A is a plan view of an electronic device according to an embodiment of the present invention.
7B is an exploded perspective view illustrating some components of an electronic device according to an embodiment of the present invention.
7C is a plan view illustrating some components of an electronic device according to an embodiment of the present invention.
8 is a perspective view illustrating one configuration of an electronic device according to an embodiment of the present invention.
9A is a cross-sectional view illustrating some components of an electronic device according to an embodiment of the present invention.
9B is a cross-sectional view illustrating some components of an electronic device according to an embodiment of the present invention.
10 is a plan view illustrating some components of an electronic device according to an embodiment of the present invention.
11 is a plan view illustrating some components of an electronic device according to an embodiment of the present invention.
FIG. 12A is a cross-sectional view taken along line II-II' of FIG. 11 .
12B is a cross-sectional view illustrating some components of an electronic device according to an embodiment of the present invention.
13 is a plan view illustrating some components of an electronic device according to an embodiment of the present invention.

In this specification, when an element (or region, layer, section, etc.) is referred to as being “on,” “connected to,” or “coupled to” another element, it is directly placed/placed on the other element. It means that they can be connected/combined or a third component may be placed between them.

Like reference numerals designate like components. Also, in the drawings, the thickness, ratio, and dimensions of components are exaggerated for effective description of technical content. “And/or” includes any combination of one or more that the associated elements may define.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. These terms are only used for the purpose of distinguishing one component from another. For example, a first element may be termed a second element, and similarly, a second element may be termed a first element, without departing from the scope of the present invention. Singular expressions include plural expressions unless the context clearly dictates otherwise.

In addition, terms such as "below", "lower side", "above", and "upper side" are used to describe the relationship between components shown in the drawings. The above terms are relative concepts and will be described based on the directions shown in the drawings.

Terms such as "include" or "have" are intended to indicate that a feature, number, step, operation, component, part, or combination thereof described in the specification exists, but that one or more other features, numbers, or steps are present. However, it should be understood that it does not preclude the possibility of existence or addition of operations, components, parts, or combinations thereof.

Unless defined otherwise, all terms (including technical terms and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. In addition, terms such as terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related art, and unless explicitly defined herein, interpreted as too idealistic or too formal. It shouldn't be.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

1A is a perspective view of an electronic device according to an embodiment of the present invention. 1B is an exploded perspective view illustrating some components of an electronic device according to an embodiment of the present invention. FIG. 2 is a cross-sectional view taken along line II′ of FIG. 1B.

Referring to FIGS. 1A and 1B , the electronic device ED displays an image IM in a third direction DR3 on a display surface FS parallel to the first and second directions DR1 and DR2 respectively. can be displayed. The display surface FS on which the image IM is displayed may correspond to the front surface of the display device DD. The image IM may include a still image as well as a dynamic image.

In this embodiment, the front (or upper surface) and the rear surface (or lower surface) of each member are defined based on the third direction DR3 in which the image IM is displayed. The front surface and the rear surface oppose each other in the third direction DR3, and a normal direction of each of the front surface and the rear surface may be parallel to the third direction DR3.

The distance between the front and rear surfaces in the third direction DR3 may correspond to the thickness of the electronic device ED in the third direction DR3. Meanwhile, directions indicated by the first to third directions DR1 , DR2 , and DR3 may be converted into other directions as a relative concept.

The electronic device ED may detect an external input applied from the outside. The external input may include various types of inputs provided from the outside of the electronic device ED. For example, the external input may include a contact by a part of the user's body, such as a user's hand, as well as an external input (eg, hovering) applied close to the electronic device ED or adjacent to it at a predetermined distance. . In addition, it may have various forms such as force, pressure, temperature, and light.

The front surface of the electronic device ED may be divided into a transmission area TA and a bezel area BZA. The transmission area TA may be an area where the image IM is displayed. The user views the image IM through the transmission area TA. In this embodiment, the transmission area TA is shown as a quadrangular shape with rounded vertices. However, this is shown as an example, and the transmission area TA may have various shapes, and is not limited to one embodiment.

The bezel area BZA is adjacent to the transmission area TA. The bezel area BZA may have a predetermined color. The bezel area BZA may surround the transmission area TA. Accordingly, the shape of the transmission area TA may be substantially defined by the bezel area BZA. However, this is shown as an example, and the bezel area BZA may be disposed adjacent to only one side of the transmission area TA or may be omitted. An electronic device (ED) according to an embodiment of the present invention may include various embodiments, and is not limited to any one embodiment.

As shown in FIG. 1B , the electronic device ED may include a window WM, an optical film LF, and a display module DM.

The window WM may be made of a transparent material capable of emitting an image. For example, it may be made of glass, sapphire, plastic, or the like. The bezel area BZA of the electronic device ED may be substantially provided as an area in which a material including a predetermined color is printed on one area of the window WM.

The optical film LF may be disposed below the window WM. The optical film LF reduces reflectance of external light incident from an upper side of the window WM. The optical film LF may include a retarder and a polarizer. The retarder may be a film type or a liquid crystal coating type, and may include a λ/2 retarder and/or a λ/4 retarder. A polarizer may also be a film type or a liquid crystal coating type. The film type may include a stretchable synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a predetermined arrangement. A retarder and a polarizer may be implemented as one polarizing film. The optical film LF may further include a protective film disposed above or below the polarization film.

The display module DM may be disposed below the optical film LF. Between the display module DM and the window WM, a functional layer performing other functions besides the optical film LF, such as a protective layer, may be further disposed.

The display module DM may be defined as an active area AA and a peripheral area NAA. The active area AA may be defined as an area from which an image provided by the display module DM is emitted. The peripheral area NAA is adjacent to the active area AA. For example, the peripheral area NAA may surround the active area AA. However, this is shown as an example, and the peripheral area NAA may be defined in various shapes, and is not limited to any one embodiment. According to an embodiment, the active area AA of the display module DM may correspond to at least a portion of the transmission area TA.

According to the present invention, the display module DM may include a first area A1, a second area A2, and a third area A3 arranged in the second direction DR2. The first area A1 may include an active area AA. In this specification, the rest of the first area A1 except for the active area AA, the second area A2 and the third area A3 may correspond to the peripheral area NAA.

The third area A3 may include pads PD disposed adjacent to an end of which the driving chip DIC is mounted. The flexible circuit board FCB may be disposed on the pads PD of the third area A3 and electrically connected to the display module DM. A detailed explanation of this will be provided later.

According to the present invention, a cover layer CIC disposed on the display module DM may be included. The cover layer CIC may cover the flexible circuit board FCB. In addition, the cover layer CIC may be disposed on the display module DM to cover the third area A3 and the second area A2. In this case, the cover layer CIC may cover all of the driving chip DIC mounted in the third area A3. According to one embodiment, as shown in FIG. 1B , the cover layer CIC may continuously extend from the flexible circuit board FCB to the second area A2 of the display module DM.

According to the present invention, the second area A2 of the display module DM may be bent so that the third area A3 faces the rear surface of the display module DM. In this case, the driving chip DIC and the flexible circuit board FCB may be disposed below the first area A1. The cover layer CIC may be bent together when the second area A2 of the display module is bent.

Referring to FIG. 2 , the display module DM may include a display panel DP and an input sensing layer IS disposed on the display panel DP. The display panel DP generates an image, and the input sensing layer IS acquires coordinate information of an external input (eg, a touch event). Accordingly, the display module DM can display an image according to an electrical signal and transmit/receive information about an external input.

The display panel DP may be a component that substantially generates an image. The display panel DP may be any one of an organic light emitting display panel, a quantum-dot display panel, and an inorganic light emitting display panel, and is not particularly limited. don't

The display panel DP may include a base layer 110 , a circuit element layer 120 , a light emitting element layer 130 , and an encapsulation layer 140 . The base layer 110 may be a member providing a base surface on which the circuit element layer 120 is disposed. The base layer 110 may be a glass substrate, a metal substrate, or a polymer substrate. However, the embodiment is not limited thereto, and the base layer 110 may be an inorganic layer, an organic layer, or a composite material layer.

The base layer 110 may have a multilayer structure. For example, the base layer 110 may include a first synthetic resin layer, a silicon oxide (SiOx) layer disposed on the first synthetic resin layer, an amorphous silicon (a-Si) layer disposed on the silicon oxide layer, and the A second synthetic resin layer disposed on the amorphous silicon layer may be included. The silicon oxide layer and the amorphous silicon layer may be referred to as a base barrier layer.

Each of the first and second synthetic resin layers may include a polyimide-based resin. In addition, each of the first and second synthetic resin layers may be an acrylate-based resin, a methacrylate-based resin, a polyisoprene-based resin, a vinyl-based resin, or an epoxy-based resin. , It may include at least one of a urethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyamide-based resin, and a perylene-based resin. Meanwhile, in the present specification, a "~~"-based resin means one containing a functional group of "~~".

The circuit element layer 120 may be disposed on the base layer 110 . The circuit element layer 120 may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal line. An insulating layer, a semiconductor layer, and a conductive layer may be formed on the base layer 110 by a method such as coating or deposition, and thereafter, the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned through a plurality of photolithography processes. there is. After that, semiconductor patterns, conductive patterns, and signal lines included in the circuit element layer 120 may be formed.

At least one inorganic layer is formed on the upper surface of the base layer 110 . The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. The inorganic layer may be formed in multiple layers. The multi-layered inorganic layers may constitute a barrier layer and/or a buffer layer. In this embodiment, the display panel DP is illustrated as including a buffer layer BFL.

The buffer layer BFL may improve bonding strength between the base layer 110 and the semiconductor pattern. The buffer layer BFL may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the buffer layer BFL may include a structure in which silicon oxide layers and silicon nitride layers are alternately stacked.

A semiconductor pattern may be disposed on the buffer layer BFL. The semiconductor pattern may include polysilicon. However, it is not limited thereto, and the semiconductor pattern may include amorphous silicon, low-temperature polycrystalline silicon, or an oxide semiconductor.

2 only shows a portion of the semiconductor pattern, and semiconductor patterns may be further disposed in other regions. The semiconductor pattern may be arranged in a specific rule across the pixels. The semiconductor pattern may have different electrical properties depending on whether it is doped or not. The semiconductor pattern may include a first region having high conductivity and a second region having low conductivity. The first region may be doped with an N-type dopant or a P-type dopant. A P-type transistor may include a doped region doped with a P-type dopant, and an N-type transistor may include a doped region doped with an N-type dopant. The second region may be a non-doped region or a region doped at a lower concentration than the first region.

Conductivity of the first region is greater than that of the second region, and may substantially serve as an electrode or a signal line. The second region may substantially correspond to an active (or channel) of the transistor. In other words, a portion of the semiconductor pattern may be an active transistor, another portion may be a source or drain of the transistor, and another portion may be a connection electrode or a connection signal line.

Each of the pixels may have an equivalent circuit including seven transistors, one capacitor, and a light emitting device, and the equivalent circuit diagram of the pixel may be modified in various forms. In FIG. 2 , one transistor 100PC and a light emitting element 100PE included in a pixel are illustrated as an example.

The source (SC), active (AL), and drain (DR) of the transistor 100PC may be formed from a semiconductor pattern. The source SC and the drain DR may extend in opposite directions from the active AL in cross section.

2 shows a portion of a connection signal line SCL formed from a semiconductor pattern. Although not separately shown, the connection signal line SCL may be connected to the drain DR of the transistor 100PC on a plane.

The first insulating layer 10 may be disposed on the buffer layer BFL. The first insulating layer 10 overlaps a plurality of pixels in common and may cover the semiconductor pattern. The first insulating layer 10 may be an inorganic layer and/or an organic layer, and may have a single-layer or multi-layer structure. The first insulating layer 10 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. In this embodiment, the first insulating layer 10 may be a single-layer silicon oxide layer. The first insulating layer 10 as well as the insulating layer of the circuit element layer 120 to be described later may be an inorganic layer and/or an organic layer, and may have a single-layer or multi-layer structure. The inorganic layer may include at least one of the above materials, but is not limited thereto.

A gate GT of the transistor 100PC is disposed on the first insulating layer 10 . The gate GT may be a part of the metal pattern. The gate (GT) overlaps the active (AL). The gate GT may function as a mask in a process of doping a semiconductor pattern.

The second insulating layer 20 is disposed on the first insulating layer 10 and may cover the gate GT. The second insulating layer 20 may overlap the pixels in common. The second insulating layer 20 may be an inorganic layer and/or an organic layer, and may have a single-layer or multi-layer structure. The second insulating layer 20 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. In this embodiment, the second insulating layer 20 may have a multilayer structure including a silicon oxide layer and a silicon nitride layer.

The third insulating layer 30 may be disposed on the second insulating layer 20 . The third insulating layer 30 may have a single-layer or multi-layer structure. For example, the third insulating layer 30 may have a multilayer structure including a silicon oxide layer and a silicon nitride layer.

The first connection electrode CNE1 may be disposed on the third insulating layer 30 . The first connection electrode CNE1 may be connected to the connection signal line SCL through the contact hole CNT- 1 penetrating the first, second, and third insulating layers 10, 20, and 30.

The fourth insulating layer 40 may be disposed on the third insulating layer 30 . The fourth insulating layer 40 may be a single layer of silicon oxide. The fifth insulating layer 50 may be disposed on the fourth insulating layer 40 . The fifth insulating layer 50 may be an organic layer.

The second connection electrode CNE2 may be disposed on the fifth insulating layer 50 . The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through the contact hole CNT- 2 penetrating the fourth insulating layer 40 and the fifth insulating layer 50 .

The sixth insulating layer 60 is disposed on the fifth insulating layer 50 and may cover the second connection electrode CNE2 . The sixth insulating layer 60 may be an organic layer.

The light emitting device layer 130 may be disposed on the circuit device layer 120 . The light emitting device layer 130 may include a light emitting device. For example, the light emitting device layer 130 may include organic light emitting materials, quantum dots, quantum rods, micro LEDs, or nano LEDs. Hereinafter, an example in which the light emitting device 100PE is an organic light emitting device will be described, but it is not particularly limited thereto.

The light emitting element 100PE may include a first electrode AE, a light emitting layer EL, and a second electrode CE. The first electrode AE may be disposed on the sixth insulating layer 60 . The first electrode AE may be connected to the second connection electrode CNE2 through the contact hole CNT- 3 penetrating the sixth insulating layer 60 .

The pixel defining layer 70 is disposed on the sixth insulating layer 60 and may cover a portion of the first electrode AE. An opening 70 -OP is defined in the pixel defining layer 70 . The opening 70 -OP of the pixel defining layer 70 exposes at least a portion of the first electrode AE.

The active area AA (refer to FIG. 1B ) may include an emission area PXA and a non-emission area NPXA adjacent to the emission area PXA. The non-emissive area NPXA may surround the light emitting area PXA. In this embodiment, the emission area PXA is defined to correspond to a partial area of the first electrode AE exposed by the opening 70 -OP.

The light emitting layer EL may be disposed on the first electrode AE. The light emitting layer EL may be disposed in an area corresponding to the opening 70 -OP. That is, the light emitting layer EL may be formed separately from each of the pixels. When the light emitting layer EL is separately formed in each of the pixels, each of the light emitting layers EL may emit light of at least one of blue, red, and green. However, it is not limited thereto, and the light emitting layer EL may be connected to the pixels and provided in common. In this case, the light emitting layer EL may provide blue light or white light.

The second electrode CE may be disposed on the light emitting layer EL. The second electrode CE has an integral shape and may be commonly disposed in a plurality of pixels.

Although not shown, a hole control layer may be disposed between the first electrode AE and the light emitting layer EL. The hole control layer may be disposed in common in the emission area PXA and the non-emission area NPXA. The hole control layer may include a hole transport layer and may further include a hole injection layer. An electronic control layer may be disposed between the light emitting layer EL and the second electrode CE. The electron control layer includes an electron transport layer and may further include an electron injection layer. The electronic control layer may be disposed in common in the emission area PXA and the non-emission area NPXA. The hole control layer and the electron control layer may be commonly formed in a plurality of pixels using an open mask.

The encapsulation layer 140 may be disposed on the light emitting device layer 130 . The encapsulation layer 140 may include an inorganic layer, an organic layer, and an inorganic layer sequentially stacked, but the layers constituting the encapsulation layer 140 are not limited thereto.

The inorganic layers may protect the light emitting device layer 130 from moisture and oxygen, and the organic layer may protect the light emitting device layer 130 from foreign substances such as dust particles. The inorganic layers may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer may include an acryl-based organic layer, but is not limited thereto.

The input sensing layer IS may be formed on the display panel DP through a continuous process. In this case, the input sensing layer IS may be expressed as being 'directly disposed' on the display panel DP. Being directly disposed may mean that a third component is not disposed between the input sensing layer IS and the display panel DP. That is, a separate adhesive member may not be disposed between the input sensing layer IS and the display panel DP.

Alternatively, the input sensing layer IS may be provided as a separate module and may be coupled to the display panel DP through an adhesive member. The adhesive member may include a conventional adhesive or pressure-sensitive adhesive.

The input sensing layer IS includes a first sensing insulation layer 201, a first conductive layer 202, a second sensing insulation layer 203, a second conductive layer 204, and a cover insulation layer 205. can do.

The first sensing insulating layer 201 may be an inorganic layer containing at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the first sensing insulating layer 201 may be an organic layer including an epoxy resin, an acrylic resin, or an imide-based resin. The first sensing insulating layer 201 may have a single-layer structure or a multi-layer structure stacked along the third direction DR3 .

Each of the first conductive layer 202 and the second conductive layer 204 may have a single-layer structure or a multi-layer structure stacked along the third direction DR3 . In this embodiment, the metal layer of the single-layer structure may include molybdenum, silver, titanium, copper, aluminum, or an alloy thereof. The conductive layer of the multilayer structure may include metal layers. For example, the metal layers may have a three-layer structure of titanium/aluminum/titanium. The multi-layered conductive layer may include at least one metal layer and at least one transparent conductive layer.

When the first conductive layer 202 and the second conductive layer 204 include a metal layer, the first conductive layer 202 and the second conductive layer 204 may be opaque. Accordingly, the first conductive layer 202 and the second conductive layer 204 may be patterned so as to not overlap with the emission area PXA and overlap with the non-emission area NPXA.

At least one of the second sensing insulating layer 203 and the cover insulating layer 205 may include an inorganic layer. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

At least one of the second sensing insulating layer 203 and the cover insulating layer 205 may include an organic layer. The organic film may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. can include

A portion of the first conductive layer 202 and the second conductive layer 204 may be connected through the contact hole CNT defined in the second sensing insulating layer 203 .

3A is a plan view of a display panel according to an exemplary embodiment of the present invention. 3B is a plan view of an input sensing layer according to an embodiment of the present invention.

Referring to FIG. 3A , the display panel DP according to the present invention may be divided into a first area A1, a second area A2, and a third area A3. The first to third areas A1, A2, and A3 of the display panel DP shown in FIG. 3A correspond to the first to third areas A1, A2, and A3 of the display module DM described in FIG. 1B, respectively. respond In this specification, "regions/parts and regions/parts correspond" means overlapping and is not limited to the same area.

The display panel DP according to an exemplary embodiment may include an active area AA where the pixel PX is disposed and a peripheral area NAA adjacent to the active area AA. The active area AA and the peripheral area NAA respectively correspond to the active area AA and the peripheral area NAA described with reference to FIG. 1B .

Therefore, the active area AA corresponds to the area where the pixel PX is disposed in the first area A1, and the peripheral area NAA is the remaining first area A1 excluding the area where the pixel PX is disposed. and a second area A2 and a third area A3.

The display panel DP may include a scan driver (SDV), an emission driver (EDV), and a driving chip (DIC) in the peripheral area NAA. The driving chip DIC may be a data driver.

The display panel DP includes a plurality of pixels PX, a plurality of scan lines SL1 to SLm, a plurality of data lines DL1 to DLn, a plurality of emission lines EL1 to ELm, first and second It may include second control lines CSL1 and CSL2, a power line PL, and a plurality of pads PD. Here, m and n are natural numbers. The pixels PX may be connected to scan lines SL1 to SLm, data lines DL1 to DLn, and emission lines EL1 to ELm.

The scan lines SL1 to SLm may extend in the first direction DR1 and be connected to the scan driver SDV. The data lines DL1 to DLn extend in the second direction DR2 and extend from the first area A1 to the second area A2 to the driving chip DIC disposed in the third area A3. can be connected The light emitting lines EL1 to ELm may extend in the first direction DR1 and be connected to the light emitting driver EDV.

The power line PL may include a portion extending in the second direction DR2 and a portion extending in oblique directions with respect to the first and second directions DR1 and DR2 . A portion extending in the second direction DR2 and a portion extending in oblique directions with respect to the first and second directions DR1 and DR2 may be disposed on different layers. A portion of the power line PL extending in the second direction DR2 may extend from the first area A1 to the third area A3 via the second area A2. The power line PL may provide a reference voltage to the pixels PX.

The first control line CSL1 is connected to the scan driver SDV and may extend from the first area A1 to the third area A3 via the second area A2. The second control line CSL2 is connected to the light emitting driver EDV and may extend from the first area A1 to the third area A3 via the second area A2.

The pads PD may be disposed adjacent to the end of the third area A3. The driving chip DIC, the power line PL, the first control line CSL1 , and the second control line CSL2 may be connected to the pads PD. The flexible circuit board FCB overlaps an end of the third region A3 of the display panel DP and may be disposed on the display panel DP. The flexible circuit board FCB includes pads corresponding to the pads PD, and may be electrically connected to the pads PD through an anisotropic conductive adhesive layer.

The display panel DP according to an exemplary embodiment may include a first contact hole CN-H1 defined in the first area A1. The display panel DP includes extension detection lines TL-L extending from the first contact hole CN-H1 to the third area A3 via the first area A1 and the second area A2. can include The extension sensing lines TL-L may be connected one-to-one with corresponding sensing lines among sensing lines TL1 , TL2 , and TL3 (see FIG. 3B ) to be described later.

Although FIG. 3A illustrates that the extension detection wires TL-L are disposed between the data lines DL1 to DLn, it is not limited thereto. For example, between the extension detection wires TL-L. The data lines DL1 to DLn may be disposed on the DL1 to DLn, and accordingly, a plurality of first contact holes CN-H1 may be provided with the data lines DL1 to DLn interposed therebetween. It is not limited to the examples.

Referring to FIG. 3B , the input sensing layer IS according to an exemplary embodiment may include sensing electrodes TE1 and TE2 and sensing lines TL1 , TL2 , and TL3 . When the input sensing layer IS is directly disposed on the display panel DP (see FIG. 3A ) by a continuous process, it may be formed only on an area overlapping the first area A1 of the display panel DP.

The input sensing layer IS may obtain information about an external input through a change in capacitance between the first sensing electrodes TE1 and the second sensing electrodes TE2 . The first sensing electrodes TE1 are arranged along the first direction DR1 and each extends along the second direction DR2. Each of the first sensing electrodes TE1 may include a first sensing pattern SP1 and a first connection pattern BP1.

The first sensing pattern SP1 is disposed in the active area AA. The first sensing pattern SP1 may have a diamond shape. However, this is shown as an example, and the first sensing pattern SP1 may have various shapes, and is not limited to one embodiment.

The first connection pattern BP1 is disposed in the active area AA. The first connection pattern BP1 may be disposed between adjacent first sensing patterns. The first connection pattern BP1 and the first sensing pattern SP1 may be disposed on a different layer and connected to each other through a contact hole.

The second sensing electrodes TE2 are arranged along the second direction DR2 and each extends along the first direction DR1. Each of the second sensing electrodes TE2 may include a second sensing pattern SP2 and a second connection pattern BP2.

The second sensing pattern SP2 may be spaced apart from the first sensing pattern SP1. The first sensing pattern SP1 and the second sensing pattern SP2 may transmit and receive independent electrical signals without contacting each other.

The second sensing pattern SP2 may have the same shape as the first sensing pattern SP1. For example, the second sensing pattern SP2 may have a diamond shape. However, this is shown as an example, and the second sensing pattern SP2 may have various shapes, and is not limited to one embodiment.

The second connection pattern BP2 may be disposed between adjacent second sensing patterns. For convenience of description, the second sensing electrode TE2 has been described by dividing the second sensing pattern SP2 and the second connection pattern BP2, but the second sensing electrode TE2 may be substantially provided as one pattern. can

According to an embodiment, the first connection pattern BP1 may correspond to the first conductive layer 202 described in FIG. 2 . The first sensing pattern SP1 , the second sensing pattern SP2 , and the second connection pattern BP2 may correspond to the second conductive layer 204 described in FIG. 2 . That is, the second sensing electrode TE2 may be disposed on the same layer as the first sensing pattern SP1, and at this time, the first sensing pattern SP1 and the second sensing electrode TE2 are aligned in the first direction DR1. ) and a plurality of mesh lines extending in each diagonal direction of the second direction DR2.

The sensing lines TL1 , TL2 , and TL3 are disposed in the peripheral area NAA. The sense lines TL1 , TL2 , and TL3 may include first sense lines TL1 , second sense lines TL2 , and third sense lines TL3 .

The first sensing lines TL1 are respectively connected to the first sensing electrodes TE1. In this embodiment, the first sensing lines TL1 are respectively connected to lower ends among both ends of the first sensing electrodes TE1 . The second sensing lines TL2 are respectively connected to upper ends among both ends of the first sensing electrodes TE1 . According to the present invention, the first sensing electrodes TE1 may be connected to the first sensing lines TL1 and the second sensing lines TL2 , respectively. Accordingly, with respect to the first sensing electrodes TE1 having a relatively longer length than the second sensing electrodes TE2 , sensitivity according to the area may be uniformly maintained.

Meanwhile, this is shown by way of example, and in the input sensing layer IS according to an embodiment of the present invention, the second sensing lines TL2 may be omitted and are not limited to one embodiment.

The third sensing lines TL3 are connected to one ends of the second sensing electrodes TE2, respectively. In this embodiment, the third sensing lines TL3 are respectively connected to left ends among both ends of the second sensing electrodes TE2 .

The input sensing layer IS may include a second contact hole CN-H2 overlapping the peripheral area NAA. The second contact hole CN-H2 may overlap the first contact hole CN-H1 (see FIG. 3A) of the display panel DP (see FIG. 3A). The sensing lines TL1, TL2, and TL3 correspond through the second contact hole CN-H2 defined in the input sensing layer IS and the first contact hole CN-H1 defined in the display panel DP. It may be connected to the extension detection wires (TL-L, see FIG. 3A). Accordingly, the sensing electrodes TE1 and TE2 may be electrically connected to the flexible circuit board FCB.

4A is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention. FIG. 4B is an enlarged cross-sectional view of area AA' of FIG. 4A. FIG. 4A is a cross-sectional view of the electronic device ED bent with reference to an imaginary axis RX extending in the first direction DR1 in the second area A2 of the display module DM.

According to an embodiment, the electronic device ED includes a window WM, an optical film LF, a cover layer CIC, a display module DM, lower protective films PF1 and PF2, and a cover panel CP. can include

According to an embodiment, the window WM includes a base substrate BS, a window protection layer WPL disposed on the base substrate BS, and a bezel pattern BZP disposed on a lower surface of the window protection layer WPL. can include The window WM may further include a window adhesive layer WAL that bonds the window protection layer WPL and the base substrate BS.

The bezel pattern BZP may define the bezel area BZA shown in FIG. 1A . In this embodiment, the bezel pattern BZP may be disposed on one surface of the window protection layer WPL facing the base substrate BS. FIG. 4A exemplarily illustrates the bezel pattern BZP disposed on the lower surface of the window protective layer WPL, but is not limited thereto, and the bezel pattern BZP may be the upper surface of the window protective layer WPL or a base substrate. It may be disposed on either the upper or lower surface of (BS).

The bezel pattern BZP may be formed as a colored light-blocking film, for example, by a coating method. The bezel pattern BZP may include a base material and a dye or pigment mixed with the base material. Accordingly, the user can recognize the peripheral area NAA (refer to FIG. 1B ) of the electronic device ED by the predetermined color of the bezel pattern BZP.

The optical film LF may be disposed between the window WM and the display module DM. The window WM and the optical film LF may be bonded by the first adhesive layer AL1. The optical film LF may be disposed on the first area A1 of the display module DM.

As shown in FIG. 4A , in the display module DM, the second area A2 is bent along an imaginary axis RX extending in the first direction DR1 so that the third area A3 is formed in the first direction DR1. It may be disposed below the region A1. That is, the first area A1 and the third area A3 may overlap each other in the third direction DR3.

According to the present invention, the cover layer CIC may overlap at least a portion of the third area A3 and cover the entire driving chip DIC mounted in the third area A3. Also, the cover layer CIC may continuously extend from the third area A3 to one end of the second area A2 adjacent to the first area A1. According to an embodiment, the cover layer CIC may cover the entire area of the second area A2. However, the present invention is not limited thereto, and portions of both side surfaces of the display module DM of the cover layer CIC facing in the first direction DR1 may be exposed while being disposed.

Referring to FIG. 4B , the cover layer CIC may include a first cover insulating layer ISL1 , an intermediate layer CDL, and a second cover insulating layer ISL2 .

The first cover insulating layer ISL1 may be disposed on the display module DM. The first cover insulating layer ISL1 and the display module DM may be coupled by the first cover adhesive layer AC1.

According to one embodiment, the first cover insulating layer ISL1 may include an insulating material. For example, the first cover insulating layer ISL1 may include a polymer material. The polymer material according to an embodiment may include at least one of polyethylene terephthalate (PET) and foam.

When the first cover insulating layer ISL1 includes polyethylene terephthalate (PET), the cover layer CIC may have a high modulus value, and the wiring disposed in the second area A2 may have a high modulus. can reduce stress. This is because polyethylene terephthalate (PET) is a material having a relatively high modulus value among polymer materials. When the first cover insulating layer ISL1 includes the foam (Faom), the impact absorption performance of the cover layer (CIC) is improved, preventing cracks from occurring in the wires disposed in the second area (A2) from external impact. can be minimized.

According to an embodiment, the first cover insulating layer ISL1 may include a highly flexible metal material, and the first cover adhesive layer AC1 may include an insulating adhesive. For example, the first cover insulating layer ISL1 may include copper (Cu). When the first cover insulating layer ISL1 includes copper (Cu), the minimum thickness that the first cover insulating layer ISL1 has to have to have a predetermined modulus value may be smaller than that of a polymer material. In addition, after the first cover insulating layer ISL1 is bent together with the second area A2 (see FIG. 1B) of the display module DM (see FIG. 1B), the force to restore the first cover insulating layer ISL1 to the state before bending is small. Accordingly, it is possible to prevent a phenomenon in which the cover layer CIC is lifted from the display module DM.

However, it is not limited thereto, and the first cover insulating layer ISL1 may include an adhesive insulating material. In this case, the first cover adhesive layer AC1 may be omitted.

The intermediate layer CDL may be disposed on the first cover insulating layer ISL1. The intermediate layer CDL and the first cover insulating layer ISL1 may be coupled by the second cover adhesive layer AC2.

The middle layer (CDL) may include a conductive material. For example, the intermediate layer (CDL) may include any one of a metal material and a conductive fiber. The conductive fiber according to one embodiment may include a non-woven fabric.

The intermediate layer CDL is disposed between the first cover insulating layer ISL1 and the second cover insulating layer ISL2 to shield static electricity. Thus, the cover layer CIC can prevent the display module DM from being damaged by external static electricity.

The second cover adhesive layer AC2 may include a conductive adhesive material. For example, the second cover adhesive layer AC2 may be a film formed by dispersing metal particles in a synthetic resin. The metal particles may be made of gold, silver, platinum, nickel, copper, carbon, or the like. Synthetic resins may include materials such as epoxy, silicone, polyimide, and polyurethane.

The second cover insulating layer ISL2 may be disposed on the intermediate layer CDL. The second cover insulating layer ISL2 and the intermediate layer CDL may be bonded by the third cover adhesive layer AC3.

The second cover insulating layer ISL2 may include an insulating material. The second cover insulating layer ISL2 may include an organic material, for example, polyethylene terephthalate (PET). According to an embodiment, the second cover insulating layer ISL2 may have a black color and may serve as a light blocking function.

According to this embodiment, the cover layer CIC may have a thickness of 30 micrometers or more and 120 micrometers or less. If the thickness of the cover layer CIC is less than 30 micrometers, it may not have a modulus value sufficient to protect the bent second area A2 and reduce the stress of the wires disposed in the second area A2. When the thickness of the cover layer CIC is greater than 120 micrometers, the bezel area BZA may be widened by the dead space extended by the thickness of the cover layer CIC, and the light lifted from the display module DM may be increased. phenomena may occur.

The first thickness TH1 is defined as the thickness of the portion of the cover layer CIC composed of the second cover adhesive layer AC2, the intermediate layer CDL, the third cover adhesive layer AC3, and the second cover insulating layer ISL2. And, the thickness of the portion of the cover layer CIC made of the first cover insulating layer ISL1 and the first cover adhesive layer AC1 may be defined as the second thickness TH2.

According to one embodiment, the first thickness TH1 may be greater than or equal to 25 micrometers and less than or equal to 35 micrometers. According to one embodiment, the second thickness TH2 may be greater than or equal to 25 micrometers and less than or equal to 85 micrometers. In this case, the thickness of the first cover insulating layer ISL1 may vary depending on the material included in the first cover insulating layer ISL1, and the thickness of the first cover adhesive layer AC1 also depends on the first cover insulating layer ISL1. This may vary depending on the materials involved.

Referring again to FIG. 4A , the cover layer (CIC) according to the present invention blocks noise formed around the flexible circuit board (FCB) and the driving chip (DIC), and wiring disposed on the flexible circuit board (FCB). By covering them, it is possible to protect them from dangers such as impacts provided from the outside.

In addition, the cover layer CIC according to the present invention covers the entire area of the second area A2 as well, so that the bent second area A2 of the display module DM is protected from danger such as an impact provided from the outside. can protect

According to the present invention, the cover layer (CIC) covering the flexible circuit board (FCB) and the driving chip (DIC) is extended to the second area (A2) of the display module (DM), so that the second area (A2) of the display module (DM) An organic layer forming process of applying an organic resin on the region A2 may be omitted.

The cover layer (CIC) may include a first cover insulating layer (ISL1) and an intermediate layer (CDL) using a material having a higher modulus value than the organic resin constituting the organic layer covering the existing second region (A2). there is. Accordingly, a process of attaching a separate cover member covering the second region A2 to protect the organic layer may be omitted. Through this, the present invention can provide an electronic device (ED) with simplified processes and reduced costs.

In addition, as the cover layer (CIC) has a high modulus value by the first cover insulating layer (ISL1) and the intermediate layer (CDL), the neutral plane defined as the plane where the tensile stress and compressive stress generated during bending are offset It may be disposed closer to the cover layer CIC. Wires bent overlapping the second area A2 may crack due to tensile stress applied during bending, but according to the present invention, the tensile stress generated in the wires disposed in the second area A2 is reduced. It can be. Accordingly, it is possible to reduce the occurrence of cracks by minimizing the stress generated in the wires disposed in the second area A2, and to provide the electronic device ED with improved reliability.

However, it is not limited thereto, and the organic layer covering the second region A2 may be further included. In the case of an electronic device (ED) requiring high rigidity in an area to be bent, the organic layer disposed on the second area (A2) of the display module (DM) may be further included. In this case, the organic layer may be covered by a cover layer CIC. Since the organic layer is covered by the cover layer CIC having a higher modulus than the organic resin, the process of attaching the separate cover member covering the second region A2 may be omitted.

According to an exemplary embodiment, the cover layer CIC extends to overlap a portion of the first area A1 of the display module DM and contacts the optical film LF disposed on the first area A1. can For example, as shown in FIG. 4A , one end of the cover layer CIC overlapping the first area A1 and one end of the optical film LF adjacent to the cover layer CIC may be in contact with each other, A portion exposed from the optical film LF and the cover layer CIC may not exist in the first area A1 of the display module DM.

According to an embodiment, a portion of the cover layer CIC disposed on the first area A1 may be coupled to the window WM by the first adhesive layer AL1. Accordingly, it is possible to prevent a lifting phenomenon that may occur when bending the cover layer CIC. However, it is not limited thereto, and the first adhesive layer AL1 may be disposed only on the optical film LF.

The electronic device ED may include lower protective films PF1 and PF2 disposed below the display module DM. The lower protective films PF1 and PF2 may include a first protective film PF1 disposed under the first area A1 and a second protective film PF2 disposed under the third area A3. there is. By not disposing the lower protective films PF1 and PF2 below the second area A2, the display module DM may be smoothly bent.

A cover panel CP may be disposed under the first protective film PF1 . The first protective film PF1 and the cover panel CP may be bonded by the second adhesive layer AL2. As shown in FIG. 4A , as the second area A2 of the display module DM is bent, the second protective film PF2 may be coupled to the lower side of the cover panel CP. The second protective film PF2 and the cover panel CP may be bonded by the third adhesive layer AL3. After the second area A2 of the display module DM is bent, the cover panel CP is disposed between the first protective film PF1 and the second protective film PF2 to protect the bent display module DM. can support

5A is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention. 5B is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention. The same/similar reference numerals are used for the same/similar configurations as those described in FIGS. 1 to 4C, and redundant descriptions are omitted. 5A illustrates an electronic device ED-A1 including a cover layer CIC-A1 according to an embodiment, and FIG. 5B illustrates an electronic device including a cover layer CIC-A2 according to an embodiment. (ED-A2) is shown.

Referring to FIG. 5A, the cover layer (CIC-A1) according to the embodiment shown in FIG. 5A is compared to the cover layer (CIC) described in FIG. 4A, and covers one end of the optical film (LF) facing each other. The difference is that one end of the layer CIC-A1 is spaced apart from the first area A1. Accordingly, a portion of the display module DM overlapping the first area A1 may be exposed.

According to an embodiment, the first adhesive layer AL1 may be disposed only on the optical film LF and may not be disposed on the cover layer CIC-A1. Since the cover layer (CIC-A1) and the window (WM) are not coupled to each other, tensile stress generated during bending of the cover layer (CIC-A1) can be reduced, and the cover layer (CIC-A1) itself cracks can be prevented.

5A exemplarily illustrates that the cover layer CIC-A1 covers a part of the first area A1 of the display module DM, but is not limited thereto. For example, the cover layer CIC-A1 does not cover the first area A1, and one end of the cover layer CIC-A1 is aligned with the boundary between the first area A1 and the second area A2. It can be.

Referring to FIG. 5B , the cover layer (CIC-A2) according to the embodiment shown in FIG. 5B may cover a portion of the optical film (LF) when compared to the cover layer (CIC-A2) described in FIG. 4A. can According to an embodiment, one end of the cover layer CIC-A2 disposed on the optical film LF may overlap the bezel pattern BZP of the window WM. When the cover layer CIC-A2 is disposed not to overlap with the bezel pattern BZP in the first area A1, the bezel area BZA is defined by the second cover insulating layer ISL2 serving as a light blocking function. This is because the transmission area TA may be reduced.

According to an embodiment, a portion covering the optical film LF among the cover layers CIC-A2 disposed in the first area A1 is covered by the first adhesive layer AL1 and coupled to the window WM. can Since the cover layer (CIC-A2) has a step in the portion covering the optical film (LF), it is possible to prevent a lifting phenomenon from occurring.

6A is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention. 6B is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention. 6C is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention. 6D is an enlarged cross-sectional view of a part of an electronic device according to an embodiment of the present invention.

6A illustrates an electronic device ED-B1 including a cover layer CIC-B1 according to an embodiment, and FIG. 6B illustrates a cover layer CIC of the electronic device ED-B1 shown in FIG. 6A. -B1) is an enlarged cross-sectional view. 6C illustrates an electronic device ED-B2 including a cover layer CIC-B2 according to an exemplary embodiment. FIG. 6D is an enlarged cross-sectional view of the cover layer CIC-B2 of the electronic device ED-B2 shown in FIG. 6C. As shown in FIGS. 6A and 6C , the cover layers CIC-B1 and CIC-B2 may include a lower surface LS contacting the display module DM and an upper surface US opposed thereto. The same/similar reference numerals are used for the same/similar configurations as those described in FIGS. 1 to 4C, and redundant descriptions are omitted.

Referring to FIG. 6A , the cover layer CIC-B1 according to an embodiment is formed by removing a portion of the cover layer CIC-B1 from the upper surface US in the thickness direction of the cover layer CIC-B1. At least one 1 groove GR1 may be included. The first groove GR1 may be formed to overlap the second area A2 of the display module DM.

Since the cover layer CIC-B1 includes the first groove GR1, when the display module DM is bent, the distance between the inner surfaces forming the first groove GR1 increases, and the cover layer CIC-B1 includes the first groove GR1. ) can reduce the tensile stress generated in Accordingly, stress transmitted to the display module DM bonded to the cover layer CIC-B1 may be reduced, and thus stress generated in the wires disposed in the second area A2 may be reduced.

Accordingly, it is possible to prevent cracks in the wiring due to bending of the display module DM, and to provide the electronic device ED-B1 having improved reliability.

Referring to FIG. 6B , the cover layer CIC-B1 according to an exemplary embodiment includes the exposed side surface I2-S of the second cover insulating layer ISL2-1 and the third cover adhesive layer AC3-1. ) of the side surface (A3-S), the side surface (C-S) of the intermediate layer (CDL-1), the side surface (A2-S) of the second cover adhesive layer (AC2-1), and the first cover insulating layer (ISL1-1). Side surfaces I1-S (hereinafter, first exposed surfaces) may be aligned with each other to define first grooves GR1.

The first exposed surfaces facing each other define one first groove GR1, and the first exposed surfaces go in a direction from the first cover insulating layer ISL1-1 to the second cover insulating layer ISL2-1. The separation distance between them may be increased. According to one embodiment, the first exposed surfaces facing each other may be formed in a V shape, but is not limited thereto. For example, the first exposed surfaces facing each other may be formed in a U shape.

FIG. 6B illustratively shows that the first groove GR1 is formed by removing at least a portion of the first cover insulating layer ISL2-1 to the first cover insulating layer ISL1-1. The depth at which GR1 is formed is not limited to any one embodiment. The depth at which the first groove GR1 is formed may vary according to the material constituting the cover layer CIC-B1 or the radius of curvature of the second area A2 of the display module DM (see FIG. 6A) when bent. can

Referring to FIG. 6C , the cover layer CIC-B2 according to an embodiment is formed by removing a portion of the cover layer CIC-B2 from the lower surface LS in the thickness direction of the cover layer CIC-B2. At least one 2 groove GR2 may be included. The second groove GR2 may be formed to overlap the second area A2 of the display module DM.

Since the cover layer (CIC-B2) includes the second groove (GR2), the distance between the inner surface forming the second groove (GR2) is narrowed when the display module (DM) is bent, and when bent, the lower surface (LS) This radius of curvature may be reduced. Accordingly, compressive stress generated in a portion of the cover layer CIC-B2 adjacent to the display module DM may be reduced. That is, stress transmitted to the display module DM bonded to the cover layer CIC-B2 is reduced, and thus stress generated in the wires disposed in the second area A2 may be reduced.

Accordingly, it is possible to prevent cracks in the wiring due to bending of the display module DM, and to provide the electronic device ED-B2 with improved reliability.

Referring to FIG. 6D , the cover layer CIC-B2 according to an exemplary embodiment includes the exposed side surface A1-S' of the first cover adhesive layer AC1-2 and the first cover insulating layer ISL1-B2. Side surfaces I1-S' (hereinafter referred to as second exposed surfaces) of 2) may be aligned with each other to define the second groove GR2.

The second exposed surfaces facing each other define one second groove GR2, and the second exposed surfaces go from the first cover insulating layer ISL1-2 toward the first cover adhesive layer AC1-2. The separation distance between them may be increased.

According to one embodiment, the second exposed surfaces facing each other may be formed in an upside down inverted V shape, but is not limited thereto. For example, the second exposed surfaces facing each other may be formed in an upside-down U-shape.

FIG. 6D exemplarily shows that the second groove GR2 is formed by removing at least a portion of the second groove GR2 from the first cover adhesive layer AC1-2 to the first cover insulating layer ISL1-2. The second groove ( The depth at which GR2) is formed is not limited to any one embodiment. The depth at which the second groove GR2 is formed may be different depending on the material constituting the cover layer CIC-B2 or the radius of curvature of the second area A2 of the display module DM (refer to FIG. 6C) when bent. can

7A is a plan view of an electronic device according to an embodiment of the present invention. 7B is an exploded perspective view illustrating some components of an electronic device according to an embodiment of the present invention. 7C is a plan view illustrating some components of an electronic device according to an embodiment of the present invention. 8 is a perspective view illustrating one configuration of an electronic device according to an embodiment of the present invention. The same/similar reference numerals are used for the same/similar configurations as those described in FIGS. 1 to 6D, overlapping descriptions are omitted, and configurations with differences are mainly described.

7B is an exploded perspective view of a window (WM-1A), an optical film (LF), a display module (DM), a flexible circuit board (FCB), and a cover layer (CIC-C) of the electronic device (ED-1). 7C is a plan view of a display module (DM), a flexible circuit board (FCB), and a cover layer (CIC-C). FIG. 8 shows the window WM-1B of the electronic device ED-1, and the window WM-1B shown in FIG. 8 is compared with the window WM-1A shown in FIG. 7B. , there is a difference in that it has a different shape.

Referring to FIG. 7A , an electronic device ED-1 according to an embodiment may be applied to a wearable device WA. Although the outer shape of the wearable device WA shown in FIG. 7A is illustrated as having a circle shape, as an example. Not limited to this. For example, the outer shape of the wearable device WA may have a square shape with rounded corners.

Referring to FIGS. 7B and 7C , an electronic device ED-1 according to an exemplary embodiment includes a window WM-1A, an optical film LF, a display module DM, a flexible circuit board FCB, and a cover. layer (CIC-C). The same/similar reference numerals are used for components identical/similar to those described in FIG. 1B, and duplicate descriptions are omitted.

According to one embodiment, the window WM-1A may include a flat portion PA having a circular shape and a curved portion CA extending from the flat portion PA and bent in a predetermined direction. The curved portion CA may surround the flat portion PA.

That is, the window WM-1A shown in FIG. 7B may include a bent portion, unlike the window WM having a flat shape shown in FIG. 1B. Accordingly, the window WM-1 according to the present embodiment may have a three-dimensional shape.

According to an embodiment, the curved portion CA may include at least a portion of the bezel area BZA (refer to FIG. 1B ). For example, only a portion adjacent to the end of the curved portion CA spaced apart from the flat portion PA may form the bezel area BZA, or the entire curved portion CA may form the bezel area BZA. .

According to an embodiment, the display module DM may include a first area A1, a second area A2, and a third area A3 sequentially arranged. The second area A2 may be defined as a portion that is bent based on a predetermined axis extending in the first direction DR1. As the second area A2 is bent, the first area A1 and the third area A3 may overlap each other on a plane.

The first area A1 of the display module DM may have a circular shape on a plane. The width of the second area A2 in the first direction DR1 decreases as it goes from the first area A1 to the third area A3, that is, in the direction opposite to the second direction DR2. can increase A width of the second area A2 in the first direction DR1 may be smaller than a diameter in the first direction DR1, and the second area A2 may be formed in the first direction DR1 of the display module DM. It may include a part with the smallest width.

The flexible circuit board FCB may be disposed on the pads PD of the third area A3 and electrically connected to the display module DM. The flexible circuit board FCB may further include a plurality of driving elements. The plurality of driving elements may include a circuit unit for converting a signal input from the outside into a signal required for the driving chip DIC. The flexible circuit board (FCB) may further include a connector (PC) connected to the main board.

According to an exemplary embodiment, the cover layer CIC-C overlaps at least a portion of the third area A3 of the display module DM and entirely covers the driving chip DIC mounted in the third area A3. can Also, the cover layer CIC-C may cover a portion of the flexible circuit board FCB. For example, a portion of the flexible circuit board FCB adjacent to the third area A3 may be covered. The cover layer CIC-C may extend on the second area A2 and cover the entire area of the second area A2.

According to the present embodiment, the width of the cover layer CIC overlapping the second area A2 of the cover layer CIC-C in the first direction DR1 is It may be larger than the width at (DR1). Accordingly, the cover layer CIC-C can improve the bearing capacity of the second area A2 bent during the manufacturing process and prevent cracks in the wires included in the display module DM. A detailed explanation of this will be provided later.

Referring to FIG. 8 , the window WM-1B according to an exemplary embodiment includes a planar portion PA-1 having a square shape and first to second portions extending from the planar portion PA-1 and bent in a predetermined direction. It may include 4 curved portions CA1 , CA2 , CA3 , and CA4 .

Each of the first curved portion CA1 and the second curved portion CA2 may extend along the second direction DR2 and may be spaced apart from each other in the first direction DR1 with the flat portion PA- 1 interposed therebetween. . Each of the third curved portion C3 and the fourth curved portion C4 extends along the first direction DR1 and may be spaced apart from each other in the second direction DR2 with the flat portion PA-1 interposed therebetween. .

Each of the first to fourth curved portions CA1 , CA2 , CA3 , and CA4 may be bent with a predetermined curvature from the flat portion PA. Curvatures constituting the first to fourth curved portions CA1 , CA2 , CA3 , and CA4 and the flat portion PA- 1 may be the same, and the first to fourth curved portions CA1 , CA2 , CA3 , and CA4 may have the same curvature. A curvature formed between the corner and the planar portion PA may be different from the curvature. Accordingly, the window WM-1B according to the present embodiment may include a double curvature.

The window WM-1B according to this embodiment may be used for a wearable device (WA, see FIG. 7A) having a square shape. However, the present invention is not limited thereto, and the window WM-1B having a double curvature may also be applied to the window WM (see FIG. 1B) of the electronic device (ED, see FIG. 1B) described with reference to FIGS. 1A to 1B.

Hereinafter, the description will be made based on the electronic device ED-1 applied to the wearable device WA having a circular appearance, but all components of the electronic device ED-1 will be described using the wearable device having a rectangular external appearance. (WA) and electronic devices (ED).

9A is a cross-sectional view illustrating some components of an electronic device according to an embodiment of the present invention. 9B is a cross-sectional view illustrating some components of an electronic device according to an embodiment of the present invention. 9A is a cross-sectional view showing a state before bending the second area A2 of the display module DM, and FIG. 9B is a cross-sectional view showing the third area A3 of the display module DM below the first area A1. This is a cross-sectional view of a state in which the second area A2 is bent to be disposed on the .

9A and 9B , in the electronic device ED-1 according to the present embodiment, the display module DM includes an optical film LF, a cover layer CIC-C, and a lower protective film PF1. PF2) is attached to the lower portion of the window WM-1A, and then the second area A2 of the display module DM is imaginary axis extending in the first direction DR1. RX) can be manufactured by bending the center. According to an embodiment, before bending the second area A2 of the display module DM, the cover panel CP disposed between the first protective film PF1 and the second protective film PF2 is attached. steps may be included.

When the display module (DM) is coupled to the lower portion of the window (WM-1A), as shown in FIG. 9A, the curved portion (CA) of the window (WM-1A) according to an embodiment is the display module (DM) overlaps with the second area A2 of the display module DM, and the second area A2 of the display module DM may have a shape in which a portion of the second area A2 is bent by the curved portion CA of the window WM-1A. That is, in the process of attaching the first area A1 of the display module DM to the lower portion of the flat portion PA of the window WM-1A, the second area A2 of the display module DM is attached to the window ( It is partially bent by the curved portion CA of the window WM- 1A, and thus the third area A3 of the display module DM may protrude from the curved portion CA of the window WM- 1A.

At this time, the third area A3 may sag downward due to the load of the flexible circuit board FCB connected to the third area A3, and the second area A2 is bent, thereby reducing stress in the second area A2. may occur. Also, the third area A3 may come into contact with the curved portion CA of the window WM- 1A, and stress may occur in the contacted third area A3. Accordingly, cracks may occur in wires included in the display module DM.

According to the present invention, the cover layer (CIC-C) covers at least a portion of the second area (A2), the third area (A3) and the flexible circuit board (FCB) of the display module (DM), and the second area The cover layer CIC-C overlapping A2 has a larger width than the width of the second area A2 in the first direction DR1, thereby placing the display module DM on the window WM-1A. It is possible to prevent the bent second area A2 from being bent during the attaching process, and also to prevent the third area A3 from drooping downward.

Therefore, during the manufacturing process of the electronic device ED-1 according to the present embodiment, generation of cracks in the wires included in the display module DM can be prevented, and the electronic device ED-1 with improved reliability can be manufactured. can

10 is a plan view illustrating some components of an electronic device according to an embodiment of the present invention. 10 is a top plan view of a display module DM, a flexible circuit board FCB, and a cover layer CIC-D in the electronic device ED-1A.

The cover layer CIC-D shown in FIG. 10 may include a cut groove GR3 formed by removing at least a portion of the cover layer CIC-D. According to an exemplary embodiment, a portion of the cover layer CIC-D is formed from one end of a portion of the cover layer CIC-D that is not overlapped with the display module DM, and a portion of the cover layer CIC-D extends in the first direction DR1. ) can be removed and formed.

According to an embodiment, the cutout groove GR3 is spaced apart from the second area A2 of the display module DM in the first direction DR1 and does not overlap the second area A2 of the display module DM. can

FIG. 10 exemplarily shows that one cutout groove GR3 is formed at both ends of the cover layer CIC-D. However, the number of cut grooves GR3 is not limited thereto, and two or more cut grooves GR3 may be formed. For example, the cut groove GR3 may be formed in a plurality of slit patterns formed by cutting a portion of the cover layer CIC-D.

The cover layer CIC-D can be bent at the same time as the second area A2 of the display module DM is bent, and the cover layer CIC-D that is not in contact with the display module DM during the bending process is Tensile stress may occur near the upper surface and compressive stress may occur near the lower surface. According to the present embodiment, flexibility may be improved by forming the incision groove GR3 in the region where the cover layer CIC-D is bent, and stress generated by tensile stress or compressive stress may be reduced, thereby reducing the cover layer (CIC-D) can be smoothly bent.

11 is a plan view illustrating some components of an electronic device according to an embodiment of the present invention. FIG. 12A is a cross-sectional view taken along line II-II' of FIG. 11 . 12B is a cross-sectional view illustrating some components of an electronic device according to an embodiment of the present invention. 13 is a plan view illustrating some components of an electronic device according to an embodiment of the present invention. 11 and 13 are plan views illustrating a display module DM, a flexible circuit board FCB, and cover layers CIC-E1 and CIC-E2 among electronic devices ED-1B and ED-1C. The same/similar reference numerals are used for the same/similar configurations as those described in FIGS. 7A to 9B, and redundant descriptions are omitted.

Referring to FIGS. 11 and 12A , the electronic device ED-1B according to an exemplary embodiment may further include an organic layer BPL disposed between the display module DM and the cover layer CIC-E1. The cover layer CIC-E1 may be disposed on the organic layer BPL to cover the organic layer BPL.

The organic layer BPL includes not only the second area A2 of the display module DM, but also a portion of the first area A1 adjacent to the second area A2 and a third area A3 adjacent to the second area A2. ) may be arranged overlapping with a part of.

According to an embodiment, the width of the organic layer BPL in the first direction DR1 may be smaller than or equal to the width of the second area A2 of the display module DM. A width of the organic layer BPL in the second direction DR2 may be greater than a width of the second area A2 of the display module DM in the second direction DR2 . According to the present embodiment, since the adhesive force with the display module DM may be increased during bending, compared to the case where the organic layer BPL is disposed overlapping only the second area A2, the organic layer BPL is disposed on the display module DM. It is possible to prevent the phenomenon of excitation from

However, it is not limited thereto, and the organic layer BPL is disposed to overlap only the second area A2 of the display module DM, and the width of the organic layer BPL in the second direction DR2 is the width of the display module DM. It may be smaller than or equal to the width of the second area A2.

According to an embodiment, the organic layer BPL may include an organic material. The organic layer BPL may include an organic resin, for example, an acrylic resin.

12B shows the lower portion of the window WM-1A in a state in which the optical film LF, the cover layer CIC-E1, the organic layer BPL, and the lower protective films PF1 and PF2 are attached to the display module DM. A cross-sectional view after a process of being coupled to is shown. The cover layer (CIC-E1) and organic layer (BPL) of FIG. 12B correspond to the cover layer (CIC-E1) and organic layer (BPL) described with reference to FIG. 12A.

Referring to FIG. 12B , the cover layer CIC-E1 according to the present embodiment may be disposed on the second area A2 to cover the organic layer BPL. Accordingly, the second area A2 of the display module DM may be double covered by the cover layer CIC-E1 and the organic layer BPL.

According to the present embodiment, the supporting force of the second area A2 bent along the curved portion CA of the window WM-1A during the manufacturing process is increased to minimize sagging of the third area A3. , It is possible to minimize the occurrence of cracks in the wires included in the display module DM.

Referring to FIG. 13 , the electronic device ED-1C according to an exemplary embodiment may further include an organic layer BPL on the second area A2 of the display module DM, and the cover layer CIC-E2 ) may be disposed on the organic layer BPL to cover the organic layer BPL. The same/similar reference numerals are used for components identical/similar to those described in FIGS. 11 to 12B, and duplicate descriptions are omitted.

The cover layer CIC-E2 according to an embodiment may have the same shape as the second area A2 on a plane at a portion overlapping the second area A2. That is, the width of the cover layer CIC-E2 overlapping the second region A2 on a plane in the first direction DR1 is the same as the width of the second region A2 in the first direction DR1. can do.

According to the present embodiment, as the second area A2 is double-covered by the organic layer BPL and the cover layer CIC-E2, the cover layer CIC-E2 overlaps the second area A2. Even if the width in the first direction DR1 is not greater than the width of the second area A2 in the first direction DR1, the second area A2 bent during the manufacturing process may be bent. It may have sufficient bearing capacity to prevent sagging of the third area A3.

Although FIG. 13 exemplarily shows that the cover layer CIC-E2 has the same shape as the second area A2 on a plane, it is not limited thereto. For example, the width of the cover layer CIC-E2 overlapping the second area A2 in the first direction DR1 may be smaller than the width of the second area A2 in the first direction DR1. there is. In addition, a part of the cover layer CIC-E2 overlapping the second area A2 has the same width as the width of the second area A2 in the first direction DR1, and the other part has the second area ( It may have a narrower width than the width in the first direction DR1 of A2).

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art or those having ordinary knowledge in the art do not deviate from the spirit and technical scope of the present invention described in the claims to be described later. It will be understood that the present invention can be variously modified and changed within the scope not specified.

Therefore, the technical scope of the present invention is not limited to the contents described in the detailed description of the specification, but should be defined by the claims.

ED, ED-1: Electronics
DM: display module
A1, A2, A3: first area, second area, third area,
FCB: Flexible Circuit Board
CIC: cover layer
DIC: drive chip
ISL1: first cover insulating layer
CDL: middle layer
ISL2: second cover insulating layer
WM, WM-1A: Windows
LF: optical film
GR1, GR2: first groove, second groove
GR3: incision groove
BPL: organic layer

Claims (28)

a display module divided into a first area including pixels, a second area bent on the basis of an imaginary axis extending in a first direction, and a third area in which a driving chip connected to the pixel is mounted;
a flexible circuit board disposed on at least a part of the third region of the display module and connected to the display module; and
a cover layer covering at least a portion of the second region of the display module and the flexible circuit board;
The cover layer,
An electronic device covering all of the driving chip. According to claim 1,
The cover layer,
An electronic device comprising a first cover insulating layer, an intermediate layer disposed on the first cover insulating layer, and a second cover insulating layer disposed on the intermediate layer. According to claim 2,
The electronic device of claim 1 , wherein the intermediate layer includes any one of metal and conductive fibers. According to claim 2,
The electronic device of claim 1 , wherein each of the first cover insulating layer and the second cover insulating layer includes a polymer material. According to claim 4,
The second cover insulating layer has a black color. According to claim 2,
The cover layer,
A first cover adhesive layer disposed under the first cover insulating layer, a second cover adhesive layer disposed between the first cover insulating layer and the intermediate layer, and a third cover adhesive layer disposed between the intermediate layer and the second cover insulating layer. An electronic device comprising a. According to claim 6,
The first cover insulating layer includes a metal material,
The first cover adhesive layer includes an insulating adhesive. According to claim 1,
The cover layer,
An electronic device having a thickness greater than or equal to 30 micrometers and less than or equal to 120 micrometers. According to claim 1,
a window disposed above the display module and including a bezel pattern;
One end of the bezel pattern defines a boundary between a transmission area through which the light provided from the display module passes and a bezel area through which the light is blocked. According to claim 9,
The electronic device of claim 1 , wherein the cover layer extends into the first area, and one end of the cover layer overlaps the bezel area. According to claim 10,
The electronic device further comprising an optical film disposed between the window and the display module. According to claim 11,
The electronic device of claim 1 , wherein one end of the optical film and one end of the cover layer facing each other in the first region are spaced apart from each other. According to claim 11,
The optical film contacts the cover layer in the bezel area. According to claim 9,
the window,
An electronic device comprising a flat portion and a curved portion bent from the flat portion with a predetermined curvature. According to claim 14,
The width of the cover layer in the first direction,
An electronic device having a width greater than that of the second region of the display module. According to claim 15,
The cover layer,
Including a cut groove formed by removing at least a portion of the cover layer,
The incision groove,
An electronic device that is spaced apart from the second area of the display module in the first direction and does not overlap the second area. According to claim 16,
The electronic device further includes an organic layer disposed between the display module and the cover layer and overlapping the second region. According to claim 17,
The width in the first direction of the cover layer overlapping the second region on a plane,
An electronic device that is smaller than or equal to the width of the second area in the first direction. According to claim 1,
On a plane, the shape of the first region of the display module is circular,
In the first direction, the width of the second region of the display module is smaller than the diameter of the first region of the display module. a display module divided into a first area including pixels, a second area bent on the basis of an imaginary axis extending in a first direction, and a third area in which a driving chip connected to the pixel is mounted; and
a cover layer covering at least a portion of the third region and the second region;
The electronic device of claim 1 , wherein the cover layer includes a conductive material. According to claim 20,
a flexible circuit board disposed on at least a portion of the third region of the display module and connected to the display module;
The cover layer,
An electronic device covering at least a portion of the flexible circuit board and all of the driving chip. According to claim 20,
The cover layer,
An electronic device comprising a first cover insulating layer, an intermediate layer disposed on the first cover insulating layer and including the conductive material, and a second cover insulating layer disposed on the intermediate layer. 23. The method of claim 22,
Each of the first cover insulating layer and the second cover insulating layer includes a polymer material,
The electronic device of claim 1 , wherein the conductive material includes any one of metal and conductive fiber. According to claim 23,
The cover layer,
A first cover adhesive layer disposed under the first cover insulating layer, a second cover adhesive layer disposed between the first cover insulating layer and the intermediate layer, and a third cover adhesive layer disposed between the intermediate layer and the second cover insulating layer. including,
The second cover adhesive layer includes a conductive adhesive. According to claim 20,
An electronic device comprising a window disposed above the display module and including a flat portion and a curved portion that surrounds at least a portion of the flat portion and is bent with a predetermined curvature. According to claim 25,
In the first direction, the width of the cover layer is,
An electronic device having a width greater than that of the second region of the display module. According to claim 25,
an organic layer disposed between the display module and the cover layer and overlapping the second region;
The organic layer is covered by the cover layer. According to claim 27,
The width in the first direction of the cover layer overlapping the second region on a plane,
An electronic device that is smaller than or equal to the width of the second area in the first direction.

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