KR20230008481A - Signal converting apparatus for isolatied communication - Google Patents

Abstract

Disclosed is a signal converter for isolated communication, which includes: a shift register unit which delays a digital input signal corresponding to a peak input signal input from an isolated component based on a system clock by a preset time; an OR operation unit performing an OR operation on the digital input signal and an inverted signal of the signal delayed by the shift register unit to generate a rising flag signal and a falling flag signal; and a pulse generator configured to generate a pulse signal based on the rising flag signal and the falling flag signal. Therefore, it is possible to generate a usable pulse signal in a digital circuit by converting an isolated communication signal appearing in a form of a peak.

Description

Signal conversion device for isolated communication {SIGNAL CONVERTING APPARATUS FOR ISOLATIED COMMUNICATION}

The present invention relates to a signal conversion device for isolated communication, and more particularly, to a signal conversion device for isolated communication capable of generating a pulse signal usable in a digital circuit by converting an isolated communication signal appearing in the form of a peak.

In general, an eco-friendly vehicle that runs with rotational force of a motor generated using electric energy stored in a battery includes a battery management system for managing the battery.

While a battery storing energy for driving a motor of an eco-friendly vehicle outputs a voltage of several hundred volts, a circuit such as a processor provided in a battery management system to control the battery operates at a voltage of several volts. That is, the battery management system has both a high voltage part region to which a battery belongs and a low voltage part region to which a circuit such as a processor belongs. Since low voltage parts can be burned by high voltage, the high voltage part and the low voltage part are insulated from each other using a capacitor or the like.

Therefore, in the battery management system, an isolated communication method is applied to communication between the high voltage unit and the low voltage unit.

In the battery management system to which the isolated communication method is applied, an insulation element implemented by a capacitor or an inductor (transformer) may be provided between the high voltage part and the low voltage part, and the communication signal passing through the isolation element appears as a signal having a peak. .

For example, when a communication signal in the form of a pulse signal having a rising edge and a falling edge passes through an insulating element, the rising edge of the communication signal appears in the form of a peak rising in a positive direction and the falling edge appears in a negative direction. can appear in the form of a descending peak.

In isolation communication, since a communication signal passing through an isolation element generates peaks in both positive and negative directions, a digital circuit such as a processor included in a battery management system cannot recognize a peak in a negative direction. Therefore, in the field of isolated communication, a signal conversion technique capable of converting a communication signal including a peak passing through an isolation element into a pulse signal that can be processed by a digital circuit is required.

The matters described as the background art above are only for improving understanding of the background of the present invention, and should not be taken as an admission that they correspond to prior art already known to those skilled in the art.

KR 10-2021-0056623 A KR 10-1967462 B1

The present invention is a technical problem to be solved to provide a signal conversion device for isolated communication capable of generating a usable pulse signal in a digital circuit by converting an isolated communication signal appearing in the form of a peak.

As a means for solving the above technical problem, the present invention,

a shift register unit for delaying a digital input signal corresponding to a peak input signal input from the isolation element for a preset time based on a system clock;

an OR operation unit performing an OR operation on the digital input signal and an inverted signal of the signal delayed by the shift register unit to generate a rising flag signal and a falling flag signal; and

a pulse generator configured to generate a pulse signal based on the rising flag signal and the falling flag signal;

It provides a signal conversion device for isolated communication comprising a.

In one embodiment of the present invention, the digital input signal may be a signal representing a peak having a positive value included in the peak input signal as one pulse based on the system clock.

In one embodiment of the present invention, the peak input signal may include a first peak input signal having a peak and a second peak input signal having an inverse relationship with the first peak input signal.

In one embodiment of the present invention, the shift register unit delays a first digital input signal representing a positive peak included in the first peak input signal as one pulse based on the system clock. A shift register and a second shift register delaying a second digital input signal representing a peak having a positive value included in the second peak input signal as one pulse based on the system clock.

In one embodiment of the present invention, the logical sum operation unit performs a logical sum operation on the first digital input signal and an inverted signal of the signal delayed by the first shift register to generate the rising flag signal; and the second and a second OR element generating the falling flag signal by performing an OR operation on a digital input signal and an inverted signal of the signal delayed by the second shift register.

In one embodiment of the present invention, the pulse generator may generate the pulse signal having a rising edge of the rising flag signal as a rising edge and a falling edge of the falling flag signal as a falling edge.

In one embodiment of the present invention, the pulse generator may include a first multiplexer outputting a logic high when the rising flag signal is a logic high (HIGH), and a second multiplexer outputting a logic low when the falling flag signal is a logic high. 2 multiplexers and flip-flops that receive the outputs of the first multiplexer and the second multiplexer and maintain and output logic states of the received signals.

As another means for solving the above technical problem, the present invention,

a first shift register delaying a first digital input signal representing a positive peak included in a first peak input signal input from an isolation element as one pulse based on the system clock;

Delaying a second digital input signal that is input from the isolation element and represents a peak having a positive value included in a second peak input signal that is an inverted signal of the first peak input signal as one pulse based on the system clock a second shift register;

a first OR element generating the rising flag signal by performing an OR operation on the first digital input signal and an inverted signal of the signal delayed by the first shift register;

a second OR element generating the falling flag signal by performing an OR operation on the second digital input signal and an inverted signal of the signal delayed by the second shift register;

a first multiplexer outputting logic high when the rising flag signal is logic high;

a second multiplexer outputting a logic low when the falling flag signal is a logic high; and

It provides a signal conversion device for isolated communication, characterized in that it comprises a flip-flop for receiving the outputs of the first multiplexer and the second multiplexer and maintaining and outputting a logic state of the received signal.

According to the signal conversion device for isolated communication, by using two isolated communication signals having a mutually complementary relationship, the corresponding rising edge and falling edge of the peak appearing in the isolated communication signal are accurately restored, so that a digital circuit that does not recognize a negative value can enable signal recognition and processing in

Accordingly, according to the signal conversion device for isolated communication, it is possible to effectively operate a system using isolated communication, such as a battery management system, and to build a programmable development environment, such as a Field Programmable Gate Array (FPGA).

The effects obtainable in the present invention are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art from the description below. will be.

1 is a block diagram of a signal conversion device for isolated communication according to an embodiment of the present invention.
2 is a detailed circuit diagram of a signal conversion device for isolated communication according to an embodiment of the present invention.
3 is a diagram illustrating an example of a signal generated or output from each element in a signal conversion device for isolated communication according to an embodiment of the present invention.

Specific structural or functional descriptions of the embodiments of the present invention disclosed in this specification or application are merely exemplified for the purpose of explaining the embodiments according to the present invention, and the embodiments according to the present invention are implemented in various ways. It may be and should not be construed as being limited to the embodiments described in this specification or application.

Embodiments according to the present invention can be applied with various changes and can have various forms, so specific embodiments are illustrated in the drawings and described in detail in this specification or application. However, this is not intended to limit the embodiments according to the concept of the present invention to the specific disclosed form, and it should be understood to include all changes, equivalents, and substitutes included in the spirit and technical scope of the present invention.

Terms such as first and/or second may be used to describe various components, but the components should not be limited by the terms. The above terms are only for the purpose of distinguishing one component from another component, e.g., without departing from the scope of rights according to the concept of the present invention, a first component may be termed a second component, and similarly The second component may also be referred to as the first component.

It is understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, but other elements may exist in the middle. It should be. On the other hand, when an element is referred to as “directly connected” or “directly connected” to another element, it should be understood that no other element exists in the middle. Other expressions describing the relationship between elements, such as "between" and "directly between" or "adjacent to" and "directly adjacent to" should be interpreted similarly.

Terms used in this specification are only used to describe specific embodiments, and are not intended to limit the present invention. Singular expressions include plural expressions unless the context clearly dictates otherwise. In this specification, terms such as "comprise" or "have" are intended to indicate that there is an embodied feature, number, step, operation, component, part, or combination thereof, but one or more other features or numbers However, it should be understood that it does not preclude the presence or addition of steps, operations, components, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related art, and unless explicitly defined herein, they are not interpreted in an ideal or excessively formal meaning. .

Hereinafter, a signal conversion device for isolated communication according to various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block configuration diagram of a signal conversion device for isolated communication according to an embodiment of the present invention, and FIG. 2 is a detailed circuit diagram of the signal conversion device for isolated communication according to an embodiment of the present invention. 3 is a diagram illustrating an example of a signal generated or output from each element in a signal conversion device for isolated communication according to an embodiment of the present invention.

1 to 3, the signal conversion device 10 for isolated communication according to an embodiment of the present invention is a digital input signal corresponding to a peak input signal input from an insulation element (not shown) used for isolated communication. The shift register units 121 and 122 which delay the signal by a predetermined time based on the system clock, and the digital input signal and the inverted signal of the delayed signal by the shift register units 121 and 122 perform a logical OR operation to obtain a rising flag signal and a falling flag. It may include a OR operation unit 13 that generates a signal and a pulse generator 14 that generates a pulse signal based on the rising flag signal and the falling flag signal.

A signal input from an isolation element of an isolated communication may be a peak input signal having a peak. In particular, the peak input signal may include a first peak input signal and a second peak input signal having an inverted relationship with each other, as shown in FIG. 3 .

The first peak input signal is a signal to be transmitted by isolation communication, that is, the rising edge of the digital signal before passing through the isolation element appears as a positive peak and the falling edge of the digital signal before passing through the isolation element is negative. It may be a signal that appears as a peak. The second peak input signal is a signal showing an inverted relationship with the first peak input signal, and a signal in which a positive peak of the first peak input signal appears as a negative peak and a negative peak of the first peak input signal appears as a positive peak. to be.

When such a peak input signal is input to the signal conversion device 10 for isolated communication, the rising peak may be recognized as a single pulse. The digital conversion unit 11 shown in FIG. 1 is an element that plays a role of recognizing a positive peak of an input peak input signal and outputting it as one pulse.

3 illustrates an example in which the digital conversion unit 11 recognizes positive peaks of the first peak input signal and the second peak input signal and outputs the recognized peaks as pulses having a width corresponding to one cycle of the system clock. show That is, the digital conversion unit 11 generates a digital input signal including a pulse having a rising edge formed at the rising edge of the system clock immediately after the peak is recognized and a falling edge formed at the next rising edge of the system clock. .

Since the first peak input signal and the second peak input signal have a complementary relationship, the first digital input signal is formed with a pulse at the positive peak of the first peak input signal and the second digital input signal is the first peak input signal. A pulse may be formed at a negative peak of (ie, a positive peak of the second peak input signal).

The shift register unit 12 includes a first shift register 121 that delays the first digital input signal based on the system clock and a second shift register 122 that delays the second digital input signal based on the system clock. can do.

As the first and second shift registers 121 and 122 , general shift registers commonly used in the field of logic circuits may be employed. As can be seen from the inverted output signals of the first and second shift registers 121 and 122 shown in FIG. 3, in the example shown in FIG. 3, the shift registers 121 and 122 convert the input digital signal to one period of the system clock. This is an example of a delayed

The first digital input signal, the output of the first shift register 121, the second digital input signal, and the output of the second shift register 122 are input to the OR operation unit 13.

The OR operation unit 13 includes a first OR element 131 for performing an OR operation on the first digital input signal and a signal obtained by inverting the output of the first shift register 121 and generating a rising flag signal corresponding to the result. The second OR element 132 may include a second OR element 132 performing an OR operation on the 2 digital input signals and a signal obtained by inverting the output of the second shift register 122 and generating a falling flag signal corresponding to the result.

The rising flag signal and the falling flag signal are signals obtained by strengthening the first digital input signal and the second digital input signal, respectively, and are the basis for generating the rising edge and the falling edge in the pulse signal in the pulse generator 14 at the rear stage. It's a signal.

The rising flag signal generated by the first OR element 131 and the falling flag signal generated by the second OR element 132 may be provided to the pulse generator 14 .

The pulse generator 14 is provided by a first multiplexer 141 outputting a logic high signal based on the rising flag signal provided from the first OR element 131 and a second OR element 132. A second multiplexer 142 outputting a logic low signal based on the received falling flag signal and a flip-flop receiving and maintaining logic signals output from the first multiplexer 141 and the second multiplexer 142 (143).

As shown in FIG. 2 , the first multiplexer 141 is a multiplexer that outputs logic high when the rising flag signal is logic high. When a logic high signal is output from the first multiplexer 141 and input to the flip-flop 143, the flip-flop 143 maintains the logic high output until another logic value (logic high or logic low) is input. .

When the rising flag signal is logic low, the output of the first multiplexer 141 is in a high-impedance (z) state, so no value is input to the flip-flop 143 and the previous output is maintained.

Similarly, the second multiplexer 142 is a multiplexer that outputs a logic low when the falling flag signal is a logic high. When a logic low signal is output from the second multiplexer 142 and input to the flip-flop 143, the flip-flop 143 maintains the output of the logic low until another logic value (logic high or logic low) is input. .

When the falling flag signal is logic high, the output of the second multiplexer 1412 is in a high-impedance (z) state, so no value is input to the flip-flop 143 and the previous output is maintained.

Summarizing the operations of the multiplexers 141 and 142 and the flip-flop 143, if the rising flag signal outputs a logic high pulse, the flip-flop 143 continues to output the logic high, and then the falling flag signal When outputting a logic high pulse, the output of the flip-flop 143 continues to be switched to a logic low state. That is, the pulse generator 14 generates a pulse signal for switching between a logic high and a logic low, respectively, when logic high pulses are generated in the rising flag signal and the falling flag signal.

As shown in FIG. 3, the pulse signal generated by the pulse generator 14 is a signal in which a rising edge is generated at the rising edge of the rising flag signal and a falling edge is generated at the falling edge of the falling flag signal, and the signal before passing through the insulating element Compared to , it becomes a delayed signal by one cycle of the system clock.

As such, the signal conversion device for isolated communication according to an embodiment of the present invention receives the two peak signals of the differential form provided from the isolation element during the isolation communication and completely restores the signal before passing through the isolation element by delaying the signal by one system clock period. You can do it.

That is, the signal conversion apparatus for isolated communication according to an embodiment of the present invention uses two isolated communication signals having a mutually complementary relationship to accurately recover the corresponding rising edge and falling edge of the peak appearing in the isolated communication signal, It is possible to recognize and process signals in digital circuits that do not recognize the value of .

Accordingly, the signal conversion device for isolated communication according to an embodiment of the present invention enables effective operation of a system using isolated communication, such as a battery management system, and builds a programmable development environment such as FPGA (Field Programmable Gate Array). can make it possible

10: signal conversion device 11: digital conversion unit
12: shift register unit 121: first shift register
122: second shift register 13: OR operation unit
131: first OR element 132: second OR element
14: pulse generator 141: first multiplexer
142: second multiplexer 143: flip-flop

Claims (8)

a shift register unit for delaying a digital input signal corresponding to a peak input signal input from the isolation element for a preset time based on a system clock;
an OR operation unit performing an OR operation on the digital input signal and an inverted signal of the signal delayed by the shift register unit to generate a rising flag signal and a falling flag signal; and
a pulse generator configured to generate a pulse signal based on the rising flag signal and the falling flag signal;
Signal conversion device for isolated communication comprising a. The method of claim 1,
The digital input signal is a signal conversion device for isolated communication, characterized in that the signal representing the peak having a positive value included in the peak input signal as one pulse based on the system clock. The method of claim 1,
The peak input signal comprises a first peak input signal having a peak and a second peak input signal having an inverse relationship with the first peak input signal. The method according to claim 3, wherein the shift register unit,
a first shift register delaying a first digital input signal representing a peak having a positive value included in the first peak input signal as one pulse based on the system clock; and
A second shift register for delaying a second digital input signal representing a positive peak included in the second peak input signal as one pulse based on the system clock Signal conversion for isolated communication characterized in that Device. The method according to claim 4, wherein the logical sum operation unit,
a first OR element generating the rising flag signal by performing an OR operation on the first digital input signal and an inverted signal of the signal delayed by the first shift register; and
and a second OR element generating the falling flag signal by performing an OR operation on the second digital input signal and an inverted signal of the signal delayed by the second shift register. The method according to claim 5, wherein the pulse generator,
and generating the pulse signal having a rising edge of the rising flag signal as a rising edge and a falling edge of the falling flag signal as a falling edge. The method according to claim 5, wherein the pulse generator,
a first multiplexer outputting logic high when the rising flag signal is logic high;
a second multiplexer outputting a logic low when the falling flag signal is a logic high; and
A signal conversion device for isolated communication comprising a flip-flop that receives the outputs of the first multiplexer and the second multiplexer and maintains and outputs a logic state of the received signal. a first shift register delaying a first digital input signal representing a positive peak included in a first peak input signal input from an isolation element as one pulse based on the system clock;
Delaying a second digital input signal that is input from the isolation element and represents a peak having a positive value included in a second peak input signal that is an inverted signal of the first peak input signal as one pulse based on the system clock a second shift register;
a first OR element generating the rising flag signal by performing an OR operation on the first digital input signal and an inverted signal of the signal delayed by the first shift register;
a second OR element generating the falling flag signal by performing an OR operation on the second digital input signal and an inverted signal of the signal delayed by the second shift register;
a first multiplexer outputting logic high when the rising flag signal is logic high;
a second multiplexer outputting a logic low when the falling flag signal is a logic high; and
A signal conversion device for isolated communication comprising a flip-flop that receives the outputs of the first multiplexer and the second multiplexer and maintains and outputs a logic state of the received signal.

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