KR20220169356A - Etchant compositions and methods of manufacturing integrated circuit device using the same - Google Patents

Abstract

The technical idea of the present invention relates to an etching composition and a method of manufacturing an integrated circuit device using the same, and in particular, to an etching composition for etching a nitride film and a method for manufacturing an integrated circuit device using the same. An effective oxide layer height (EFH) can be easily adjusted as an etching rate of an oxide layer is controlled due to high etching selectivity of the nitride layer.

Description

Etching composition and manufacturing method of integrated circuit device using the same

The technical idea of the present invention relates to an etching composition and a method of manufacturing a semiconductor device using the same, and in particular, to an etching composition for etching a nitride film and a method of manufacturing a semiconductor device using the same.

[0002] Recently, with the multifunctionalization of information communication devices, large-capacity and high-integration of semiconductor devices including memory devices are required. As the size of a memory cell is reduced for high integration, operating circuits and wiring structures included in a memory device for operation and electrical connection of the memory device are becoming more complex. In the manufacturing process of a highly downscaling semiconductor device, oxide and nitride films, which are representative insulating films, may be used alone or alternately stacked, and complex and miniaturized structures, for example, electronic devices having a three-dimensional structure In order to configure, a selective etching process of a nitride film made of a pattern of various shapes may be required. In particular, there is a need for an etching composition capable of securing a sufficient etching selectivity of a nitride film to an oxide film without causing problems such as unnecessary particle generation during the nitride film etching process or undesirable abnormal growth of by-products on the surface of the oxide film.

In an integrated circuit (semiconductor) device, an oxide film such as a silicon oxide film (SiO ₂ ) and a nitride film such as a silicon nitride film (SiNx) are representative insulating films, each having a structure in which one or more layers are alternately stacked. These oxide films and nitride films are also used as hard masks for forming conductive patterns such as metal wires.

In the wet etching process for removing the nitride film, an etching composition in which phosphoric acid and deionized water are mixed is generally used. At this time, the deionized water is added to prevent a decrease in the etching rate and a change in the etching selectivity for the oxide film, but when the nitride film is removed through a wet etching process, a defect occurs due to a slight change in the amount of deionized water, and the nitride film for the oxide film There was a problem in that there was a limit to etching the nitride film to a required level due to the decrease in the etching selectivity of .

Therefore, the present invention is to provide an etching composition capable of securing a sufficient etching selectivity of a nitride film to an oxide film without causing problems such as unnecessary particle generation during the nitride film etching process or undesirable abnormal growth of by-products on the surface of the oxide film. do.

In addition, the present invention is an oxide film without causing problems such as unnecessary particle generation or undesirable abnormal growth of by-products on the surface of the oxide film while etching nitride films of various shapes for implementing electronic devices having complex and miniaturized structures. An object of the present invention is to provide a method of manufacturing a semiconductor device capable of securing a sufficient etching selectivity of a nitride film to secure stability and reliability of a nitride film etching process and improving productivity of a semiconductor device manufacturing process.

The technical problem to be achieved by the present invention is not limited to the above-mentioned technical problem, and other technical problems not mentioned can be clearly understood by those skilled in the art from the description below. There will be.

As a technical means for achieving the above-described technical problem, one aspect of the present invention,

a first inorganic acid; and a silane-based inorganic acid salt prepared by reacting a second inorganic acid with a silane-based compound represented by Formula 1 below.

[Formula 1]

In Formula 1, R ₁ to R ₅ , R ₇ and R ₈ are each independently Hydrogen, halogen, substituted or unsubstituted alkyl group having 1 to 10 carbon atoms, substituted or unsubstituted cycloalkyl group having 1 to 10 carbon atoms, substituted or unsubstituted alkenyl group having 1 to 10 carbon atoms, substituted or unsubstituted carbon atoms 1 to 10 cyclic alkoxy group, substituted or unsubstituted aryl group having 5 to 20 carbon atoms, substituted or unsubstituted aminoalkyl group having 1 to 10 carbon atoms, substituted or unsubstituted alkylamino group having 1 to 10 carbon atoms, and 5 to 20 carbon atoms It is any one selected from the group consisting of a substituted or unsubstituted heteroaryl group, R ₆ is a single bond or a substituted or unsubstituted alkylene group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkylene group having 3 to 10 carbon atoms, A substituted or unsubstituted alkenylene group having 1 to 10 carbon atoms, a substituted or unsubstituted arylene group having 5 to 20 carbon atoms, a substituted or unsubstituted heteroarylene group having 5 to 20 carbon atoms, an oxygen atom, a carbonylene group, and a carbon number It is any one selected from the group consisting of 1 to 20 substituted or unsubstituted oxyalkylene groups, and at least one of R ₁ to R ₃ may be a halogen atom or a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms. .

At least one of R ₁ to R ₃ is a halogen atom, and R ₄ and R ₅ are each independently Carbon atoms including hydrogen, a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted aminoalkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted alkylamino group having 1 to 5 carbon atoms, and at least one heteroatom Any one selected from the group consisting of 1 to 5 substituted or unsubstituted alkyl groups, wherein R ₆ is a single bond or a substituted or unsubstituted alkylene group having 1 to 10 carbon atoms, or a carbonylene group. can

The first inorganic acid or the second inorganic acid may include at least one selected from the group consisting of sulfuric acid, nitric acid, phosphoric acid, silicic acid, hydrofluoric acid, boric acid, hydrochloric acid, and perchloric acid.

Based on the total weight of the etching composition, 70 to 99% by weight of the first inorganic acid; 0.01 to 15% by weight of the silane-based inorganic acid salt; And it may be characterized in that it comprises a solvent of the remainder.

The silane-based inorganic acid salt may be obtained by adding the silane-based compound to the second inorganic acid and then reacting at 20 to 300 ° C.

The silane-based inorganic acid salt may be prepared by reacting 0.001 to 50 parts by weight of the silane-based compound with respect to 100 parts by weight of the second inorganic acid.

The etching composition may further include an ammonium-based compound.

The ammonium-based compound may include at least one of ammonium chloride, ammonium phosphate, ammonium acetate, ammonium sulfate, ammonium formate, and a metal amine complex salt.

The etching composition may be characterized in that it is used for etching a silicon nitride film.

When the content of the silane-based inorganic acid salt is 0.3% by weight or more, the etching selectivity of the silicon nitride film/oxide film of the etching composition may be 100 or more.

When the content of the silane-based inorganic acid salt is 2.0% by weight or more, the etching selectivity of the silicon nitride film/oxide film of the etching composition may be 200 or more.

Another aspect of the present invention is,

forming a structure by stacking an insulating film and a sacrificial film on a substrate; and forming a space region by removing the sacrificial layer by performing an etching process using the etching composition.

The sacrificial layer may include silicon nitride, and the insulating layer may include silicon oxide.

in the etching process. The sacrificial layer may have a higher etch rate than the insulating layer.

In the step of performing the etching process to remove the sacrificial layer to form a space region, the space region may include a gate region formed between the insulating layers and a trench connected to the gate region. .

forming openings penetrating the laminated structure; and forming an integrated circuit pattern spaced apart from the trench in the openings, wherein forming the integrated circuit pattern may be performed before forming the trench.

Another aspect of the present invention is,

a structure formed by stacking an insulating film and a sacrificial film; a space portion formed by etching the sacrificial film with an etching composition in the structure; and a deposition part formed by depositing a conductive material or an insulating material on the space part, wherein the etching composition includes a first inorganic acid; and a silane-based inorganic acid salt prepared by reacting a second inorganic acid with a silane-based compound represented by Formula 1 below.

[Formula 1]

(In Formula 1 above,

R ₁ to R ₅ , R ₇ and R ₈ are each independently Hydrogen, halogen, substituted or unsubstituted alkyl group having 1 to 10 carbon atoms, substituted or unsubstituted cycloalkyl group having 1 to 10 carbon atoms, substituted or unsubstituted alkenyl group having 1 to 10 carbon atoms, substituted or unsubstituted carbon atoms 1 to 10 cyclic alkoxy group, substituted or unsubstituted aryl group having 5 to 20 carbon atoms, substituted or unsubstituted aminoalkyl group having 1 to 10 carbon atoms, substituted or unsubstituted alkylamino group having 1 to 10 carbon atoms, and 5 to 20 carbon atoms Any one selected from the group consisting of a substituted or unsubstituted heteroaryl group,

R ₆ is a single bond or a substituted or unsubstituted alkylene group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkylene group having 3 to 10 carbon atoms, a substituted or unsubstituted alkenylene group having 1 to 10 carbon atoms, or a substituted or unsubstituted alkenylene group having 5 to 10 carbon atoms Selected from the group consisting of a substituted or unsubstituted arylene group of 20, a substituted or unsubstituted heteroarylene group of 5 to 20 carbon atoms, an oxygen atom, a carbonylene group, and a substituted or unsubstituted oxyalkylene group of 1 to 20 carbon atoms which one is

At least one of R ₁ to R ₃ is a halogen atom or a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms)

According to an embodiment of the present invention, the effective oxide layer height (EFH) can be easily adjusted as the etching rate of the oxide layer is controlled due to the high etching selectivity of the nitride layer. In addition, the etching composition of the present invention can improve the reliability of a semiconductor device by preventing damage to the film quality of the oxide film, degradation of electrical characteristics and generation of particles due to etching of the oxide film when the nitride film is removed.

In addition, when the nitride film is etched, even when the nitride film and the oxide film are alternately stacked or mixed, the nitride film and the oxide film have a relatively high etching selectivity of about 100:1 to about 6500:1, and only the nitride film is selectively etched. can do. Therefore, in order to construct an electronic device having a complicated and miniaturized structure, while etching a nitride film made of various shapes and patterns, it does not cause problems such as unnecessary particle generation or unwanted abnormal growth on the surface of the oxide film, and the like. By securing sufficient etching selectivity, stability and reliability of the nitride film etching process can be secured, and the productivity of the semiconductor device manufacturing process can be improved by preventing damage to the oxide film exposed to the etching composition or deterioration of the electrical properties of the oxide film together with the nitride film. , the reliability of the semiconductor device can be improved.

Therefore, the etching composition of the present invention can be used in a semiconductor device manufacturing process requiring selective removal of a nitride film with respect to an oxide film (eg, a device separation process of a flash memory device, a pipe channel formation process of a 3D flash memory device, It is usefully used in a process of forming a diode of a phase change memory, etc.) and can contribute to improving the efficiency of a manufacturing process of a semiconductor device.

The effects of the present invention are not limited to the above effects, and should be understood to include all effects that can be inferred from the detailed description of the present invention or the configuration of the invention described in the claims.

1 is a top plan view of a semiconductor device according to example embodiments.
2 to 8 are diagrams for explaining a method of manufacturing a semiconductor device according to example embodiments.
FIG. 9 is an enlarged view of area A of FIG. 8 .

Hereinafter, the present invention will be described in more detail. However, the present invention can be implemented in many different forms, and the present invention is not limited by the embodiments described herein, and the present invention is only defined by the claims to be described later.

In addition, terms used in the present invention are only used to describe specific embodiments, and are not intended to limit the present invention. Singular expressions include plural expressions unless the context clearly dictates otherwise. In the entire specification of the present invention, 'include' a certain element means that other elements may be further included without excluding other elements unless otherwise stated.

As used herein, “silicon nitride”, “silicon nitride” and “Si _x N _y ” refer to pure silicon nitride as well as impure silicon nitride containing hydrogen, carbon and/or oxygen impurities in the crystal structure. (Where x and y are each independently a positive integer).

As used herein, “silicon oxide film” or “silicon oxide” refers to a thin film made of silicon oxide (SiO _x ), eg SiO ₂ , “thermal oxide” (ThOx), or the like. Silicon oxide can be deposited on the substrate by any method, such as thermal evaporation or deposition via chemical vapor deposition from TEOS or other sources. Silicon oxide may contain other materials or impurities, generally at low levels that are commercially useful. Silicon oxide may be present as a feature of the microelectronic device as part of the microelectronic device, for example as an insulating layer.

As used herein, “at least partial removal of silicon nitride material” corresponds to removal of at least a portion of the exposed silicon nitride layer. For example, partial removal of the silicon nitride film includes anisotropic removal of the silicon nitride film covering/protecting the gate electrode to form Si ₃ N ₄ . It is contemplated that the compositions of the present invention may be used more generally for substantially removing silicon nitride than polysilicon and/or silicon oxide films. In this context, "substantial removal" is defined as at least 90% in one embodiment of the present invention, at least 95% in another embodiment, and in another embodiment at least 99% of the silicon nitride material is a composition of the present invention. It can mean being removed by use.

In the present specification, “substituted or unsubstituted” means a hydrogen atom, a deuterium atom, a halogen atom, a cyano group, a nitro group, an amino group, a silyl group, a boron group, a phosphine oxide group, a phosphine sulfide group, a carboxy group, an alkyl group, an alke It may mean substituted or unsubstituted with one or more substituents selected from the group consisting of a yl group, an aryl group, and a heterocyclic group. In detail, “substituted or unsubstituted” may mean substituted or unsubstituted with one or more substituents selected from the group consisting of a hydrogen atom, a deuterium atom, an alkyl group, an amino group, a silyl group, and an alkoxy group. In addition, each of the substituents exemplified above may be substituted or unsubstituted. For example, a methyl amino group can be interpreted as an amino group.

In this specification, examples of the halogen atom include a fluorine atom, a chlorine atom, a bromine atom or an iodine atom.

In the present specification, the alkyl group may be a linear alkyl group, a branched alkyl group, or a cyclic alkyl group. An alkyl group can be a linear alkyl group, a branched alkyl group, or a cyclic alkyl group. Examples of the alkyl group include methyl group, ethyl group, n-propyl group, isopropyl group, n-butyl group, t-butyl group, i-butyl group, 2-ethylbutyl group, 3,3-dimethylbutyl group, n-pentyl group , i-pentyl group, neopentyl group, t-pentyl group, cyclopentyl group, 1-methylpentyl group, 3-methylpentyl group, 2-ethylpentyl group, 4-methyl-2-pentyl group, n-hexyl group , 1-methylhexyl group, 2-ethylhexyl group, 2-butylhexyl group, cyclohexyl group, 4-methylcyclohexyl group, 4-t-butylcyclohexyl group, n-heptyl group, 1-methylheptyl group, 2,2-dimethylheptyl group, 2-ethylheptyl group, 2-butylheptyl group, n-octyl group, t-octyl group, 2-ethyloctyl group, 2-butyloctyl group, 2-hexyloctyl group, 3, 7-dimethyloctyl group, cyclooctyl group, n-nonyl group, n-decyl group and the like, but are not limited thereto.

For example, the term "C1-C20 alkyl group" used in the specification refers to a straight-chain or branched non-cyclic saturated aliphatic hydrocarbon group having 1 to 20 carbon atoms. The term "C2-C20 alkenyl group" refers to a straight-chain or branched non-cyclic unsaturated aliphatic hydrocarbon group having 2 to 20 carbon atoms and having at least one double bond between adjacent carbon atoms. The term "C2-C20 alkynyl group" may refer to a straight-chain or branched non-cyclic unsaturated aliphatic hydrocarbon group having 2 to 20 carbon atoms and having one or more triple bonds between adjacent carbon atoms. . The term “C1-C20 alkoxy group” may refer to a straight-chain or branched noncyclic saturated or unsaturated aliphatic hydrocarbon group having one or more ether groups and 1 to 20 carbon atoms.

In the present specification, the amino group may include an alkyl amino group and an aryl amino group. Examples of the amino group include, but are not limited to, a methylamino group, an ethylamino group, a dimethylamino group, a diethylamino group, and/or an ethylmethyl amino group.

In this specification, the alkoxy group may include an alkyl alkoxy group and an aryl alkoxy group. Examples of the alkoxy group include a methyl alkoxy group, an ethyl alkoxy group, a propyl alkoxy group, a butyl alkoxy group, a pentyl alkoxy group, a hexyl alkoxy group, a heptyl alkoxy group, an octyl alkoxy group, a nonyl alkoxy group, and a decyl alkoxy group. not limited to

Hereinafter, prior to describing the first aspect of the present invention, the concept of an etching composition will be described.

The etching composition may be used for etching silicon-containing materials. For example, the etching composition may be used for etching a silicon nitride film or a silicon oxide film, which is an insulating film. Etching of the silicon nitride film using the etching composition may proceed as shown in Scheme 1 below. Etching of the silicon oxide film using the etching composition may proceed as shown in Scheme 2 below. However, in the etching process using the etching composition, the etching rate of the silicon nitride layer as the first insulating layer may be greater than that of the silicon oxide layer as the second insulating layer. In this specification, etching of the silicon nitride film may mean that silicon nitride is removed, and etching of the silicon oxide film may mean that silicon oxide is removed. Silicon nitride can be represented as Si _x N _y . Silicon oxide may include Si _x O _y . (Where x and y are each independently a positive integer)

[Scheme 1]

3Si ₃ N ₄ + 4H ₃ PO ₄ + 27H ₂ O → 4(NH ₄ )3PO ₄ + 9SiO ₂ H ₂ O

[Scheme 2]

SiO ₂ +4H ⁺ + 4e ^- → Si + 2H ₂ O

Referring to Scheme 1, phosphoric acid may react with silicon nitride to remove silicon nitride. In this case, the composition ratio of silver phosphoric acid as the first inorganic acid may be 70 to 99 parts by weight. In this specification, the composition ratio means the composition ratio for the composition. When the amount of the first inorganic acid is less than 70 parts by weight of the etching composition, it may be difficult to easily remove the silicon nitride film. Alternatively, in the etching process, etching by-products may be formed. In one embodiment of the present invention, the composition ratio of phosphoric acid may mean the composition ratio of 85% phosphoric acid aqueous solution. That is, the phosphoric acid composition ratio of 65% may mean that the 85% phosphoric acid aqueous solution is 65% of the etching composition.

Referring to Scheme 2, phosphoric acid may react with silicon oxide by providing hydrogen ions. If phosphoric acid is greater than 99 parts by weight of the etching composition, the reaction rate between phosphoric acid and silicon oxide may increase. Accordingly, in the etching process, it may be difficult for the silicon nitride layer to have a sufficiently high etching selectivity with respect to the silicon oxide layer.

etching composition

Hereinafter, the etching composition according to the first aspect of the present invention will be described in detail.

One aspect of the present invention,

a first inorganic acid; and a silane-based inorganic acid salt prepared by reacting a second inorganic acid with a silane-based compound represented by Formula 1 below.

[Formula 1]

In Formula 1, R ₁ to R ₅ , R ₇ and R ₈ are each independently Hydrogen, halogen, substituted or unsubstituted alkyl group having 1 to 10 carbon atoms, substituted or unsubstituted cycloalkyl group having 1 to 10 carbon atoms, substituted or unsubstituted alkenyl group having 1 to 10 carbon atoms, substituted or unsubstituted carbon atoms 1 to 10 cyclic alkoxy group, substituted or unsubstituted aryl group having 5 to 20 carbon atoms, substituted or unsubstituted aminoalkyl group having 1 to 10 carbon atoms, substituted or unsubstituted alkylamino group having 1 to 10 carbon atoms, and 5 to 20 carbon atoms It is any one selected from the group consisting of a substituted or unsubstituted heteroaryl group, R ₆ is a single bond or a substituted or unsubstituted alkylene group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkylene group having 3 to 10 carbon atoms, A substituted or unsubstituted alkenylene group having 1 to 10 carbon atoms, a substituted or unsubstituted arylene group having 5 to 20 carbon atoms, a substituted or unsubstituted heteroarylene group having 5 to 20 carbon atoms, an oxygen atom, a carbonylene group, and a carbon number It is any one selected from the group consisting of 1 to 20 substituted or unsubstituted oxyalkylene groups, and at least one of R ₁ to R ₃ may be a halogen atom or a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms. .

In one embodiment of the present invention, at least one of the R ₁ to R ₃ is a halogen atom, and the R ₄ and R ₅ are each independently Carbon atoms including hydrogen, a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted aminoalkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted alkylamino group having 1 to 5 carbon atoms, and at least one heteroatom Any one selected from the group consisting of 1 to 5 substituted or unsubstituted alkyl groups, wherein R ₆ is a single bond or a substituted or unsubstituted alkylene group having 1 to 10 carbon atoms, or a carbonylene group. can

In one embodiment of the present invention, the meaning of "including at least one heteroatom" means that an atom other than carbon or hydrogen is included in a functional group or a linking group, for example, the heteroatom is oxygen, nitrogen , phosphorus, sulfur, selenium, or tellurium.

In one embodiment of the present invention, when the hetero atom is included as a functional group, an acetoxy group, an acetyl group, an acryloyl group, an acyl group, an aldehyde, an alkoxy group, a benzoyl group, a carbonyl group, a carboxyl group, a carboxylic acid anhydride, Dioxirane, epoxide, ester, ether, ethylenedioxy group, hydroxyl group, ketone, methylenedioxy group, peroxide (organic peroxide), amine, azo compound, cyanate, hydrazone, amide, imine, iso Cyanate, isocyanide, nitrene, nitrile, nitro compound, nitroso group, amide oxime, phosphonic acid, phosphonite, disulfide, sulfone, sulfonic acid, sulfoxide, cyal, thioester, Thiaoether, thioketone, thiol, selenol, selenonic acid, selenic acid, selenic acid, selenic acid, tellurol, telluroketone, isothiocyanate, phosphoamide, sulfenyl chloride, sulfone It may be at least one selected from the group consisting of amides and thiocyanates. Further, in one embodiment of the present invention, specifically, the central silicon of Chemical Formula 1 may form a bond with α carbon, β carbon, or γ carbon of the functional group.

In some embodiments of the present invention, the silane-based compound may be specifically one or more selected from the group consisting of Formula 2 or Formula 3 below, but this is only an example, and the technical spirit of the present invention is limited thereto. It is not.

[Formula 2]

[Formula 3]

In one embodiment of the present invention, the silane-based inorganic acid salt can easily control the effective field oxide height (EFH) by controlling the etching rate of the oxide film.

In one embodiment of the present invention, the silane-based inorganic acid salt may be prepared by reacting the second inorganic acid and the silane-based compound. As the silane-based inorganic acid salt is prepared by reacting the second inorganic acid with the silane-based compound, silane-based inorganic acid salts having a single chemical structure or various chemical structures may be mixed.

In one embodiment of the present invention, the first inorganic acid or the second inorganic acid included in the etching composition is such that the etching composition has an acidic pH (eg, pH 2 to 6) to be etched (eg, an insulating film) ) to be etched.

These inorganic acids are not particularly limited, but may be at least one selected from the group consisting of sulfuric acid, nitric acid, phosphoric acid, silicic acid, hydrofluoric acid, boric acid, hydrochloric acid and perchloric acid. Preferably, the first or second inorganic acid may be phosphoric acid, sulfuric acid, or nitric acid. When phosphoric acid, sulfuric acid, or nitric acid is used as the first or second inorganic acid and the etching target is an oxide film and a nitride film, the etching selectivity of the nitride film to the oxide film can be increased, and hydrogen ions are provided in the etching composition to perform etching. can promote

In one embodiment of the present invention, the first inorganic acid is added as an etchant for etching the nitride film, and any acid capable of etching the nitride film may be used. Preferably, phosphoric acid may be used as the first inorganic acid to obtain an etching selectivity of the nitride layer with respect to the oxide layer. The phosphoric acid may serve to promote etching by providing hydrogen ions in the etching composition. When phosphoric acid is used as the first inorganic acid, the etching composition may further include sulfuric acid as an additive. The sulfuric acid may increase the boiling point of the etching composition including the phosphoric acid as the first inorganic acid, thereby helping to etch the nitride film.

In one embodiment of the present invention, the content of the first inorganic acid may be 70 to 99% by weight, preferably 70 to 90% by weight, more preferably 75 to 85% by weight based on the total weight of the etching composition. When the amount of the first inorganic acid is less than 70% by weight, the nitride film may not be easily removed and particles may be generated.

In one embodiment of the present invention, the silane-based inorganic acid salt may be obtained by adding the silane-based compound to the second inorganic acid and then reacting at a temperature of 20 to 300 ° C, preferably 50 to 200 ° C. there is. At this time, it can be carried out while removing air and moisture. When the reaction temperature is less than 20°C, the silane-based compound may be crystallized or vaporized due to a low reaction rate, and when the reaction temperature exceeds 300°C, the second inorganic acid may be evaporated.

In one embodiment of the present invention, the second inorganic acid and the silane-based compound may be reacted in an amount of 0.001 to 50 parts by weight, preferably 0.01 to 30 parts by weight, based on 100 parts by weight of the second inorganic acid. When the reaction amount of the silane-based compound is less than 0.01 parts by weight, it may be difficult to implement the selectivity due to the small content ratio of the silane-based compound, and when it exceeds 50 parts by weight, the silane-based compound may be precipitated or an amorphous structure may be generated. .

In one embodiment of the present invention, volatile by-products generated during the reaction may be removed by distillation under reduced pressure. A product of the reaction may be purified to separate the silane-based inorganic acid salt and then added to the etching composition, or the reaction product may be added to the etching composition without purification.

In one embodiment of the present invention, the reaction may be carried out in the presence or absence of an aprotic solvent, such as dioxane, tetrahydrofuran, diethyl ether, diisopropyl ether, Ethylene glycol dimethyl ether; Chlorinated hydrocarbons such as dichloromethane, trichloromethane, tetrachloromethane, 1,2-dichloroethane, trichloroethylene; Hydrocarbons such as pentane, n-hexane, hexane isomer mixture, heptane, Octane, benzine, petroleum ether, benzene, toluene, xylene; Ketones such as acetone, methyl ethyl ketone, diisopropyl ketone, methyl isobutyl ketone (MIBK); Esters such as ethyl acetate, butyl acetate, propyl ketone cionate, ethyl butylate, ethyl isobutyrate, carbon disulfide and nitrobenzene or mixtures of these solvents.

In one embodiment of the present invention, the content of the silane-based inorganic acid salt is 0.01 to 15% by weight, preferably 0.5 to 15% by weight, more preferably 1 to 15% by weight, based on the total weight of the etching composition More preferably, it may be 3 to 7% by weight. If the content of the silane-based inorganic acid salt is less than 0.01% by weight, it is not possible to obtain a high etching selectivity to the nitride film, and if it exceeds 15% by weight, it is difficult to expect any further increase in the effect due to the increase in the content, and rather, problems such as particle generation may occur.

In one embodiment of the present invention, when the content of the silane-based inorganic acid salt is 0.3% by weight or more, the etching selectivity of the silicon nitride film / oxide film of the etching composition may be 100 or more, and the content of the silane-based inorganic acid salt is 2.0% by weight % or more, the silicon nitride film/oxide film etch selectivity of the etching composition may be 200 or more. Since the etching composition has a high etching selectivity of the nitride film to the oxide film as described above, the EFH can be easily controlled by adjusting the etching rate of the oxide film.

In one embodiment of the present invention, the etching composition may include a solvent. Specifically, the solvent may be water or deionized water (DIW). The content of the solvent may be the remaining weight% (balance amount) excluding the components based on 70 to 99% by weight of the first inorganic acid and 0.01 to 10% by weight of the first additive.

In one embodiment of the present invention, the etching composition may further include an ammonium-based compound. The ammonium-based compound may refer to a compound that forms ammonium (NH ⁴⁺ ) in an aqueous solution. The ammonium-based compound may include, for example, at least one of ammonia, ammonium chloride, ammonium phosphate, ammonium acetate, ammonium sulfate, ammonium formate, and a metal amine complex salt. The metal amine complex salt may be a metal complex salt comprising at least one ammonia (NH ₃ ) ligand. When the etching process of the silicon nitride film is performed for a long time, the concentration of silicon ions may increase. For example, the silicon ion may be formed by SiO ₂ H ₂ O, which is a product of Reaction Formula 1. Abnormal growth of the silicon oxide film may occur due to silicon ions. According to embodiments, in an etching process, an ammonium-based compound may be dissociated to form ammonium (NH ⁴⁺ ). Ammonium may react with a precursor of silicon ion (eg, SiO ₂ ) to remove the precursor of silicon ion. Accordingly, abnormal growth of the silicon oxide film can be prevented. The ammonium-based compound may keep the etching rate constant according to the etching time. By including the ammonium-based compound in the etching composition, even when the etching composition is used for a long time, it is possible to prevent a decrease in the etching rate or a change in the etching selectivity from occurring.

In one embodiment of the present invention, the ammonium-based compound may be included in an amount of about 0.01 to 20% by weight based on the total amount of the etching composition. If the ammonium-based compound is less than 0.01 wt% of the etching composition, the silicon oxide film may grow abnormally or the effect of maintaining the nitride film etching selectivity constant may be reduced when the etching composition is used for a long time, and the ammonium-based compound may be used in the etching composition If it exceeds 20 wt%, since the etching rate of the silicon nitride film and the silicon oxide film may change over time, the selectivity may also change.

In one embodiment of the present invention, the etching composition may further include an amine-based compound. The amine-based compound may be made of methylamine, ethylamine, propylamine, isopropylamine, 2-aminopentane, dimethylamine, methylethanolamine, trimethylamine, triphenylamine, or a combination thereof. Similar to the ammonium-based compound, the amine-based compound may serve to suppress abnormal growth on the surface of the oxide film exposed to the etching composition together with the nitride film during etching of the nitride film.

In one embodiment of the present invention, the amine-based compound may be included in an amount of about 0.1 to 10% by weight based on the total amount of the etching composition. If the content of the amine-based compound is too small, it is difficult to help control the abnormal growth phenomenon on the surface of the oxide film exposed to the etching composition together with the nitride film during etching of the nitride film, and if the content is too excessive, etching selection of the nitride film for the oxide film Rain may decrease.

In one embodiment of the present invention, the etching composition may further include 0.01 to 1% by weight of a fluorine-based compound based on the total weight of the etching composition. When the fluorine-based compound is added in an amount of less than 0.01% by weight, the etching rate of the nitride film is reduced and it may not be easy to remove the nitride film. there is. The fluorine-based compound may be any one or a mixture of two or more selected from hydrogen fluoride, ammonium fluoride, and ammonium hydrogen fluoride. More preferably, ammonium bifluoride is used because selectivity is maintained during long-term use.

In addition, the etching composition of the present invention may further include any commonly known additives to improve etching performance. The additive may be a surfactant, a metal ion sequestering agent, or a corrosion inhibitor.

In one embodiment of the present invention, the surfactant may serve to remove residues etched while the nitride film is etched using the etching composition. The surfactant may be composed of an anionic surfactant, a cationic surfactant, a nonionic surfactant, or a combination thereof. For example, as the surfactant, CTAC (cetyltrimethylammonium chloride), DTAC (dodecyltrimethylammonium chloride), MLS (monoethanolamine lauryl sulfate), DBSA (dodecylbenzenesulfonic acid), etc. may be used, but the technical idea of the present invention is limited to the bar exemplified above It is not.

In one embodiment of the present invention, the metal ion sequestering agent and the corrosion inhibitor may serve to protect a metal film exposed to the etching composition together with the nitride film while etching the nitride film using the etching composition, respectively. . In some embodiments, EDTA (ethylenediamine tetraacetic acid) may be used as the metal ion sequestering agent, and triazoles, imidazoles, thiol compounds, etc. may be used as the corrosion inhibitor, but the technical idea of the present invention is as exemplified above It is not limited.

As described above, the etching composition of the present invention selectively further includes an additive, an ammonium-based compound, an amine-based compound, a fluorine-based compound, and the like in addition to an inorganic acid and a silane-based compound, thereby providing a remarkably high etching selectivity of a nitride film to an oxide film. can indicate In addition, the etching composition can prevent damage to the film quality of the oxide film or deterioration of electrical characteristics due to etching of the oxide film during the etching process of the nitride film, and can minimize the generation of particles. Therefore, the etching composition of the present invention can be usefully used in an etching process in manufacturing a semiconductor device.

Manufacturing method of semiconductor device

The second aspect of the present application is,

forming a structure by stacking an insulating film and a sacrificial film on a substrate; and forming a space region by removing the sacrificial layer by performing an etching process using the etching composition.

Detailed descriptions of portions overlapping with those of the first aspect of the present application have been omitted, but the contents described for the first aspect of the present application can be equally applied even if the description is omitted from the second aspect.

Hereinafter, a method of manufacturing a semiconductor device according to a second aspect of the present disclosure will be described in detail.

As used herein, “space” in “space region” and “space portion” collectively refers to a space formed by removing a sacrificial film in an etching process of a semiconductor device, and includes trenches, channels, gates, and spacers as non-limiting examples. etc. may be included.

In addition, the “deposited portion” used herein refers to a portion formed by depositing a conductive material or an insulating material on the above-described space region or space portion, and may be patterned.

1 of the present application is a plan view of a semiconductor device according to example embodiments. 2 to 8 are views for explaining a method of manufacturing a semiconductor device according to example embodiments, and correspond to cross-sections taken along the line II′ of FIG. 1 . Hereinafter, contents overlapping with those described above will be omitted.

Referring to FIGS. 1 and 2 of the present application, a laminated structure 200 may be formed on a substrate 100 . The substrate 100 may be a bulk silicon substrate, a silicon on insulator (SOI) substrate, a germanium substrate, a germanium on insulator (GOI) substrate, a silicon-germanium substrate, or an optional It may be a substrate of an epitaxial thin film obtained by performing selective epitaxial growth (SEG). The first direction D1 and the second direction D2 may be parallel to the upper surface 100a of the substrate 100 . The second direction D2 may cross the first direction D1. The third direction D3 may be perpendicular to the top surface 100a of the substrate 100 .

In one embodiment of the present invention, the stacked structure 200 may include sacrificial layers SC and insulating layers IL. The formation of the stacked structure 200 may include alternately and repeatedly forming sacrificial layers SC and insulating layers IL on the substrate 100 . The sacrificial layers SC may be formed between the insulating layers IL. The sacrificial layers SC may have etch selectivity with respect to the insulating layers IL. The sacrificial layers SC may include, for example, silicon nitride (eg, Si _x N _y ). The insulating layers IL may include silicon oxide (eg, Si _x O _y ). The insulating layers IL may be formed using tetraethoxysilane (TEOS), and tetraethoxysilane may be represented by (C ₂ H ₅ O) ₄ Si.

In example embodiments, the sacrificial layers SC may have substantially the same thicknesses as each other. Unlike this, among the sacrificial layers SC, the lowermost sacrificial layer SC and the uppermost sacrificial layer SC may be formed thicker than the sacrificial layers SC located therebetween. In addition, the insulating layers IL may have the same thickness or the thicknesses of at least two of the insulating layers IL may be different from each other. A lowermost layer of the insulating layers IL may have a thickness smaller than that of the sacrificial layers SC and the insulating layers IL formed thereon. A lowermost layer of the insulating layers IL may be a silicon oxide layer formed through a thermal oxidation process. In the present specification, the thickness of a component may mean a distance of the component in the third direction D3.

Referring to FIGS. 1 and 3 of the present application, openings 210 and vertical structures 300 may be formed in the laminated structure 200 . Forming the openings 210 includes forming a mask pattern (not shown) defining the planar positions of the openings 210 on the stacked structure 200 and using the mask pattern as an etching mask to form a stacked structure ( 200) may include etching. Etching of the laminated structure 200 may be performed by an anisotropic etching process.

In one embodiment of the present invention, the openings 210 may pass through the laminated structure 200 . Sidewalls of the openings 210 may expose the sacrificial layers SC and the insulating layers IL. The openings 210 may expose the substrate 100 . While forming the openings 210 , the upper surface 100a of the substrate 100 may be over-etched. In this case, the upper surface 100a of the substrate 100 exposed through the openings 210 may be recessed to a predetermined depth.

In one embodiment of the present invention, each of the openings 210 may be formed in a cylindrical or rectangular parallelepiped hole shape. The lower portions of the openings 210 may have smaller widths than their upper portions. As shown in FIG. 1 , the openings 210 may form rows parallel to the second direction D2 in a plan view. The openings 210 between two adjacent columns may be arranged in a zigzag shape in the second direction D2 . Unlike FIG. 1 , the openings 210 may form an array aligned along the first and second directions D1 and D2 . For example, two adjacent columns of openings 210 may be aligned in the first direction D1 to form an array.

In one embodiment of the present invention, first dielectric patterns 310 may be formed in the openings 210 . The first dielectric patterns 310 may cover sidewalls of the openings 210 . The first dielectric patterns 310 may expose the upper surface 100a of the substrate 100 . The first dielectric pattern 310 may include a single insulating layer or multiple insulating layers. The first dielectric pattern 310 may function as a part of a data storage layer of a charge trap type flash memory transistor. Exemplary embodiments of the first dielectric pattern 310 are described later in the description with respect to FIG. 9 .

In one embodiment of the present invention, semiconductor patterns 320 may be formed in the openings 210 . The semiconductor patterns 320 may include, for example, silicon (Si), germanium (Ge), or a mixture thereof. The semiconductor patterns 320 may have a crystal structure including at least one of single crystal, amorphous, and polycrystalline. The semiconductor patterns 320 may further include doped impurities. As another example, the semiconductor patterns 320 may be an undoped intrinsic semiconductor. The semiconductor patterns 320 may be formed using thermal CVD, plasma enhanced CVD, or atomic layer deposition (ALD) technology.

In one embodiment of the present invention, the semiconductor patterns 320 may be formed on sidewalls of the openings 210 to cover the first dielectric patterns 310 . The semiconductor patterns 320 may extend onto the substrate 100 and contact portions of the upper surface 100a of the substrate 100 exposed by the openings 210 . Each of the semiconductor patterns 320 may be formed in a pipe-shaped, hollow cylindrical shape, or cup shape within corresponding openings 210 . The semiconductor patterns 320 may define blank areas 321 at central portions of the openings 210 .

In one embodiment of the present invention, the filling insulating patterns 330 may fill the empty regions 321 respectively. The filling insulating patterns 330 may be formed of an insulating material having excellent gap-fill characteristics. The filling insulating patterns 330 may be formed of, for example, a high-density plasma oxide layer, a spin on glass layer (SOG) layer, an ALD oxide layer, and/or a CVD oxide layer.

In one implementation of the invention, pads 340 may be formed on vertical structures 300 . The pads 340 may be formed of a conductive material such as a semiconductor material doped with impurities or a metal. The lower surfaces of the pads 340 may be disposed at a higher level than the upper surface of the uppermost sacrificial layer SC. A lower capping layer 510 may be formed on upper surfaces of the vertical structures 300 and the stacked structure 200 . The lower capping layer 510 may include an insulating material such as silicon oxide, silicon nitride, and/or silicon oxynitride.

Referring to FIG. 4 of the present application, trenches 600 may be formed to pass through the stacked structure 200 and the lower capping layer 510 . Forming the trenches 600 includes forming a mask pattern (not shown) defining the planar positions of the trenches 600 on the lower capping layer 510 and using the mask pattern as an etch mask to form a layered structure. (200). Etching the laminated structure 200 may be performed by an anisotropic etching process.

In one embodiment of the present invention, the trenches 600 may be formed between adjacent vertical structures 300 . The trenches 600 may be spaced apart from the vertical structures 300 to expose sidewalls of the sacrificial layers SC and sidewalls of the insulating layers IL. The tops of the trenches 600 may have larger widths than their bottoms. The trenches 600 may expose the top surface 100a of the substrate 100 . During formation of the trenches 600 , an upper surface 100a of the substrate 100 exposed to the trenches 600 may be recessed to a predetermined depth by over-etching. As shown in FIG. 1 , the trenches 600 may have long axes parallel to the second direction D2 in a plan view. The trenches 600 may be spaced apart from each other in the first direction D1.

Referring to FIG. 5 of the present application, the sacrificial layers SC may be etched to form gate regions 250 . The gate regions 250 may be voids and may be regions where the gate electrode patterns 450 are formed in FIG. 7 . The gate regions 250 may be formed between the insulating layers IL and may be connected to the trenches 600 . The gate regions 250 may expose portions of the sidewalls 300c of the vertical structures 300 . Thicknesses of the gate regions 250 may be substantially the same as thicknesses of the removed sacrificial layers SC. Etching of the sacrificial layers SC may be performed by an etching process using an etching composition. The etching process may be a wet etching process.

In one embodiment of the present invention, the etching composition may include an inorganic acid such as phosphoric acid, an ammonium-based compound, and a silane-based compound. Since the sacrificial layers SC include silicon nitride, they may be etched with phosphoric acid as in Scheme 1.

In one embodiment of the present invention, for example, an etching composition at 150°C to 200°C, specifically 155°C to 170°C, may be supplied on the substrate 100 . Under the temperature condition, phosphoric acid may further etch silicon oxide as well as the sacrificial layers SC. The insulating layers IL may include silicon oxide. According to example embodiments, etching of the insulating layers IL by phosphoric acid may be prevented/reduced by including a silicon-containing compound in the etching composition. For example, in the etching process, oxygen of the silicon-containing compound may be bonded to surfaces of the insulating layers IL to protect the insulating layers IL. Accordingly, during the etching process, the insulating layers IL may exhibit a low etching rate. Oxygen atoms of the silicon-containing compound may not interact (eg, hydrogen bond) with the surfaces of the sacrificial layers SC. Accordingly, etch selectivity of the sacrificial layers SC with respect to the insulating layers IL may be increased. If the silicon-containing compound is unstable, by-products are formed, which can form particles. By-products and/or particles may cause defects in the manufacturing process of semiconductor devices. For example, by-products and/or particles may be adsorbed to the insulating layers IL. Since a bond between a silicon atom and an oxygen atom of the silicon-containing compound is stable, formation of by-products in an etching process may be prevented. The sacrificial layers SC may be etched to form silicon ions (eg, SiO ₂ H ₂ O). The ammonium-based compound may remove silicon ions generated while etching the sacrificial layers SC. Accordingly, abnormal growth of the insulating layers IL by the silicon ions may be prevented/reduced.

In one embodiment of the present invention, in the etching process, the etching composition may be applied on the substrate 100 by coating, dipping, spraying, or spraying. When the etching composition is applied by an immersion method, in the etching process, a batch type device may be used. When the etching composition is sprayed onto the substrate 100, a single wafer type device may be used in the etching process. After the etching process, a cleaning process using ultrapure water and a drying process may be performed on the substrate 100 . Ultrapure water may mean water having impurities of 100 ppb or less.

Referring to FIG. 6 of the present application, a second dielectric pattern 410 and a gate conductive layer 451 may be formed on the stacked structure 200 and in the trenches 600 . The second dielectric pattern 410 may be substantially conformally formed on the stacked structure 200 and in the trenches 600 . The second dielectric pattern 410 may extend into the trenches 600 and the gate regions 250 . The second dielectric pattern 410 is exposed by the top surface of the uppermost insulating layer IL among the insulating layers IL, the sidewalls of the insulating layers IL exposed by the trenches 600, and the gate regions 250. The upper and lower surfaces of the insulating films IL, the sidewalls 300c of the vertical structures 300 exposed by the gate regions 250, and the upper surface 100a of the substrate 100 are substantially formed. It can be covered in conformity. The second dielectric pattern 410 may be formed by a deposition process. By adjusting the deposition method and deposition conditions, the second dielectric pattern 410 may be formed to have good step coverage. For example, the deposition process of the second dielectric pattern 410 may be performed by chemical vapor deposition or atomic layer deposition. The second dielectric pattern 410 may include a single layer or a plurality of layers. The second dielectric pattern 410 may be a part of the data storage layer DS of the charge trap type flash memory transistor. Exemplary embodiments of the second dielectric pattern 410 are described later in the description with respect to FIG. 9 . A gate conductive layer 451 may be formed on the second dielectric pattern 410 . The gate conductive layer 451 may fill at least a portion of each of the trenches 600 and the gate regions 250 . Unlike shown, the gate conductive layer 451 may completely fill each of the trenches 600 . Although not shown, a gate conductive layer 451 may be formed by sequentially depositing a barrier metal layer and a metal layer. The barrier metal layer may include, for example, a metal nitride such as titanium nitride (TiN), tantalum nitride (TaN), or tungsten nitride (WN). The metal layer may include, for example, tungsten (W), aluminum (Al), titanium (Ti), tantalum (Ta), cobalt (Co), or copper (Cu).

Referring to FIGS. 1 and 7 of the present application, the gate conductive layer 451 may be patterned to form gate electrode patterns 450 in the gate regions 250 , respectively. Patterning of the gate conductive layer 451 may be performed by an etching process. At this time, the second dielectric pattern 410 may be further etched. In the etching process of the gate conductive layer 451 , the gate conductive layer 451 on the substrate 100 may be removed. Etching of the gate conductive layer 451 may be performed until the insulating layers IL on the sidewalls of the insulating layers IL are removed and the sidewalls of the insulating layers IL are exposed. Accordingly, the gate electrode patterns 450 and the second dielectric pattern 410 may be localized in the gate regions 250 , and gate structures 400 may be formed. Each of the gate structures 400 may be formed between two adjacent trenches 600 . Sidewalls of the gate structures 400 may be exposed in the trenches 600 . The gate structures 400 may expose the top surface 100a of the substrate 100 in the trenches 600 . The exposed upper surface 100a of the substrate 100 may be further etched. As shown in FIG. 1 , the gate structures 400 may have long axes parallel to the second direction D2 when viewed in plan view. The gate structures 400 may be spaced apart from each other in the first direction D1.

In an exemplary embodiment of the present invention, each of the gate structures 400 may include stacked gate electrode patterns 450 , second dielectric patterns 410 , and insulating layers IL. In each of the gate structures 400 , the gate electrode patterns 450 may be interposed between the insulating layers IL. The gate electrode patterns 450 may be used as string selection lines, ground selection lines, and word lines. For example, the uppermost and lowermost portions of the stacked gate electrode patterns 450 may be used as a string selection line and a ground selection line, respectively. The gate electrode patterns 450 between the top and bottom gate electrode patterns 450 may be used as word lines.

In one embodiment of the present invention, in the gate structures 400, the second dielectric pattern 410 is interposed between the gate electrode patterns 450 and the insulating films IL and between the vertical structure 300 and the insulating films IL. ) can be interposed between

In one embodiment of the present invention, common source regions CSR may be formed in the substrate 100 exposed to the trenches 600 . The common source regions CSR may be spaced apart from each other in the second direction D2. The common source regions CSR may be formed through an ion implantation process using the gate structures 400 as ion masks. The common source regions CSR may overlap lower portions of the gate structures 400 in plan view by diffusion of impurities. The common source regions CSR may have a conductivity type different from that of the substrate 100 . As another example, the common source regions CSR may be formed after forming the trenches 600 of FIG. 4 .

Referring to FIGS. 1 and 8 of the present application, spacers 550 and common source plugs CSP may be formed in trenches 600 , respectively. The spacers 550 may cover sidewalls of the gate structures 400 . The spacers 550 may include an insulating material. The spacers 550 may be formed of, for example, silicon oxide, silicon nitride, silicon oxynitride, or a low-k material. The formation of the spacers 550 is performed by depositing a spacer film (not shown) with a uniform thickness on the substrate 100 to cover the gate structures 400 and by performing an etch-back process on the spacer film. It may include exposing the source regions (CSR).

In one embodiment of the present invention, common source plugs (CSP) are formed on the spacers 550 to fill the trenches 600 . The common source plugs CSP may respectively connect to the common source regions CSR. Forming the common source plug CSP may include depositing a barrier metal layer (not shown) covering sidewalls of the spacers 550 and depositing a metal layer (not shown) on the barrier metal layer. . The barrier metal layer may include, for example, at least one of tantalum (Ta), tantalum nitride (TaN), titanium (Ti), titanium nitride (TiN), tungsten (W), tungsten nitride (WN), and combinations thereof. can The metal layer may include tungsten (W), aluminum (Al), titanium (Ti), tantalum (Ta), cobalt (Co), or copper (Cu). As shown in FIG. 1 , long axes of the common source plugs CSP may extend parallel to the second direction D2 .

In an exemplary embodiment, an upper capping layer 520 may be formed on the lower capping layer 510 to cover upper surfaces of the common source plug CSP. The upper capping layer 520 may include an insulating material.

In an exemplary embodiment of the present invention, bit line contact plugs 530 may be formed in the upper capping layer 520 . The bit line contact plugs 530 may pass through the upper capping layer 520 and the lower capping layer 510 and may be respectively connected to the pads 340 . The bit line contact plugs 530 may be electrically connected to the vertical structures 300 (eg, the semiconductor patterns 320 ) through the pads 340 . Bit lines BL may be formed on the upper capping layer 520 and may be connected to the bit line contact plugs 530 . As shown in FIG. 1 , the bit lines BL may extend in the first direction D1 in a plan view. The bit line contact plugs 530 and the bit lines BL may include a conductive material such as metal. Accordingly, manufacturing of the semiconductor element 1 can be completed. The semiconductor device 1 may be a 3D memory device.

FIG. 9 of the present application is a diagram for explaining insulating patterns of a semiconductor device according to example embodiments, and is an enlarged view of region A of FIG. 8 . Hereinafter, in the description of FIG. 9 , a single insulating film, a single gate electrode pattern, and a single vertical structure will be described for simplicity of description.

Referring to FIGS. 8 and 9 of the present application, the first dielectric pattern 310 may include a tunnel insulating layer 311 , a charge storage layer 312 , and a first blocking insulating layer 313 . The tunnel insulating layer 311 may extend along the vertical structure. The charge storage layer 312 and the first blocking insulating layer 313 may be stacked on the tunnel insulating layer 311 . The tunnel insulating layer 311 may be formed of a material having a lower dielectric constant than the first blocking insulating layer 313 . The tunnel insulating layer 311 may include, for example, at least one selected from oxide, nitride, and oxynitride. Alternatively, the tunnel insulating layer 311 may include a high dielectric material. The high dielectric material refers to an insulating material having a higher dielectric constant than silicon oxide, and may include zirconium oxide, aluminum oxide, and/or hafnium oxide. The charge storage layer 312 may be interposed between the tunnel insulating layer 311 and the first blocking insulating layer 313 . The charge storage layer 312 may include at least one of a charge trap insulating layer, a floating gate electrode, or conductive nano dots. The first blocking insulating layer 313 may include a high dielectric material.

In one embodiment of the present invention, the second dielectric pattern 410 may include a second blocking insulating layer. The second blocking insulating layer may be interposed between the gate electrode pattern 450 and the first dielectric pattern 310 and between the gate electrode pattern 450 and the insulating layer IL. The second blocking insulating layer may include a high dielectric material. For example, the first blocking insulating layer 313 may include a high dielectric material, and the second blocking insulating layer may be a material having a dielectric constant smaller than that of the first blocking insulating layer 313 . As another example, the second blocking insulating layer may be one of high dielectric materials, and the first blocking insulating layer 313 may be a material having a smaller dielectric constant than the second blocking insulating layer.

In one embodiment of the present invention, the first dielectric pattern 310 and the second dielectric pattern 410 may function as a data storage layer. Data stored in the data storage layer may be changed using Fowler-Northernheim tunneling, and the Fowler-Northernheim tunneling may be caused by a voltage difference between the vertical structure 300 and the gate electrode pattern 450. .

In one embodiment of the present invention, unlike the drawing, the second dielectric pattern 410 may not be formed. As another example, the first blocking insulating layer 313 may not be formed.

integrated circuit element

The third aspect of the present application,

a structure formed by stacking an insulating film and a sacrificial film; a space portion formed by etching the sacrificial layer with an etching composition in the structure; and a deposition portion formed by depositing a conductive material or an insulating material on the space portion, wherein the etching composition includes a first inorganic acid; and a silane-based inorganic acid salt prepared by reacting a second inorganic acid with the silane-based compound of Chemical Formula 1.

Detailed descriptions of portions overlapping with the first and second aspects of the present application have been omitted, but the contents described for the first and second aspects of the present application can be equally applied even if the description is omitted in the third aspect.

Hereinafter, embodiments of the present invention will be described in detail so that those skilled in the art can easily implement the present invention. However, the present invention may be embodied in many different forms and is not limited to the embodiments described herein.

Example. Preparation of etching composition

As the silane-based compound, any one selected from Formulas 2 to 3 was used, phosphoric acid was used as the first inorganic acid and the second inorganic acid, and a silane-based inorganic acid salt was generated by reacting the second inorganic acid with the silane-based compound. As an additive, an etching composition was prepared by mixing ammonium chloride (AC) or ammonium phosphate dibasic acid (AP2) as an ammonium-based compound. At this time, 85% phosphoric acid aqueous solution was used for phosphoric acid, and specific compositions according to each example are shown in Table 1 below.

comparative example. Preparation of etching composition

In Comparative Example 1, only phosphoric acid was included as an etching composition (85% aqueous solution), and the compositions of the Examples and Comparative Example 1 are shown in Table 1 below.

experimental example. Etch rate and selectivity measurement

Etching was performed on nitride and oxide films using the etching compositions prepared in Examples and Comparative Examples, and etching rates for nitride and oxide films were performed using an ellipsometer (NANO VIEW, SEMG-1000), a thin film thickness measurement equipment. was measured and shown in Table 2 below. Specifically, the etching rate in Table 2 below is a value calculated by etching each film for 300 seconds and then dividing the difference between the film thickness before etching and the film thickness after etching by the etching time (minutes).

According to Table 2 above, it can be seen that the etching composition of Examples corresponding to the etching composition of the present invention has a significantly higher etching rate of the nitride film than the etching rate of the oxide film, compared to the etching composition of Comparative Example. This can be seen as supporting that the etching composition of the present invention selectively etches the nitride film by including the silane-based inorganic acid salt generated through the reaction of the silane-based compound and the second inorganic acid.

In addition, the solution from the silicon oxide film was collected, and when the concentration of silicon ions in the solution reached 100 ppm, the etching rate before and after filtering was measured (hereinafter referred to as a dummy etching rate), and the results are shown in Table 3 showed up

According to Table 3 above, looking at the etching rate and etching selectivity of the silicon oxide film before and after the filter in Comparative Examples and Examples, in Comparative Example 1, Example 3, and Example 9, the etching rate of the silicon oxide film before and after the filter A difference in and a difference in etching selectivity occurred. However, in Example 5, Example 6, Example 11, and Example 12, the etching rate and the etching selectivity of the silicon oxide film before and after the filter were maintained at the same level. That is, the silicon-oxygen bond of TEOS is broken in the etching composition to generate a large amount of reaction by-products, and the generated by-products are adsorbed on the silicon oxide layer, thereby increasing the thickness. Subsequently, when the reaction by-products are removed by the filtering process, the actual thickness of the etched silicon oxide film can be measured, so that the etching rate is increased compared to before filtering.

On the other hand, in Example 5, Example 6, Example 11 and Example 12 further including an ammonium compound, it can be seen that the oxide film etch rate is maintained without increasing even after the filter, and still shows a high nitride film selectivity compared to Comparative Example can confirm that This means that reaction by-products generated during the etching of the silicon nitride film are converted into water-soluble compounds by combining with ammonium ions included in the etching composition, and thus, the precipitation of reaction by-products is minimized.

The present invention is not limited by the above-described embodiments and the accompanying drawings, and it is common in the technical field to which the present invention belongs that various substitutions, modifications, and changes are possible within the scope without departing from the technical spirit of the present invention. It will be clear to those who have knowledge.

Claims (17)

a first inorganic acid; and
An etching composition comprising: a silane-based inorganic acid salt prepared by reacting a second inorganic acid with a silane-based compound represented by Formula 1
[Formula 1]

(In Formula 1 above,
R ₁ to R ₅ , R ₇ and R ₈ are each independently hydrogen, halogen, a substituted or unsubstituted alkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkyl group having 1 to 10 carbon atoms, or a substituted or unsubstituted cycloalkyl group having 1 to 10 carbon atoms. Or an unsubstituted alkenyl group, a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms, a substituted or unsubstituted aryl group having 5 to 20 carbon atoms, a substituted or unsubstituted aminoalkyl group having 1 to 10 carbon atoms, or a substituted or unsubstituted aminoalkyl group having 1 to 10 carbon atoms. Any one selected from the group consisting of a substituted or unsubstituted alkylamino group and a substituted or unsubstituted heteroaryl group having 5 to 20 carbon atoms,
R ₆ is a single bond or a substituted or unsubstituted alkylene group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkylene group having 3 to 10 carbon atoms, a substituted or unsubstituted alkenylene group having 1 to 10 carbon atoms, or a substituted or unsubstituted alkenylene group having 5 to 10 carbon atoms Selected from the group consisting of a substituted or unsubstituted arylene group of 20, a substituted or unsubstituted heteroarylene group of 5 to 20 carbon atoms, an oxygen atom, a carbonylene group, and a substituted or unsubstituted oxyalkylene group of 1 to 20 carbon atoms which one is
At least one of R ₁ to R ₃ is a halogen atom or a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms)
According to claim 1,
At least one of R ₁ to R ₃ is a halogen atom,
Wherein R ₄ and R ₅ are each independently hydrogen, a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted aminoalkyl group having 1 to 5 carbon atoms, a substituted or unsubstituted alkylamino group having 1 to 5 carbon atoms, And any one selected from the group consisting of a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms containing at least one hetero atom,
Wherein R ₆ is a single bond or a substituted or unsubstituted alkylene group having 1 to 10 carbon atoms, or a carbonylene group, characterized in that, the etching composition.
According to claim 1,
The first inorganic acid or the second inorganic acid is an etching composition comprising at least one selected from the group consisting of sulfuric acid, nitric acid, phosphoric acid, silicic acid, hydrofluoric acid, boric acid, hydrochloric acid and perchloric acid.
According to claim 1,
With respect to the total weight of the etching composition,
70 to 99% by weight of a first inorganic acid;
0.01 to 15% by weight of the silane-based inorganic acid salt; and
Etching composition comprising the remainder of the solvent.
According to claim 1,
The silane-based inorganic acid salt is obtained by adding the silane-based compound to the second inorganic acid and then reacting at 20 to 300 ° C., the etching composition.
According to claim 1,
The silane-based inorganic acid salt is prepared by reacting 0.001 to 50 parts by weight of the silane-based compound with respect to 100 parts by weight of the second inorganic acid, the etching composition.
According to claim 1,
The etching composition further comprises an ammonium-based compound.
According to claim 7,
The etching composition of claim 1, wherein the ammonium-based compound includes at least one of ammonium chloride, ammonium phosphate, ammonium acetate, ammonium sulfate, ammonium formate, and a metal amine complex salt.
According to claim 1,
The etching composition is an etching composition, characterized in that used for etching a silicon nitride film.
According to claim 1,
Etching composition, characterized in that when the content of the silane-based inorganic acid salt is 0.3% by weight or more, the silicon nitride film / oxide film etching selectivity of the etching composition is 100 or more.
According to claim 1,
Etching composition, characterized in that when the content of the silane-based inorganic acid salt is 2.0% by weight or more, the silicon nitride film / oxide film etching selectivity of the etching composition is 200 or more.
forming a structure by stacking an insulating film and a sacrificial film on a substrate; and
A method of manufacturing an integrated circuit device comprising: performing an etching process using the etching composition according to claim 1 to remove the sacrificial layer to form a space region.
According to claim 12,
The method of claim 1 , wherein the sacrificial layer includes silicon nitride, and the insulating layer includes silicon oxide.
According to claim 12,
in the etching process. The method of manufacturing an integrated circuit device, characterized in that the sacrificial layer has a higher etching rate than the insulating layer.
According to claim 12,
In the step of performing the etching process to remove the sacrificial layer to form a space region, the space region includes a gate region formed between the insulating layers and a trench connected to the gate region. Manufacturing method of.
According to claim 12,
forming openings penetrating the laminated structure; and
Further comprising forming an integrated circuit pattern spaced apart from the trench in the openings,
Forming the integrated circuit pattern is a method of manufacturing an integrated circuit device performed before forming the trench.
a structure formed by stacking an insulating film and a sacrificial film;
a space portion formed by etching the sacrificial layer with an etching composition in the structure; and
A deposition unit formed by depositing a conductive material or an insulating material on the space unit;
The etching composition is
a first inorganic acid; and
An integrated circuit device comprising: a silane-based inorganic acid salt prepared by reacting a second inorganic acid with a silane-based compound represented by Formula 1 below:
[Formula 1]

(In Formula 1 above,
R ₁ to R ₅ , R ₇ and R ₈ are each independently hydrogen, halogen, a substituted or unsubstituted alkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkyl group having 1 to 10 carbon atoms, or a substituted or unsubstituted cycloalkyl group having 1 to 10 carbon atoms. Or an unsubstituted alkenyl group, a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms, a substituted or unsubstituted aryl group having 5 to 20 carbon atoms, a substituted or unsubstituted aminoalkyl group having 1 to 10 carbon atoms, or a substituted or unsubstituted aminoalkyl group having 1 to 10 carbon atoms. Any one selected from the group consisting of a substituted or unsubstituted alkylamino group and a substituted or unsubstituted heteroaryl group having 5 to 20 carbon atoms,
R ₆ is a single bond or a substituted or unsubstituted alkylene group having 1 to 10 carbon atoms, a substituted or unsubstituted cycloalkylene group having 3 to 10 carbon atoms, a substituted or unsubstituted alkenylene group having 1 to 10 carbon atoms, or a substituted or unsubstituted alkenylene group having 5 to 10 carbon atoms Selected from the group consisting of a substituted or unsubstituted arylene group of 20, a substituted or unsubstituted heteroarylene group of 5 to 20 carbon atoms, an oxygen atom, a carbonylene group, and a substituted or unsubstituted oxyalkylene group of 1 to 20 carbon atoms which one is
At least one of R ₁ to R ₃ is a halogen atom or a substituted or unsubstituted alkoxy group having 1 to 10 carbon atoms)

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