KR20220100385A - Producing method of silicon on insulator substrate - Google Patents

Abstract

The present invention relates to a method for manufacturing an SOI substrate. The method for manufacturing an SOI substrate comprises the steps of: (a) forming a silicon exfoliation layer on one surface of a first single crystal silicon substrate; (b) forming a single crystal silicon epitaxial layer on the silicon exfoliation layer; (c) forming a plurality of intaglio patterns on one surface of the single crystal silicon epitaxial layer; (d) forming an insulating layer on the intaglio patterns and the single crystal silicon epitaxial layer; (e) bonding, onto a surface of the insulating layer, a second single crystal silicon substrate on which an oxide layer is formed; (f) separating and removing the first single crystal silicon substrate by applying energy to the silicon exfoliation layer; and (g) removing the single crystal silicon epitaxial layer while reducing the thickness in a direction from one surface to the other surface of the single crystal silicon epitaxial layer, wherein, in the step (c), an active pattern is composed by a protruding portion of the single crystal silicon epitaxial layer, excluding portions where the intaglio patterns are formed.

Description

SOI substrate manufacturing method {PRODUCING METHOD OF SILICON ON INSULATOR SUBSTRATE}

The present invention relates to a method for manufacturing an SOI substrate. More particularly, it relates to a method for manufacturing an SOI substrate having excellent surface uniformity and improving productivity by simplifying a manufacturing process.

As high integration and high performance of semiconductor devices progress, semiconductor integration technology using SOI (Silicon On Insulator) wafers instead of silicon wafers made of bulk silicon is attracting attention. A semiconductor device formed on such an SOI substrate wafer has an advantage of enabling high-speed operation due to complete device isolation and reduction of parasitic capacitance.

Conventionally, as a method for manufacturing an SOI wafer, there are methods such as a SIMOX (Separation by Implanted Oxygen) method and Smart Cut. SIMOX uses oxygen ion implantation, performs high-temperature heat treatment to restore crystallinity of the silicon layer, and has a thin silicon layer and buried oxide film. There is a downside to being long. Smart Cut forms a layer to be separated by growing a thermal oxide film on a silicon wafer and then implanting hydrogen ions to pass through the oxide film. manufacture Although this method has a simple manufacturing process, it has a disadvantage in that the surface uniformity of the boundary of the ion implantation portion is not excellent.

Therefore, there is a need for a method for manufacturing an SOI substrate having excellent surface uniformity while simplifying the manufacturing process.

Meanwhile, FIG. 1 is a conceptual diagram illustrating a conventional SOI manufacturing process. In conventional SOI wafers, it is common to form an active SOI region through a photoresist/etch process, etc. in a state in which the SOI is formed on the entire surface. Accordingly, since a separate process for forming the active SOI is required, productivity is lowered and the quality of the SOI is deteriorated in the process of forming the active SOI region.

Accordingly, the present invention has been devised to solve the problems of the prior art, and an object of the present invention is to provide a method of manufacturing an SOI substrate capable of forming an active pattern in a pattern desired by a user from the beginning.

Another object of the present invention is to provide a method for manufacturing an SOI substrate capable of forming an SOI layer only in an active region from the beginning.

Another object of the present invention is to provide a method for manufacturing an SOI substrate capable of simplifying the manufacturing process, thereby reducing process time and cost, and improving productivity.

However, these problems are exemplary, and the scope of the present invention is not limited thereto.

The above object of the present invention, (a) forming a silicon exfoliation layer on one surface of the first single crystal silicon substrate; (b) forming a single crystal silicon epitaxial layer on the silicon exfoliation layer; (c) forming a plurality of intaglio patterns on one surface of the single crystal silicon epitaxial layer; (d) forming an insulating layer on the intaglio pattern and the single crystal silicon epitaxial layer; (e) bonding a second single crystal silicon substrate having an oxide layer formed on the surface of the insulating layer; (f) applying energy to the silicon exfoliation layer to separate and remove the first single crystal silicon substrate; (g) removing the single crystal silicon epitaxial layer while reducing the thickness in one direction from the other surface; This is achieved by an SOI substrate manufacturing method, constituting an active pattern.

According to an embodiment of the present invention, between steps (a) and (b), (1) oxidizing the pores and the surface of the silicon release layer; (2) removing the oxide on the surface of the silicone release layer; (3) may further include recrystallizing the surface of the silicon release layer.

According to an embodiment of the present invention, the step (c) includes: (c1) forming a plurality of etch stop patterns on the single crystal silicon epitaxial layer; (c2) forming a plurality of intaglio patterns by etching the single crystal silicon epitaxial layer exposed between the etch stop patterns.

According to an embodiment of the present invention, between steps (d) and (e), planarizing the upper surface of the insulating layer; may further include.

According to an embodiment of the present invention, the insulating layer may be made of at least one of silicon oxide and silicon nitride.

According to an embodiment of the present invention, in step (f), energy is applied by a water-jet method or a mechanical shock, mechanical lift method to cut the silicon release layer, and the first single crystal silicon substrate may be a step of separating and removing

According to an embodiment of the present invention, in step (g), it is possible to reduce the thickness to the portion where the insulating layer is formed in the intaglio pattern.

According to an embodiment of the present invention, the insulating layer in the intaglio pattern may function as a stopper for reducing the thickness.

According to an embodiment of the present invention, each of the single crystal silicon epitaxial layers partitioned by the insulating layer formed in the engraved pattern on a planar basis may act as an active pattern of the SOI.

The above object of the present invention is, after bonding a first single crystal silicon substrate, a first laminate including a single crystal silicon epitaxial layer and an insulating layer, a second single crystal silicon substrate, and a second laminate including an oxide layer. , A method of manufacturing an SOI substrate by separating and removing the first single crystal silicon substrate and reducing the thickness of the single crystal silicon epitaxial layer, wherein an intaglio pattern is formed on the single crystal silicon epitaxial layer, and a protruding part except for the part where the intaglio pattern is formed This is achieved by a method of manufacturing an SOI substrate, constituting an active pattern.

According to the present invention configured as described above, there is an effect that an active pattern can be formed in a pattern desired by a user from the beginning.

In addition, the present invention has an effect that the SOI layer can be formed only in the active region from the beginning.

In addition, the present invention has the effect of simplifying the manufacturing process to reduce process time, cost, and improve productivity.

Of course, the scope of the present invention is not limited by these effects.

1 is a conceptual diagram illustrating a conventional SOI process.
2 to 10 are schematic diagrams illustrating a manufacturing process of an SOI substrate according to an embodiment of the present invention.
11 is a schematic plan view showing the shape of an insulating layer of an SOI substrate according to various embodiments of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0012] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0014] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0016] Reference is made to the accompanying drawings, which show by way of illustration specific embodiments in which the present invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present invention. It should be understood that the various embodiments of the present invention are different but need not be mutually exclusive. For example, certain shapes, structures, and characteristics described herein with respect to one embodiment may be implemented in other embodiments without departing from the spirit and scope of the invention. In addition, it should be understood that the location or arrangement of individual components within each disclosed embodiment may be changed without departing from the spirit and scope of the present invention. Accordingly, the detailed description set forth below is not intended to be taken in a limiting sense, and the scope of the present invention, if properly described, is limited only by the appended claims, along with all scope equivalents to those claimed. In the drawings, like reference numerals refer to the same or similar functions in various aspects, and the length, area, thickness, and the like may be exaggerated for convenience.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings in order to enable those of ordinary skill in the art to easily practice the present invention.

2 to 10 are schematic diagrams illustrating a manufacturing process of the SOI substrate 100 according to an embodiment of the present invention. 2 to 10 show a cross-sectional side view of a portion of the SOI substrate, it should be noted that the actual SOI substrate 100 may be on a larger scale.

The method of manufacturing the SOI substrate 100 of the present invention comprises the steps of: (a) forming a silicon release layer 120 on one surface of a first single crystal silicon substrate 110; (b) on the silicon release layer 120 forming a single crystal silicon epitaxial layer 170 , (c) forming a plurality of intaglio patterns 175 on one surface of the single crystal silicon epitaxial layer 170 ; (d) forming the insulating layer 140 on the intaglio pattern 175 and at least the single crystal silicon epitaxial layer 170, (e) the second single crystal in which the oxide layer 220 is formed on the insulating layer 140 surface bonding the silicon substrate 210; (f) applying energy (S) to the silicon exfoliation layer 120 to separate and remove the first single crystal silicon substrate 110 , (g) increasing the thickness from the other side of the single crystal silicon epitaxial layer 170 to one side and removing while reducing, in step (c), forming an active pattern (AP) with the protruding portion 173 of the single crystal silicon epitaxial layer 170 excluding the portion where the intaglio pattern 175 is formed. It is characterized by composition. Thus, the SOI substrate 100 on which the active SOI region is formed can be manufactured without a separate process.

First, referring to FIG. 2 , a first single crystal silicon substrate 110 may be prepared. As the first single crystal silicon substrate 110 , a single crystal silicon wafer may be used, or a single crystal silicon substrate such as a square may be used.

Subsequently, a silicon exfoliation layer 120 (porous silicon layer) may be formed on one surface (eg, an upper surface) of the first single crystal silicon substrate 110 . The silicon exfoliation layer 120 may be formed on the first single crystal silicon substrate 110 by using a known method such as anodizing.

Subsequently, a single crystal silicon epitaxial layer 130 may be formed on the silicon exfoliation layer 120 . The single crystal silicon epitaxial layer 130 may be formed using a known epitaxial method. A single crystal silicon epitaxial layer 130 may be formed from one surface (eg, an upper surface) of the silicon exfoliation layer 120 . According to an embodiment, the single crystal silicon epitaxial layer 130 may be formed to a thickness of about 0.5 to 1 μm.

Meanwhile, before forming the single crystal silicon epitaxial layer 130 on the silicon release layer 120 , a process of blocking pores on the upper surface of the silicon release layer 120 may be further performed. First, the silicon release layer 120 may be oxidized to form an oxide layer (not shown) on the pores and the surface, and the oxide layer formed on the surface portion may be removed using HF or the like. Subsequently, by performing hydrogen heat treatment at about 1,000° C. or higher, recrystallization of the void portion of the upper surface of the silicon exfoliation layer 120 may be performed. Accordingly, when the single crystal silicon epitaxial layer 130 is formed on the upper surface of the silicon exfoliation layer 120 , there is an advantage in that it is easily formed to a thinner thickness without defects.

Next, after explaining the problems of the comparative example with reference to FIG. 3 , an embodiment of the present invention will be further described with reference to FIG. 4 .

Referring to the first drawing of FIG. 3 , a plurality of insulating patterns 140 ′ may be formed on one surface (eg, an upper surface) of the single crystal silicon epitaxial layer 130 . The insulating pattern 140 ′ is preferably made of a silicon oxide material, but is not limited thereto, and a silicon nitride material may be used. The insulating pattern 140 may be formed using a known thin film formation method such as deposition or printing without limitation.

The plurality of insulating patterns 140 ′ may be formed to be spaced apart from each other. The insulating pattern 140 ′ may be used for the purpose of serving as a stopper for reducing the thickness of the single crystal silicon epitaxial layers 130 and 150 .

Next, referring to the second drawing of FIG. 3 , a second single crystal silicon epitaxial layer 150 ′ may be formed on the single crystal silicon epitaxial layer 130 and the insulating pattern 140 . The second single crystal silicon epitaxial layer 150 ′ may be formed using a known epitaxial method. A second single crystal silicon epitaxial layer 150 ′ may be formed from the exposed surface of the single crystal silicon epitaxial layer 130 . According to an embodiment, the second single crystal silicon epitaxial layer 150 ′ may be formed to a thickness of about 10 to 50 nm.

Next, the second single crystal silicon epitaxial layer 150 ′ may be planarized (P). Here, in the planarization (P), one surface (top surface) of the second single crystal silicon epitaxial layer 150 ′ is mirror-finished, and at the same time, the upper portion of the second single crystal silicon epitaxial layer 150 ′ is partially removed to reduce the thickness to a thin thickness (150). '->150'''). The planarization (P) is preferably performed through chemical mechanical polishing (CMP), hydrogen heat treatment (H ₂ annealing), or argon heat treatment (Ar annealing), but is not limited thereto.

Next, referring to the third drawing of FIG. 3 , the second single crystal silicon epitaxial layer 150 ′ is planarized (P) to reduce the thickness deviation and reduce the thickness to a thin thickness (150' -> 150'''). can The planarization P is not performed to the extent of at least removing the insulating pattern 140 ′, and the insulating pattern 140 ′ functions as a stopper and may be performed up to the height of the insulating pattern 140 ′. According to an embodiment, the second single crystal silicon epitaxial layer 150 ″″ may have a thickness of about 30 nm through hydrogen heat treatment at 1,100 to 1,150° C., argon heat treatment at 1,200° C., or CMP.

Thereafter, the second single crystal silicon substrate 210 bonding process of FIG. 7 , the first single crystal silicon substrate 110 separation process of FIG. 8 , and the single crystal silicon epitaxial layer 130 reduction and removal process as shown in FIG. 9 are performed to remove the SOI substrate can be manufactured.

However, the SOI substrate of the comparative example has a problem in that the quality of the single crystal silicon epitaxial layer 150" formed between the insulating pattern 140' and the second single crystal silicon epitaxial layer 150''' is low. Exposure The second single crystal silicon epitaxial layer 150 ′ generated from the single crystal silicon epitaxial layer 130 is formed without defects and has the same degree of crystallinity as the single crystal silicon epitaxial layer 130 , but the insulating pattern 140 . ') The single crystal silicon epitaxial layer 150" generated near the surface includes defects, and as the degree of the defect increases, the insulating pattern 140' may have the same problem.

The insulating pattern 140' partitions the second single crystal silicon epitaxial layer 150''' in the SOI and is used as an insulating part. It is so preferable that the width AS is small. Conversely, it is preferable that the width AW of the second single crystal silicon epitaxial layer 150 ″″ exposed other than the insulating pattern 140 ′ is larger. According to an embodiment, the width AS of the insulating pattern 140 ′ is preferably smaller than 0.5 μm. In addition, according to an embodiment, it is preferable that the width AW of the single crystal silicon epitaxial layer 150 ″″ is 5 times or more than the width AS of the insulating pattern 140 ′.

Accordingly, in the present invention, rather than forming the single crystal silicon epitaxial layer 150 ′ after forming the insulating pattern 140 ′, the insulating layer 140 is formed after the single crystal silicon epitaxial layer 170 is formed. characterized. Since the insulating layer 140 is formed later, the quality of the single crystal silicon epitaxial layer 170 is not affected, and the insulating layer 140 having a desired width AS can be formed.

Referring to FIG. 4 , a single crystal silicon epitaxial layer 170 may be formed on the silicon exfoliation layer 120 . This point is the same as the process of forming the single crystal silicon epitaxial layer 130 described above in FIG. 2 . However, the thickness of the single crystal silicon epitaxial layer 170 needs to be formed to be thicker than the single crystal silicon epitaxial layer 130 of FIG. 2 . That is, the thickness T1 of the single crystal silicon epitaxial layer 170 is the sum of the thicknesses of the single crystal silicon epitaxial layer 130 and the second single crystal silicon epitaxial layer 150''' in the third figure of FIG. 3 ( T1) can be met. Meanwhile, after the single crystal silicon epitaxial layer 170 is formed, a process of planarizing the upper surface of the single crystal silicon epitaxial layer 170 through CMP or the like may be further performed.

Next, referring to FIG. 5 , a plurality of intaglio patterns 175 may be formed on one surface (top surface) of the single crystal silicon epitaxial layer 170 . Fig. 5 (a) is a schematic side cross-sectional view, and Fig. 5 (b) is a plan schematic view, in which the cross section A-A' corresponds to Fig. 5 (a).

The engraved pattern 175 may be formed by forming a plurality of etch stop patterns (PR patterns) on the single crystal silicon epitaxial layer and then etching the single crystal silicon epitaxial layer exposed between the etch stop patterns. Meanwhile, the intaglio pattern 175 may be formed using a known trench forming process other than a photolithography process.

Since the engraved pattern 175 is a space to be filled with the insulating layer 140 thereafter, it may have a shape and size corresponding to the insulating pattern 140 ′ of FIG. 3 . According to an embodiment, the intaglio pattern 175 may have a thickness of about 30 nm and a width smaller than about 0.5 μm.

The shape of the intaglio pattern 175 may correspond to the shape of an active pattern (AP) previously designed by a user. Since the insulating layer 145 is scheduled to be filled into the engraved pattern 175 , a portion of the single crystal silicon epitaxial layer 170 , except for the insulating layer 145 , becomes the active pattern AP so that it can act as an active region, respectively. do. In other words, the insulating layer 140 is disposed on the portion 171 of the single crystal silicon epitaxial layer 170 on which the intaglio pattern 175 is formed, and a protruding portion excluding the portion in which the intaglio pattern 175 is formed on a planar basis. 173 may be an active pattern AP that is a conductive channel.

Next, referring to FIG. 6 , the insulating layer 140 may be formed on the intaglio pattern 175 and the single crystal silicon epitaxial layer 170 . The insulating layer 140 is preferably made of a silicon oxide (silicon oxide) material, but is not limited thereto, and a silicon nitride material may be used. The insulating layer 140 may be formed using a known thin film formation method such as deposition or printing without limitation.

In the process of forming the insulating layer 140 , the engraved pattern 175 is filled with the insulating layer 145 , and the upper surface of the engraved pattern 175 and the upper surface of the single crystal silicon epitaxial layer 170 are covered with the insulating layer 140 . will lose The thickness covered with the insulating layer 140 is preferably several nm to several tens of nm. Meanwhile, after forming the insulating layer 140 , a process of planarizing the upper surface of the insulating layer 140 through CMP or the like may be further performed.

Next, referring to FIG. 7 , a second single crystal silicon substrate 210 may be prepared. As the second single crystal silicon substrate 210 , a single crystal silicon wafer similar to the first single crystal silicon substrate 110 may be used, or a single crystal silicon substrate such as a square may be used. In addition, the second single crystal silicon substrate 210 preferably has the same size and shape as the first single crystal silicon substrate 110 , but is not limited thereto.

Meanwhile, the second single crystal silicon substrate 210 may have an area corresponding to the sum of the areas of the plurality of first single crystal silicon substrates 110 . In this case, the first single crystal silicon substrate 110 on which the silicon exfoliation layer 120, the single crystal silicon epitaxial layer 170, and the insulating layer 140 of FIG. It is also possible to proceed with the subsequent process by bonding a plurality of them.

It is preferable that the oxide layer 220 is formed on the surface of the second single crystal silicon substrate 210 . The oxide layer 220 may be formed on the surface of the second single crystal silicon substrate 210 through a known thin film forming method. According to an embodiment, the oxide layer 220 may be formed to a thickness of about 10 nm to 20 nm.

Next, the first single crystal silicon substrate 110 and the second single crystal silicon substrate 210 may be bonded. The surfaces of the first single crystal silicon substrate 110 and the second single crystal silicon substrate 210 are not bonded to each other, but may be bonded through the insulating layer 140 and the oxide layer 220 . Bonding can be performed through heat treatment at a temperature of several hundred to ℃ under an environment such as vacuum or inert gas. After bonding is completed, the insulating layer 140 and the oxide layer 220 may act as an insulator 230 (refer to FIGS. 8 to 10 ) in the SOI substrate 100 .

Next, referring to FIG. 8 , energy may be applied (S) to the silicon exfoliation layer 120 to separate and remove the first single crystal silicon substrate 110 . The application of energy (S) may be performed by a water-jet method. Alternatively, the application of energy (S) may be performed by a mechanical shock (mechanical lift) method of applying vibration, shock, or the like. Since the silicon release layer 120 is porous, it can be easily cut when energy is applied (S) from the side. As the silicon exfoliation layer 120 is cut, the first single crystal silicon substrate 110 may be separated. The present invention has the advantage that it can be reused by cleaning and removing the porous silicon remaining on one surface of the first single crystal silicon substrate 110 .

Next, referring to FIG. 9 , the single crystal silicon epitaxial layer 170 may be removed (G) while reducing the thickness from the other surface to one surface direction. One surface of the single crystal silicon epitaxial layer 170 is the surface on which the intaglio pattern 175 and the insulating layer 140 are formed, and the other surface is the surface on which the silicon release layer 120 is cut and the silicon release layer 120 ′ remains. respond

Since the single crystal silicon epitaxial layer 170 has a thickness of a μm scale, it is necessary to use a method capable of reducing the thickness faster than a planarization process. In consideration of this, the thickness reduction and removal (G) of the single crystal silicon epitaxial layer 170 may use methods such as grinding, polishing, and etching. For example, after rough grinding is first performed up to a thickness of ㎛ unit, thickness reduction can be finely controlled by secondarily using CMP and etching from ㎛ to a thickness of nm level.

The thickness reduction and removal (G) is preferably performed up to the portion of the insulating layer 145 formed on the intaglio pattern 175 . That is, the oxide and nitride of the insulating layer 145 may serve as a stopper for thickness reduction.

Referring to FIG. 10 , after the thickness reduction and removal (G), the fabrication of the SOI substrate 100 may be completed. Fig. 10 (a) is a schematic side cross-sectional view, and Fig. 10 (b) is a plan schematic view, in which the cross section A-A' corresponds to Fig. 10 (a). After the fabrication of the SOI substrate 100 is completed, a semiconductor and memory formation process may be further performed. In the embodiment of FIG. 10 , since the insulating layer 145 is disposed between the active pattern AP and the adjacent active patterns AP, each of the active patterns AP may be applied as an independent active SOI.

The insulating layer 145 is disposed on the portion where the intaglio pattern 175 is formed in the step of FIG. 5 , and the protruding portion 173 of the single crystal silicon epitaxial layer 170 excluding the intaglio pattern 175 is the active pattern ( AP) will remain. Accordingly, the user-designed active pattern AP can be directly applied at the initial stage of the SOI substrate manufacturing process, and the SOI substrate having a desired pattern can be easily manufactured.

11 is a schematic plan view showing the shape of an insulating layer of an SOI substrate according to various embodiments of the present invention.

A portion of the insulating layer 145 formed on the engraved pattern 175 of the insulating layer 140 may have the shape of a point, a line, a grid, etc. on a planar basis. From another point of view, the intaglio pattern 175 may have the form of a point, a line, a grid, etc. on a plane basis.

As shown in FIG. 11A , it is preferable that the insulating layer 145a has a point shape because it can reduce the width AS of the insulating layer 145a and increase the width AW of the single crystal silicon epitaxial layer 170 . is considered However, if the portion occupied by the insulating layer 145a is too small, the insulating layer 145a serves as a stopper for the thickness reduction in the process of reducing and removing the thickness of the single crystal silicon epitaxial layer 170 in step (G) of FIG. 9 . may be insufficient, the insulating layers 145b and 145c may be formed in a line or grid shape as in FIGS. 11(b) and 11(c).

Also, when the insulating layer 145 partitions the single crystal silicon epitaxial layer 170 , each region may be used as an active SOI (active SOI). In one embodiment, the regions 170a , 170b , 170c , and 170d of each single crystal silicon epitaxial layer in FIGS. 11B and 11C may act as separate active SOIs.

As described above, the present invention can form an SOI layer only in the active region from the beginning, can manufacture an SOI substrate with excellent surface uniformity, and simplify the manufacturing process to reduce process time and cost and improve productivity there is

Although the present invention has been illustrated and described with reference to preferred embodiments as described above, it is not limited to the above-described embodiments and is not limited to the above-described embodiments, and various methods can be made by those of ordinary skill in the art to which the invention pertains within the scope of the present invention. Transformation and change are possible. Such modifications and variations are intended to fall within the scope of the present invention and the appended claims.

100: SOI substrate
110: first single crystal silicon substrate
120: silicone release layer
140: insulating layer
170: single crystal silicon epitaxial layer
175: engraved pattern
210: second single crystal silicon substrate
220: oxide layer
230: insulator
AP: active pattern

Claims (10)

(a) forming a silicon exfoliation layer on one surface of the first single crystal silicon substrate;
(b) forming a single crystal silicon epitaxial layer on the silicon exfoliation layer;
(c) forming a plurality of intaglio patterns on one surface of the single crystal silicon epitaxial layer;
(d) forming an insulating layer on the intaglio pattern and the single crystal silicon epitaxial layer;
(e) bonding a second single crystal silicon substrate having an oxide layer formed on the surface of the insulating layer;
(f) applying energy to the silicon exfoliation layer to separate and remove the first single crystal silicon substrate;
(g) removing the single crystal silicon epitaxial layer while reducing the thickness in one direction from the other surface;
including,
In step (c), the method of manufacturing an SOI substrate, configuring the active pattern (active pattern) with the protruding portion excluding the portion where the intaglio pattern of the single crystal silicon epitaxial layer is formed. According to claim 1,
Between steps (a) and (b),
(1) oxidation treatment of pores and surfaces of the silicone release layer;
(2) removing the oxide on the surface of the silicone release layer;
(3) recrystallizing the surface of the silicon release layer
Further comprising, an SOI substrate manufacturing method. According to claim 1,
(c) step,
(c1) forming a plurality of etch stop patterns on the single crystal silicon epitaxial layer;
(c2) forming a plurality of intaglio patterns by etching the single crystal silicon epitaxial layer exposed between the etch stop patterns;
Including, SOI substrate manufacturing method. According to claim 1,
Between steps (d) and (e), planarizing the upper surface of the insulating layer; further comprising a method of manufacturing an SOI substrate. According to claim 1,
The insulating layer is made of at least one of silicon oxide and silicon nitride, an SOI substrate manufacturing method. According to claim 1,
Step (f) is a step of cutting the silicon release layer by applying energy by a water-jet method or a mechanical shock, mechanical lift method, and separating and removing the first single crystal silicon substrate, the SOI substrate manufacturing method. The method of claim 1,
In step (g), reducing the thickness to the portion where the insulating layer is formed in the intaglio pattern, the SOI substrate manufacturing method. 8. The method of claim 7,
A method for manufacturing an SOI substrate, wherein the insulating layer in the intaglio pattern functions as a stopper for thickness reduction. According to claim 1,
on a flat basis,
A method of manufacturing an SOI substrate, wherein each of the single crystal silicon epitaxial layers partitioned by the insulating layer formed in the intaglio pattern acts as an active pattern of the SOI. After bonding the first single crystal silicon substrate, the first laminate including the single crystal silicon epitaxial layer and the insulating layer, the second single crystal silicon substrate, and the second laminate including the oxide layer, the first single crystal silicon substrate is separated and removed; A method for manufacturing an SOI substrate by reducing the thickness of a single crystal silicon epitaxial layer, the method comprising:
A method of manufacturing an SOI substrate, comprising: forming an intaglio pattern on a single crystal silicon epitaxial layer, and configuring an active pattern with a protruding portion excluding a portion where the intaglio pattern is formed.

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