KR20220038649A - Display Device - Google Patents

Abstract

The present invention relates to a display device which can maintain electrical characteristics of a thin film transistor and design high-resolution pixels. According to one embodiment of the present invention, the display device comprises: a substrate including an active area including a plurality of pixels defined by a plurality of gate lines and data lines arranged in a first direction and a second direction perpendicular to each other and a bezel area arranged outside the active area; a power line arranged to cross the gate lines; a thin film transistor positioned on the plurality of pixels on an upper portion of the substrate, and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a shield layer positioned between the substrate and the thin film transistor to block an electric field applied to the thin film transistor; and a shield power line electrically connected to the shield layer. The gate lines cross the shield power line.

Description

Display Device

The present invention relates to a display device, and more particularly, to a display device capable of designing high-resolution pixels while maintaining electrical characteristics of a thin film transistor.

As the information society develops, the demand for a display device for displaying an image is increasing in various forms. The display device field has rapidly changed to a thin, light, and large-area Flat Panel Display Device (FPD) that replaces a bulky cathode ray tube (CRT). Flat panel displays include Liquid Crystal Display Device (LCD), Plasma Display Panel (PDP), Organic Light Emitting Display Device (OLED), and Electrophoretic Display Device. : ED), etc.

Among them, the organic light emitting display device is a self-luminous device that emits light by itself, and has advantages of fast response speed, luminous efficiency, luminance, and viewing angle. In particular, the organic light emitting display device can be formed on a flexible plastic substrate, and can be driven at a lower voltage than a plasma display panel or an inorganic electroluminescent (EL) display and consume relatively little power. It has the advantage of being small and the color is excellent.

The organic light emitting display device is roughly divided into a passive matrix type and an active matrix type. In an active matrix type organic light emitting display device, thin film transistors allocated in a pixel area arranged in a matrix manner are disposed. The thin film transistor has a semiconductor layer and a gate electrode disposed to face each other with a gate insulating film interposed therebetween, and includes a source electrode and a drain electrode respectively connected to the semiconductor layer. The thin film transistor operates on the principle of turning on/off by adjusting the voltage of the gate electrode to a carrier moving in the channel of the semiconductor layer through the source electrode and the drain electrode. Therefore, since the thin film transistor is easily affected by the surrounding voltage or static electricity, there is a problem in that the characteristics of the thin film transistor are changed.

An object of the present invention is to provide a display device capable of designing high-resolution pixels while maintaining electrical characteristics of a thin film transistor.

In order to achieve the above object, a display device according to an embodiment of the present invention includes a plurality of pixels defined by a plurality of gate lines and a plurality of data lines respectively disposed in a first direction and a second direction perpendicular to each other. A substrate comprising: a substrate including an active region and a bezel region disposed outside the active region; a power line disposed to cross the gate line; a thin film transistor positioned in each of the plurality of pixels on the substrate and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a shield layer positioned between the substrate and the thin film transistor to shield an electric field applied to the thin film transistor; and a shield power line electrically connected to the shield layer, wherein the gate line crosses the shield power line.

A display device according to another embodiment of the present invention includes: a substrate including an active region including a plurality of pixels defined by a plurality of gate lines and data lines and a bezel region positioned outside the active region; power line; a thin film transistor positioned in each of the plurality of pixels on the substrate and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a shield layer positioned between the substrate and the thin film transistor to shield an electric field applied to the thin film transistor; and a shield power line electrically connected to the shield layer, wherein the shield layer overlaps the semiconductor layer and does not overlap the gate line.

The semiconductor layer may include an oxide semiconductor or polycrystalline silicon.

A first buffer layer and a second buffer layer are disposed on the substrate, and the first buffer layer and the second buffer layer are made of SiOx or SiNx.

The shield layer includes at least one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It is made of a material or an alloy thereof, and the shield power line is disposed on the same layer as the gate electrode.

A driving unit for applying a signal to the display region is disposed in the bezel region, and the shield power line is connected to the driving unit.

A display device according to another embodiment of the present invention includes: a substrate including an active region including a plurality of pixels defined by a plurality of gate lines and data lines and a bezel region disposed outside the active region; power line; a thin film transistor positioned in each of the plurality of pixels on the substrate and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a shield layer positioned between the substrate and the thin film transistor to shield an electric field applied to the thin film transistor; a shield power line electrically connected to the shield layer; The shield layer overlaps the semiconductor layer, and the shield power line is positioned on the same layer as the gate electrode.

A display device according to another embodiment of the present invention includes an active region including a plurality of pixels defined by a plurality of gate lines and a plurality of data lines respectively disposed in a first direction and a second direction perpendicular to each other, and the active region outside the active region a substrate including a bezel area positioned on the; power line; a thin film transistor positioned in each of the plurality of pixels on the substrate and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a shield layer positioned between the substrate and the thin film transistor to shield an electric field applied to the thin film transistor, the shield layer including a first shield line and a second shield line extending in a first direction and a second direction, respectively; and a shield power line disposed on the bezel area of the substrate and electrically connected to the shield layer, wherein the first shield line extends in a vertical direction to the data line and intersects the data line and the power line.

In the organic light emitting display device according to embodiments of the present invention, power is applied to the shield layer from the data driver to prevent a difference in voltage applied between the source electrode and the gate electrode. In addition, according to the present invention, by connecting the shield power line and the shield layer through a through hole outside the active region, the size of the pixel in the active region can be reduced, so that a high-resolution pixel can be designed. In addition, since the number of through-holes formed for each pixel can be remarkably reduced, process variations can be reduced.

In addition, according to the present invention, since the data driver applies power, the voltage applied to the shield layer can be adjusted according to the structure or model or panel characteristics of the NMOS or PMOS thin film transistor, thereby optimizing the characteristics of the thin film transistor.

1 is a schematic block diagram of an organic light emitting display device.
2 is a first exemplary diagram illustrating a circuit configuration of a pixel.
3 is a second exemplary diagram illustrating a circuit configuration of a pixel.
4 is a plan view illustrating an organic light emitting display device according to a first embodiment of the present invention.
FIG. 5 is an enlarged plan view of area A of FIG. 4 .
6 is a plan view of another example in which area A of FIG. 4 is enlarged.
7 is a cross-sectional view taken along line II' of FIG. 5 .
8 is a plan view of an organic light emitting display device according to a second exemplary embodiment of the present invention.
9 is a plan view of an organic light emitting display device according to another second embodiment of the present invention.
Fig. 10 is a view showing an electric field distribution of a driving thin film transistor of a comparative example;
11 is a view showing the electric field distribution of the driving thin film transistor of Example 2. FIG.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. Like reference numerals refer to substantially identical elements throughout. In the following description, if it is determined that a detailed description of a known technology or configuration related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. In addition, the component names used in the following description may be selected in consideration of ease of writing the specification, and may be different from the component names of the actual product. In addition, in the case of the description of the positional relationship, for example, when the positional relationship of the two parts is described as 'on', 'on', 'on', 'next to', ' One or more other parts may be positioned between the two parts unless the terms 'directly' or 'adjacent' are used together.

An organic light emitting display device, a liquid crystal display device, an electrophoretic display device, etc. can be used as the display device according to the present invention. In the present invention, the organic light emitting display device will be described as an example. An organic light emitting display device includes a light emitting layer made of an organic material between a first electrode and a second electrode. Therefore, the hole supplied from the first electrode and the electron supplied from the second electrode combine in the light emitting layer to form an exciton, a hole-electron pair, and emit light by the energy generated when the exciton returns to the ground state. It is a light emitting display device.

In the thin film transistor according to the present invention, the semiconductor layer is made of a polycrystalline semiconductor material or an oxide semiconductor material. Since the polycrystalline semiconductor material has high mobility (100 cm 2 /Vs or more), low energy consumption, and excellent reliability, it can be applied to a gate driver and/or a multiplexer (MUX) for driving devices driving thin film transistors. Alternatively, it is preferable to apply it as a driving thin film transistor in a pixel in an organic light emitting display device. Since the oxide semiconductor material has a low off-current, it is suitable for a switching thin film transistor having a short on-time and a long off-time. In addition, since the off current is small, the voltage holding period of the pixel is long, which is suitable for a display device requiring low-speed driving and/or low power consumption. In the present invention, a driving thin film transistor including a polycrystalline semiconductor material will be described as an example. However, the present invention is not limited thereto, and may be used for a switching thin film transistor other than a driving thin film transistor.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a schematic block diagram of an organic light emitting display device, FIG. 2 is a first exemplary diagram illustrating a circuit configuration of a pixel, and FIG. 3 is a second exemplary diagram illustrating a circuit configuration of a pixel.

Referring to FIG. 1 , the organic light emitting display device includes an image processor 10 , a timing controller 20 , a data driver 30 , a gate driver 40 , and a display panel 50 .

The image processing unit 10 outputs a data enable signal DE along with the data signal DATA supplied from the outside. The image processing unit 10 may output one or more of a vertical synchronization signal, a horizontal synchronization signal, and a clock signal in addition to the data enable signal DE, but these signals are omitted for convenience of description. The image processing unit 10 is formed in the form of an IC (Integrated Circuit) on the system circuit board.

The timing controller 20 receives the data signal DATA from the image processing unit 10 as well as a driving signal including a data enable signal DE or a vertical synchronization signal, a horizontal synchronization signal, and a clock signal.

The timing controller 20 includes a gate timing control signal GDC for controlling an operation timing of the gate driver 40 and a data timing control signal DDC for controlling an operation timing of the data driver 30 based on the driving signal. to output The timing controller 20 is formed in the form of an IC on the control circuit board.

The data driver 30 samples and latches the data signal DATA supplied from the timing controller 20 in response to the data timing control signal DDC supplied from the timing controller 20 , converts it into a gamma reference voltage, and outputs it . The data driver 30 outputs the data signal DATA through the data lines DL1 to DLn. The data driver 30 is attached to the substrate in the form of an IC.

The gate driver 40 outputs a gate signal while shifting the level of the gate voltage in response to the gate timing control signal GDC supplied from the timing controller 20 . The gate driver 40 outputs a gate signal through the gate lines GL1 to GLm. The gate driver 40 is formed in the form of an IC on the gate circuit board or in the form of a gate in panel on the display panel 50 .

The display panel 50 displays an image in response to the data signal DATA and the gate signal supplied from the data driver 30 and the gate driver 40 . The display panel 50 includes pixels P that display an image.

Referring to FIG. 2 , one pixel includes a switching thin film transistor (S_TFT), a driving thin film transistor (D_TFT), and an organic light emitting diode (OLED). The organic light emitting diode OLED operates to emit light according to a driving current formed by the driving thin film transistor D_TFT.

The switching thin film transistor S_TFT performs a switching operation so that a data signal supplied through the first data line DL1 is stored as a data voltage in the capacitor Cst in response to a gate signal supplied through the first gate line GL1 . . The driving thin film transistor D_TFT operates so that a driving current flows between the high potential power line VDD and the low potential power line GND according to the data voltage stored in the capacitor Cst. Although not shown, it may further include a compensation circuit. The compensation circuit is a circuit for compensating for the threshold voltage of the driving thin film transistor D_TFT. Also, the capacitor Cst connected to the switching thin film transistor S_TFT or the driving thin film transistor D_TFT may be located inside the compensation circuit. The compensation circuit may be composed of one or more thin film transistors and capacitors, but is not particularly limited.

In addition, as shown in FIG. 3 , when the compensation circuit CC is included, the pixel further includes a signal line and a power supply line for driving the compensation thin film transistor and supplying a specific signal or power. The added signal line may be defined as the first and second gate lines GL1a and GL1b for driving the compensation thin film transistor included in the pixel. In addition, the added power line may be defined as an initialization power line INIT for initializing a specific node of a pixel to a specific voltage. However, this is only an example and is not limited thereto.

Meanwhile, in FIG. 3 , the compensation circuit CC is included in one pixel as an example. However, when the subject of compensation is located outside the pixel, such as the data driver 30 , the compensation circuit CC may be omitted. That is, one pixel is basically composed of a 2T (Transistor) 1C (Capacitor) structure including a switching thin film transistor (S_TFT), a driving thin film transistor (D_TFT), a capacitor, and an organic light emitting diode (OLED), but the compensation circuit (CC ) is added, it may be variously configured as 3T1C, 4T2C, 5T2C, 6T2C, 7T1C, 7T2C, and the like.

In addition, although the compensation circuit CC is illustrated as being positioned between the switching thin film transistor S_TFT and the driving thin film transistor D_TFT in FIG. 3, it may be further positioned between the driving thin film transistor D_TFT and the organic light emitting diode (OLED). may be The position and structure of the compensation circuit CC are not limited to FIG. 3 .

Hereinafter, organic light emitting display devices according to embodiments of the present invention will be described. Hereinafter, the basic structure of 2T1C shown in FIG. 2 will be described as an example. However, the present invention is applicable to various pixel structures.

<First embodiment>

4 is a plan view showing an organic light emitting display device according to a first exemplary embodiment of the present invention, FIG. 5 is an enlarged plan view of area A of FIG. 4 , and FIG. 6 is a plan view of another example enlarged area A of FIG. , FIG. 7 is a cross-sectional view taken along line II' of FIG. 5 .

Referring to FIG. 4 , in the organic light emitting display device 100 according to an embodiment of the present invention, an active area A/A for displaying an image on a substrate 110 and a bezel surrounding the active area A/A Includes area B/A.

In the active area A/A, a plurality of pixels P are disposed to emit red (R), green (G), and blue (B) light to realize a full color. In the present embodiment, the plurality of pixels P may also include cyan, magenta, and yellow pixels, and any known pixel configuration may be applied. In addition, the plurality of pixels P have a stripe method in which red (R), green (G), and blue (B) are sequentially arranged in one row, but red (R) is arranged in one row and then in the next row. Green (G) may be arranged and blue (B) may be arranged in the next row, or may be arranged in a pentile manner. The bezel area B/A is an area surrounding the active area A/A and is an area in which no light is emitted. The bezel area B/A may include a gate driver GIP and a data driver D-IC for driving the pixels P of the active area A/A.

A shield power line VSM for applying power to the shield layer BSM from the data driver D-IC is positioned outside the active area A/A. The shield power line VSM surrounds the active area A/A, and contacts and connects to the shield layer BSM in the bezel area B/A, respectively. Although the shield power line VSM has been illustrated and described as completely surrounding the active area A/A in FIG. 4 , the shield power line VSM may be disposed on at least one side of the active area A/A.

The shield layer BSM is disposed in the active area A/A and the bezel area B/A and overlaps the plurality of pixels P in the active area A/A, in particular, the plurality of pixels The driving thin film transistors respectively provided in (P) are overlapped and disposed. The shield layer BSM prevents changes in electrical characteristics of the driving thin film transistor when power is applied from the above-described shield power line VSM. A more specific action will be described later. The shield layer BSM includes a plurality of shield lines SML1 and SML2, and includes a first shield line SML1 disposed in a horizontal direction and a second shield line SML2 disposed in a vertical direction. In the shield layer BSM, the plurality of first and second shield lines SML1 and SML2 are orthogonal to each other and are disposed in a mesh shape. In the present invention, a shield layer BSM in which a total of 11 shield lines SML1 and SML2 of the first shield line SML1 and the second shield line SML2 are arranged in a mesh form in the active area A/A is formed. shown. However, FIG. 4 is schematically illustrated for convenience of explanation, and it should be understood that the shield layer BSM is disposed on all the pixels P disposed in the active area A/A and overlaps all the driving thin film transistors. will be.

In order to examine the arrangement of the shield layer BSM and the shield power line VSM in more detail, refer to FIG. 5 .

Referring to FIG. 5 , in the organic light emitting diode display 100 according to the embodiment of the present invention, a gate line GL, a data line DL crossing the gate line GL, and a power line ( VL) is arranged to constitute one pixel P. The pixel P of the present invention refers to an internal region partitioned by the intersection of the gate line GL, the data line DL, and the power line VL. Although the drawing shows that the gate line GL is not disposed below the pixel P, the pixel P may be defined because the gate line of an adjacent pixel exists.

In the pixel of the present invention, a switching thin film transistor S_TFT, a driving switching thin film transistor D_TFT, and a capacitor Cst are disposed, and an organic light emitting diode (not shown) to which the driving switching thin film transistor D_TFT is connected is disposed. The switching switching thin film transistor S_TFT serves to select a pixel. The switching switching thin film transistor S_TFT includes a semiconductor layer 121 , a gate electrode 123 branched from the gate line GL, a source electrode 124 branched from the data line DL, and a drain electrode 126 . do. The capacitor Cst includes a capacitor lower electrode 127 connected to the drain electrode 126 of the switching switching thin film transistor S_TFT and a capacitor upper electrode 128 connected to the power line VL. The driving switching thin film transistor D_TFT serves to drive the first electrode of the pixel selected by the switching switching thin film transistor S_TFT. The driving switching thin film transistor D_TFT includes a semiconductor layer 120 , a gate electrode 130 connected to the capacitor lower electrode 127 , a source electrode 140 branched from the power line VL, and a drain electrode 145 . . The organic light emitting diode (not shown) includes a first electrode 160 connected to the drain electrode 145 of the driving switching thin film transistor (D_TFT), an organic layer including a light emitting layer formed on the first electrode 160 (not shown), and A second electrode (not shown) is included.

A shield layer BSM is positioned under the semiconductor layer 120 of the driving thin film transistor D_TFT. Specifically, an intersection CRO formed by crossing the first shield line SML1 and the second shield line SML2 is positioned under the semiconductor layer 120 . The intersection portion CRO of the shield layer BSM is positioned to overlap at least the entire area of the semiconductor layer 120 . On the other hand, the first shield line SML1 of the shield layer BSM is positioned in another adjacent pixel (the pixel disposed on the right side), and the second shield line SML2 is not positioned.

In the embodiment of the present invention, in a certain pixel P, both the first shield line SML1 and the second shield line SML2 of the shield layer BSM are disposed, and in the other pixel P, the shield layer BSM is disposed. ) of the first shield line SML1 or the second shield line SML2 may be disposed. For example, among the plurality of pixels arranged in the horizontal direction, both the first shield line and the second shield line may be disposed in the first pixel, only the first shield line may be disposed in the second pixel, and again in the third pixel A first shield line and a second shield line may be disposed. If this is regularized, one, two, or three or more pixels on which only the first shield line is disposed may be repeatedly disposed between the pixels on which the first shield line and the second shield line are disposed. However, the present invention is not limited thereto, and the first shield line and the second shield line may be disposed in various structures, and if a shield layer is disposed on at least the driving thin film transistors of all pixels, the first shield line and the second shield line Any arrangement of the

Meanwhile, unlike FIG. 5 , the shield layer BSM of the present invention overlaps the driving thin film transistor D_TFT, but the size thereof may be further enlarged.

Referring to FIG. 6 , in FIG. 5 , the shield layer BSM has a size large enough to cover the driving thin film transistor D_TFT, but the shield layer BSM includes a capacitor as well as the switching thin film transistor S_TFT. It may be made of a size that can cover even (Cst). Specifically, the cross section CRO of the shield layer BSM has a plate shape and overlaps the switching thin film transistor S_TFT, the driving thin film transistor D_TFT, and the capacitor Cst. However, the crossing portion CRO does not overlap the data line DL, the gate line GL, and the power line VL. The first shield line SML1 overlaps the data line DL and the power line VL, and the second shield line SML2 overlaps the gate line GL. Accordingly, a parasitic capacitor generated by overlapping the data line DL, the gate line GL, the power line VL and the shield layer BSM may be minimized.

The shapes of the shield layer BSM illustrated in the first embodiment of the present invention described above are only examples, and the present invention is not limited thereto. In the present invention, the size of the cross section CRO of the shield layer BSM may have any size as long as it overlaps at least the driving thin film transistor D_TFT.

Hereinafter, the organic light emitting diode display of the present invention will be described in detail with reference to FIG. 7 , which is a cross-sectional view showing the structure cut along the cut line II′ of FIG. 5 .

Referring to FIG. 7 , in the organic light emitting diode display 100 according to the embodiment of the present invention, a driving thin film transistor D_TFT and an organic light emitting diode OLED connected to the driving thin film transistor D_TFT are positioned on a substrate 110 . do.

In more detail, the substrate 110 is made of glass, plastic, or metal. In the present invention, the substrate 110 may be made of plastic, specifically, a polyimide substrate. Accordingly, the substrate 110 of the present invention has a flexible characteristic. The substrate 110 includes an active area A/A and a bezel area B/A other than the active area A/A. A first buffer layer 112 is positioned on the substrate 110 . The first buffer layer 112 serves to protect the thin film transistor formed in a subsequent process from impurities such as alkali ions leaking from the substrate 110 . The first buffer layer 112 may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof.

A shield layer BSM is positioned on the first buffer layer 112 . The shield layer (BSM) is a conductive material and is made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu). It may be made of a metal such as any one selected from the group consisting of or an alloy thereof, or a semiconductor such as silicon (Si). The shield layer BSM is positioned in the active area A/A and the bezel area B/A.

A second buffer layer 116 is positioned on the shield layer BSM. The second buffer layer 116 serves to protect the thin film transistor formed in a subsequent process from impurities such as alkali ions leaking from the shield layer BSM. The second buffer layer 116 may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof.

The semiconductor layer 120 is positioned on the second buffer layer 116 . The semiconductor layer 120 may be formed of a silicon semiconductor or an oxide semiconductor. The silicon semiconductor may include amorphous silicon or crystallized polycrystalline silicon, and in this embodiment may be the semiconductor layer 120 made of oxide. The semiconductor layer 120 includes a source region, a drain region, and a channel region disposed therebetween. The source region and the drain region are regions doped with a high concentration of impurities, and are regions in which the source electrode and the drain electrode of the thin film transistor are respectively connected. The impurity ion may use a p-type impurity or an n-type impurity, and the p-type impurity may be selected from the group consisting of boron (B), aluminum (Al), gallium (Ga), and indium (In), and the n-type impurity is The impurities may be selected from the group consisting of phosphorus (P), arsenic (As) and antimony (Sb). In the semiconductor layer 120 , the channel region may be doped with an n-type impurity or a p-type impurity according to the structure of the NMOS or PMOS thin film transistor. The thin film transistor of the present invention is applicable to a thin film transistor of NMOS or PMOS.

A first insulating layer 125 that may be a gate insulating layer is positioned on the semiconductor layer 120 . The first insulating layer 125 may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof. The gate electrode 130 is positioned on the first insulating layer 125 in a predetermined region of the semiconductor layer 120 , that is, at a position corresponding to the channel region. The gate electrode 130 is selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It is formed of any one or an alloy thereof. In addition, the gate electrode 130 is a group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be a multi-layer made of any one selected from or alloys thereof. For example, the gate electrode 130 may be a double layer of molybdenum/aluminum-neodymium or molybdenum/aluminum.

A second insulating layer 135 , which may be an interlayer insulating layer, is positioned on the gate electrode 130 . The second insulating layer 135 may be a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof. Partial regions of the second insulating layer 135 and the first insulating layer 125 are etched to form contact holes 137 and 138 exposing a portion of the semiconductor layer 120 , ie, a source region and a drain region. A data line DL, a source electrode 140 , and a drain electrode 145 are positioned on the second insulating layer 135 . The source electrode 140 and the drain electrode 145 are electrically connected to the semiconductor layer 120 through contact holes 137 and 138 penetrating the second insulating layer 135 and the first insulating layer 125 .

The source electrode 140 and the drain electrode 145 may be formed of a single layer or multiple layers, and when the source electrode 140 and the drain electrode 145 are a single layer, molybdenum (Mo), aluminum (Al), It may be made of any one selected from the group consisting of chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof. In addition, when the source electrode 140 and the drain electrode 145 are multi-layered, a double layer of molybdenum/aluminum-neodymium, a triple layer of titanium/aluminum/titanium, molybdenum/aluminum/molybdenum or molybdenum/aluminum-neodymium/molybdenum can be made with Accordingly, the driving thin film transistor D_TFT including the semiconductor layer 120 , the gate electrode 130 , the source electrode 140 , and the drain electrode 145 is configured.

In the bezel area B/A, the shield power line VSM is positioned on the second insulating layer 135 . The shield power line VSM is connected to the shield layer BSM through a through hole 139 penetrating the second buffer layer 116 , the first insulating layer 125 , and the second insulating layer 135 . In the present embodiment, the shield power line VSM is positioned on the same layer as the source electrode 140 , but the shield power line VSM may be positioned on the same layer as the gate electrode 130 .

A third insulating layer 147 is positioned on the entire surface of the substrate 110 including the driving thin film transistor D_TFT. The third insulating layer 147 is a passivation layer that protects the thin film transistors below it, and may be formed of silicon oxide (SiOx), silicon nitride (SiNx), or a multilayer thereof. The fourth insulating layer 150 is positioned on the entire surface of the substrate 110 including the third insulating layer 147 . The fourth insulating film 150 may be a planarization film for alleviating the step difference in the lower structure, and is made of an organic material such as polyimide, benzocyclobutene series resin, or acrylate. The third and fourth insulating layers 147 and 150 include via holes 155 exposing the drain electrode 145 of the driving thin film transistor D_TFT.

The first electrode 160 is positioned on the fourth insulating layer 150 . The first electrode 160 may be an anode, and is made of a transparent conductive material, for example, indium tin oxide (ITO), indium zinc oxide (IZO), or zinc oxide (ZnO). The first electrode 160 fills the via hole 155 and is connected to the drain electrode 145 of the driving thin film transistor D_TFT. Here, when the organic light emitting display device 100 has a top emission structure in which light is emitted in the direction of the second electrode 180 , the first electrode 160 further includes a reflective layer, and has a two-layer structure of ITO/reflective layer or ITO/ It may have a three-layer structure of a reflective layer/ITO. On the other hand, when the organic light emitting display device 100 has a bottom emission structure in which light is emitted in the direction of the first electrode 160 , the first electrode 160 may be formed of only a transparent conductive material.

A bank layer 165 is positioned on the substrate 110 including the first electrode 160 . The bank layer 165 may be a pixel defining layer that defines a pixel by exposing a portion of the first electrode 160 . The bank layer 165 is made of an organic material such as polyimide, benzocyclobutene series resin, or acrylate. The bank layer 165 has an opening 167 exposing the first electrode 160 .

The organic layer 170 is positioned on the first electrode 160 exposed by the opening 167 of the bank layer 165 . The organic layer 170 includes a light emitting layer that emits light by combining at least electrons and holes, and may include at least one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer.

The second electrode 180 is positioned on the substrate 110 on which the organic layer 170 is formed. The second electrode 180 is a cathode electrode and may be formed of magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag), or an alloy thereof, which has a low work function. When the organic light emitting diode display 100 of the present invention has a top emission structure in which light is emitted in the direction of the second electrode 180 , the second electrode 180 has a thickness that is thin enough to allow light to pass therethrough. On the other hand, when the organic light emitting diode display 100 of the present invention has a bottom light emitting structure in which light is emitted in the direction of the first electrode 160 , the second electrode 180 is thick enough to reflect the light. Accordingly, an organic light emitting diode (OLED) including the first electrode 160 , the organic layer 170 , and the second electrode 180 is configured, and the organic light emitting diode display 100 according to the embodiment of the present invention is formed. .

When power is applied to the shield layer BSM in the above-described organic light emitting display device 100, an electric field formed under the semiconductor layer 120 due to the polyimide substrate 110 is shielded to improve the characteristics of the driving thin film transistor D_TFT. change can be prevented. As another method of applying power to the shield layer, different from applying external power to the shield layer as in the present invention, there is a method of applying the source power to the shield layer by connecting the source electrode of the thin film transistor and the shield layer in each pixel. However, a difference occurs in the voltage applied between the source electrode and the gate electrode according to the voltage applied to the source electrode. In the present invention, instead of connecting the source electrode 140 and the shield layer BSM, power is applied to the shield layer BSM from the data driver D-IC, and between the source electrode 140 and the gate electrode 130 . It is possible to prevent a difference in the voltage applied to the

In addition, in a structure connecting the source electrode and the shield layer of the thin film transistor in each pixel, since a through hole connecting the source electrode and the shield layer is formed in the pixel, the size of the pixel increases by the size of the through hole. However, according to the present invention, the size of pixels in the active area A/A can be reduced by connecting the shield power line VSM and the shield layer BSM through the through hole 139 outside the active area A/A. It is possible to design high-resolution pixels. In addition, since the number of through-holes formed for each pixel can be remarkably reduced, process variations can be reduced.

In addition, since the voltage applied to the source electrode is limited in the structure connecting the source electrode and the shield layer of the thin film transistor in each pixel, the voltage applied to the shield layer cannot be adjusted either. However, in the present invention, since power is applied from the data driver (D-IC), the voltage applied to the shield layer can be adjusted in response to the structure or model of the NMOS or PMOS thin film transistor or the panel characteristics, thereby optimizing the characteristics of the thin film transistor. can

The shielding layer (BSM) of the present invention may be formed in various structures. Hereinafter, various structures of the shield layer BSM will be described through the second embodiment. Hereinafter, the same reference numerals are given to the same components as those of the above-described first embodiment, and descriptions thereof will be omitted.

<Second embodiment>

8 is a plan view of an organic light emitting display device according to a second embodiment of the present invention, and FIG. 9 is a plan view of an organic light emitting display device according to another second embodiment of the present invention.

Referring to FIG. 8 , the organic light emitting diode display 100 according to the second embodiment of the present invention surrounds an active area A/A for realizing an image on a substrate 110 and the active area A/A. includes the bezel area B/A. A plurality of pixels P are disposed in the active area A/A, and a shield power line VSM for applying power to the shield layer BSM from the data driver D-IC outside the active area A/A ) is located. The shield power line VSM has the active area A/A disposed on both sides, respectively, and is connected to the shield layer BSM in the bezel area B/A by contacting each other.

The shield layer BSM is disposed in the active area A/A and the bezel area B/A and overlaps the plurality of pixels P in the active area A/A, in particular, the plurality of pixels The driving thin film transistors respectively provided in (P) are overlapped and disposed. The shield layer BSM prevents changes in electrical characteristics of the driving thin film transistor when power is applied from the above-described shield power line VSM.

In the present embodiment, the shield layer BSM includes a plurality of first shield lines SML1 arranged in a horizontal direction. In the shield layer BSM, a plurality of first shield lines SML1 are arranged in a stripe shape, and one side and the other side of the first shield lines SML1 are respectively connected to the shield power line VSM. In the present embodiment, it is illustrated that a total of nine first shield lines SML1 are disposed in the active area A/A, but for convenience of explanation, the first shield line SML1 is illustrated in the active area A It may be arranged in a number that can overlap all the pixels arranged in /A).

Meanwhile, referring to FIG. 9 , in the organic light emitting display device 100 according to another second embodiment of the present invention, the shield layer BSM is provided from the data driver D-IC outside the active area A/A. A shield power line (VSM) for applying power is located. The shield power line VSM is disposed to surround the active area A/A, and is respectively connected to and in contact with the shield layer BSM in the bezel area B/A.

The shield layer BSM is disposed to overlap the plurality of pixels P of the active area A/A, and in particular, is disposed to overlap the driving thin film transistors respectively provided in the plurality of pixels P. In the present embodiment, the shield layer BSM has a plate shape larger than the active area A/A so as to overlap the entire active area A/A. Accordingly, the shield layer BSM is disposed in both the active area A/A and the bezel area B/A.

In the organic light emitting display device according to the above-described second embodiments of the present invention, embodiments of a shield layer having a stripe shape and a plate shape in addition to the mesh shape have been disclosed. Since the second embodiment also exhibits the same effects as the above-described first embodiment, detailed effects will be omitted.

Hereinafter, data tested on the characteristics of an organic light emitting display device according to Comparative Examples and Examples of the present invention will be reviewed.

<Comparative example>

An organic light emitting diode display having a structure in which a source electrode of a driving thin film transistor of each pixel is connected to a shield layer was manufactured.

<Example 1>

In FIG. 5, an organic light emitting diode display having a structure in which the shield layer overlaps only the source electrode and the semiconductor layer of the driving thin film transistor and the drain electrode does not overlap was manufactured.

<Example 2>

An organic light emitting diode display having the structure shown in FIG. 5 was manufactured.

<Example 3>

An organic light emitting diode display having the structure shown in FIG. 6 was manufactured.

<Example 4>

An organic light emitting diode display having the structure shown in FIG. 9 was manufactured.

The capacitance (capacitor) applied to each component and the shield layer in the organic light emitting display devices manufactured according to the aforementioned Comparative Examples and Examples 1 to 3 was measured and shown in Table 1 below. (fF is femtofarad.)

comparative example Example 1 Example 2 Example 3 Example 4 Area ratio of shield layer in pixel 50% 60% 70% 80% 100% data line 8.9fF 9.3fF 8.7fF 13.9fF 19.3fF gate line 9.6fF 9.7fF 8.3fF 9.4fF 10.3fF

Referring to Table 1, in the organic light emitting display device according to Example 1, the capacitance between the data line and the shield layer increased by 0.4 fF and the capacitance between the gate line and the shield layer increased by 0.1 fF, compared to the comparative example. did. Compared to the comparative example, in the organic light emitting display device according to Example 2, the capacitance between the data line and the shield layer was reduced by 0.2 fF and the capacitance between the gate line and the shield layer was decreased by 1.3 fF. Compared to the comparative example, in the organic light emitting diode display according to Example 3, the capacitance between the data line and the shield layer increased by 5.0 fF and the capacitance between the gate line and the shield layer decreased by 0.2 fF. Compared to the comparative example, in the organic light emitting diode display according to Example 4, the capacitance between the data line and the shield layer increased by 10.4 fF and the capacitance between the gate line and the shield layer increased by 0.7 fF.

Through this result, the capacitance applied to each line of the organic light emitting display device according to the embodiments of the present invention slightly increased compared to the comparative example, but in Example 2 having the mesh-shaped shield layer shown in FIG. 5, each It was confirmed that the capacitance applied to the lines decreased.

Meanwhile, the electric field distribution according to the source voltage of the driving thin film transistor of the organic light emitting display device according to Comparative Example and Example 2 was measured. FIG. 10 is a view showing the electric field distribution of the driving thin film transistor of Comparative Example, and FIG. 11 is a view showing the electric field distribution of the driving thin film transistor of Example 2. Referring to FIG. For reference, dotted lines in FIGS. 10 and 11 indicate electric fields having the same voltage potential.

Referring to FIG. 10 , in the comparative example, since the source electrode and the shield layer are connected, the electric field of the drain electrode is blocked. However, as the source voltage increases, the electric field of the drain electrode expands in the direction of the source electrode, and different voltage potentials act on the semiconductor layer. That is, it was found that the shield layer of the comparative example did not block the electric field affecting the semiconductor layer.

On the other hand, referring to FIG. 11 , in Example 2, since the shield layer covers the entire thin film transistor, the same voltage potential acts under the semiconductor layer even when the source voltage increases. Through this result, it can be confirmed that the embodiments of the present invention can prevent the electric field acting on the semiconductor layer of the driving thin film transistor from being changed by the electric field acting as the same voltage potential across the semiconductor layer, thereby changing the electrical characteristics of the driving thin film transistor. .

As described above, in the organic light emitting diode display according to embodiments of the present invention, power is applied to the shield layer from the data driver to prevent a difference in voltage applied between the source electrode and the gate electrode. Also, according to the present invention, by connecting the shield power line and the shield layer through a through hole outside the active region, the size of the pixel in the active region can be reduced, so that a high-resolution pixel can be designed. In addition, since the number of through-holes formed for each pixel can be remarkably reduced, process variations can be reduced.

In addition, according to the present invention, since the data driver applies power, the voltage applied to the shield layer can be adjusted according to the structure or model of the NMOS or PMOS thin film transistor or the panel characteristics, thereby optimizing the characteristics of the thin film transistor.

Those skilled in the art from the above description will be able to see that various changes and modifications can be made without departing from the technical spirit of the present invention. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: organic light emitting display device 110: substrate
A/A : Active area B/A : Bezel area
VSM: Shield power line BSM: Shield layer
SML1: first shield line SML2: second shield line

Claims (19)

a substrate comprising: a substrate including an active region including a plurality of pixels defined by a plurality of gate lines and a plurality of data lines respectively disposed in a first direction and a second direction perpendicular to each other and a bezel region disposed outside the active region;
a power line disposed to cross the gate line;
a thin film transistor disposed in the plurality of pixels on the substrate, respectively, and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode;
a shield layer positioned between the substrate and the thin film transistor to shield an electric field applied to the thin film transistor;
a shield power line electrically connected to the shield layer;
The gate line intersects the shield power line. a substrate comprising: an active region including a plurality of pixels defined by a plurality of gate lines and data lines and a bezel region positioned outside the active region;
power line;
a thin film transistor disposed in the plurality of pixels on the substrate, respectively, and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode;
a shield layer positioned between the substrate and the thin film transistor to shield an electric field applied to the thin film transistor;
a shield power line electrically connected to the shield layer;
The shield layer overlaps the semiconductor layer and does not overlap the gate line. The display device of claim 1 , wherein the semiconductor layer includes an oxide semiconductor or polycrystalline silicon. According to any one of claims 1 to 2,
Further comprising a first buffer layer and a second buffer layer disposed on the substrate,
The first buffer layer and the second buffer layer are formed of SiOx or SiNx. The method of any one of claims 1 and 2, wherein the shielding layer comprises molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd). ) and at least one material selected from the group consisting of copper (Cu), or an alloy thereof. The display device of claim 1 , wherein the shield power line is disposed on the same layer as the gate electrode. The display device of claim 1 , further comprising a driving unit disposed in the bezel region to apply a signal to the display region, and the shield power line is connected to the driving unit. According to any one of claims 1 to 2,
Further comprising an organic light emitting diode disposed on each of the plurality of pixels,
The organic light emitting diode includes a first electrode, an organic layer disposed on the first electrode, and a second electrode disposed on the organic layer,
The first electrode is composed of a transparent conductive layer/reflective layer or a transparent conductive layer/reflective layer/transparent conductive layer,
The second electrode is a display device including a metal layer formed to a thickness through which light is transmitted. According to any one of claims 1 to 2,
Further comprising an organic light emitting diode disposed on each of the plurality of pixels,
The organic light emitting diode includes a first electrode, an organic layer disposed on the first electrode, and a second electrode disposed on the organic layer,
The first electrode is composed of a transparent conductive layer.
The second electrode is a display device including a metal layer through which light is reflected. According to any one of claims 1 to 2,
The shield layer includes a first shield line and a second shield line extending in a first direction and a second direction, respectively,
The first shield line is parallel to the gate line,
The second shield line is parallel to the data line or the shield power line. The display device of claim 1 , wherein the shield layer overlaps the thin film transistor. a substrate comprising: an active region including a plurality of pixels defined by a plurality of gate lines and data lines and a bezel region disposed outside the active region;
power line;
a thin film transistor disposed in the plurality of pixels on the substrate, respectively, and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode;
a shield layer positioned between the substrate and the thin film transistor to shield an electric field applied to the thin film transistor;
a shield power line electrically connected to the shield layer;
The shield layer overlaps the semiconductor layer, and the shield power line is positioned on the same layer as the gate electrode. The display device of claim 12 , wherein the shield layer extends and is electrically connected to the shield power line. The display device of claim 12 , wherein the shield power line extends and is electrically connected to the shield layer. The display device of claim 12 , wherein the gate line crosses the data line and the power line. The display device of claim 12 , wherein the power line is disposed between the data lines. The display device of claim 12 , further comprising a bank layer disposed between the plurality of pixels, wherein the bank layer overlaps the data line. A substrate comprising: a substrate including an active region including a plurality of pixels defined by a plurality of gate lines and data lines respectively disposed in a first direction and a second direction perpendicular to each other and a bezel region positioned outside the active region;
power line;
a thin film transistor disposed in the plurality of pixels on the substrate, respectively, and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode;
a shield layer positioned between the substrate and the thin film transistor to shield an electric field applied to the thin film transistor, the shield layer including a first shield line and a second shield line extending in the first direction and the second direction, respectively;
a shield power line disposed on the bezel region of the substrate and electrically connected to the shield layer;
The first shield line extends in a vertical direction to the data line and intersects the data line and the power line. The display device of claim 18 , wherein the shield power line is disposed on the same layer as the gate electrode.

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