KR20220018411A - Mother substrate, display panel, and method of manufacturing the same - Google Patents

Abstract

According to an embodiment of the present invention, provided is a mother substrate, which includes: a glass substrate; an organic layer disposed on the glass substrate to overlap a plurality of cutting lines; and a plurality of cells spaced apart from each other on the glass substrate with the cutting line interposed therebetween. According to the present invention, it is possible to prevent defects due to foreign substances generated when peeling a PI film substrate and the roughness of the surface of the PI film, and lower the cost.

Description

Mother board, display panel, and manufacturing method thereof

The present invention relates to a mother substrate, a display panel, and a method for manufacturing the same.

The electroluminescent display device is roughly classified into an inorganic light emitting display device and an organic light emitting display device according to the material of the light emitting layer. The active matrix type organic light emitting diode display includes an organic light emitting diode (hereinafter, referred to as "OLED") that emits light by itself, and has a fast response speed and high luminous efficiency, luminance and viewing angle. There are advantages. In the organic light emitting display device, an OLED (Organic Light Emitting Diode, referred to as "OLED") is formed in each pixel. The organic light emitting display device has a fast response speed, excellent luminous efficiency, luminance, and viewing angle, as well as a black gradation. Because it can be expressed in complete black, the contrast ratio and color reproduction are excellent.

The organic light emitting diode display does not require a backlight unit and may be implemented on a plastic substrate, a thin glass substrate, or a metal substrate, which are flexible materials. Accordingly, the flexible display may be implemented as an organic light emitting display device.

In the flexible display, the size of the screen may be changed by winding, folding, or bending the flexible panel. The flexible display may be implemented as a rollable display, a foldable display, a bendable display, a slideable display, and the like. Such a flexible display can be applied to not only mobile devices such as smartphones and tablet PCs, but also TVs, in-vehicle displays, and wearable devices, and the field of application is expanding.

The flexible display may implement a bezel bended display in which the bezel area is minimized by folding the non-display area using a flexible panel structure. In addition, the flexible display may be coupled to an information device in a structure capable of changing the size of the screen. Since the information device employs a flexible display to increase the size of the screen, it enables multi-tasking by executing two or more applications or contents.

The flexible substrate used for the flexible display may be made of a flexible material, for example, a PI (Polyimide) film substrate. In the manufacturing process of a flexible display panel, a circuit layer and a light emitting device may be formed on the PI film in a state in which a carrier substrate having high rigidity and heat resistance is bonded under the PI film substrate. Since the carrier substrate is only required in the manufacturing process, it can be separated from the PI film substrate after all layers necessary for driving the pixels are formed on the PI film. The carrier substrate and the PI film substrate may be separated by a laser lift off process using a laser device.

The manufacturing process of the flexible display panel has a high manufacturing cost due to expensive laser equipment, and defects are caused in subsequent processes due to foreign substances and roughness of the PI film surface, etc. can be

In addition, the folding part may be configured using an organic material so that the existing flexible display panel can be flexibly bent. In this case, since the rigidity of the folding part is weak, crease or hinge stains may be seen.

SUMMARY OF THE INVENTION The present invention aims to solve the above-mentioned needs and/or problems.

A mother substrate according to an embodiment of the present invention includes a glass substrate having a plurality of cutting lines; an organic layer disposed on the glass substrate to overlap the plurality of cutting lines; and a plurality of cells spaced apart from each other on the glass substrate with the cutting line interposed therebetween.

The organic layer may be disposed to overlap the plurality of cells and the plurality of cutting lines.

The glass substrate further includes at least one bending line set in each of the plurality of cells, and the organic layer includes: a first organic layer disposed on the glass substrate to overlap the cutting line between the plurality of cells; and a second organic layer disposed on the glass substrate to overlap the at least one bending line.

Each of the cells may include a circuit layer disposed on the glass substrate to drive a pixel; a first electrode disposed on the circuit layer, a bank disposed on the first electrode to define an emission region, an organic compound layer disposed on the first electrode in the emission region, and a first electrode disposed on the organic compound layer a light emitting device layer including two electrodes; an encapsulation layer covering the light emitting device layer; and a polarizing plate disposed on the encapsulation layer, wherein the organic layer is disposed between the glass substrate and the circuit layer, and the organic layer and the bank may include the same material.

The organic layer and the polarizing plate may be sequentially stacked on the glass substrate between adjacent cells to overlap the plurality of cutting lines.

The first organic layer and the second organic layer may include a polyimide layer.

The glass substrate may include: a first opening exposing the first organic layer at a position overlapping the plurality of cutting lines; and a second opening exposing the second organic layer at a position overlapping the at least one bending line, wherein a coating layer may be disposed on a rear surface of the glass substrate and at least a portion of the first and second openings.

A display panel according to an embodiment of the present invention includes a glass substrate; a circuit layer disposed on the glass substrate to drive pixels; a light emitting device layer disposed on the circuit layer and including a light emitting device including a first electrode, an organic compound layer disposed on the first electrode, and a second electrode disposed on the organic compound layer; an encapsulation layer covering the circuit layer and the light emitting device layer; a polarizing plate disposed on the encapsulation layer; and an organic layer disposed on the glass substrate.

The bank may further include a bank disposed on the first electrode to define an emission region, and the organic layer and the bank may include the same material.

The display panel further includes at least one bending line through which the display panel is folded, and the organic layer includes: a first organic layer disposed on an edge of the glass substrate; and a second organic layer disposed on the glass substrate to overlap the at least one bending line.

The glass substrate may include an opening exposing the second organic layer in a region overlapping the at least one bending line.

A coating layer may be disposed on the rear surface of the glass substrate and at least a portion of the opening.

The edge sidewall of the glass substrate may include a wedge-shaped tapered surface symmetrical up and down, and may be formed to have a thinner thickness toward an end of the sidewall.

The tapered surface may protrude out of the circuit layer.

A length of the tapered surface may be inversely proportional to a thickness of the glass substrate.

A method of manufacturing a display panel according to an embodiment of the present invention is a method of manufacturing a display panel from a plurality of cells disposed on a mother glass substrate including an organic film, and includes setting a cutting line between the plurality of cells. step; forming a mask formed on one surface of the mother glass substrate to cover an area other than the cutting line; forming a first opening by etching the mother glass substrate exposed through the mask; removing the mask; and separating the plurality of cells by cutting the organic layer by irradiating a laser to the organic layer overlapping the cutting line.

In the step of setting the cutting line between the plurality of cells, at least one bending line on which the display panel is folded is set in each of the plurality of cells, and in the step of forming the mask, the mask forms the at least one bending line The method may further include forming the second opening by etching the mother glass substrate exposed through the mask and not covering it.

The organic layer may include a first organic layer disposed on the mother glass substrate to overlap the cutting lines between the plurality of cells; and a second organic layer disposed on the mother glass substrate to overlap the at least one bending line.

The method may further include forming a coating layer on the other surface of the mother glass substrate after removing the mask, and in the step of separating the plurality of cells, the coating layer may be cut by irradiating the laser.

The etching of the mother glass substrate may include wet etching.

Since the embodiment does not use a laser lift off process when separating the display panel from the mother substrate, it is possible to prevent defects due to foreign substances and roughness of the surface of the PI film that are generated when peeling the PI film substrate. and can lower the cost.

In the embodiment, since the display panel is manufactured based on a glass substrate, it is possible to prevent the hinge from staining in the folding area, and durability can be enhanced.

Furthermore, it is possible to prevent damage to the substrate by manufacturing the edge of the glass substrate in a wedge type.

Effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description of the claims.

1 to 3 are views illustrating display panels including a bending part.
4 is a plan view of a display panel according to an exemplary embodiment.
5A to 5D are cross-sectional views taken along line I-I' in FIG. 4 .
6A and 6B are cross-sectional views taken along line II-II' in FIG. 4 .
7 is a plan view of a display panel according to another exemplary embodiment.
8A to 8D are cross-sectional views taken along line I-I' in FIG. 7 .
9A and 9B are cross-sectional views taken along the line II-II' in FIG. 7 .
10 is a plan view of a display panel according to another exemplary embodiment.
11A to 11D are cross-sectional views taken along line I-I' in FIG. 10 .
12A and 12B are cross-sectional views taken along the line II-II' in FIG. 10 .
13 is a cross-sectional view of a display panel according to an exemplary embodiment.
FIG. 14 is an enlarged view of a wedge-type substrate sidewall portion A in FIG. 13 .
15 is a view showing a mother substrate according to an embodiment of the present invention.
16 is a diagram illustrating a manufacturing process of a display panel according to an exemplary embodiment.
17 is a diagram illustrating a manufacturing process of a display panel according to an exemplary embodiment.
18 is a diagram illustrating a manufacturing process of a display panel according to another exemplary embodiment.
19 is a diagram illustrating a manufacturing process of a display panel according to another exemplary embodiment.
20 is a cross-sectional view taken along line C-C' in FIG. 15 .
21 is a diagram illustrating an etching process of a mother glass substrate.
22 is a cross-sectional photograph of a tapered surface formed on a sidewall of the glass substrate 10 .
23 is a view showing various examples of wedge-type sidewalls of a glass substrate.
24 is a cross-sectional photograph of a glass substrate showing a tapered surface when the thickness of the substrate is reduced by an etching process of the glass substrate.
25 is a block diagram illustrating an example of a display device according to an embodiment of the present invention.
26 is a block diagram illustrating an example of a display device according to another embodiment of the present invention.
27A and 27B are views illustrating an example in which the display device shown in FIG. 26 is folded.
28 is a block diagram schematically showing the configuration of a drive IC.
29 is a circuit diagram illustrating an example of a pixel circuit.
30 is a diagram illustrating a method of driving the pixel circuit shown in FIG. 29 .
31 is a cross-sectional view illustrating in detail a cross-section of a display panel according to an embodiment of the present invention.

Advantages and features of the present invention, and a method of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be embodied in various different forms, and only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the art to which the present invention pertains It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are illustrative and the present invention is not limited to the illustrated matters. Like reference numerals refer to like elements throughout. In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted.

When 'including', 'having', 'consisting', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. When a component is expressed in the singular, the case in which the plural is included is included unless otherwise explicitly stated.

In interpreting the components, it is construed as including an error range even if there is no separate explicit description.

In the case of a description of the positional relationship, for example, when the positional relationship of two parts is described as 'on', 'on', 'on', 'next to', etc., 'right' Alternatively, one or more other parts may be positioned between two parts unless 'directly' is used.

In the description of the embodiments, first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are only used to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the spirit of the present invention.

Like reference numerals refer to like elements throughout.

Features of various embodiments may be partially or wholly combined or combined with each other, technically various interlocking and driving are possible, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

Hereinafter, a “bending part” refers to a bent part of the display panel. The bending part may be configured to be bent, for example, in a flexible display panel, to be bent to place the drive IC on the rear surface of the display device, or to be bent to implement a multi-display device may be However, the present invention is not limited thereto.

Hereinafter, various embodiments will be described in detail with reference to the accompanying drawings.

The display panel of the embodiment is manufactured based on a bendable glass film substrate. The glass film substrate may be a glass film having a thickness of 0.2 mm or less. The glass film may be used as a commercially available tempered glass film. Hereinafter, the glass substrate may be interpreted as a glass film substrate.

As shown in FIG. 1 , the display panel 100 has, for example, a width in an X-axis direction, a length in a Y-axis direction, and a constant thickness in the Z-axis direction. Since the circuit layer and the light emitting device layer may be disposed on the glass substrate, the display panel 100 has a thickness greater than that of the glass substrate. The width and length of the display panel 100 may be set to various design values according to application fields of the display device. The display panel 100 may be manufactured in a substantially rectangular plate shape as shown in FIG. 1 , but is not limited thereto. For example, the display panel 100 may be manufactured as a deformable panel including a curved part.

The display panel 100 may include non-bending portions 101 and 102 and a bending portion 100f disposed therebetween. The bending part 100f may be formed as a bending line crossing from one end to the other end of the display panel in the longitudinal direction Y or the width direction X. The display panel 100 may be bent or folded around the bending portion 100f by an external force. When the thickness of the glass substrate of the display panel 100 is thin, it can be flexibly bent with a sufficiently large curvature even with a small force.

The glass substrate of the bending portion 100f may have a smaller thickness than the glass substrate of the non-bending portions 101 and 102 . Accordingly, it is possible to improve the rigidity of the folding part 100f and reduce the difference in refractive index between the bending part 100f and the non-bending parts 101 and 102 .

In an embodiment, an organic layer including an organic material may be added to at least a portion of the bending portion 100f so that the display panel 100 can be easily bent at the bending portion 100f. As the organic material, a resin material having good elasticity, for example, one or a mixture of two or more of polyimide, polyurethane, acrylic, and silicone synthetic rubber may be applied. As an example of the silicone synthetic rubber, polydimethylsiloxane (PDMS) is possible.

The display panel 100 may include a bending portion 100f and non-bending portions 101 and 102 . At least one of the non-bending units 101 and 102 may include a display area in which an input image is reproduced. The non-bending parts 101 and 102 may have different sizes.

Referring to FIG. 1 , the non-bending parts 101 and 102 may include a first area 101 and a second area 102 . In an embodiment, the first region 101 may include a pixel array on which an image is displayed, and the second region 102 may include an IC mounting region in which a drive integrated circuit (IC) for driving pixels is mounted. have. In another embodiment, the first region 101 may include a pixel array on which an image is displayed, and the second region 102 may include a pixel array, at least a portion of which is displayed on an image or preset additional information.

When the second region 102 is used as an IC mounting region, the second region 102 is bent at a high curvature in the bending portion 100f to the opposite surface of the display surface on which an image is displayed, for example, the first region 101 . ) can be folded behind the display surface. In other words, the second region 102 may be bent around the bending portion 100f to form a 180 degree angle with the first region 101 .

2 and 3 show bending parts 100f disposed between three non-bending parts 101 , 102 , 103 in a foldable display. Each of the non-bending units 101 , 102 , and 103 includes a pixel array on which an image or information is displayed. As described above, the bending portions 100f may include glass and an organic layer.

4 is a plan view of a display panel according to the first exemplary embodiment.

5A to 5D are cross-sectional views illustrating examples taken along line I-I' in FIG. 4 .

6A and 6B are cross-sectional views taken along the line II-II' in FIG. 4 . FIG. 6A is a cross-sectional view corresponding to the example of FIG. 5A, and FIG. 6B is a cross-sectional view corresponding to FIGS. 5B and 5C.

Referring to FIG. 4 , the display panel 100 according to the first embodiment may include a bending portion 100f and non-bending portions 101 and 102 . The non-bending parts 101 and 102 may include a first area 101 and a second area 102 . The first area 101 may be a display area. The second region 102 may be an IC region in which a drive IC for driving the first region 101 is disposed. However, the present invention is not limited thereto, and as described above, the second area 102 may be a sub-display area. The bending part 100f may form a bending line extending in one direction when viewed in a plan view. The first region 101 and the second region may be bent at a predetermined angle with respect to the bending line.

Hereinafter, the stacked structure of the display panel 100 according to the first embodiment will be described in detail with reference to FIGS. 5A to 5D and 6A and 6B .

5A and 6A , the display panel 100 includes a glass substrate 10 , an organic layer 12 disposed on the glass substrate 10 , and a circuit layer 14 sequentially stacked on the organic layer 12 . and a light emitting element layer 16 . The display panel 100 includes an encapsulation layer 18 covering the circuit layer 14 and the light emitting device layer 16 , a polarizing plate 20 attached to the encapsulation layer 18 by an adhesive 19 , and A cover window 22 on the polarizing plate 20 may be further included. Although omitted in the drawings, a touch screen in which touch sensors are arranged may be implemented on the display panel 100 . For example, the touch sensors may be disposed between the encapsulation layer 18 and the polarizer 20 .

The organic layer 12 may be a film including one selected from the group consisting of a polyimide-based polymer, a polyester-based polymer, a silicone-based polymer, an acrylic polymer, a polyolefin-based polymer, and a copolymer thereof. Since polyimide has acid resistance and heat resistance, it can be applied to a high-temperature process for forming the circuit layer 14 and the light emitting device layer 16 . The organic layer 12 may be omitted because the circuit layer 14 may be directly formed on the glass substrate 10 as in an embodiment to be described later.

The circuit layer 14 may include data lines, a pixel circuit connected to gate lines and power lines, and a gate driver connected to the gate lines. The pixel circuit and the gate driver may include circuit elements such as a thin film transistor (TFT) and a capacitor. In order to reduce the tensile force and stress applied to the circuit layer 14 when the bending portion 100f is bent, the circuit layer 14 may include only wirings of data lines, gate lines, and power lines in the bending portion 100f. .

The light emitting element layer 16 may include an OLED driven by a driving element of a pixel circuit. The OLED includes an organic compound layer formed between an anode and a cathode. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL) and an electron injection layer (Electron Injection layer, EIL), but is not limited thereto. When a voltage is applied to the anode and cathode of the OLED, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) are moved to the light emitting layer (EML) to form excitons, and as a result, visible light from the light emitting layer (EML) this is emitted The light emitting device layer 16 may further include a color filter array that selectively transmits red, green, and blue wavelengths.

The light emitting element layer 16 and the circuit layer 14 may be covered by a protective layer omitted from the drawing. The protective layer and the encapsulation layer 18 may be formed of an inorganic film made of a glass, metal, aluminum oxide (AlOx) or silicon (Si)-based material, or may have a structure in which an organic film and an inorganic film are alternately stacked. The inorganic membrane blocks the penetration of moisture and oxygen. The organic film planarizes the surface of the inorganic film. When the organic layer and the inorganic layer are stacked in multiple layers, the movement path of moisture or oxygen becomes longer than that of a single layer, so that penetration of moisture/oxygen affecting the light emitting device layer 16 can be effectively blocked.

The polarizing plate 20 may be adhered to the encapsulation layer 18 with an adhesive 19 . The polarizing plate 20 may be bent and extended from an edge region except for a region where pads connected to an external circuit are formed and disposed to contact the upper surface of the organic layer 12 . The polarizing plate 20 improves outdoor visibility of the display device. The polarizing plate 20 reduces light reflected from the surface of the display panel 100 and blocks light reflected from the metal of the circuit layer to improve the brightness of pixels. The polarizing plate 20 may be implemented as a polarizing plate or a circular polarizing plate in which a linear polarizing plate and a phase delay film are bonded. A transparent cover window 22 may be disposed on the polarizing plate 20 .

The glass substrate 10 may be made of plate-shaped alkali-free glass or non-alkali glass. The glass substrate 10 may be divided into a bending portion 100f and non-bending portions 101 and 102 . The non-bending parts 101 and 102 may include a first area 101 and a second area 102 .

In an embodiment, the first region 101 may include a pixel array on which an image is displayed, and the second region 102 may include an IC mounting region in which a drive integrated circuit (IC) for driving pixels is mounted. . In another embodiment, the first region 101 may include a pixel array on which an image is displayed, and the second region 102 may include a pixel array, at least a portion of which is displayed on an image or preset additional information. Although it is shown in FIG. 4 that the second region 102 is an IC mounting region, this is merely exemplary.

Referring to FIG. 5A , the glass substrate 10 may be removed from the area of the bending part 100f. In other words, the glass substrate 10 may be formed to expose the organic layer 12 positioned on the bending portion 100f to the rear surface of the display panel 100 . As described above, the organic layer 12 may be a film including one selected from the group consisting of a polyester-based polymer, a silicone-based polymer, an acrylic polymer, a polyolefin-based polymer, and a copolymer thereof.

When the glass substrate 10 is removed from the bending portion 100f, the display panel 100 may be easily bent. That is, when only the organic layer 12 is present under the bending portion 100f, it is possible to minimize stress applied to the display panel when the display panel is bent.

5B to 5D and 6B , the display panel 100 may further include a coating layer 30 on the rear surface of the glass substrate 10 of FIG. 5A .

As shown in FIG. 5B , the coating layer 30 may be formed on the entire rear surface of the glass substrate 10 to fill the opening of the glass substrate 10 exposing the organic layer 12 . That is, the coating layer 30 may be formed on the entire rear surface of the substrate including the pad portion and the region adjacent to the pad portion. In this case, the polarizing plate 20 may not be formed on the pad part. In another embodiment, the coating layer 30 may be formed only on the bending portion 100f. In another embodiment, the coating layer 30 may be formed to planarize the rear surface of the glass substrate 10 .

The coating layer 30 may also be formed on the rear surface of the glass substrate 10 so as not to overlap the area adjacent to the opening and the pad portion of the glass substrate 10 as shown in FIG. 5C . In this case, the polarizing plate 20 may not be formed on the pad part.

As shown in FIG. 5D , the coating layer 30 may be formed on the rear surface of the glass substrate 10 so as not to overlap the area adjacent to the opening of the glass substrate 10 and the pad part and the pad part. In this case, the polarizing plate 20 may not be formed on the pad part.

The coating layer 30 may be formed using a material having good stretchability to prevent a decrease in rigidity when the glass substrate 10 is thinned in order to increase the bending characteristics of the display panel. Alternatively, the coating layer 30 may be formed in the form of a reinforcing film capable of preventing scratches on the glass substrate 10 .

The coating layer 30 may be formed of an organic material including, for example, a polyester-based polymer or an acrylic-based polymer.

7 is a plan view of a display panel according to a second exemplary embodiment.

8A to 8D are cross-sectional views illustrating examples taken along line I-I' in FIG. 7 .

9A and 9B are cross-sectional views taken along the line II-II' in FIG. 7 . FIG. 9A is a cross-sectional view corresponding to the example of FIG. 8A, and FIG. 9B is a cross-sectional view corresponding to FIGS. 8B to 8D.

Hereinafter, the display panel 100 according to the second embodiment will be described with reference to FIGS. 7 to 9B . Elements substantially the same as those of the first embodiment are denoted by the same reference numerals, and descriptions thereof will be simplified and the differences will be mainly described.

Referring to FIG. 7 , the display panel 100 according to the second exemplary embodiment may include a bending portion 100f and non-bending portions 101 and 102 . The non-bending parts 101 and 102 may include a first area 101 and a second area 102 . The first area 101 may be a display area. The second region 102 may be an IC region in which a drive IC for driving the first region 101 is disposed. However, the present invention is not limited thereto, and as described above, the second area 102 may be a sub-display area. The display panel 100 according to the second embodiment may include a portion of the first region 101 , a bending portion 100f , and a partial organic layer 13 - 1 formed over the second region 102 . have.

Hereinafter, the stacked structure of the display panel 100 according to the second exemplary embodiment will be described in detail with reference to FIGS. 8A to 8D and 9A and 9B .

8A and 9A , the display panel 100 includes a glass substrate 10 , a circuit layer 14 sequentially disposed on the glass substrate 10 , and a light emitting device layer 16 . The display panel 100 includes an encapsulation layer 18 covering the circuit layer 14 and the light emitting device layer 16 , a polarizing plate 20 attached to the encapsulation layer 18 by an adhesive 19 , and A cover window 22 on the polarizing plate 20 may be further included.

The display panel 100 according to the second exemplary embodiment may further include a partial organic layer 13 - 1 disposed between the glass substrate 10 and the circuit layer 14 . More specifically, the partial organic layer 13 - 1 includes the glass substrate 10 and the circuit layer in the second region 102 , the bending portion 100f , and a portion of the first region 101 adjacent to the bending portion 100f . (14) can be disposed between.

The display panel 100 according to the second exemplary embodiment may further include a protective organic layer 13 - 2 disposed between the glass substrate 10 and the circuit layer 14 . More specifically, the protective organic layer 13 - 2 may be disposed along the edge of the first region 101 on the glass substrate 10 as shown in FIG. 7 . The role of the protective organic layer 13 - 2 will be described later.

The polarizing plate 20 is bent and extended in the remaining edge region except for the region where pads connected to the external circuit are formed, similarly to the first embodiment, so that the partial organic layer 13-1 and the protective organic layer 13-2 are formed. It may be arranged to contact the upper surface.

Like the display panel 100 according to the first embodiment, the glass substrate 10 may be removed from the bending part 100f. In other words, the glass substrate 10 may be formed to expose the partial organic layer 13 - 1 positioned in the bending portion 100f to the rear surface of the display panel 100 . The partial organic layer 13 - 1 may be a film including one selected from the group consisting of a polyester-based polymer, a silicone-based polymer, an acrylic polymer, a polyolefin-based polymer, and a copolymer thereof.

When the glass substrate 10 is removed from the bending portion 100f, the display panel 100 may be easily bent. That is, when only the partial organic layer 13 - 1 exists under the bending portion 100f, it is possible to minimize stress applied to the display panel when the display panel is bent.

8B to 8D and 9B , the display panel 100 may further include a coating layer 30 on the rear surface of the glass substrate 10 of FIG. 8A .

As shown in FIG. 8B , the coating layer 30 may be formed on the entire rear surface of the glass substrate 10 to fill the opening of the glass substrate 10 exposing the partial organic layer 13 - 1 . That is, the coating layer 30 may be formed on the entire rear surface of the substrate including the pad portion and the region adjacent to the pad portion. In this case, the polarizing plate 20 may not be formed on the pad part.

The coating layer 30 may also be formed on the rear surface of the glass substrate 10 so as not to overlap the area adjacent to the opening and the pad portion of the glass substrate 10 as shown in FIG. 8C . In this case, the polarizing plate 20 may not be formed on the pad part.

The coating layer 30 may also be formed on the rear surface of the glass substrate 10 so as not to overlap the opening of the glass substrate 10 and the area adjacent to the pad part, and the pad part, as shown in FIG. 8D . In this case, the polarizing plate 20 may not be formed on the pad part.

The material for forming the coating layer 30 and its function are the same as those described with reference to FIGS. 5B to 5D , and thus will be omitted to avoid overlapping description.

10 is a plan view of a display panel according to a third exemplary embodiment.

11A to 10D are cross-sectional views illustrating examples taken along line I-I' in FIG. 10 .

12A and 12B are cross-sectional views taken along the line II-II' in FIG. 10, wherein FIG. 12A is a cross-sectional view corresponding to the example of FIG. 11A, and FIG. 12B is a cross-sectional view corresponding to FIGS. 11B to 11D.

Hereinafter, the display panel 100 according to the third embodiment will be described with reference to FIGS. 10 to 12B . Elements substantially the same as those of the first embodiment are denoted by the same reference numerals, and descriptions thereof will be simplified and the differences will be mainly described.

Referring to FIG. 10 , the display panel 100 according to the third exemplary embodiment may include a bending portion 100f and non-bending portions 101 and 102 . The non-bending parts 101 and 102 may include a first area 101 and a second area 102 . The first area 101 may be a display area. The second region 102 may be an IC region in which a drive IC for driving the first region 101 is disposed, but is not limited thereto.

Hereinafter, a stacked structure of the display panel 100 according to the third exemplary embodiment will be described with reference to FIGS. 11A to 11D and 12A and 12B.

11A and 12A , the display panel 100 includes a glass substrate 10 , a circuit layer 14 sequentially disposed on the glass substrate 10 , and a light emitting device layer 16 . The display panel 100 includes an encapsulation layer 18 covering the circuit layer 14 and the light emitting device layer 16 , a polarizing plate 20 attached to the encapsulation layer 18 by an adhesive 19 , and A cover window 22 on the polarizing plate 20 may be further included.

The display panel 100 according to the third exemplary embodiment may further include a protective organic layer 13 - 2 disposed between the glass substrate 10 and the circuit layer 14 . More specifically, the protective second organic layer 13 - 2 may be disposed at an edge of the first region 101 . The role of the protective organic layer 13 - 2 will be described later.

Similar to the first embodiment, the polarizing plate 20 may be bent and extended in the remaining edge region except for the region where pads connected to the external circuit are formed and disposed to contact the upper surface of the protective organic layer 13 - 2 .

Unlike the display panel 100 according to the first and second embodiments, the display panel 100 according to the third embodiment may not remove the glass substrate 10 from the bending portion 100f. Even if the glass substrate 10 is not removed from the bending portion 100f, if the glass substrate 10 is formed thin enough, the glass substrate 10 can be bent with a sufficiently large curvature. The thin glass substrate 10 may be flexibly bent and may have acid resistance and heat resistance characteristics. Accordingly, in the third embodiment, the circuit layer 14 may be directly mounted on the thin glass substrate 10 .

As a modification, although not shown in FIGS. 11A to 11D , the thickness of the glass substrate 10 under the bending portion 100f and the glass substrate 10 under the non-bending portions 101 and 102 may be formed differently. have. For example, in order to facilitate bending, the glass substrate 10 of the bending portion 100f may be formed thinner than the glass substrate 10 of the non-bending portions 101 and 102 .

The display panel 100 according to the third exemplary embodiment may further include a protective organic layer 13 - 2 disposed between the glass substrate 10 and the circuit layer 14 . More specifically, as shown in FIG. 10 , the protective organic layer 13 - 2 is formed on the glass substrate 10 at opposite edges of the second region 102 and the bending portion 100f and the first region 101 . ) can be arranged along the edge of The role of the protective organic layer 13 - 2 will be described later.

11B to 11D and 12B , the display panel 100 may further include a coating layer 30 on the rear surface of the glass substrate 10 of FIG. 11A .

As shown in FIG. 11B , the coating layer 30 may be formed on the entire rear surface of the glass substrate 10 to fill the opening of the glass substrate 10 exposing the organic layer 12 . That is, the coating layer 30 may be formed on the entire rear surface of the substrate including the pad portion and the region adjacent to the pad portion. In this case, the polarizing plate 20 may not be formed on the pad part.

The coating layer 30 may also be formed on the rear surface of the glass substrate 10 so as not to overlap the area adjacent to the opening and the pad portion of the glass substrate 10 as shown in FIG. 11C . In this case, the polarizing plate 20 may not be formed on the pad part.

As shown in FIG. 11D , the coating layer 30 may be formed on the rear surface of the glass substrate 10 so as not to overlap the pad portion and the region adjacent to the opening of the glass substrate 10 and the pad portion. In this case, the polarizing plate 20 may not be formed on the pad part.

The material for forming the coating layer 30 and its function are the same as those described with reference to FIGS. 5B to 5D , and thus will be omitted to avoid overlapping description. The display panel according to the above-described embodiment may be used as a flexible display panel. In this case, the glass substrate 10 may be manufactured to have a sufficiently thin thickness so that it can be bent to a curvature required by the application product.

Although the thin glass substrate 10 is flexible, when an impact is applied to the edge sidewalls and corners, cracks or breakage may occur. In order to disperse an impact or stress applied from the outside in the fragile portion of the thin glass substrate 10 , the edge sidewall of the glass substrate 10 may be processed into a wedge type.

13 is a cross-sectional view of a display panel according to a fourth exemplary embodiment of the present invention.

FIG. 14 is an enlarged view of a wedge-type substrate sidewall portion A in FIG. 13 .

The fourth embodiment of FIG. 13 is an embodiment of a display panel to which a wedge-type substrate is applied, and the wedge-type glass substrate of FIG. 13 may be applied instead of the substrates of the first to third embodiments.

13 and 14 , the display panel 100 according to the fourth embodiment includes a glass substrate 10 , a circuit layer 14 stacked on the glass substrate 10 , and a light emitting device layer 16 . The display panel 100 may further include an encapsulation layer 18 covering the circuit layer 14 and the light emitting device layer 16 , a polarizing plate 20 , and a cover window 22 . The display panel 100 may further include a touch sensor layer 13 disposed between the encapsulation layer 18 and the polarizing plate 20 . In the touch sensor layer 13 , touch sensors and touch sensor wires connecting the touch sensors to the touch sensor driver may be formed.

The glass substrate 10 preferably has a thin thickness, for example, 200 μm or less so that it can be flexibly bent. Although not shown in the drawings, as in the above-described embodiment, the organic layer 12 may be disposed on the glass substrate 10 , or the protective organic layer 13-2 may be disposed on the edge of the glass substrate 10 . have. Alternatively, as in the above-described embodiment, the partial organic layer 13 - 1 may be disposed between the first region 101 and the second region 102 on the glass substrate 10 , that is, in the bending portion 100f.

In the glass substrate 10 , the edge sidewall may be processed into a wedge type. A sidewall of a corner where two sides meet in the glass substrate 10 may also be processed into a wedge type. The wedge type includes an upper half-thick portion of the glass substrate 10 and a lower portion of the glass substrate 10 based on the thickness center REF of the glass substrate 10 as shown in FIG. 14 when viewed from the edge cross-section of the glass substrate 10 . It means that the tapered surface of each half-thick part is symmetrical. Accordingly, the thickness of the glass substrate 10 is gradually reduced from the edge to the side wall due to the symmetric top/bottom tapered surface 10w. The tapered portion of the glass substrate 10 protrudes out of the circuit layer 14 and becomes thinner toward the end of the sidewall of the glass substrate 10 .

A coating layer 30 may be formed on the entire rear surface of the glass substrate 10 . The coating layer 30 may reinforce rigidity when the wedge-type glass substrate 10 is thinly formed, and may prevent scratches on the glass substrate 10 .

Hereinafter, a method of manufacturing a display panel according to an exemplary embodiment will be described with reference to FIGS. 15 to 20 .

15 is a view showing a mother substrate according to an embodiment of the present invention.

Referring to FIG. 15 , in the display panel 100 according to the embodiment, a process of forming a thin film on a plurality of cells 1100 is simultaneously formed on a mother glass 1000 that is a large glass substrate. . Hereinafter, for convenience of description, the mother substrate 1000 according to the embodiment is referred to as a mother glass substrate 1110 . Here, one cell 1100 means one display panel.

A plurality of display panels 100 may be simultaneously manufactured by a multi-faceted process in order to reduce costs. First, a plurality of cells 1100 may be formed on the mother substrate 1000 . After the plurality of cells 1100 are formed, a cutting line 1000c may be set on the mother substrate 1000 . Each of the cells 1100 may be separated (or cut) from the mother substrate 1000 based on the cutting line 1000c to form the display panel 100 .

After setting the cutting line 1000c, or at the same time, the bending line 1000f may be set on the mother substrate 1000 . The bending line 1000f may be configured to form the aforementioned bending portion 100f in each display panel after the cells 1100 are separated from the mother substrate 1000 . Accordingly, the bending line 1000f may be established between the non-folding portion forming regions 1001 and 1002 that will form the non-folding portions after the cells 1100 are separated.

FIG. 16 is a view showing a manufacturing process of the display panel according to the first exemplary embodiment, and is a cross-sectional view taken along line A-A' in FIG. 15 .

A method of cutting the mother substrate 1000 along the cutting line 1000c will be described with reference to FIG. 16 . Referring to FIG. 16A , an organic layer 12 is formed on a mother glass substrate 1110 that is a glass substrate that has not yet been cut. The organic layer 12 includes a cell organic layer disposed on each of the cells 1100 and a cutting line organic layer disposed in the cutting line 1000c region. The cell organic layer and the cutting line organic layer are one layer connected to each other. That is, the organic layer 12 may be formed by coating the entire surface of an organic material on the mother glass substrate 1110 . As described above, the circuit layer 14 is formed on the organic layer 12 , and the light emitting device layer 16 is formed on the circuit layer 14 . An encapsulation layer 18 is formed on the light emitting device layer, and a polarizing plate 20 is formed on the encapsulation layer 18 . The polarizing plate 20 may be bent and extended from an edge region except for a region where pads connected to an external circuit are formed to be in contact with the upper surface of the organic layer 12 . Here, the polarizing plate 20 may be a coated polarizing plate formed by a coating method, but is not limited thereto and may be a film-type polarizing plate. An adhesive 19 may be applied between the polarizing plate 20 and the encapsulation layer 18 .

Thereafter, a mask 1120 may be formed on the rear surface of the mother glass substrate 1110 . The mask 1120 may expose the mother glass substrate 1110 at the cutting line 1000c. In other words, the mask 1120 may include an opening for exposing the mother glass substrate 1110 at the cutting line 1000c.

The mother glass substrate 1110 may be wet-etched by supplying an etchant to the opening formed in the mask 1120 formed on the rear surface of the mother glass substrate 1110 . The organic layer 12 disposed on the mother glass substrate 1110 prevents the etchant from penetrating into the circuit layer 14 . That is, the organic layer 12 may serve as an etch stopper. As the etchant, a hydrofluoric acid-based etchant may be used, but is not limited thereto.

Referring to FIG. 16B , after etching the mother glass substrate 1110 near the cutting line 1000c, the mask 1120 is removed from the mother glass substrate 1110, and the rear surface of the mother glass substrate 1110 is etched. A coating layer 30 may be formed thereon. Thereafter, each cell 1100 from the mother substrate 1000 is cut by irradiating a laser to the layers (eg, the polarizing plate 20 , the organic film 12 , and the coating layer 30 ) positioned on the cutting line 1000c . ) are finally separated and the cover window 22 is formed on the polarizing plate 20 to complete the display panel 100 as shown in FIG. 16C .

FIG. 17 is a view showing a manufacturing process of the display panel according to the first embodiment, and is a cross-sectional view taken along the line B-B' of FIG. 15 .

A method of etching a part of the mother glass substrate 1110 along the bending line 1000f set in the mother substrate 1000 will be described with reference to FIG. 17 . As described above, the reason that the mother glass substrate 1110 is etched in the area of the bending line 1000f is to facilitate bending.

Referring to FIG. 17A , a mask 1120 may be formed on the rear surface of the mother glass substrate 1110 . The mask 1120 may expose the mother glass substrate 1110 at the bending line 1000f. In other words, the mask 1120 may include an opening for exposing the mother glass substrate 1110 at the bending line 1000f.

The mother glass substrate 1110 may be wet-etched by supplying an etchant to the opening formed in the mask 1120 formed on the rear surface of the mother glass substrate 1110 . The organic layer 12 disposed on the mother glass substrate 1110 prevents the etchant from penetrating into the circuit layer 14 . That is, the organic layer 12 may serve as an etch stopper. As the etchant, a hydrofluoric acid-based etchant may be used, but is not limited thereto.

Referring to FIG. 17B , after etching the mother glass substrate 1110 near the bending line 1000f, the mask 1120 is removed from the mother glass substrate 1110, and the rear surface of the mother glass substrate 1110 is etched. A coating layer 30 may be formed thereon. Thereafter, the cover window 22 may be formed on the polarizing plate 20 .

The mask 1120 exposing the mother glass substrate 1110 in the cutting line 1000c and the bending line 1000f is the same mask and may be formed by the same process. In addition, the process of etching the mother glass substrate 1110 in the cutting line 1000c and the bending line 1000f is the same process and may be performed simultaneously.

18 is a view illustrating a manufacturing process of a display panel according to the second exemplary embodiment, and is a cross-sectional view taken along line A-A' in FIG. 15 . 20 is a cross-sectional view taken along line C-C' in FIG. 15 .

A method of cutting the mother substrate 1000 according to the cutting line 1000c according to the second embodiment will be described with reference to FIGS. 18 and 20 .

Referring to FIG. 18A , a protective organic layer 13 - 2 is formed on a mother glass substrate 1110 that is a glass substrate that has not yet been cut. Referring to FIG. 20 , the protective organic layer 13 - 2 may be formed in a boundary region between the cell 1100 and the cell 1100 . A circuit layer 14 is formed on the mother glass substrate 1110 , and a light emitting device layer 16 is formed on the circuit layer 14 . An encapsulation layer 18 is formed on the light emitting device layer, and a polarizing plate 20 is formed on the encapsulation layer 18 . An adhesive 19 may be applied between the polarizing plate 20 and the encapsulation layer 18 . The polarizing plate 20 may be bent and extended in the remaining edge region except for the region where pads connected to the external circuit are formed so as to be in contact with the upper surface of the protective organic layer 13 - 2 .

Thereafter, a mask 1120 may be formed on the rear surface of the mother glass substrate 1110 . The mask 1120 may expose the mother glass substrate 1110 at the cutting line 1000c. In other words, the mask 1120 may include an opening for exposing the mother glass substrate 1110 at the cutting line 1000c.

The mother glass substrate 1110 may be wet-etched by supplying an etchant to the opening formed in the mask 1120 formed on the rear surface of the mother glass substrate 1110 . The protective organic layer 13 - 2 disposed on the mother glass substrate 1110 prevents the etchant from penetrating into the circuit layer 14 . That is, the protective organic layer 13 - 2 may serve as an etch stopper. As the etchant, a hydrofluoric acid-based etchant may be used, but is not limited thereto.

Referring to FIG. 18B , after etching the mother glass substrate 1110 near the cutting line 1000c, the mask 1120 is removed from the mother glass substrate 1110, and the rear surface of the mother glass substrate 1110 is etched. A coating layer 30 may be formed thereon. Thereafter, each cell 1100 from the mother substrate 1000 is cut by irradiating the laser on the layers (eg, the polarizing plate 20 , the organic film 12 and the coating layer 30 ) located on the cutting line 1000c ). ) are finally separated and the cover window 22 is formed on the polarizing plate 20 to complete the display panel 100 as shown in FIG. 18C .

19 is a view showing a manufacturing process of a display panel according to the second exemplary embodiment, and is a cross-sectional view taken along line B-B' in FIG. 16 .

A method of etching a portion of the mother glass substrate 1110 along the bending line 1000f set on the mother substrate 1000 will be described with reference to FIG. 19 .

Referring to FIG. 19A , the second embodiment includes a partial organic layer 13 - 1 disposed on a mother glass substrate 1110 . The partial organic layer 13 - 1 may be formed over a portion of the non-folding portion forming regions 1001 and 1002 and the bending line 1000f.

A mask 1120 may be formed on the rear surface of the mother glass substrate 1110 . The mask 1120 may expose the mother glass substrate 1110 at the bending line 1000f. In other words, the mask 1120 may include an opening for exposing the mother glass substrate 1110 at the bending line 1000f.

The mother glass substrate 1110 may be wet-etched by supplying an etchant to the opening formed in the mask 1120 formed on the rear surface of the mother glass substrate 1110 . The partial organic layer 13 - 1 disposed on the mother glass substrate 1110 prevents the etchant from penetrating into the circuit layer 14 . That is, the partial organic layer 13 - 1 may serve as an etch stopper. As the etchant, a hydrofluoric acid-based etchant may be used, but is not limited thereto.

Referring to FIG. 19B , after etching the mother glass substrate 1110 near the bending line 1000f, the mask 1120 is removed from the mother glass substrate 1110, and the rear surface of the mother glass substrate 1110 is etched. A coating layer 30 may be formed thereon. Thereafter, the cover window 22 may be formed on the polarizing plate 20 .

The mask 1120 exposing the mother glass substrate 1110 in the cutting line 1000c and the bending line 1000f is the same mask and may be formed by the same process. In addition, the process of etching the mother glass substrate 1110 in the cutting line 1000c and the bending line 1000f is the same process and may be performed simultaneously.

Since the display panel according to the third embodiment does not have the partial organic layer 13 - 1 , it is manufactured in the same manner as in the second embodiment except that there is no process of etching the mother glass substrate 1110 on the bending line 1000f. can be

20 is a cross-sectional view taken along line C-C' in FIG. 15 .

The role of the protective organic layer 13 - 2 according to the embodiment will be described with reference to FIG. 20 . When the mother glass substrate 1110 is etched using wet etching, the etchant penetrates into the circuit layer 14 and the light emitting device layer 16 on the substrate to reduce damage if there is no etch stopper, that is, an etch stopper. can When the organic layer 12 is applied to the entire surface as in the first embodiment, there is no problem because the organic layer 12 can serve as an etch stopper, but as in the second embodiment, the partial organic layer 13-1 In the case of a panel that uses , or does not use an organic layer as in the third embodiment, the etching solution may penetrate into the circuit layer 14 and the light emitting device layer 16 in the etching process to cause damage. In the embodiments of the present invention, the above-described problem can be prevented by providing a configuration that can serve as an etch stopper, such as the protective organic layer 13-2 or the partial organic layer 13-1, in the cutting line 1000c to be etched. can

In summary, the protective organic layer 13 - 2 is configured to prevent the etchant from flowing into the circuit layer 14 and the light emitting device layer 16 and causing damage in the wet etching process. In order to prevent the etchant from penetrating into the circuit layer 14 and the light emitting device layer 16 , it is formed on the cutting line 1000c and may be disposed on the mother glass substrate 1110 .

The protective organic layer 13 - 2 may be a film including one selected from the group consisting of a polyimide-based polymer, a polyester-based polymer, a silicone-based polymer, an acrylic polymer, a polyolefin-based polymer, and a copolymer thereof.

The protective organic layer 13 - 2 may have a plurality of layers as needed. In one embodiment, as shown in FIG. 20 , the first organic layer 13 - 2 (a) and the second organic layer 13 - 2 (b) may be included. The first organic layer 13 - 2 (a) and the second organic layer 13 - 2 (b) may include the same material as other layers on the display panel 100 . For example, the second organic layer 13 - 2 (b) may be made of the same material as the bank on the display panel 100 . However, the present invention is not limited thereto, and any material including an organic material and capable of serving as an etch stopper may be used.

Hereinafter, a method of etching the mother glass substrate 1110 according to the embodiment will be described in more detail.

In the embodiment, a part of the mother glass substrate 1110 is etched by a wet etching method to separate the cells 1100 arranged on the mother glass substrate 1110 or to form the bending portion 100f or the bending line 1000f. can do. In addition, in the embodiment, the mother glass substrate 1110 may be etched by a wet etching method in order to process the edge sidewall of the glass substrate 10 into a desired shape.

21 is a view illustrating an etching process of the mother glass substrate, as viewed from the rear side of the mother glass substrate.

Referring to FIG. 21 , a mask 1120 may be disposed on one surface of the mother glass substrate 1110 , and etch stop layers 12 and 13 - 2 may be disposed on the other surface of the mother glass substrate 1110 . A circuit layer and an organic light emitting layer are disposed on the etch stop layers 12 and 13 - 2 , but are omitted for convenience of description. The mask 1120 and the etch stop layers 12 and 13 - 2 may be organic layers applied or adhered to the mother glass substrate 1110 . The etch stop layers 12 and 13 - 2 serve as an etch stopper in the etching process, and may be the organic layer 12 or the protective organic layer 13 - 2 according to the above-described embodiment. The mask 1120 may include an opening through which the glass is exposed to the etchant. The shape, thickness, spacing, etc. of the glass pattern may be determined according to the shape and spacing of the openings and the etching process time. The mask 1120 may be removed after the etching process.

In the present invention, the mother glass substrate 1110 can be etched by spraying an etchant on the mother glass substrate 1110 to which the mask 1120 is bonded or by placing the mother glass substrate 1110 in a tank containing the etching liquid by a deeping method. have.

The glass etchant is supplied to the mother glass substrate 1110 through the opening of the mask 1120 . The mother glass substrate 1110 exposed through the opening of the mask 1120 starts to be etched in response to the glass etchant as shown in FIG. 21A . As shown in (b) of FIG. 21 , the glass exposed to the etchant is etched to form an opening in the mother glass substrate 1110 , and as the etching process time elapses, the depth of the opening increases as shown in FIG. 21 ( c ). In the etching process, if the etching process time is longer, the etchant is applied between the mother glass substrate 1110 and the etch stop layer 50 and between the mother glass substrate 1110 and the mother glass substrate 1110 as shown in FIGS. 21 (d) and (e). Penetrating between the masks 1120 may form a tapered surface on the sidewall glass of the opening.

As the etching process time increases, a tapered surface begins to form on the edge of the mother glass substrate 1110 exposed to the etchant, and as the process time increases, the tapered surface becomes longer. When the lower surface of the glass substrate 10 is exposed to an etchant in the etching process, the thickness of the glass substrate 10 decreases and the tapered surface becomes longer. The etching process stops when the design glass substrate thickness and cross-section wedge shape are reached.

22 is a cross-sectional photograph of a tapered surface formed on a sidewall of the glass substrate 10 . 23 is a view showing various examples of wedge-type sidewalls of the glass substrate 10 . 23 is a cross-sectional photograph of a glass substrate showing a tapered surface when the substrate thickness is reduced by an etching process of the glass substrate 10 .

Referring to FIG. 22 , the sidewall of the glass substrate 10 may include a tapered surface. In other words, the thickness of the sidewall of the edge of the glass substrate 10 according to the embodiment may be smaller at the edge of the substrate than at the center of the substrate. That is, the edge thickness of the glass substrate 10 may be inversely proportional to the distance from the center. The shape of the sidewall of the edge of the substrate may vary as in the embodiment shown in FIG. 22 . The embodiments shown in FIG. 22 have a tapered surface that is vertically asymmetric with respect to the center of the thickness of the glass substrate 10 . The shape of the tapered surface is not limited thereto, and as shown in FIGS. 23 and 24 , it may be vertically symmetrical with respect to the center of the thickness of the glass substrate 10 .

23 and 24 , on the wedge-type sidewall of the glass substrate 10 , a vertical symmetric tapered surface 10w is formed with respect to the thickness center REF of the glass substrate 10 . As shown in the photograph of FIG. 24 , as the thickness of the glass substrate 10 decreases, the length L of the tapered surface 10w may increase. In other words, the length L of the tapered surface 10w may be in inverse proportion to the thickness of the glass substrate 10 .

25 is a block diagram illustrating an example of a display device according to an embodiment of the present invention. 26 is a block diagram illustrating an example of a display device according to another embodiment of the present invention. 27A and 27B are views illustrating an example in which the display device of FIG. 25 is folded. 28 is a block diagram schematically showing the configuration of a drive IC.

In the display device illustrated in FIG. 25 , the display panel 100 may be folded around the bending portion 100f between the first and second regions 101 and 102 . The first area 101 includes a pixel array of a screen on which an image is reproduced. The second region 102 does not include a pixel array. The drive IC 300 may be mounted on the second region 102 , and the second region 102 may be folded behind the first region 101 .

In the display device illustrated in FIG. 26 , the display panel 100 includes non-bending portions 101 and 102 that are folded around the bending portion 100f. In the display panel 100 , the bending portion 100f and the non-bending portions 101 and 102 may include a pixel array in which an input image is reproduced. As shown in FIG. 25 , in the display device, the entire screen of the display panel 100 is activated when the display panel 100 is unfolded to display an image on the maximum screen. When the display panel 100 is folded, a part of the screen may be activated to display an image on an active area smaller than the maximum screen, a black color may be displayed on the inactive area, or a previous image may be maintained.

25 to 28 , the display device includes a display panel 100 in which a pixel array is disposed on a screen, and a display panel driver.

The pixel array of the display panel 100 is defined by data lines DL, gate lines GL crossing the data lines DL, and data lines DL and gate lines GL. It includes pixels P arranged in a matrix form. The structure of the display panel 100 includes a circuit layer and a light emitting device layer stacked on the glass substrate 10 as in the above-described embodiments. The light emitting element layer includes a light emitting element of a pixel circuit.

The display panel 100 illustrated in FIG. 26 may be folded by the infolding method illustrated in FIG. 27A or the outfolding method illustrated in FIG. 27B . In the in-folding method, a screen on which an image is displayed is an inner surface that is folded in the display panel 100 . Accordingly, when the display panel 100 is folded in the in-folding method, the screen is not exposed to the outside. In the outfolding method, the display panel 100 is an outer surface of the display panel 100 exposed to the outside when the display panel 100 is folded as shown in FIG. 27B .

Each of the pixels P includes sub-pixels having different colors for color implementation. The sub-pixels include red (hereinafter referred to as “R sub-pixel”), green (hereinafter referred to as “G sub-pixel”), and blue (hereinafter referred to as “B sub-pixel”). Although not shown, each of the pixels P may further include a white sub-pixel. Hereinafter, a pixel may be interpreted as a sub-pixel unless otherwise defined. Each of the sub-pixels may include a pixel circuit.

The pixel circuit includes a light emitting device, a driving device for supplying current to the light emitting device, a plurality of switch devices for programming a conduction condition of the driving device and switching current paths between the driving device and the light emitting device, and a gate voltage of the driving device. It may include a capacitor to hold it.

The display panel driver writes the pixel data of the input image to the pixels P. The display panel driver includes a data driver 306 that supplies a data voltage of pixel data to the data lines DL, and a gate driver 120 that sequentially supplies a gate pulse to the gate lines GL. The data driver 306 may be integrated in the drive IC 300 .

The drive IC 300 may be attached to the display panel 100 . The drive IC 300 receives the pixel data of the input image and the timing signal from the host system 200 , supplies a data voltage of the pixel data to the pixels, and synchronizes the data driver 306 and the gate driver 120 .

The drive IC 300 is connected to the data lines DL1 to DL6 through data output channels to supply a voltage of a data signal to the data lines. The drive IC 300 may output a gate timing signal for controlling the gate driver 120 through the gate timing signal output channels. The gate timing signal generated from the timing controller 303 may include a gate start pulse (VST), a gate shift clock (CLK), and the like. The start pulse VST and the shift clock CLK swing between the gate-on voltage VGL and the gate-off voltage VGH. The gate timing signals VST and CLK output from the level shifter 307 are applied to the gate driver 120 to control the shift operation of the gate driver 120 .

The gate driver 120 may include a shift register formed in the circuit layer of the display panel 100 together with the pixel array. The shift register of the gate driver 120 sequentially supplies the gate signal to the gate lines GL under the control of the timing controller. The gate signal may include a scan pulse and an EM pulse of the emission signal. The shift register may include a scan driver outputting a scan pulse and an EM driver outputting an EM pulse. 27 , GVST and GCLK are gate timing signals input to the scan driver. EVST and ECLK are gate timing signals input to the EM driver.

The drive IC 300 may be connected to the host system 200 , the first memory 301 , and the display panel 100 . The drive IC 300 may include a data receiving and calculating unit 308 , a timing controller 303 , a data driving unit 306 , a gamma compensation voltage generating unit 305 , a power supply unit 304 , a second memory 302 , and the like. can

The data receiving and calculating unit 308 includes a receiving unit for receiving pixel data input as a digital signal from the host system 200 and a data calculating unit for improving image quality by processing the pixel data input through the receiving unit. The data operation unit may include a data restoration unit that decodes and restores compressed pixel data, an optical compensation unit that adds a preset optical compensation value to the pixel data, and the like. The optical compensation value may be set as a value for correcting the luminance of each pixel data based on the luminance of the screen measured based on the camera image captured in the manufacturing process.

The timing controller 303 provides pixel data of an input image received from the host system 200 to the data driver 306 . The timing controller 303 generates a gate timing signal for controlling the gate driver 120 and a source timing signal for controlling the data driver 306 to control the operation timings of the gate driver 120 and the data driver 306 . control

The data driver 306 converts the pixel data (digital signal) received from the timing controller 303 through a digital-to-analog converter (hereinafter referred to as “DAC”) into a gamma compensation voltage to a data signal DATA1 . ~DATA6) (hereinafter referred to as "data voltage") is output. The data voltage output from the data driver 306 is supplied to the data lines DL1 to DL6 of the pixel array through the output buffer Source AMP connected to the data channel of the drive IC 300 .

The gamma compensation voltage generator 305 divides the gamma reference voltage from the power supply 304 through a voltage divider circuit to generate a gamma compensation voltage for each gray level. The gamma compensation voltage is an analog voltage in which a voltage is set for each gray level of pixel data. The gamma compensation voltage output from the gamma compensation voltage generator 305 is provided to the data driver 306 .

The power supply unit 304 generates power required to drive the pixel array of the display panel 100 , the gate driver 120 , and the drive IC 300 using a DC-DC converter. The DC-DC converter may include a charge pump, a regulator, a buck converter, a boost converter, and the like. The power supply unit 304 adjusts the DC input voltage from the host system 200 to obtain a gamma reference voltage, a gate-on voltage (VGL). DC power such as a gate-off voltage VGH, a pixel driving voltage ELVDD, a low-potential power supply voltage ELVSS, and an initialization voltage Vini may be generated. The gamma reference voltage is supplied to the gamma compensation voltage generator 305 . The gate-on voltage VGL and the gate-off voltage VGH are supplied to the level shifter 307 and the gate driver 120 . Pixel power, such as the pixel driving voltage ELVDD, the low potential power voltage ELVSS, and the initialization voltage Vini, is commonly supplied to the pixels P. The initialization voltage Vini is set to a DC voltage lower than the pixel driving voltage ELVDD and lower than the threshold voltage of the light emitting device OLED to suppress light emission of the light emitting device OLED.

The second memory 302 stores a compensation value, register setting data, etc. received from the first memory 301 when power is input to the drive IC 300 . The compensation value can be applied to various algorithms that have improved image quality. The compensation value may include an optical compensation value. The register setting data defines operations of the data driver 306 , the timing controller 303 , and the gamma compensation voltage generator 305 . The first memory 301 may include a flash memory. The second memory 302 may include static RAM (SRAM).

The host system 200 may be implemented as an application processor (AP). The host system 200 may transmit pixel data of an input image to the drive IC 300 through a Mobile Industry Processor Interface (MIPI). The host system 200 may be connected to the drive IC 300 through a flexible printed circuit, for example, a flexible printed circuit (FPC).

The host system 200 may detect the folding and unfolding state of the display panel 100 illustrated in FIG. 25 using a sensor and sense a folding angle.

In the display device of the present invention, the pixel circuit and the gate driver may include a plurality of transistors. The transistors may be implemented as an oxide TFT (Thin Film Transistor) including an oxide semiconductor, an LTPS TFT including a Low Temperature Poly Silicon (LTPS), or the like. Each of the transistors may be implemented as a p-channel TFT or an n-channel TFT. In the embodiment, the description will be focused on an example in which the transistors of the pixel circuit are implemented as p-channel TFTs, but the present invention is not limited thereto.

A transistor is a three-electrode device including a gate, a source, and a drain. The source is an electrode that supplies a carrier to the transistor. In the transistor, carriers begin to flow from the source. The drain is an electrode through which carriers exit the transistor. In a transistor, the flow of carriers flows from source to drain. In the case of an n-channel transistor, the source voltage is lower than the drain voltage so that electrons can flow from the source to the drain because carriers are electrons. In an n-channel transistor, the direction of current flows from drain to source. In the case of a p-channel transistor (PMOS), since carriers are holes, the source voltage is higher than the drain voltage so that holes can flow from the source to the drain. In a p-channel transistor, current flows from the source to the drain because holes flow from the source to the drain. It should be noted that the source and drain of the transistor are not fixed. For example, the source and drain may be changed according to an applied voltage. Accordingly, the invention is not limited by the source and drain of the transistor. In the following description, the source and drain of the transistor will be referred to as first and second electrodes.

The gate pulse swings between a gate on voltage and a gate off voltage. The gate-on voltage is set to a voltage higher than the threshold voltage of the transistor, and the gate-off voltage is set to a voltage lower than the threshold voltage of the transistor. The transistor is turned on in response to the gate-on voltage, while turned off in response to the gate-off voltage. In the case of an n-channel transistor, the gate-on voltage may be a gate high voltage (VGH), and the gate-off voltage may be a gate low voltage (VGL). In the case of the p-channel transistor, the gate-on voltage may be the gate low voltage VGL, and the gate-off voltage may be the gate high voltage VGH.

A driving element in each of the pixels may be implemented as a transistor. Although the driving device should have uniform electrical characteristics among all pixels, there may be differences between pixels due to process variations and device characteristics variations and may change with the lapse of display driving time. In order to compensate for the deviation in the electrical characteristics of the driving element, the display device may include an internal compensation circuit and an external compensation circuit. The internal compensation circuit is added to the pixel circuit in each of the sub-pixels to sample the threshold voltage (Vth) and/or mobility (μ) of the driving device that change according to the electrical characteristics of the driving device, and compensate for the change in real time. The external compensation circuit transmits the threshold voltage and/or mobility of the driving device sensed through a sensing line connected to each of the sub-pixels to an external compensator. The compensator of the external compensation circuit compensates for changes in electrical characteristics of the driving element by modulating pixel data of the input image by reflecting the sensing result. The voltage of the pixel that changes according to the electrical characteristics of the external compensation driving element is sensed, and the electric characteristic deviation of the driving element between pixels is compensated by modulating the input image data in an external circuit based on the sensed voltage.

29 is a circuit diagram illustrating an example of a pixel circuit. FIG. 29 is a diagram illustrating a method of driving the pixel circuit shown in FIG. 28 . The pixel circuit applicable to the present invention is not limited to FIGS. 29 and 30 .

29 and 30 , the pixel circuit is a driving device using a light emitting device OLED, a driving device DT for supplying current to the light emitting device OLED, and a plurality of switch devices M1 to M6 . and an internal compensation circuit for sampling the threshold voltage Vth of DT and compensating for the gate voltage of the driving device DT by the threshold voltage Vth of the driving device DT. Each of the driving element DT and the switch elements M1 to M6 may be implemented as a p-channel TFT.

The driving period of the pixel circuit using the internal compensation circuit may be divided into an initialization period Tini, a sampling period Tsam, a data writing period Twr, and a light emission period Tem.

During the initialization period Tini, the N-1 th scan signal [SCAN(N-1)] is generated as a pulse of the gate-on voltage VGL, and the N-th scan signal [SCAN(N)] and the light emission signal [EM( N)] each voltage is the gate-off voltage VGH. During the sampling period (Tsam), the N-th scan signal [SCAN(N)] is generated as a pulse of the gate-on voltage (VGL), and the N-1th scan signal [SCAN(N-1)] and the emission signal [EM( N)] each voltage is the gate-off voltage VGH. During the data writing period Twr, voltages of the N-1 th scan signal [SCAN(N-1)], the N-th scan signal [SCAN(N)], and the light emission signal [EM(N)] are respectively a gate-off voltage (VGH). The emission signal EM(N) is generated as the gate-on voltage VGL during at least a part of the emission period Tem, and the N-1th scan signal SCAN(N-1) and the Nth scan signal SCAN (N)] Each voltage is generated as a gate-off voltage VGH.

During the initialization period Tin, the fifth and sixth switch elements M5 and M6 are turned on according to the gate-on voltage VGL of the N-1 th scan signal SCAN(N-1) to turn on the pixel circuit to initialize During the sampling period Tsam, the first and second switch elements M1 and M2 are turned on according to the gate-on voltage VGL of the N-th scan signal SCAN(N) so that the driving element DT is turned on. The threshold voltage is sampled and stored in the capacitor Cst. During the data writing period Twr, the first to sixth switch elements M1 to M6 maintain an off state. During the light emission period Tem, the third and fourth switch elements M1 and M2 are turned on to emit light. In the light emission period Tem, the light emission signal [EM(N)] is the gate-on voltage (VGL) in order to precisely express the luminance of the low grayscale as the duty ratio of the light emission signal [EM(N)]. The third and fourth switch elements M1 and M2 may repeatedly turn on/off by swinging at a predetermined duty ratio between the gate-off voltage VGH.

The light emitting device OLED may be implemented as an organic light emitting diode or as an inorganic light emitting diode. Hereinafter, an example in which the light emitting device (OLED) is implemented as an organic light emitting diode will be described.

The light emitting device OLED may include an organic compound layer formed between an anode and a cathode. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL) and an electron injection layer (Electron Injection layer, EIL), but is not limited thereto. When a voltage is applied to the anode and cathode of the OLED, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) are moved to the light emitting layer (EML), excitons are formed, and visible light is emitted from the light emitting layer (EML). .

The anode of the light emitting element OLED is connected to the fourth node n4 between the fourth and sixth switch elements M4 and M6. The fourth node n4 is connected to the anode of the light emitting element OLED, the second electrode of the fourth switch element M4, and the second electrode of the sixth switch element M6. The cathode of the light emitting device OLED is connected to the VSS electrode PL3 to which the low potential power voltage VSS is applied. The light emitting device OLED emits light with a current Ids flowing according to the gate-source voltage Vgs of the driving device DT. A current path of the light emitting element OLED is switched by the third and fourth switch elements M3 and M4.

The storage capacitor Cst is connected between the VDD line PL1 and the first node n1. The data voltage Vdata compensated by the threshold voltage Vth of the driving element DT is charged in the storage capacitor Cst. Since the data voltage Vdata in each of the sub-pixels is compensated by the threshold voltage Vth of the driving device DT, the characteristic deviation of the driving device DT in the sub-pixels is compensated.

The first switch element M1 is turned on in response to the gate-on voltage VGL of the N-th scan pulse SCAN(N) to connect the second node n2 and the third node n3. The second node n2 is connected to the gate of the driving element DT, the first electrode of the storage capacitor Cst, and the first electrode of the first switch element M1 . The third node n3 is connected to the second electrode of the driving element DT, the second electrode of the first switch element M1, and the first electrode of the fourth switch element M4. The gate of the first switch element M1 is connected to the first gate line GL1 to receive the N-th scan pulse SCAN(N). The first electrode of the first switch element M1 is connected to the second node n2 , and the second electrode of the first switch element M1 is connected to the third node n3 .

The second switch element M2 is turned on in response to the gate-on voltage VGL of the N-th scan pulse SCAN(N) to supply the data voltage Vdata to the first node n1 . The gate of the second switch element M2 is connected to the first gate line GL1 to receive the N-th scan pulse SCAN(N). The first electrode of the second switch element M2 is connected to the first node n1. The second electrode of the second switch element M2 is connected to the data line DL to which the data voltage Vdata is applied. The first node n1 is connected to the first electrode of the second switch element M2 , the second electrode of the third switch element M3 , and the first electrode of the driving element DT.

The third switch element M3 is turned on in response to the gate-on voltage VGL of the light emitting signal EM(N) to connect the VDD line PL1 to the first node n1 . The gate of the third switch element M3 is connected to the third gate line GL3 to receive the light emission signal EM(N). The first electrode of the third switch element M3 is connected to the VDD line PL1. The second electrode of the third switch element M3 is connected to the first node n1 .

The fourth switch element M4 is turned on in response to the gate-on voltage VGL of the light emitting signal EM(N) to connect the third node n3 to the anode of the light emitting element OLED. The gate of the fourth switch element M4 is connected to the third gate line GL3 to receive the light emission signal EM(N). The first electrode of the fourth switch element M4 is connected to the third node n3 , and the second electrode is connected to the fourth node n4 .

The fifth switch element M5 is turned on in response to the gate-on voltage VGL of the N-1 th scan pulse [SCAN(N-1)] to connect the second node n2 to the Vini line PL2 do. The gate of the fifth switch element M5 is connected to the second gate line GL2 to receive the N-1th scan pulse SCAN(N-1). The first electrode of the fifth switch element M5 is connected to the second node n2 , and the second electrode is connected to the Vini line PL2 .

The sixth switch element M6 is turned on in response to the gate-on voltage VGL of the N-1 th scan pulse SCAN(N-1) to connect the Vini line PL2 to the fourth node n4. do. The gate of the sixth switch element M6 is connected to the second gate line GL2 to receive the N-1th scan pulse SCAN(N-1). A first electrode of the sixth switch element M6 is connected to the Vini line PL2 , and a second electrode of the sixth switch element M6 is connected to the fourth node n4 .

The driving device DT drives the light emitting device OLED by controlling the current Ids flowing through the light emitting device OLED according to the gate-source voltage Vgs. The driving element DT includes a gate connected to the second node n2 , a first electrode connected to the first node n1 , and a second electrode connected to the third node n3 .

During the initialization period Tini, the N-1 th scan pulse SCAN(N-1) is generated as the gate-on voltage VGL. The N-th scan pulse SCAN(N) and the emission signal EM(N) maintain the gate-off voltage VGH during the initialization period Tini. Accordingly, during the initialization period Tini, the fifth and sixth switch elements M5 and M6 are turned on, and the second and fourth nodes n2 and n4 are initialized to Vini. A hold period Th may be set between the initialization period Tini and the sampling period Tsam. In the hold period Th, the gate pulses SCAN(N-1), SCAN(N), EM(N) maintain their previous states.

During the sampling period Tsam, the N-th scan pulse SCAN(N) is generated as the gate-on voltage VGL. The pulse of the Nth scan pulse SCAN(N) is synchronized with the data voltage Vdata of the Nth pixel line. The N-1th scan pulse SCAN(N-1) and the emission signal EM(N) maintain the gate-off voltage VGH during the sampling period Tsam. Accordingly, the first and second switch elements M1 and M2 are turned on during the sampling period Tsam.

During the sampling period Tsam, the gate voltage DTG of the driving element DT is increased by the current flowing through the first and second switch elements M1 and M2. Since the driving element DT is turned off when the driving element DT is turned off, the gate node voltage DTG is Vdata - |Vth|. At this time, the voltage of the first node n is also Vdata - |Vth|. In the sampling period Tsam, the gate-source voltage Vgs of the driving element DT is |Vgs| = Vdata -(Vdata-|Vth|) = |Vth|

During the data writing period Twr, the N-th scan pulse SCAN(N) is inverted to the gate-off voltage VGH. The N-1th scan pulse SCAN(N-1) and the emission signal EM(N) maintain the gate-off voltage VGH during the data writing period Twr. Accordingly, all the switch elements M1 to M6 maintain an off state during the data writing period Twr.

During the emission period Tem, the emission signal EM(N) may be generated as a gate-off voltage VGH. During the light emission period Tem, the light emission signal EM(N) is turned on/off at a predetermined duty ratio in order to improve low grayscale expression power to swing between the gate-on voltage VGL and the gate-off voltage VGH. can do. Accordingly, the emission signal EM(N) may be generated as the gate-on voltage VGL during at least a part of the emission period Tem.

When the light emitting signal EM(N) is the gate-on voltage VGL, a current flows between the ELVDD and the light emitting device OLED so that the light emitting device OLED may emit light. During the light emission period Tem, the N-1 th and N th scan pulses SCAN(N-1) and SCAN(N) maintain the gate-off voltage VGH. During the light emission period Tem, the third and fourth switch elements M3 and M4 are repeatedly turned on/off according to the voltage of the light emission signal EM. When the light emitting signal EM(N) is the gate-on voltage VGL, the third and fourth switch elements M3 and M4 are turned on so that a current flows through the light emitting element OLED. At this time, Vgs of the driving element DT is |Vgs| = ELVDD - (Vdata-|Vth|), and the current flowing through the light emitting device OLED is K(ELVDD-Vdata)2. K is a constant value determined by the charge mobility, parasitic capacitance, and channel capacitance of the driving element DT.

31 is a cross-sectional view illustrating in detail a cross section of the display panel 100 according to an embodiment of the present invention. It should be noted that the cross-sectional structure of the display panel 100 shown in FIG. 31 is only an example, and the present invention is not limited thereto.

Referring to FIG. 31 , a circuit layer, a light emitting device layer, an encapsulation layer, and the like may be stacked on the glass substrate GLS as described above.

A first buffer layer BUF1 may be formed on the glass substrate GLS. A first metal layer LC may be formed on the first buffer layer BUF1 , and a second buffer layer BUF2 may be formed on the first metal layer LS. Each of the first and second buffer layers BUF1 and BUF2 may be formed of an inorganic insulating material and may include one or more insulating layers. The first metal layer LS may include a metal pattern disposed under the TFT to block light irradiated to the semiconductor channel layer of the TFT.

An active layer ACT may be formed on the first buffer layer BUF2 . The active layer ACT includes semiconductor patterns of TFTs of the pixel circuit and TFTs of the gate driver. When the TFT is implemented as an oxide TFT, the semiconductor pattern may include indium gallium zinc oxide (IGZO).

A gate insulating layer GI may be formed on the active layer ACT. The gate insulating film GI is an insulating layer made of an inorganic insulating material. A second metal layer GATE may be formed on the second gate insulating layer GI. The second metal layer GATE may include a gate electrode of the TFT and a gate line connected to the gate electrode.

The first interlayer insulating layer ILD1 may cover the second metal layer GATE. A third metal layer TM may be formed on the first interlayer insulating layer ILD2 , and the second interlayer insulating layer ILD2 may cover the third metal layer TM. The capacitor Cst of the pixel circuit may be formed in a portion where the second metal layer GATE, the first interlayer insulating layer ILD1, and the third metal layer TM overlap. The first and second interlayer insulating layers ILD1 and ILD2 may include an inorganic insulating material.

A fourth metal layer SD1 may be formed on the second interlayer insulating layer ILD2 , and an inorganic insulating layer PAS1 and a first planarization layer PLN1 may be stacked thereon. A fifth metal layer SD2 may be formed on the first planarization layer PLN2 . A partial pattern of the fifth metal layer SD2 may be connected to the fourth metal layer SD1 through a contact hole penetrating the first planarization layer PLN1 and the inorganic insulating layer PAS1 . The first and second planarization layers PLN1 and PLN2 are made of an organic insulating material for flattening surfaces.

The fourth metal layer SD1 may include first and second electrodes of the TFT connected to the semiconductor pattern of the TFT through a contact hole penetrating the second interlayer insulating layer ILD2 . The data line DL and the power lines PL1 and PL2 may be implemented by patterning the fourth metal layer SD1 or the fifth metal layer SD2 .

The anode electrode AND of the light emitting device OLED may be formed on the second planarization layer PLN2 . The anode electrode AND may be connected to an electrode of the TFT used as a switch element or a driving element through a contact hole passing through the second planarization layer PLN2 . The anode electrode AND may be made of a transparent or semi-transparent electrode material.

The pixel defining layer BNK may cover the anode electrode AND of the light emitting device OLED. The pixel defining layer BNK is formed in a pattern defining a light emitting area (or an opening area) through which light passes from each of the pixels to the outside. A spacer SPC may be formed on the pixel defining layer BNK. The pixel defining layer BNK and the spacer SPC may be integrated with the same organic insulating material. The spacer SPC secures a gap between the FMM and the anode AND so that the fine metal mask (FMM) does not come into contact with the anode AND during the deposition process of the organic compound EL.

The organic compound EL is formed in the light emitting area of each of the pixels defined by the pixel defining layer BNK. The cathode electrode CAT of the light emitting element OLED is formed on the entire surface of the display panel 100 to cover the pixel defining layer BNK, the spacer SPC, and the organic compound EL. The cathode electrode CAT may be connected to the VSS electrode PL3 formed of any one of the lower metal layers. The capping layer CPL may cover the cathode electrode CAT. The capping layer (CPL) is formed of an inorganic insulating material for the cathode electrode (CAT) to block the penetration of air and out gassing of the organic insulating material applied on the capping layer (CPL) to the cathode electrode ( CAT) is protected. The inorganic insulating layer PAS2 may cover the capping layer CPL, and a planarization layer PCL may be formed on the inorganic insulating layer PAS2 . The planarization layer PCL may include an organic insulating material. An inorganic insulating layer PAS2 of the encapsulation layer may be formed on the planarization layer PCL.

It should be noted that the embodiments of the present invention may be applied alone or combinations of embodiments are possible.

Since the contents of the specification described in the problems, problem solving means, and effects to be solved above do not specify essential features of the claims, the scope of the claims is not limited by the matters described in the contents of the specification.

Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be made within the scope without departing from the technical spirit of the present invention. . Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. The protection scope of the present invention should be construed by the claims, and all technical ideas within the scope equivalent thereto should be construed as being included in the scope of the present invention.

10, GLS: glass substrate 12: organic film
13-1: partial organic film 13-2: protective organic film
14: circuit layer 16: light emitting element layer
18: encapsulation layer 19: adhesive
20: polarizer 22: cover window
30: coating layer 100: display panel
100f: bending part 101, 102, 103: non-bending part
1000: led board 1000c: cutting line
1000f: bending lines 1001, 1002: non-folding part formation area
1100: cell 1110: ledger glass substrate
1120: mask

Claims (20)

a glass substrate having a plurality of cutting lines;
an organic layer disposed on the glass substrate to overlap the plurality of cutting lines; and
A mother substrate including a plurality of cells spaced apart from each other on the glass substrate with the cutting line interposed therebetween. The method of claim 1,
The organic layer is disposed to overlap the plurality of cells and the plurality of cutting lines. 3. The method of claim 2,
The glass substrate further includes at least one bending line set in each of the plurality of cells,
The organic film is
a first organic layer disposed on the glass substrate to overlap the cutting line between the plurality of cells; and
and a second organic layer disposed on the glass substrate to overlap the at least one bending line. The method of claim 1,
Each of the cells is
a circuit layer disposed on the glass substrate to drive pixels;
a first electrode disposed on the circuit layer, a bank disposed on the first electrode to define an emission region, an organic compound layer disposed on the first electrode in the emission region, and a first electrode disposed on the organic compound layer a light emitting device layer including two electrodes;
an encapsulation layer covering the light emitting device layer; and
and a polarizing plate disposed on the encapsulation layer,
The organic layer is disposed between the glass substrate and the circuit layer, and the organic layer and the bank include the same material. 5. The method of claim 4,
A mother substrate in which the organic layer and the polarizing plate are sequentially stacked on a glass substrate between adjacent cells so as to overlap the plurality of cutting lines. 4. The method of claim 3,
The first organic layer and the second organic layer include a polyimide layer. 4. The method of claim 3,
The glass substrate is
a first opening exposing the first organic layer at a position overlapping the plurality of cutting lines; and
a second opening exposing the second organic layer at a position overlapping the at least one bending line;
A mother substrate having a coating layer disposed on a rear surface of the glass substrate and at least a portion of the first and second openings. glass substrate;
a circuit layer disposed on the glass substrate to drive pixels;
a light emitting device layer disposed on the circuit layer and including a light emitting device including a first electrode, an organic compound layer disposed on the first electrode, and a second electrode disposed on the organic compound layer;
an encapsulation layer covering the circuit layer and the light emitting device layer;
a polarizing plate disposed on the encapsulation layer; and
A display panel comprising an organic layer disposed on the glass substrate. 9. The method of claim 8,
Further comprising a bank disposed on the first electrode to define a light emitting area,
The organic layer and the bank include the same material. 9. The method of claim 8,
The display panel further includes at least one bending line through which the display panel is folded,
The organic film is
a first organic layer disposed on an edge of the glass substrate; and
and a second organic layer disposed on the glass substrate to overlap the at least one bending line. 11. The method of claim 10,
The glass substrate includes an opening exposing the second organic layer in a region overlapping the at least one bending line. 12. The method of claim 11,
A coating layer is disposed on a rear surface of the glass substrate and at least a portion of the opening. 9. The method of claim 8,
The edge sidewall of the glass substrate includes a wedge-shaped tapered surface symmetrical up and down, and the thickness is thinner toward an end of the sidewall. 14. The method of claim 13,
A display panel in which the tapered surface protrudes out of the circuit layer. 14. The method of claim 13,
A length of the tapered surface is in inverse proportion to a thickness of the glass substrate. A method of manufacturing a display panel from a plurality of cells disposed on a mother glass substrate including an organic layer, the method comprising:
setting a cutting line between the plurality of cells;
forming a mask formed on one surface of the mother glass substrate to cover an area other than the cutting line;
forming a first opening by etching the mother glass substrate exposed through the mask;
removing the mask; and
and separating the plurality of cells by cutting the organic layer by irradiating a laser to the organic layer overlapping the cutting line. 17. The method of claim 16,
In the step of setting a cutting line between the plurality of cells
at least one bending line on which the display panel is folded is set in each of the plurality of cells;
and forming the mask so as not to cover the at least one bending line in the forming of the mask, and etching the mother glass substrate exposed through the mask to form a second opening. 18. The method of claim 17,
The organic film is
a first organic layer disposed on the mother glass substrate to overlap the cutting line between the plurality of cells; and
and a second organic layer disposed on the mother glass substrate to overlap the at least one bending line. 17. The method of claim 16,
After removing the mask, further comprising the step of forming a coating layer on the other surface of the mother glass substrate,
A method of manufacturing a display panel for cutting the coating layer by irradiating the laser in the step of separating the plurality of cells. 17. The method of claim 16,
The method of manufacturing a display panel, wherein the etching of the mother glass substrate includes wet etching.

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