KR20210136819A - An interposer structure and an electronic device including the same - Google Patents

Abstract

The present invention relates to an interposer structure and an electronic device including the same, which allow high-density mounting of electronic components and can reduce manufacturing costs and manufacturing processors. According to one embodiment of the present invention, the interposer structure comprises: an insulation layer including at least one penetration hole; a first solder resist layer positioned on at least one area of the top surface of the insulation layer, and including at least one first opening formed on an area corresponding to the at least one penetration hole; a second solder resist layer positioned on at least one area of the bottom surface of the insulation layer, and including at least one second opening formed on an area corresponding to the at least one penetration hole; at least one conductive via positioned in the at least one penetration hole, and including a first protruding portion formed by protruding toward the at least one first opening, and a second protruding portion formed by protruding toward the at least one second opening; first presolder arranged on the top of the first protruding portion of the at least one conductive via; and second presolder arranged on the bottom of the second protruding portion of the at least one conductive via.

Description

Interposer structure and electronic device including same

Various embodiments of the present disclosure relate to an interposer structure and an electronic device including the same.

While the size of electronic devices is gradually becoming smaller, as the functions of electronic devices are diversified, electronic components (eg, processors, communication circuits, and/or memories) for performing various functions of the electronic devices may be arranged in high density. It has become important to secure a space that can be used.

Recently, an increasing number of electronic devices form a stacked structure of a plurality of printed circuit boards using an interposer in order to secure a space in which electronic components can be disposed. For example, an electronic device stacks a plurality of printed circuit boards, and disposes an interposer including at least one via for electrically connecting the printed circuit boards between the stacked printed circuit boards. It is possible to secure a space where parts can be placed.

In order to stack a plurality of printed circuit boards using an interposer, it is necessary to securely fix a plurality of printed circuit boards to upper and/or lower portions of the interposer.

In order to firmly fix the plurality of printed circuit boards, lands are formed on the upper and/or lower ends of at least one via passing through the interposer, and then the plurality of printed circuits are formed using presolder seated on the lands. The number of electronic devices to which a structure for fixing (or "soldering") substrates to an interposer is applied has gradually increased.

However, in the case of the above-described structure, it is necessary to separate a pitch between the vias by a specified distance or more in order to secure a space in which a land can be formed at an upper end and/or a lower end of at least one via. In order to maintain an electrical connection state between electronic components, the distance between electronic components must also be spaced apart to correspond to the distance between vias. It can be difficult to mount.

In addition, the conventional interposer primarily plated the inside of a hole (or "via hole") formed in a printed circuit board (PCB), and a dielectric material (eg, PSR ink (photo imageable ink) inside the plated hole) solder resist mask ink)) to form vias, and secondary plating on the top, bottom, and/or side of the printed circuit board (PCB) to form land and side plating parts. It was common to be That is, as the conventional interposer is manufactured through a process of additionally plating a printed circuit board to form a land in addition to a process of plating a printed circuit board to form a via, the manufacturing process is lengthened and the manufacturing cost is increased, As a result, the reliability of the manufactured product may be reduced, or defects may occur in the manufacturing process.

According to the present disclosure, a structure in which no land is formed (or "landless structure") is applied to the top and/or bottom of the printed circuit board (PCB), thereby enabling high-density mounting of electronic components as well as Rather, it is an object of the present invention to provide an interposer structure capable of reducing manufacturing cost and manufacturing process, and an electronic device including the same.

The technical problems to be achieved in the present disclosure are not limited to the technical problems mentioned above, and other technical problems not mentioned can be clearly understood by those of ordinary skill in the art to which the present invention belongs from the description below. There will be.

The interposer structure according to an embodiment of the present disclosure includes an insulating layer including at least one through-hole, located in at least one region of an upper surface of the insulating layer, and formed in a region corresponding to the at least one through-hole. A first solder resist layer including at least one first opening, located in at least one region of a lower end surface of the insulating layer, and formed in a region corresponding to the at least one through hole A second solder resist layer including two openings, at least one conductive via positioned in the at least one through hole, and the at least one conductive via are formed to protrude in a direction of the at least one first opening. a first protruding portion including a first protruding portion and a second protruding portion protruding in a direction of the at least one second opening; It may include a solder (presolder) and a second presolder disposed at a lower end of the second protruding portion of the at least one conductive via.

An interposer structure according to another embodiment of the present disclosure includes an insulating layer including at least one through-hole and a slot, located in at least one region of an upper surface of the insulating layer, and corresponding to the at least one through-hole A first solder resist layer including at least one first opening formed in a region of the first solder resist layer and at least one second opening formed in a region corresponding to at least one region of the slot, at least one region of a lower end surface of the insulating layer and a second solder resist layer including at least one third opening formed in an area corresponding to the at least one through hole and at least one fourth opening formed in an area corresponding to at least one area of the slot ; a second protruding portion protruding in a direction of the at least one third opening; a second conductive via positioned in the slot and formed to have a second height lower than the first height; and a first presolder disposed on an upper end of the second conductive via, and a second presolder disposed on a lower end of the first conductive via and the second conductive via.

An electronic device according to an embodiment of the present disclosure includes a first printed circuit board, a second printed circuit board spaced apart from the first printed circuit board, and facing at least one surface of the first printed circuit board, and the first printed circuit board at least one electronic component disposed on a circuit board or the second printed circuit board, and located between the first printed circuit board and the second printed circuit board, and between the first printed circuit board and the second printed circuit board. an interposer disposed to surround a space, wherein the interposer includes a first surface facing the first printed circuit board and a second surface facing the second printed circuit board, the first surface and the An insulating layer including at least one through hole formed through the second surface. A first solder resist layer disposed on at least one region of the first surface of the insulating layer and including a first opening formed in a region corresponding to the at least one through hole. A second solder resist layer disposed in at least one region of the second surface of the insulating layer, the second solder resist layer having a second opening formed in a region corresponding to the at least one through hole, and located inside the at least one through hole , a first protruding portion protruding from the first surface of the insulating layer to the first solder resist layer and a second protruding portion protruding from the second surface of the insulating layer to the second solder resist layer and a first conductive via including: , wherein the first printed circuit board may be electrically connected to the second printed circuit board through the first conductive via.

The interposer structure according to various embodiments of the present disclosure does not form a land, thereby reducing a pitch between conductive vias, and as a result, printing disposed on the upper and/or lower portions of the interposer structure Electronic components can be mounted on a circuit board with high density.

The interposer structure according to various embodiments of the present disclosure may omit a plating process for generating a land, thereby reducing manufacturing cost.

Since the interposer structure according to various embodiments of the present disclosure may simplify a manufacturing process (eg, omit a side plating process), manufacturing efficiency may be improved.

1 is a block diagram of an electronic device in a network environment according to various embodiments of the present disclosure;
2 is a perspective view illustrating a front surface of an electronic device according to an exemplary embodiment.
3 is a perspective view illustrating a rear surface of the electronic device of FIG. 2 .
4 is an exploded perspective view of an electronic device according to an exemplary embodiment.
5 is an exploded view and a combined view of a printed circuit board structure according to an embodiment.
6 is an enlarged view of an interposer structure and a region A of the interposer structure according to an exemplary embodiment.
7 is a cross-sectional view of the interposer structure of FIG. 6 taken along II'.
8 is a flowchart illustrating an operation of manufacturing an interposer structure according to an exemplary embodiment.
9A is a view for explaining an operation of forming at least one through hole in a printed circuit board, according to an exemplary embodiment.
9B is a diagram for describing an operation of filling at least one through hole with a conductive material and planarizing a printed circuit board, according to an exemplary embodiment.
9C is a diagram for describing an operation of etching a printed circuit board, according to an exemplary embodiment.
FIG. 9D is a diagram for explaining an operation of forming a solder resist layer on an upper surface and/or a lower surface of a printed circuit board, according to an embodiment.
9E is a diagram for explaining an operation of forming a presolder, according to an exemplary embodiment.
10 is an enlarged view of an interposer structure and a region B of the interposer structure according to another embodiment.
11A is a cross-sectional view of the interposer structure of FIG. 10 taken in the II' direction.
11B is a cross-sectional view of the interposer structure of FIG. 10 taken in the II-II' direction.
11C is a cross-sectional view of the interposer structure of FIG. 10 taken in the III-III' direction.
11D is a diagram illustrating a state in which a solder resist layer and/or pre-solder are removed from the interposer structure of FIG. 10 .
12 is a flowchart illustrating an operation of manufacturing an interposer structure according to another exemplary embodiment.
13A is a diagram for describing an operation of forming at least one through hole and/or a slot in a printed circuit board, according to an exemplary embodiment.
13B is a diagram for describing an operation of filling at least one through hole and/or slot with a conductive material and planarizing the printed circuit board, according to an embodiment.
13C is a diagram for describing an operation of etching a printed circuit board, according to an exemplary embodiment.
13D is a view for explaining an operation of forming a solder resist layer on an upper surface and/or a lower surface of a printed circuit board, according to an embodiment.
13E is a diagram for explaining an operation of forming a presolder, according to an exemplary embodiment.
14 is an enlarged view of an interposer structure and a region C of the interposer structure according to another embodiment.
15A is a cross-sectional view taken along II′ of the interposer structure of FIG. 14 , according to an exemplary embodiment.
15B is a cross-sectional view taken along II′ of the interposer structure of FIG. 14 according to another embodiment.
16 is a flowchart illustrating an operation of manufacturing an interposer structure according to another exemplary embodiment.
17A is a view for explaining an operation of forming at least one through hole in a printed circuit board, according to an exemplary embodiment.
17B is a diagram for explaining an operation of plating the inside of at least one through hole and/or a side surface of an insulating layer, according to an embodiment.
17C is a diagram for describing an operation of filling at least one through hole with a conductive material and planarizing a printed circuit board, according to an exemplary embodiment.
17D is a diagram for describing an operation of etching a printed circuit board, according to an exemplary embodiment.
17E is a diagram for explaining an operation of forming a solder resist layer on an upper surface and/or a lower surface of a printed circuit board, according to an embodiment.
17F is a diagram for explaining an operation of forming a presolder, according to an exemplary embodiment.

1 is a block diagram of an electronic device 101 in a network environment 100 according to various embodiments.

Referring to FIG. 1 , in a network environment 100 , an electronic device 101 communicates with an electronic device 102 through a first network 198 (eg, a short-range wireless communication network) or a second network 199 . It may communicate with the electronic device 104 or the server 108 through (eg, a long-distance wireless communication network). According to an embodiment, the electronic device 101 may communicate with the electronic device 104 through the server 108 . According to an embodiment, the electronic device 101 includes a processor 120 , a memory 130 , an input module 150 , a sound output module 155 , a display module 160 , an audio module 170 , and a sensor module ( 176), interface 177, connection terminal 178, haptic module 179, camera module 180, power management module 188, battery 189, communication module 190, subscriber identification module 196 , or an antenna module 197 . In some embodiments, at least one of these components (eg, the connection terminal 178 ) may be omitted or one or more other components may be added to the electronic device 101 . In some embodiments, some of these components (eg, sensor module 176 , camera module 180 , or antenna module 197 ) are integrated into one component (eg, display module 160 ). can be

The processor 120, for example, executes software (eg, the program 140) to execute at least one other component (eg, a hardware or software component) of the electronic device 101 connected to the processor 120 . It can control and perform various data processing or operations. According to one embodiment, as at least part of data processing or operation, the processor 120 converts commands or data received from other components (eg, the sensor module 176 or the communication module 190 ) to the volatile memory 132 . may be stored in the volatile memory 132 , and may process commands or data stored in the volatile memory 132 , and store the result data in the non-volatile memory 134 . According to an embodiment, the processor 120 is the main processor 121 (eg, a central processing unit or an application processor) or a secondary processor 123 (eg, a graphic processing unit, a neural network processing unit) a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, when the electronic device 101 includes the main processor 121 and the sub-processor 123 , the sub-processor 123 uses less power than the main processor 121 or is set to be specialized for a specified function. can The auxiliary processor 123 may be implemented separately from or as a part of the main processor 121 .

The auxiliary processor 123 may be, for example, on behalf of the main processor 121 while the main processor 121 is in an inactive (eg, sleep) state, or when the main processor 121 is active (eg, executing an application). ), together with the main processor 121, at least one of the components of the electronic device 101 (eg, the display module 160, the sensor module 176, or the communication module 190) It is possible to control at least some of the related functions or states. According to an embodiment, the coprocessor 123 (eg, an image signal processor or a communication processor) may be implemented as part of another functionally related component (eg, the camera module 180 or the communication module 190). have. According to an embodiment, the auxiliary processor 123 (eg, a neural network processing device) may include a hardware structure specialized for processing an artificial intelligence model. Artificial intelligence models can be created through machine learning. Such learning may be performed, for example, in the electronic device 101 itself on which artificial intelligence is performed, or may be performed through a separate server (eg, the server 108). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but in the above example not limited The artificial intelligence model may include a plurality of artificial neural network layers. Artificial neural networks include deep neural networks (DNNs), convolutional neural networks (CNNs), recurrent neural networks (RNNs), restricted boltzmann machines (RBMs), deep belief networks (DBNs), bidirectional recurrent deep neural networks (BRDNNs), It may be one of deep Q-networks or a combination of two or more of the above, but is not limited to the above example. The AI model may include, in addition to, or alternatively, a software structure in addition to the hardware structure.

The memory 130 may store various data used by at least one component (eg, the processor 120 or the sensor module 176 ) of the electronic device 101 . The data may include, for example, input data or output data for software (eg, the program 140 ) and instructions related thereto. The memory 130 may include a volatile memory 132 or a non-volatile memory 134 .

The program 140 may be stored as software in the memory 130 , and may include, for example, an operating system 142 , middleware 144 , or an application 146 .

The input module 150 may receive a command or data to be used by a component (eg, the processor 120 ) of the electronic device 101 from the outside (eg, a user) of the electronic device 101 . The input module 150 may include, for example, a microphone, a mouse, a keyboard, a key (eg, a button), or a digital pen (eg, a stylus pen).

The sound output module 155 may output a sound signal to the outside of the electronic device 101 . The sound output module 155 may include, for example, a speaker or a receiver. The speaker can be used for general purposes such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from or as part of the speaker.

The display module 160 may visually provide information to the outside (eg, a user) of the electronic device 101 . The display module 160 may include, for example, a control circuit for controlling a display, a hologram device, or a projector and a corresponding device. According to an embodiment, the display module 160 may include a touch sensor configured to sense a touch or a pressure sensor configured to measure the intensity of a force generated by the touch.

The audio module 170 may convert a sound into an electric signal or, conversely, convert an electric signal into a sound. According to an embodiment, the audio module 170 acquires a sound through the input module 150 or an external electronic device (eg, a sound output module 155 ) directly or wirelessly connected to the electronic device 101 . The electronic device 102) (eg, a speaker or headphones) may output a sound.

The sensor module 176 detects an operating state (eg, power or temperature) of the electronic device 101 or an external environmental state (eg, user state), and generates an electrical signal or data value corresponding to the sensed state. can do. According to an embodiment, the sensor module 176 may include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, It may include a temperature sensor, a humidity sensor, or an illuminance sensor.

The interface 177 may support one or more designated protocols that may be used for the electronic device 101 to directly or wirelessly connect with an external electronic device (eg, the electronic device 102 ). According to an embodiment, the interface 177 may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

The connection terminal 178 may include a connector through which the electronic device 101 can be physically connected to an external electronic device (eg, the electronic device 102 ). According to an embodiment, the connection terminal 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (eg, a headphone connector).

The haptic module 179 may convert an electrical signal into a mechanical stimulus (eg, vibration or movement) or an electrical stimulus that the user can perceive through tactile or kinesthetic sense. According to an embodiment, the haptic module 179 may include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

The camera module 180 may capture still images and moving images. According to an embodiment, the camera module 180 may include one or more lenses, image sensors, image signal processors, or flashes.

The power management module 188 may manage power supplied to the electronic device 101 . According to an embodiment, the power management module 188 may be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

The battery 189 may supply power to at least one component of the electronic device 101 . According to one embodiment, battery 189 may include, for example, a non-rechargeable primary cell, a rechargeable secondary cell, or a fuel cell.

The communication module 190 is a direct (eg, wired) communication channel or a wireless communication channel between the electronic device 101 and an external electronic device (eg, the electronic device 102, the electronic device 104, or the server 108). It can support establishment and communication through the established communication channel. The communication module 190 may include one or more communication processors that operate independently of the processor 120 (eg, an application processor) and support direct (eg, wired) communication or wireless communication. According to one embodiment, the communication module 190 is a wireless communication module 192 (eg, a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 194 (eg, : It may include a local area network (LAN) communication module, or a power line communication module). A corresponding communication module among these communication modules is a first network 198 (eg, a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network 199 (eg, legacy It may communicate with the external electronic device 104 through a cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (eg, a telecommunication network such as a LAN or WAN). These various types of communication modules may be integrated into one component (eg, a single chip) or may be implemented as a plurality of components (eg, multiple chips) separate from each other. The wireless communication module 192 uses the subscriber information (eg, International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module 196 within a communication network such as the first network 198 or the second network 199 . The electronic device 101 may be identified or authenticated.

The wireless communication module 192 may support a 5G network after a 4G network and a next-generation communication technology, for example, a new radio access technology (NR). NR access technology includes high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and access to multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency) -latency communications)). The wireless communication module 192 may support a high frequency band (eg, mmWave band) to achieve a high data rate. The wireless communication module 192 includes various technologies for securing performance in a high-frequency band, for example, beamforming, massive multiple-input and multiple-output (MIMO), all-dimensional multiplexing. It may support technologies such as full dimensional MIMO (FD-MIMO), an array antenna, analog beam-forming, or a large scale antenna. The wireless communication module 192 may support various requirements specified in the electronic device 101 , an external electronic device (eg, the electronic device 104 ), or a network system (eg, the second network 199 ). According to an embodiment, the wireless communication module 192 may include a peak data rate (eg, 20 Gbps or more) for realizing eMBB, loss coverage (eg, 164 dB or less) for realizing mMTC, or U-plane latency for realizing URLLC ( Example: downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) may be supported.

The antenna module 197 may transmit or receive a signal or power to the outside (eg, an external electronic device). According to an embodiment, the antenna module 197 may include an antenna including a conductor formed on a substrate (eg, a PCB) or a radiator formed of a conductive pattern. According to an embodiment, the antenna module 197 may include a plurality of antennas (eg, an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network such as the first network 198 or the second network 199 is connected from the plurality of antennas by, for example, the communication module 190 . can be chosen. A signal or power may be transmitted or received between the communication module 190 and an external electronic device through the selected at least one antenna. According to some embodiments, other components (eg, a radio frequency integrated circuit (RFIC)) other than the radiator may be additionally formed as a part of the antenna module 197 .

According to various embodiments, the antenna module 197 may form a mmWave antenna module. According to one embodiment, the mmWave antenna module comprises a printed circuit board, an RFIC disposed on or adjacent to a first side (eg, bottom side) of the printed circuit board and capable of supporting a designated high frequency band (eg, mmWave band); and a plurality of antennas (eg, an array antenna) disposed on or adjacent to a second side (eg, top or side surface) of the printed circuit board and capable of transmitting or receiving signals of the designated high frequency band. can do.

At least some of the components are connected to each other through a communication method between peripheral devices (eg, a bus, general purpose input and output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)) and a signal ( e.g. commands or data) can be exchanged with each other.

According to an embodiment, the command or data may be transmitted or received between the electronic device 101 and the external electronic device 104 through the server 108 connected to the second network 199 . Each of the external electronic devices 102 or 104 may be the same as or different from the electronic device 101 . According to an embodiment, all or a part of operations executed in the electronic device 101 may be executed in one or more external electronic devices 102 , 104 , or 108 . For example, when the electronic device 101 needs to perform a function or service automatically or in response to a request from a user or other device, the electronic device 101 may perform the function or service itself instead of executing the function or service itself. Alternatively or additionally, one or more external electronic devices may be requested to perform at least a part of the function or the service. One or more external electronic devices that have received the request may execute at least a part of the requested function or service, or an additional function or service related to the request, and transmit a result of the execution to the electronic device 101 . The electronic device 101 may process the result as it is or additionally and provide it as at least a part of a response to the request. For this, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device 101 may provide an ultra-low latency service using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device 104 may include an Internet of things (IoT) device. The server 108 may be an intelligent server using machine learning and/or neural networks. According to an embodiment, the external electronic device 104 or the server 108 may be included in the second network 199 . The electronic device 101 may be applied to an intelligent service (eg, smart home, smart city, smart car, or health care) based on 5G communication technology and IoT-related technology.

The electronic device according to various embodiments disclosed in this document may have various types of devices. The electronic device may include, for example, a portable communication device (eg, a smart phone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a home appliance device. The electronic device according to the embodiment of the present document is not limited to the above-described devices.

It should be understood that the various embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and include various modifications, equivalents, or substitutions of the embodiments. In connection with the description of the drawings, like reference numerals may be used for similar or related components. The singular form of the noun corresponding to the item may include one or more of the item, unless the relevant context clearly dictates otherwise. As used herein, "A or B", "at least one of A and B", "at least one of A or B", "A, B or C", "at least one of A, B and C", and "A , B, or C" each may include any one of the items listed together in the corresponding one of the phrases, or all possible combinations thereof. Terms such as “first”, “second”, or “first” or “second” may simply be used to distinguish the component from other components in question, and may refer to components in other aspects (e.g., importance or order) is not limited. It is said that one (eg, first) component is "coupled" or "connected" to another (eg, second) component, with or without the terms "functionally" or "communicatively". When mentioned, it means that one component can be connected to the other component directly (eg by wire), wirelessly, or through a third component.

The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and is interchangeable with terms such as, for example, logic, logic block, component, or circuit. can be used as A module may be an integrally formed part or a minimum unit or a part of the part that performs one or more functions. For example, according to an embodiment, the module may be implemented in the form of an application-specific integrated circuit (ASIC).

Various embodiments of the present document include one or more instructions stored in a storage medium (eg, internal memory 136 or external memory 138) readable by a machine (eg, electronic device 101). may be implemented as software (eg, the program 140) including For example, the processor (eg, the processor 120 ) of the device (eg, the electronic device 101 ) may call at least one of one or more instructions stored from a storage medium and execute it. This makes it possible for the device to be operated to perform at least one function according to the at least one command called. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The device-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' only means that the storage medium is a tangible device and does not contain a signal (eg, electromagnetic wave), and this term refers to the case where data is semi-permanently stored in the storage medium and It does not distinguish between temporary storage cases.

According to one embodiment, the method according to various embodiments disclosed in this document may be provided as included in a computer program product. Computer program products may be traded between sellers and buyers as commodities. The computer program product is distributed in the form of a machine-readable storage medium (eg compact disc read only memory (CD-ROM)), or via an application store (eg Play Store™) or on two user devices ( It can be distributed (eg downloaded or uploaded) directly or online between smartphones (eg: smartphones). In the case of online distribution, at least a part of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium such as a memory of a server of a manufacturer, a server of an application store, or a relay server.

According to various embodiments, each component (eg, a module or a program) of the above-described components may include a singular or a plurality of entities, and some of the plurality of entities may be separately disposed in other components. have. According to various embodiments, one or more components or operations among the above-described corresponding components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (eg, a module or a program) may be integrated into one component. In this case, the integrated component may perform one or more functions of each component of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. . According to various embodiments, operations performed by a module, program, or other component are executed sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations are executed in a different order, or omitted. or one or more other operations may be added.

FIG. 2 is a perspective view illustrating a front surface of an electronic device according to an exemplary embodiment, and FIG. 3 is a perspective view illustrating a rear surface of the electronic device of FIG. 2 .

2 and 3 , the electronic device 200 according to an embodiment includes a first side (or “front”) 210A, a second side (or “rear”) 210B, and a first and a housing 210 including a side (or “sidewall”) 210C that encloses a space between the side 210A and the second side 210B. In another embodiment (not shown), the housing 210 may refer to a structure that forms part of the first surface 210A, the second surface 210B, and the side surface 210C of FIGS. 2 and 3 . have.

According to one embodiment, the first surface 210A may be formed by a front plate 202 (eg, a glass plate including various coating layers, or a polymer plate) at least a portion of which is substantially transparent. According to an embodiment, the front plate 202 may include a curved portion extending seamlessly from the first surface 210A toward the rear plate 211 at at least one side edge portion.

According to an embodiment, the second surface 210B may be formed by the substantially opaque back plate 211 . The back plate 211 may be formed by, for example, coated or tinted glass, ceramic, polymer, metal (eg, aluminum, stainless steel (STS), or magnesium), or a combination of at least two of the foregoing. can According to an embodiment, the rear plate 211 may include a curved portion that extends seamlessly from the second surface 210B toward the front plate 202 at at least one end.

According to one embodiment, side 210C may be formed by a side member (or "bracket") 218 that engages with front plate 202 and back plate 211 and includes a metal and/or polymer. can In some embodiments, the back plate 211 and the side members 218 are integrally formed and may include the same material (eg, a metal material such as aluminum).

According to an embodiment, the electronic device 200 includes a display 201 (eg, the display module 160 of FIG. 1 ), an audio module 203 (eg, the audio module 170 of FIG. 1 ), and a sensor module. (not shown) (eg, sensor module 176 of FIG. 1 ), camera modules 205 , 212 , 213 , 214 , 215 (eg, camera module 180 of FIG. 1 ), flash 206 , key input It may include at least one of a device 217 (eg, the input module 150 of FIG. 1 ) and a connector hole 208 (eg, the connection terminal 178 of FIG. 1 ). In some embodiments, the electronic device 200 may omit at least one of the components (eg, the key input device 217 ) or additionally include other components. For example, the electronic device 200 may include a sensor module (not shown). For example, within the area provided by the front plate 202 , a sensor such as a proximity sensor or an illuminance sensor may be integrated into the display 201 or disposed adjacent to the display 201 . In some embodiments, the electronic device 200 may further include a light emitting element, and the light emitting element may be disposed at a position adjacent to the display 201 within an area provided by the front plate 202 . The light emitting device may provide, for example, state information of the electronic device 200 in the form of light. In another embodiment, the light emitting device may provide, for example, a light source that is interlocked with the operation of the camera module 205 . The light emitting element may include, for example, an LED, an IR LED, and a xenon lamp.

The display 201 may be viewed outside of the electronic device 200 through, for example, a substantial portion of the front plate 202 . In some embodiments, an edge of the display 201 may be formed to be substantially identical to an adjacent outer shape (eg, a curved surface) of the front plate 202 . In another embodiment (not shown), in order to expand the area to which the display 201 is exposed, the distance between the outer edge of the display 201 and the outer edge of the front plate 202 may be substantially the same. In another embodiment (not shown), a recess or opening is formed in a part of the screen display area of the display 201 , and another electronic component aligned with the recess or the opening, for example, , a camera module 205 (or a camera device), a proximity sensor or an illuminance sensor (not shown).

According to an embodiment, at least one camera module 205 , 212 , 213 , 214 , and 215 may be disposed in a lower direction (eg, -z-axis direction) of the display 201 . For example, the first camera module 205 may be disposed on at least a partial area of the display 201 corresponding to a camera field of view (FOV). As the first camera device 205 is disposed on at least a partial area of the display 201 corresponding to the camera field of view (FOV), the position of the first camera module 205 may not be visually distinguished (or exposed). . According to an embodiment, when the display 201 is viewed from the first side 210A, the first camera module 205 is at least a part of the display 201, which is disposed in a portion corresponding to the camera field of view (FOV), An image of an external subject may be acquired without being visually exposed to the outside. For example, the first camera device 205 may be an under display camera (UDC).

In an embodiment, the electronic device 200 may include a display (not shown) that is arranged to be slidable and provides a screen (eg, a display area). For example, the display area of the electronic device 200 may be an area that is visually exposed and enables an image to be output. In one example, the electronic device 200 may adjust the display area according to the movement of the sliding plate (not shown) or the movement of the display. For example, the electronic device 200 is configured such that at least a part of the electronic device 200 (eg, the housing 210 ) is at least partially slidably operated, thereby selectively expanding the display area. It may include a rollable electronic device. The above-described display may be referred to as, for example, a slide-out display or an expandable display.

In another embodiment (not shown), a camera module (eg, 212, 213, 214, 215), a fingerprint sensor, and a flash on the rear surface (eg, the second surface 210B) of the screen display area of the display 201 . at least one or more of (206). In another embodiment (not shown), the display 201 is coupled to or adjacent to a touch sensing circuit, a pressure sensor capable of measuring the intensity (pressure) of the touch, and/or a digitizer that detects a magnetic field type stylus pen. can be placed.

In one embodiment, the audio module 203 may include a microphone hole and/or a speaker hole. In the microphone hole, a microphone for acquiring an external sound may be disposed therein, and in some embodiments, a plurality of microphones may be disposed to detect the direction of the sound. In some embodiments, the speaker hole and the microphone hole may be implemented as a single hole 203 , or a speaker may be included without a speaker hole (eg, a piezo speaker). The speaker hole may include an external speaker hole and a receiver hole for a call.

In an embodiment, the electronic device 200 may generate an electrical signal or data value corresponding to an internal operating state or an external environmental state by including a sensor module (not shown). The sensor module may include, for example, a proximity sensor disposed on the first side 210A of the housing 210 , a fingerprint sensor integrated into or disposed adjacent to the display 201 , and/or a second side of the housing 210 . A biometric sensor (eg, an HRM sensor) disposed on the second surface 210B may be further included. The electronic device 200 may include a sensor module not shown, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, It may further include at least one of a humidity sensor and an illuminance sensor.

In an embodiment, the camera modules 205 , 212 , 213 , 214 , and 215 are disposed on the first camera module 205 disposed on the first surface 210A of the electronic device 200 , and on the second surface 210B of the electronic device 200 . It may include the disposed second camera modules (212, 213, 214, 215). The aforementioned camera modules 205 , 212 , 213 , 214 , and 215 may include one or more lenses, an image sensor, and/or an image signal processor. In other embodiments, flash 206 may include, for example, a light emitting diode or a xenon lamp. In some embodiments, two or more lenses (infrared cameras, wide angle and telephoto lenses) and image sensors may be disposed on one side of the electronic device 200 .

In one embodiment, the key input device 217 may be disposed on the side surface 210C of the housing 210 . In other embodiments, the electronic device 200 may not include some or all of the above-mentioned key input devices 217 and the not included key input devices 217 may be displayed on the display 201 as soft keys, etc. It can be implemented in the form In some embodiments, the key input device may include at least a portion of a fingerprint sensor disposed on the second side 210B of the housing 210 .

In one embodiment, the connector hole 208 may accommodate a connector for transmitting and receiving power and/or data to and from an external electronic device, and/or a connector for transmitting and receiving audio signals to and from an external electronic device. For example, the connector hole 208 may include a USB connector or an earphone jack. In one embodiment, the USB connector and the earphone jack may be implemented as a single hole (eg, 208 in FIGS. 2 and 3 ), and according to another embodiment (not shown), the electronic device 200 is a separate connector. Power and/or data may be transmitted/received to/from an external electronic device without a hole, or an audio signal may be transmitted/received.

4 is an exploded perspective view of an electronic device according to an exemplary embodiment.

Referring to FIG. 4 , an electronic device 300 (eg, the electronic device 200 of FIGS. 2 and 3 ) according to an embodiment includes a front plate (not shown) (eg, the front plate 202 of FIG. 2 ). ), display 310 (eg, display 201 in FIG. 2 ), side member 320 (eg, side member 218 in FIGS. 2 and 3 ), printed circuit board structure 330 (eg, PCB) (printed circuit board), FPCB (flexible PCB) or RFPCB (rigid-flexible PCB)), a shielding structure 350 , a rear case 360 , a battery 370 and/or a rear plate 380 may be included. . According to another embodiment (not shown), at least one component (eg, the shielding structure 350 and the rear case 360 ) among the above-described components of the electronic device 300 is omitted or another component is added. may be added.

According to an embodiment, the side member 320 is positioned between the display 310 and the rear plate 380 , and may include a metal frame structure 321 and/or a support member 322 .

In one example, the metal frame structure 321 of the side member 320 may be formed of a conductive material (eg, metal) to form the side surface (eg, the side surface 210C of FIG. 2 ) of the electronic device 300 . have. For example, the metal frame structure 321 may include at least one conductive portion and/or at least one non-conductive portion that insulates the at least one conductive portion. At least one conductive portion of the metal frame structure 321 may operate as an antenna radiator that transmits and/or receives an RF signal of a designated frequency band.

According to an embodiment, the antenna structure may be formed by a part of the side member 320 or a combination thereof. For example, an antenna (or “antenna structure”) (not shown) may be disposed on a portion of the side member 320 , or at least a portion of a space created by a combination thereof. In one example, the antenna may include at least one radiation conductor (or “emitter”) and a communication module (or “wireless communication circuit”) disposed on the printed circuit board structure 330 (eg, the radio of FIG. 1 ). The communication module 192) may be provided with a feeding to communicate a wireless signal (or "radio frequency (RF) signal"). In the present disclosure, communication may mean at least one of transmission of a wireless signal, reception of a wireless signal, and/or transmission and reception of a wireless signal, and may be used in the same meaning hereinafter.

According to an embodiment, the antenna may be an antenna configured to transmit and/or receive a radio signal in a frequency band of several tens of GHz or higher. For example, the antenna may be an antenna for millimeter wave (mmWave) communication. According to another embodiment, the antenna may include a plurality of antennas for communicating in a plurality of different frequency bands. For example, the antenna may include a first antenna for communicating in a first frequency band (eg, about 10 GHz) and a second antenna for communicating in a second frequency band (eg, about 18 GHz).

In another example, the support member 322 of the side member 320 is formed of a metal material and/or a non-metal (eg, polymer) material, so that a space (or "mounting") in which electronic components can be placed in the electronic device 300 . space") can be provided. For example, the display 310 is disposed on one surface of the support member 322 (eg, one surface in the +z direction in FIG. 4 ), and the other surface of the support member 322 (eg, in the -z direction in FIG. 4 ). A printed circuit board structure 330 may be disposed on one side). According to an embodiment, the support member 322 may be connected to the metal frame structure 321 or may be integrally formed with the metal frame structure 321 .

According to an embodiment, the printed circuit board structure 330 may be disposed on at least one area of the support member 322 . In the present disclosure, the printed circuit board structure 330 may mean a structure in which a plurality of printed circuit boards 331 and 332 are stacked. For example, the printed circuit board structure 330 may include a first printed circuit board 331 , a second printed circuit board 332 , and/or an interposer 340 . As another example, the printed circuit board structure 330 may be a structure in which the interposer 340 and the second printed circuit board 332 are stacked in this order based on the first printed circuit board 331 .

In an embodiment, the first printed circuit board 331 may be disposed on at least one area of the support member 322 . In another embodiment, the second printed circuit board 332 may be spaced apart from the first printed circuit board 331 and positioned in the -z direction with respect to the first printed circuit board 331 . For example, the second printed circuit board 332 may be disposed to face one surface of the first printed circuit board 331 in the -z direction. According to one embodiment, the first printed circuit board 331 and/or the second printed circuit board 332 is a printed circuit board (PCB) formed of a material having non-bending properties (eg, FR4), or bending It may be a flexible printed circuit board (FPCB) having properties that can be changed (or “flexible properties”).

In one embodiment, the interposer 340 is positioned between the first printed circuit board 331 and the second printed circuit board 332 , and is positioned on the -z direction of the first printed circuit board 331 . 2 The printed circuit board 332 may be supported. For example, the interposer 340 may be disposed to surround the space between the first printed circuit board 331 and the second printed circuit board 332 . In one example, the interposer 340 includes a printed circuit board (not shown) including at least one side wall and/or at least one conductive via passing through at least one region of the printed circuit board ( not shown) may be included. In another example, the first printed circuit board 331 and the second printed circuit board 342 may be electrically connected through at least one conductive via of the interposer 340 .

According to an embodiment, a plurality of electronic components may be disposed on the first printed circuit board 331 and/or the second printed circuit board 332 constituting the printed circuit board structure 330 . For example, the first printed circuit board 331 and/or the second printed circuit board 332 may include a processor (eg, processor 120 in FIG. 1 ), a memory (eg, memory 130 in FIG. 1 ); and/or an interface (eg, interface 177 in FIG. 1 ). The processor may include, for example, one or more of a central processing unit, an application processor, a graphics processing unit, an image signal processor, a sensor hub processor, or a communication processor. Memory may include, for example, volatile memory or non-volatile memory. The interface may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, and/or an audio interface. The interface may, for example, electrically or physically connect the electronic device 300 to an external electronic device, and may include a USB connector, an SD card/MMC connector, or an audio connector. In one example, the plurality of electronic components disposed on the first printed circuit board 331 and the plurality of electronic components disposed on the second printed circuit board 332 are electrically and/or operationally connected via the interposer 340 . can be operatively linked.

According to an embodiment, the first printed circuit board 331 and/or the second printed circuit board 332 of the printed circuit board structure 330 is a third printed circuit disposed spaced apart from the printed circuit board structure 330 . It may be electrically connected to the substrate 333 . For example, the first printed circuit board 331 and/or the second printed circuit board 332 of the printed circuit board structure 330 may be formed in a region (eg, in the +y direction of FIG. 4 ) of the support member 322 . region), and the third printed circuit board 333 is another region of the support member 322 spaced apart from the first printed circuit board 331 and/or the second printed circuit board 332 (eg, in the -y-direction region of FIG. 4 ). In one example, the first printed circuit board 331 and/or the second printed circuit board 332 and the third printed circuit board 333 may be electrically connected through an electrical connection member 334 . In another example, the electrical connection member 334 is connected to the first printed circuit board 331 and/or the second printed circuit board 332 and the third printed circuit across the battery 370 disposed on the support member 322 . The substrate 333 may be electrically connected. For example, the electrical connection member 334 may include at least one of a flexible printed circuit board (FPCB), a coaxial cable, and a B to B connector (board to board connector), but is limited thereto. it's not going to be

According to an embodiment, the printed circuit board structure 330 may include an area (hereinafter, referred to as a “flexible area”) having a property of being bent or bent. In one example, the flexible region may include a base film (or substrate) and a copper foil layer. For example, the flexible region may be a flexible copper clad layer (FCCL) in which at least one copper clad is laminated on at least a portion of at least one of the top or bottom of the polyimide film. have.

According to an embodiment, the first printed circuit board 331 and/or the second printed circuit board 332 of the printed circuit board structure 330 is a fourth printed circuit disposed spaced apart from the printed circuit board structure 330 . It may be electrically connected to a substrate (not shown). For example, the fourth printed circuit board (not shown) may be a flexible printed circuit board (or “flexible printed circuit board”) type radio frequency cable (FRC). have. In one embodiment, the fourth printed circuit board may be disposed on at least a portion of the support member 322 . For example, the fourth printed circuit board may be disposed in one area (eg, the area in the +x direction in FIG. 4 ) and/or in another area (eg, the area in the -x direction in FIG. 4 ) of the support member 322 . can

According to an embodiment, the shielding structure 350 (or “shield can”) may be formed of a conductive material (eg, metal), and is disposed on at least one region of the printed circuit board structure 330 . A plurality of electronic components disposed on the printed circuit board structure 330 may be electromagnetically shielded. In one example, the shielding structure 350 may be at least partially disposed on the second printed circuit board 332 of the printed circuit board structure 330 , and may provide a plurality of electronic components disposed on the second printed circuit board 332 . It can be electromagnetically shielded.

According to one embodiment, the rear case 360 is disposed on the -z direction of the printed circuit board structure 330 , the first printed circuit board 331 and/or the second The second printed circuit board 332 and a plurality of electronic components disposed on the first printed circuit board 331 and/or the second printed circuit board 332 may be protected. In one example, the rear case 360 may be formed of a non-conductive material (eg, plastic), but is not limited thereto. In the electronic device 300 according to another embodiment (not shown), the rear case 360 may be omitted.

According to an embodiment, the battery 370 may be disposed inside the electronic device 300 to supply power to at least one component of the electronic device 300 . The battery 370 may be recharged, for example. non-rechargeable primary cells, or rechargeable secondary cells, or fuel cells. In one example, the battery 370 may be disposed in a battery groove (not shown) formed in at least one region of the support member 322 to supply power to components of the electronic device 300 . According to an embodiment, the battery 370 may be integrally disposed inside the electronic device 300 , but is not limited thereto, and the battery 370 according to another embodiment is detachably disposed with the electronic device 300 . could be

According to an embodiment, the rear plate 380 may form the rear surface of the electronic device 300 (eg, the second surface 210B of FIG. 3 ). The rear plate 380 may protect the internal components of the electronic device 300 from external impact or inflow of foreign substances.

5 is an exploded view and a combined view of a printed circuit board structure according to an embodiment.

5 is an exploded state and the first printed circuit board 331, the second printed circuit board 332, and/or the interposer 340 of the printed circuit board structure 330 of FIG. 331 ), the second printed circuit board 332 and/or the interposer 340 are coupled to each other.

Referring to FIG. 5 , a printed circuit board structure 330 (eg, the printed circuit board structure 330 of FIG. 4 ) according to an embodiment includes a first printed circuit board 331 (eg, the first printed circuit board 331 of FIG. 4 ). printed circuit board 331 ), second printed circuit board 332 (eg, second printed circuit board 332 of FIG. 4 ) and/or interposer 340 (eg, interposer 340 of FIG. 4 ) ) may be included.

According to an embodiment, the first printed circuit board 331 may include a first surface 331a facing the +z direction and/or a second surface 331b facing the opposite direction to the first surface 331a. have. In one example, at least one electronic component (not shown) may be disposed on at least one of the first surface 331a or the second surface 331b of the first printed circuit board 331 . For example, the at least one electronic component may include a processor (eg, the processor 120 of FIG. 1 ), a memory (eg, the memory 130 of FIG. 1 ), and a communication circuit (eg, FIG. 1 ) necessary for operation of the electronic device. of the communication module 190) or a power management module (eg, the power management module 188 of FIG. 1), but is not limited thereto.

According to an embodiment, the second printed circuit board 332 may be disposed to be spaced apart from the first printed circuit board 331 . For example, the second printed circuit board 332 may be disposed on the first surface 331a of the first printed circuit board 331 (eg, in the +z direction of FIG. 5 ). In one example, the second printed circuit board 332 faces the third side 332a and/or the third side 332a facing the +z direction (eg, the -z direction in FIG. 5), The first printed circuit board 331 may include a fourth surface 332b facing at least one region of the first surface 331a. In another example, at least one electronic component (not shown) may be disposed on the third surface 332a and/or the fourth surface 332b of the second printed circuit board 332 . The at least one electronic component may include, for example, at least one of a processor, a memory, a communication circuit, and a power management module, but is not limited thereto.

According to an embodiment, the interposer 340 is positioned between the first printed circuit board 331 and the second printed circuit board 332 , and the second printed circuit board 332 is connected to the first printed circuit board 331 . ) (eg, in the +z direction in FIG. 5 ). In one example, the lower surface 340b of the interposer 340 is disposed on at least one region of the first surface 331a of the first printed circuit board 331 , and the upper surface 340a of the interposer 340 is disposed. At least one region of the fourth surface 332b of the second printed circuit board 332 may be disposed on the . In another example, the first printed circuit board 331 is fixed to the lower surface 340b of the interposer 340 , and the second printed circuit board 332 is fixed to the upper surface 340a of the interposer 340 . can be For example, as at least one region of the first surface 331a of the first printed circuit board 331 is soldered to the lower surface 340b of the interposer 340 , the first printed circuit board 331 is ) may be fixed to the lower surface 340b of the interposer 340 . As another example, as at least one region of the fourth surface 332b of the second printed circuit board 332 is soldered to the upper surface 340a of the interposer 340 , the second printed circuit board 332 is the interposer It may be fixed to the top surface 340a of the 340 .

According to an embodiment, the interposer 340 may include an insulating layer 341 and/or at least one conductive via 342 . In one example, the insulating layer 341 includes at least one side wall and may be disposed to surround the space between the first printed circuit board 331 and the second printed circuit board 332 . For example, the insulating layer 341 is formed along at least one edge of the first printed circuit board 331 or the second printed circuit board 332 when viewed from the top (eg, the +z direction in FIG. 5 ). It may be formed in a band shape forming a closed-curve. However, the shape of the insulating layer 341 is not limited to the above-described embodiment. According to another embodiment, the insulating layer 341 connects one point and another point of the at least one sidewall and supports the first printed circuit board 331 and/or the second printed circuit board 332 . (341a) may be included.

In another example, some of the at least one electronic component disposed on the first printed circuit board 331 and/or the second printed circuit board 332 may be disposed to be covered by the above-described insulating layer 341 . .

In one example, the at least one conductive via 342 may be formed of a conductive material and may be disposed through at least one region of the insulating layer 341 . In another example, the at least one conductive via 342 includes the first printed circuit board 331 disposed at the lower end of the interposer 340 (eg, -z direction in FIG. 5 ) and the upper end of the interposer 340 ( For example, the second printed circuit board 332 disposed in the +z direction of FIG. 5 may be electrically connected. For example, at least one electronic component disposed on the first side 331a and/or the second side 331b of the first printed circuit board 331 may be second printed via the at least one conductive via 342 . It may be electrically connected to at least one electronic component disposed on the third surface 332a and/or the fourth surface 332b of the circuit board 332 .

6 is an enlarged view of an interposer structure and a region A of the interposer structure according to an exemplary embodiment, and FIG. 7 is a cross-sectional view taken along the I-I' direction of the interposer structure of FIG. 6 . The interposer structure 400 illustrated in FIG. 6 may be a structure of the interposer 340 disposed between the first printed circuit board 331 and the second printed circuit board 332 of FIG. 5 .

6 and 7 , the interposer structure 400 (or “printed circuit board structure”) according to an embodiment includes an insulating layer 410 (eg, the insulating layer of FIG. 5 ). 341 ), at least one layer of solder resist (or “solder resist”) 420 , and at least one conductive via 430 (eg, at least one conductive via 342 in FIG. 5 ). )) and/or presolder 440 .

According to an embodiment, the insulating layer 410 may be formed of a material having a non-conductive material, and may have a closed-curve shape. For example, the insulating layer 410 may be formed in a band shape forming a closed curve when viewed from the top (eg, the +z direction of FIG. 6 ).

In one embodiment, the insulating layer 410 forms a closed curve and has at least one side wall 411 having a specified thickness and/or at least one penetration penetrating at least one region of the insulating layer 410 . hole 412 (or “via hole”). In one example, the at least one sidewall 411 may form at least one side surface of the insulating layer 410 . In another example, the at least one through hole 412 may be formed in at least one region of the inner region of the insulating layer 410 spaced apart from the side surface of the insulating layer 410 . For example, the at least one through hole 412 may be formed to penetrate from one surface of the insulating layer 410 facing the +z direction to the side facing the -z direction of the insulating layer 410, but is limited thereto. no.

According to an embodiment, the at least one solder resist layer 420 may be disposed on at least one region of the top surface 410a and/or the bottom surface 410b of the insulating layer 410 . For example, the at least one solder resist layer 420 may be disposed on top and/or bottom of the interposer structure 400 for electronic components (eg, the first printed circuit board 331 of FIG. 5 , the second printed circuit board ( 332)), it is possible to prevent lead from adhering to a region of the insulating layer 410 on which the at least one solder resist layer 420 is disposed during the process of soldering (or “soldering”).

According to an embodiment, the at least one solder resist layer 420 may include a first solder resist layer 421 and/or a second solder resist layer 422 . In one example, the first solder resist layer 421 is disposed on at least one region of the top surface 410a of the insulating layer 410 to prevent lead from adhering to the top surface 410a of the insulating layer 410 . can In another example, the second solder resist layer 422 is disposed on at least one region of the lower surface 410b of the insulating layer 410 to prevent lead from adhering to the lower surface 410b of the insulating layer 410 . can

In one example, the first solder resist layer 421 may include at least one first opening 421a formed at a position corresponding to the at least one through hole 412 of the insulating layer 410 . For example, when viewed from an upper end of the interposer structure 400 (eg, in the +z direction of FIG. 7 ), at least one region of the at least one first opening 421a overlaps the at least one through hole 412 . can be arranged as much as possible. As another example, the at least one first opening 421a is formed to have a larger area than the at least one through hole 412 , so that the outer peripheral surface of the at least one first opening 421a is the outer peripheral surface of the at least one through hole 412 . can be wrapped around The shape of the at least one first opening 421a is not limited to the above-described embodiment, and according to another embodiment (not shown), the at least one first opening 421a is larger than the at least one through-hole 412 . It may be formed in a narrow area or may be formed in substantially the same area.

In one example, the second solder resist layer 422 may include at least one second opening 422a formed at a position corresponding to the at least one through hole 412 of the insulating layer 410 . For example, when viewed from the lower end of the interposer structure 400 (eg, -z direction in FIG. 7 ), at least one region of the at least one second opening 422a overlaps the at least one through hole 412 . can be arranged as much as possible. As another example, the at least one second opening 422a is formed to have a larger area than the at least one through hole 412 , so that the outer peripheral surface of the at least one second opening 422a is the outer peripheral surface of the at least one through hole 412 . can be wrapped around The shape of the at least one second opening 422a is not limited to the above-described embodiment, and according to another embodiment (not shown), the at least one second opening 422a is larger than the at least one through hole 412 . It may be formed in a narrow area or may be formed in substantially the same area.

As another example, the at least one second opening 422a may be formed at a position corresponding to the at least one first opening 421a of the first solder resist layer 421 . In one example, an insulating layer ( A partial region of the 410 and/or a partial region of the at least one conductive via 430 may be exposed to the outside of the interposer structure 400 .

According to an embodiment, the at least one conductive via 430 may be located inside the at least one through hole 412 of the insulating layer 410 . The at least one conductive via 430 may be formed of a conductive material (eg, metal) to electrically connect electronic components disposed in the interposer structure 400 . For example, the at least one conductive via 430 may include an electronic component disposed on the upper end of the interposer structure 400 (eg, the first printed circuit board 331 of FIG. 5 ) and a lower end of the interposer structure 400 . An electronic component (eg, the second printed circuit board 332 of FIG. 5 ) disposed on the may be electrically connected. As another example, the at least one conductive via 430 may include a conductive via having a cylindrical shape (or a “hole shape”), but is not limited thereto.

In one example, the at least one conductive via 430 is formed in a direction in which the at least one first opening 421a of the first solder resist layer 421 is formed from the top surface 410a of the insulating layer 410 (eg, in FIG. At least one second opening 422a of the second solder resist layer 422 in the lower surface 410b of the first protruding portion 431 and/or the insulating layer 410 protruding in the +z direction of 7) A second protruding portion 432 protruding in the formed direction (eg, the -z direction of FIG. 7 ) may be included. For example, the first protruding portion 431 of the at least one conductive via 430 protrudes from the top surface 410a of the insulating layer 410 to one surface of the first solder resist layer 421 in the +z direction. can be As another example, the second protruding portion 432 of the at least one conductive via 430 may protrude from the bottom surface 410b of the insulating layer 410 to one surface of the second solder resist layer 422 in the -z direction. can

According to an embodiment, the presolder 440 may be a top region (eg, a region in the +z direction of FIG. 7 ) and/or a bottom region (eg, FIG. 7 ) of the interposer structure 400 . -z-direction region), and may serve to fix electronic components disposed at the upper end and/or lower end of the interposer structure 400 to the interposer structure 400 .

In one embodiment, the presolder 440 may include a first presolder 441 and/or a second presolder 442 . In one example, the first presolder 441 includes at least one conductive via 430 exposed to the outside of the interposer structure 400 through the at least one first opening 421a of the first solder resist layer 421 . ) may be disposed on the first protruding portion 431 . For example, the first presolder 441 is seated on one end of the first protruding portion 431 (eg, one end in the +z direction of FIG. 7 ), and is a part of the upper surface 410a of the insulating layer 410 . It may be disposed to surround the region and/or a partial region of the first protruding portion 431 . In another example, the second presolder 442 includes at least one conductive via 430 exposed to the outside of the interposer structure 400 through the at least one second opening 422a of the second solder resist layer 422 . ) may be disposed on the second protruding portion 432 . For example, the second presolder 442 is seated on one end (eg, one end in the -z direction of FIG. 7 ) of the second protruding portion 432 , and a portion of the lower end surface 410b of the insulating layer 410 . It may be disposed to surround the region and/or a partial region of the second protruding portion 432 .

According to an embodiment, the interposer structure 400 may secure electronic components to the top and/or bottom of the interposer structure 400 through the first presolder 441 and/or the second presolder 442 . can For example, the interposer structure 400 applies heat to the first presolder 441 to form a second printed circuit board (eg, FIG. 5, the second printed circuit board 332) may be soldered. As another example, the interposer structure 400 applies heat to the second presolder 442 to form a first printed circuit board (eg, FIG. 5 ) at the lower end of the interposer structure 400 (eg, -z direction in FIG. 7 ). of the first printed circuit board 331) may be soldered.

According to an embodiment, the interposer structure 400 includes a first protruding portion 431 and/or a second protruding portion 432 protruding in an upper direction and/or a lower direction with respect to the insulating layer 410 . A space in which the presolder 440 can be seated can be formed without forming a land through the at least one conductive via 430 . In one example, as the interposer structure 400 is formed as a landless structure that does not include a land, a pitch between the conductive vias 430 is provided to secure a space for the land to be formed. )(P ₁ ) may not be separated more than a specified distance. For example, the above-described interposer structure 400 having a landless structure may form a distance between the conductive vias 430 closer than that of the interposer structure including the land. According to an embodiment, the interposer structure 400 _{forms a distance P 1} between the conductive vias 430 to be close, so that a plurality of printed circuit boards disposed on top and/or bottom of the interposer structure 400 . Electronic components (eg, the first printed circuit board 331 and the second printed circuit board 332 of FIG. 5 ) may be disposed or mounted at a high density.

According to an embodiment, the interposer structure 400 may further include a side plating part 450 . In one example, the side plating part 450 may be positioned on at least one region of the side surface 410c of the insulating layer 410 to electromagnetically shield the interposer structure 400 . In the present disclosure, the side surface 410c of the insulating layer 410 is positioned between the top surface 410a and the bottom surface 410b of the insulating layer 410, and the space between the top surface 410a and the bottom surface 410b. may mean a side surrounding the . For example, the side plating part 450 may shield noise generated inside the interposer structure 400 (eg, noise generated from electronic components) from leaking to the outside of the interposer structure 400 , or Noise introduced from the outside of the structure 400 may be shielded.

Hereinafter, a manufacturing process of the interposer structure 400 according to an exemplary embodiment will be described with reference to FIGS. 8 and 9A to 9E .

8 is a flowchart illustrating an operation of manufacturing an interposer structure according to an exemplary embodiment. 9A is a view for explaining an operation of forming at least one through-hole in a printed circuit board, according to an embodiment, and FIG. 9B is a view for explaining an operation of forming at least one through-hole in the at least one through-hole, according to an embodiment; It is a view for explaining an operation of filling and planarizing a printed circuit board, FIG. 9C is a view for explaining an operation of etching a printed circuit board, according to an embodiment, and FIG. 9D is an embodiment According to an example, it is a view for explaining an operation of forming a solder resist layer on an upper surface and/or a lower surface of a printed circuit board. It is a diagram for explaining the operation of forming.

9A to 9E show a manufacturing operation for some regions (eg, region A in FIG. 6 ) of an interposer structure (or “printed circuit board structure”), and other regions of the interposer structure are manufactured through the same operation. can be Hereinafter, in describing the manufacturing operation of the interposer structure of FIG. 8, it will be described with reference to the configuration of FIGS. 9A to 9E.

Referring to FIGS. 8 and 9A , in the manufacturing operation of the interposer structure according to an embodiment, the printed circuit board 401 is processed in operation 801 to penetrate at least one region of the printed circuit board 401 . A through hole 412 (or “via hole”) (eg, at least one through hole 412 of FIG. 7 ) may be formed. For example, the printed circuit board 401 may include an insulating layer 410 (eg, the insulating layer 410 of FIG. 7 ) and/or a top surface 410a of the insulating layer 410 (eg, the top surface of FIG. 7 ). 410a) and a copper foil 402 (or “copper clad”) disposed on a bottom surface 410b (eg, bottom surface 410b of FIG. 7 ), and at least one through The hole 412 may pass through at least one region of the insulating layer 410 and the copper foil 402 . According to an embodiment, the at least one through hole 412 may be formed by drilling at least one region of the printed circuit board 401 . However, drilling is only an example of a processing method of forming the at least one through hole 412, and according to another embodiment, the at least one through hole 412 is formed through laser processing or punching processing. may be formed.

Referring to FIGS. 8 and 9B , the structure manufacturing operation of the interposer according to an embodiment may include a conductive material (or “conductive material”) inside the at least one through hole 412 formed in the printed circuit board 401 in operation 802 . ") can be filled. In one example, in operation 802, the inside of the at least one through hole 412 may be filled with a conductive material through a hole plugging printing technique, but the inside of the at least one through hole 412 may be filled with a conductive material. The method is not limited to the above-described embodiment. In another example, the conductive material filled in the at least one through hole 412 may be a material other than copper. The conductive material may include, for example, at least one of silver paste, aluminum, silver-aluminum, carbon paste, or carbon nanotube paste. However, the present invention is not limited thereto.

In operation 803 , the structure manufacturing operation of the interposer may planarize (or “polish”) the top surface and/or the bottom surface of the printed circuit board 401 . For example, in operation 802 , in the process of filling the inside of the at least one through hole 412 with a conductive material, a region protruding toward the top and/or bottom of the printed circuit board 401 may be formed. The structure manufacturing operation of the interposer according to an embodiment may include planarizing a region protruding toward the top and/or bottom of the printed circuit board 401 through operation 803 , and thus at least one conductive via 430 (eg, FIG. 7 conductive vias 430) may be formed. In an example, in operation 803 , the top surface and/or the bottom surface of the printed circuit board 401 may be planarized through brush processing or buffing. In another example, in operation 803 , the top surface and/or the bottom surface of the printed circuit board 401 may be planarized through a polishing process. For example, the polishing process may include at least one of mechanical polishing or chemical mechanical polishing (CMP).

Referring to FIGS. 8 and 9C , the structure manufacturing operation of the interposer according to an exemplary embodiment includes etching the top surface and/or the bottom surface of the printed circuit board 401 in operation 804 , and thus the insulating layer 410 . ) may be removed from the copper foil 402 disposed on the upper surface and the lower surface. In one example, since the at least one conductive via 430 is formed of a material other than copper, the at least one conductive via 430 is formed in the process of etching the top and/or bottom surfaces of the printed circuit board 401 . may not be removed. In another example, as the copper foil 402 disposed on the top surface 410a and the bottom surface 410b of the insulating layer 410 is removed, the top surface 410a and/or the bottom surface of the insulating layer 410 . A partial region of the at least one conductive via 430 protruding from the 410b may be formed. For example, in operation 804 , the first protruding portion 431 of the at least one conductive via 430 protruding in the +z direction from the top surface 410a of the insulating layer 410 (eg, first in FIG. 7 ) The protruding portion 431) and/or the second protruding portion 432 of the at least one conductive via 430 protruding in the -z direction from the bottom surface 410b of the insulating layer 410 (eg, the second protruding portion 432 of FIG. 7 ). 2 protruding portions 432) may be formed.

Referring to FIGS. 8 and 9D , in the structure manufacturing operation of the interposer according to an embodiment, in operation 805 , solder is applied to at least one region of the upper surface 410a and/or the lower surface 410b of the insulating layer 410 . A resist layer 420 (eg, the solder resist layer 420 of FIG. 7 ) may be formed. In one example, in operation 805 , solder resist ink is applied to an area other than the area in which at least one conductive via 430 of the upper surface 410a and/or the lower surface 410b of the insulating layer 410 is disposed. ), the solder resist layer 420 may be formed through a process of curing the applied ink by applying UV (ultraviolet ray) to the applied ink, but is not limited thereto. For example, in operation 805 , a first solder resist layer 421 (eg, the first solder resist layer 421 of FIG. 7 ) may be formed on the top surface 410a of the insulating layer 410 , and insulation A second solder resist layer 422 (eg, the second solder resist layer 422 of FIG. 7 ) may be formed on the bottom surface 410b of the layer 410 . As another example, as the solder resist ink is applied to an area other than the area where the conductive vias 430 are disposed, at least one agent is applied to the area corresponding to the at least one conductive via 430 of the first solder resist layer 421 . One opening 421a (eg, at least one first opening 421a of FIG. 7 ) may be formed. Similarly, in the region corresponding to the at least one conductive via 430 of the second solder resist layer 422 , at least one second opening 422a (eg, at least one second opening 422a of FIG. 7 ) is provided. ) can be formed.

Referring to FIGS. 8 and 9E , in operation 806 , in operation 806 , the first protruding portion 431 and/or the second protruding portion 432 of the at least one conductive via 430 may be performed according to an exemplary embodiment. ) may be formed with a presolder 440 (eg, the presolder 440 of FIG. 7 ). In one example, in operation 806 , a first presolder 441 is formed on at least one region of the first protruding portion 431 of the at least one conductive via 430 , and a first presolder 441 is formed on the at least one conductive via 430 . A second presolder 442 may be formed on at least one region of the second protruding portion 432 . The first presolder 441 and/or the second presolder 442 may be applied to the first protruding portion 431 and/or the second protruding portion 432 using, for example, a metal mask. After applying or squeezing solder cream (or "solder paste"), it is formed through a process of melting the applied solder cream (or "reflow process"). However, the present invention is not limited thereto.

The manufacturing operation of the interposer structure according to an embodiment may manufacture the interposer structure 400 that does not include a land for seating the presolder 440 through operations 801 to 806 described above. Although not shown in the drawings, the manufacturing operation of the interposer structure according to an embodiment includes forming the interposer structure 400 in at least a region of the side surface of the insulating layer 410 (eg, the side surface 410c of FIG. 6 ). The method may further include an operation of forming a side plating part (eg, the side plating part 450 of FIG. 6 ) for miraculously shielding. In one example, the operation of forming the side plating part is an operation of plating the side surface of the insulating layer 410 and then attaching a dry film to at least one region of the side surface of the insulating layer 410 where the side plating part is to be formed. may include. In another example, by exposing, developing, and etching at least one region of the side surface of the insulating layer 410 to which the dry film is attached, and then peeling the dry film attached to the insulating layer 410, the insulating layer 410 ), a side plating portion may be formed in at least one region of the side surface.

10 is an enlarged view of an interposer structure and a region B of the interposer structure according to another embodiment. 11A is a cross-sectional view of the interposer structure of FIG. 10 taken in the II' direction, FIG. 11B is a cross-sectional view of the interposer structure of FIG. 10 cut in the II-II' direction, and FIG. 11C is the interposer structure of FIG. It is a cross-sectional view of the poser structure cut in the III-III' direction, and FIG. 11D is a view showing a state in which the solder resist layer and/or the pre-solder are removed from the interposer structure of FIG. 10 .

The interposer structure 500 illustrated in FIG. 10 may be a structure of the interposer 340 disposed between the first printed circuit board 331 and the second printed circuit board 332 of FIG. 5 .

10, 11A, 11B, 11C, and 11D , the interposer structure 500 (or “printed circuit board structure”) according to an embodiment includes an insulating layer 510 (eg, FIG. 5 ). insulating layer 341), at least one solder resist layer (or “solder resist”) 520 , at least one first conductive via 531 , at least one second conductive via 532 and/or presolder 540 .

According to an embodiment, the insulating layer 510 may be formed of a material having a non-conductive material, and may have a closed-curve shape. For example, the insulating layer 510 may be formed in a band shape forming a closed curve when viewed from the top (eg, the +z direction in FIG. 10 ).

In one embodiment, the insulating layer 510 forms a closed curve and has at least one side wall 511 having a specified thickness, and at least one through hole 512 penetrating at least one region of the insulating layer 510 . ) (or “via hole”) and/or a slot 513 penetrating at least one region of the insulating layer 510 . In one example, the at least one sidewall 511 may form at least one side surface of the insulating layer 510 . In another example, the at least one through hole 512 may be formed in at least one region of the inner region of the insulating layer 510 spaced apart from the side surface of the insulating layer 510 . For example, the at least one through hole 512 may be formed to penetrate from one surface of the insulating layer 510 in the +z direction to the surface of the insulating layer 510 in the -z direction, but is limited thereto. no. In another example, the slot 513 may be formed in at least one region of the inner region of the insulating layer 510 spaced apart from the side surface of the insulating layer 510 . For example, the slot 513 is substantially the same as or similarly to the at least one through hole 512 , from one surface facing the +z direction of the insulating layer 510 to one side facing the -z direction of the insulating layer 510 . It may be formed through up to, but is not limited thereto. In one example, the slot 513 may be disposed to be spaced apart from the at least one through hole 512 . In another example, the slot 513 may be formed in a rectangular bar shape when viewed from the top of the insulating layer 510 (eg, in the +z direction of FIG. 11D ). For example, the slot 513 may be formed in a rectangular shape when viewed from the top of the insulating layer 510 . As another example, the slot 513 may be formed to have a larger area than the at least one through hole 512 , but is not limited thereto.

According to an embodiment, the at least one solder resist layer 520 may be disposed on at least one region of the top surface 510a and/or the bottom surface 510b of the insulating layer 510 . For example, the at least one solder resist layer 520 may be disposed on top and/or bottom of the interposer structure 500 for electronic components (eg, the first printed circuit board 331 of FIG. 5 , the second printed circuit board ( 332)), it is possible to prevent lead from adhering to a region of the insulating layer 510 on which the at least one solder resist layer 520 is disposed during the process of soldering (or “soldering”).

According to an embodiment, the at least one solder resist layer 520 may include a first solder resist layer 521 and/or a second solder resist layer 522 . In one example, the first solder resist layer 521 is disposed on at least one region of the top surface 510a of the insulating layer 510 to prevent lead from adhering to the top surface 510a of the insulating layer 510 . can In another example, the second solder resist layer 522 is disposed on at least one region of the lower surface 510b of the insulating layer 510 to prevent lead from adhering to the lower surface 510b of the insulating layer 510 . can

In one example, the first solder resist layer 521 may include at least one first opening 521a and/or a slot formed at a position corresponding to the at least one through hole 512 of the insulating layer 510 . It may include at least one second opening 521b formed at a position corresponding to at least one region of the . For example, when viewed from an upper end of the interposer structure 500 (eg, in the +z direction of FIG. 11A ), at least one region of the at least one first opening 521a overlaps the at least one through hole 512 . can be arranged as much as possible. As another example, when viewed from the top of the interposer structure 500 , at least one region of the at least one second opening 521b may be disposed to overlap with one region of the slot 513 .

In one example, the second solder resist layer 522 includes at least one third opening 522a and/or the insulating layer 510 formed at a position corresponding to the at least one through hole 512 of the insulating layer 510 . ) may include at least one fourth opening 522b formed at a position corresponding to one region of the slot 513 . For example, when viewed from the lower end of the interposer structure 500 (eg, in the -z direction of FIG. 11A ), at least one region of the at least one third opening 522a overlaps the at least one through hole 512 . can be arranged as much as possible. As another example, when viewed from the bottom of the interposer structure 500 , at least one region of the at least one fourth opening 522b may be disposed to overlap with one region of the slot 513 . In another example, the at least one third opening 522a may be formed at a position corresponding to the at least one first opening 521a of the first solder resist layer 521 , and the at least one fourth opening 522b may be formed. ) may be formed at a position corresponding to the at least one second opening 522b of the first solder resist layer 521 .

According to an embodiment, the at least one first conductive via 531 may be located inside the at least one through hole 512 of the insulating layer 510 . For example, the at least one first conductive via 531 may be formed in a cylindrical shape (or “hole shape”), but the shape of the at least one first conductive via 531 is limited to the above-described embodiment. it is not In one example, the at least one first conductive via 531 is formed of a conductive material (eg, metal), such that the top (eg, the +z direction in FIG. 10 ) and/or the bottom (eg, the +z direction of FIG. 10 ) of the interposer structure 500 . : Electronic components disposed in the -z direction of FIG. 10) may be electrically connected. For example, the at least one first conductive via 531 is an electronic component (eg, the first printed circuit board ( 331)) and an electronic component (eg, the second printed circuit board 332 of FIG. 5 ) disposed on the upper end (eg, in the +z direction of FIG. 10 ) of the interposer structure 500 may be electrically connected.

According to an embodiment, the at least one second conductive via 532 may be located inside the slot 513 of the insulating layer 510 . For example, the at least one second conductive via 532 may be formed in a rectangular bar shape having a specified length and/or thickness, but the shape of the at least one second conductive via 532 is described above. It is not limited to one embodiment. In one example, the at least one second conductive via 532 is formed of a conductive material, such that the top and/or bottom of the interposer structure 500 is substantially the same or similar to the at least one first conductive via 531 . It is possible to electrically connect electronic components disposed on the .

In another example, the at least one second conductive via 532 may not only electrically connect electronic components, but may also act as a ground that electromagnetically shields the interposer structure 500 . For example, the at least one second conductive via 532 may have a relatively larger area than the at least one first conductive via 531 , and may act as a ground, and may flow into the interposer structure 500 or , it is possible to shield noise leaking from the interposer structure 500 . In another example, the at least one second conductive via 532 is disposed in a region adjacent to the side surface 510c of the insulating layer 510 to shield noise introduced from the side surface of the interposer structure 500 or It is possible to shield the noise leaking out in the lateral direction from the inside of the poser structure 500 .

In the interposer structure 500 according to an embodiment, a separate plating portion (eg, the side plating portion 450 in FIG. 6 ) is formed on the side surface of the insulating layer 510 through at least one second conductive via 532 ). It is possible to electromagnetically shield noise that is introduced into the interposer structure 500 from the outside or leaks out from the interposer structure 500 without forming a . That is, the interposer structure 500 according to an embodiment electrically connects electronic components and omits a plating part manufacturing process through at least one second conductive via 532 , thereby simplifying the manufacturing process, Manufacturing cost can be reduced.

11A, 11B, 11C and/or 11D , according to an embodiment, the at least one first conductive via 531 and the at least one second conductive via 532 have different heights from each other. can be formed. In an embodiment, the at least one first conductive via 531 _{may be formed to have a first height h 1} , and the at least one second conductive via 532 may be lower than _{the first height h 1 .} It may be formed to have a second height (h _{2 ).} For example, since the at least one second conductive via 532 is formed inside the slot 513 having a larger area than the at least one through hole 512 , it is connected to the at least one first conductive via 531 . It may be formed to have a lower height than that, and a description thereof will be provided later.

In one example, the at least one first conductive via 531 is formed in a direction (eg, a direction in which the at least one first opening 521a of the first solder resist layer 521 is formed from the top surface 510a of the insulating layer 510 ). : at least one third opening 522a of the second solder resist layer 522 in the lower end surface 510b of the first protruding portion 531a and/or the insulating layer 510 protruding in the +z direction in FIG. 11C ) ) may include a second protruding portion 531b protruding in a direction (eg, the -z direction of FIG. 11C ). For example, the first protruding portion 531a may protrude from the top surface 510a of the insulating layer 510 to one surface of the first solder resist layer 521 in the +z direction. As another example, the second protruding portion 531b may protrude from the lower surface 510b of the insulating layer 510 to one surface of the second solder resist layer 522 in the -z direction.

In another example, the at least one second conductive via 532 may be formed to have substantially the same height as the insulating layer 510 . For example, when the insulating layer 510 is viewed from the side (eg, in the -y direction of FIG. 11C ), one end of the at least one second conductive via 532 (eg, one end in the +z direction of FIG. 10 ) is It may be located on the same line as the top surface 510a of the insulating layer 510 , and the other end (eg, one end in the -z direction of FIG. 10 ) may be located on the same line as the bottom surface 510b of the insulating layer 510 . have. As another example, a portion of the at least one second conductive via 532 may have a second opening 521b of the first solder resist layer 521 and/or a fourth opening 522b of the second solder resist layer 522 . It may be exposed to the outside of the interposer structure 500 through the

According to an embodiment, the presolder 540 may be a top region (eg, a region in a +z direction in FIG. 10 ) and/or a bottom region (eg, a region in a -z direction in FIG. 10 ) of the interposer structure 500 . It is disposed in the interposer structure 500 , and may serve to fix the electronic component disposed on the upper end and/or lower end of the interposer structure 500 to the interposer structure 500 .

In one embodiment, the presolder 540 may include a first presolder 541 and/or a second presolder 542 . In one example, the first presolder 541 is a first protruding portion ( 531a) and/or the at least one second conductive via 532 exposed to the outside of the interposer structure 500 through the at least one second opening 521b. For example, the first presolder 541 may include one end of the first protruding portion 531a (eg, one end in the +z direction of FIG. 11C ) and/or one end of the at least one second conductive via 532 (eg, one end of the second conductive via 532 ). : One end facing the +z direction of FIG. 11c) may be seated.

In another example, the second presolder 542 is a second protruding portion of the at least one first conductive via 531 exposed to the outside of the interposer structure 500 through the at least one third opening 522a. 531b) and/or in one region of the at least one second conductive via 532 exposed to the outside of the interposer structure 500 through the at least one fourth opening 522b. For example, the second presolder 542 may include the other end of the second protruding portion 531b (eg, one end in the -z direction of FIG. 11C ) and/or the other end of the at least one second conductive via 532 . (eg, one end in the -z direction of FIG. 11C ).

According to an embodiment, the interposer structure 500 may secure electronic components to the top and/or bottom of the interposer structure 500 through the first presolder 541 and/or the second presolder 542 . can For example, the interposer structure 500 applies heat to the first presolder 541 to form a second printed circuit board ( Example: The second printed circuit board 332 of FIG. 5) may be soldered. As another example, the interposer structure 500 applies heat to the second presolder 542 to form a lower end of the interposer structure 500 (eg, -z direction in FIGS. 10 and 11C ) on a first printed circuit board (eg, : The first printed circuit board 331 of FIG. 5) may be soldered.

According to one embodiment, the interposer structure 500 includes at least one first conductive via 531 and/or bar including a first protruding portion 531a and/or a second protruding portion 531b. A space in which the presolder 540 can be seated can be formed without forming a separate land through the at least one second conductive via 532 in the shape of the second conductive via 532 . In one example, as the interposer structure 500 is formed as a landless structure that does not include a land, at least one first conductive via 531 to secure a space for the land to be formed. _{A pitch P 2} between the and at least one second conductive via 532 may not be spaced apart by a specified distance or more. For example, the above-described interposer structure 500 having a landless structure has at least one first conductive via 531 and at least one second conductive via 532 compared to an interposer structure including a land. ) and the distance (P ₂ ) between them can be formed close. According to an embodiment, the interposer structure 500 forms a close distance between the at least one first conductive via 531 and the at least one second conductive via 532 , thereby forming the upper end of the interposer structure 500 . and/or electronic components may be disposed or mounted at a high density on a plurality of printed circuit boards disposed at the bottom (eg, the first printed circuit board 331 and the second printed circuit board 332 of FIG. 5 ). .

Hereinafter, a manufacturing process of the interposer structure 500 according to an exemplary embodiment will be described with reference to FIGS. 12 and 13A to 13E .

12 is a flowchart illustrating an operation of manufacturing an interposer structure according to another exemplary embodiment. 13A is a diagram for explaining an operation of forming at least one through hole and/or a slot in a printed circuit board, according to an embodiment, and FIG. 13B is, according to an embodiment, at least one It is a view for explaining an operation of filling a through hole and/or slot with a conductive material and planarizing a printed circuit board, and FIG. 13C illustrates an operation of etching the printed circuit board, according to an embodiment 13D is a view for explaining an operation of forming a solder resist layer on the upper surface and/or the lower surface of the printed circuit board, according to an embodiment, and FIG. 13E is, It is a diagram for explaining an operation of forming a presolder, according to an embodiment.

13A to 13E show manufacturing operations for some regions (eg, region B in FIG. 10 ) of the interposer structure (or “printed circuit board structure”), and other regions of the interposer structure are manufactured through the same operation. can be Hereinafter, in describing the manufacturing operation of the interposer structure of FIG. 12, it will be described with reference to the configuration of FIGS. 13A to 13E.

12 and 13A , in the manufacturing operation of the interposer structure according to an exemplary embodiment, the printed circuit board 501 is processed in operation 1201 to penetrate at least one region of the printed circuit board 501 . may form a through hole 512 (or “via hole”) (eg, at least one through hole 512 in FIG. 11C ) and/or a slot 513 (eg, slot 513 in FIG. have. For example, the printed circuit board 501 may include an insulating layer 510 (eg, the insulating layer 510 of FIG. 11A ) and/or a top surface 510a of the insulating layer 510 (eg, the top surface of FIG. 11A ). 510a) and a copper foil 502 (or “copper clad”) disposed on a bottom surface 510b (eg, bottom surface 510b in FIG. 11A ), and at least one through The hole 512 may pass through at least one region of the insulating layer 510 and the copper foil 502 . According to an embodiment, the at least one through hole 512 may be formed by drilling at least one region of the printed circuit board 501 . However, drilling is only an example of a processing method of forming the at least one through hole 512, and according to another embodiment, the at least one through hole 512 is formed through laser processing or punching processing. may be formed. According to an embodiment, the slot 513 is formed to have a relatively large area compared to the at least one through-hole 512 , and is substantially the same as or similar to a processing method of forming the at least one through-hole 512 . can be formed with For example, the slot 513 may be formed through at least one of a plurality of drilling processing, a plurality of punching processing, or a plurality of laser processing, but is not limited thereto.

Referring to FIGS. 12 and 13B , the structure manufacturing operation of the interposer according to an embodiment is performed in operation 1202 , at least one through hole 512 and/or slot 513 formed in the printed circuit board 501 inside. It can be filled with a conductive material. In one example, operation 1202 may fill the interior of at least one through hole 512 and/or slot 513 with a conductive material (or “conductive material”) via a hole plugging printing technique, but at least A method of filling the inside of one through hole 512 with a conductive material is not limited to the above-described embodiment. In another example, the conductive material filled in the at least one through hole 512 and/or the slot 513 may be a material other than copper. The conductive material may include, for example, at least one of silver paste, aluminum, silver-aluminum, carbon paste, or carbon nanotube paste. However, the present invention is not limited thereto.

The structure manufacturing operation of the interposer according to an embodiment may planarize (or “polish”) the top surface and/or the bottom surface of the printed circuit board 501 in operation 1203 . For example, in operation 1202 , in the process of filling the inside of the at least one through hole 512 and/or the slot 513 with a conductive material, a region protruding toward the top and/or bottom of the printed circuit board 501 is formed. can be In one example, the region protruding toward the top and/or bottom of the printed circuit board 501 may be removed through a planarization process. In one example, in operation 1203 , the top surface and/or the bottom surface of the printed circuit board 501 may be planarized through brush processing or buffing. In another example, in operation 1203 , the top surface and/or the bottom surface of the printed circuit board 501 may be planarized through a polishing process. For example, the polishing process may include at least one of mechanical polishing or chemical mechanical polishing (CMP).

According to an embodiment, the at least one first conductive via 531 (eg, at least one of the at least one conductive via 531 in FIG. A first conductive via 531 ) and/or at least one second conductive via 532 (eg, at least one second conductive via 532 of FIG. 11A ) may be formed. In operation 1202 , the at least one second conductive via 532 is formed by filling the slot 513 having a larger area than the at least one through hole 512 with a conductive material, so at least one second conductive via ( The 532 may be formed to have a relatively low height compared to the at least one first conductive via 531 . For example, the at least one first conductive via 531 _{is formed to have a first height h 1} , and the at least one second conductive via 532 has a second height lower than _{the first height h 1 .} (h ₂ ) It may be formed to have.

12 and 13C , in the structure manufacturing operation of the interposer according to an embodiment, the insulating layer 510 is etched by etching the top surface and/or the bottom surface of the printed circuit board 501 in operation 1204 . ) may be removed from the copper foil 502 disposed on the upper surface and the lower surface. In one example, the at least one first conductive via 531 and/or the at least one second conductive via 532 are formed of a material other than copper, such that a top surface and/or a bottom surface of the printed circuit board 501 . At least one first conductive via 531 and/or at least one second conductive via 532 may not be removed during the surface etching process. In another example, as the copper foil 502 disposed on the top surface 510a and the bottom surface 510b of the insulating layer 510 is removed, the top surface 510a and/or the bottom surface of the insulating layer 510 . A partial region of the at least one first conductive via 531 protruding from the 510b may be formed. For example, in operation 1204 , the first protruding portion 531a of the at least one first conductive via 531 protruding in the +z direction from the top surface 510a of the insulating layer 510 (eg, in FIG. 11C ) The first protruding portion 531a) and/or the second protruding portion 531b of the at least one first conductive via 530 protruding in the -z direction from the bottom surface 510b of the insulating layer 510 (eg: The second protruding portion 531b of FIG. 11C ) may be formed.

12 and 13D , in the operation of manufacturing the interposer structure according to an embodiment, in operation 1205 , solder is applied to at least one region of the top surface 510a and/or the bottom surface 510b of the insulating layer 510 . A resist layer 520 (eg, the solder resist layer 520 of FIG. 11A ) may be formed. In one example, in operation 1205 , at least one first conductive via 531 and/or at least one second conductive via 532 of the top surface 510a and/or the bottom surface 510b of the insulating layer 510 . After applying solder resist ink to an area except for one area of However, the present invention is not limited thereto. For example, in operation 1205 , a first solder resist layer 521 (eg, the first solder resist layer 521 of FIG. 11A ) may be formed on the top surface 510a of the insulating layer 510 , and insulation A second solder resist layer 522 (eg, the second solder resist layer 522 of FIG. 11A ) may be formed on the bottom surface 510b of the layer 510 .

In one example, as the solder resist ink is applied to an area other than one area of the at least one first conductive via 531 and/or the at least one second conductive via 532 , the first solder resist layer 521 is At least one first opening 521a and/or at least one second opening 521b are formed in the second solder resist layer 522, and at least one third opening 522a and/or at least one A fourth opening 522b may be formed. For example, at least one first opening 521a is formed in a region corresponding to at least one first conductive via 531 of the first solder resist layer 521 , and at least one second conductive via 532 is formed. ), at least one second opening 521b may be formed in a region corresponding to one region. As another example, at least one third opening 522a is formed in a region corresponding to the at least one first conductive via 531 of the second solder resist layer 522 , and at least one second conductive via 532 is formed. At least one second opening 522b may be formed in a region corresponding to one region of .

12 and 13E , in operation 1206 , in operation 1206 , the structure manufacturing operation of the interposer may be performed on at least one first conductive via 531 and/or at least one second conductive via 532 . A solder 540 (eg, the presolder 540 of FIG. 11A ) may be formed. In one example, in operation 1206 , the first protruding portion 531a of the at least one first conductive via 531 and/or one end of the at least one second conductive via 532 (eg, the +z direction in FIG. 13E ) A first presolder 541 may be formed in at least one region of the ( one end of the ). In another example, the second protruding portion 531b of the at least one first conductive via 531 and/or the other end of the at least one second conductive via 532 (eg, one end in the -z direction of FIG. 13E ) A second presolder 542 may be formed in at least one region of the .

In one example, the first presolder 541 is a first protruding portion 531a exposed to the outside through at least one first opening 521a and/or at least one second opening 521b and/or at least After applying or squeezing solder cream (or “solder paste”) to one region of one second conductive via 532 , the process of melting the applied solder cream (or It may be formed through a "reflow process"), but is not limited thereto. In another example, the second presolder 542 may include a second protruding portion 531b exposed to the outside through the at least one third opening 522a and/or the at least one fourth opening 522b and/or at least It may be formed by applying solder cream to one region of one second conductive via 532 and then melting the applied solder cream, but is not limited thereto.

The manufacturing operation of the interposer structure according to an embodiment may manufacture the interposer structure 500 that does not include a land for seating the presolder 540 through the above-described operations 1201 to 1206 .

14 is an enlarged view of an interposer structure and a region C of the interposer structure according to another embodiment, and FIG. 15A is a cross-sectional view taken along the II′ direction of the interposer structure of FIG. and FIG. 15B is a cross-sectional view of the interposer structure of FIG. 14 taken in the II' direction, according to another embodiment. The interposer structure 600 illustrated in FIG. 14 may be a structure of the interposer 340 disposed between the first printed circuit board 331 and the second printed circuit board 332 of FIG. 5 .

14, 15A, and/or 15B, the interposer structure 600 (or "printed circuit board structure") according to an embodiment includes an insulating layer 610 (eg, the insulating layer ( 341 ), at least one layer of solder resist (or “solder resist”) 620 , at least one conductive via 630 (eg, at least one conductive via 342 in FIG. 5 ). ), a presolder 640 , and/or a conductive pad 650 . The interposer structure 600 according to an embodiment may be a structure in which a conductive pad 650 is added to the interposer structure 400 of FIG. 6 and/or the interposer structure 500 of FIG. 10 .

According to an embodiment, the insulating layer 610 may be formed of a material having a non-conductive material, and may have a closed-curve shape. For example, the insulating layer 610 may be formed in a band shape forming a closed curve when viewed from the top (eg, the +z direction of FIG. 14 ). In one example, the insulating layer 610 forms a closed curve and has at least one side wall 611 having a specified thickness and/or at least one through hole penetrating at least one region of the insulating layer 610 ( 612) (or “via hole”). In one example, the at least one sidewall 611 may form at least one side surface of the insulating layer 610 . In another example, the at least one through hole 612 may be formed in at least one region of the inner region of the insulating layer 610 spaced apart from the side surface of the insulating layer 610 . For example, the at least one through hole 612 may be formed to penetrate from one surface of the insulating layer 610 toward the +z direction to the surface of the insulating layer 610 toward the -z direction, but is limited thereto. no.

According to another embodiment (not shown), the insulating layer 610 is a bar-shaped slot (not shown) having a specified length and/or thickness penetrating at least one region of the insulating layer 610 (eg: It may further include a slot 513 of FIG. 10 . The above-described slot may be substantially the same as or similar to the slot 513 of FIG. 10 , and a redundant description will be omitted below.

According to an embodiment, the at least one solder resist layer 620 may be disposed on at least one region of the top surface 610a and/or the bottom surface 610b of the insulating layer 610 . For example, the at least one solder resist layer 620 may be disposed on the top and/or bottom of the interposer structure 600 for electronic components (eg, the first printed circuit board 331 of FIG. 5 , the second printed circuit board ( 332)), it is possible to prevent lead from adhering to a region of the insulating layer 610 on which the at least one solder resist layer 620 is disposed during the process of soldering (or “soldering”).

According to an embodiment, the at least one solder resist layer 620 may include a first solder resist layer 621 and/or a second solder resist layer 622 . In one example, the first solder resist layer 621 is disposed on at least one region of the top surface 610a of the insulating layer 610 to prevent lead from adhering to the top surface 610a of the insulating layer 610 . can In another example, the second solder resist layer 622 is disposed on at least one region of the lower surface 610b of the insulating layer 610 to prevent lead from adhering to the lower surface 610b of the insulating layer 610 . can

In one example, the first solder resist layer 621 may include at least one first opening 621a formed at a position corresponding to the at least one through hole 612 of the insulating layer 610 . For example, when viewed from an upper end of the interposer structure 600 (eg, in the +z direction of FIGS. 15A and 15B ), at least one region of the at least one first opening 621a is at least one through hole 612 . ) and may be arranged to overlap. As another example, the at least one first opening 621a has a larger area than the at least one through hole 612 , so that the outer peripheral surface of the at least one first opening 621a is the outer peripheral surface of the at least one through hole 612 . can be wrapped around The shape of the at least one first opening 621a is not limited to the above-described embodiment, and according to another embodiment (not shown), the at least one first opening 621a is wider than the at least one through-hole 612 . It may be formed in a narrow area or may be formed in substantially the same area.

In one example, the second solder resist layer 622 may include at least one second opening 622a formed at a position corresponding to the at least one through hole 612 of the insulating layer 610 . For example, when viewed from the lower end of the interposer structure 600 (eg, in the -z direction of FIGS. 15A and 15B ), at least one region of the at least one second opening 622a is at least one through hole 612 . ) and may be arranged to overlap. As another example, the at least one second opening 622a is formed to have a larger area than the at least one through hole 612 , so that the outer circumferential surface of the at least one second opening 622a is the outer circumferential surface of the at least one through hole 612 . can be wrapped around The shape of the at least one second opening 622a is not limited to the above-described embodiment, and according to another embodiment (not shown), the at least one second opening 622a is wider than the at least one through hole 612 . It may be formed in a narrow area or may be formed in substantially the same area.

As another example, the at least one second opening 622a may be formed at a position corresponding to the at least one first opening 621a of the first solder resist layer 621 . In one example, the insulating layer ( A partial region of the 610 and/or a partial region of the at least one conductive via 630 may be exposed to the outside of the interposer structure 600 .

According to an embodiment, the at least one conductive via 630 may be located inside the at least one through hole 612 of the insulating layer 610 . The at least one conductive via 630 may be formed of a conductive material (eg, metal) to electrically connect electronic components disposed in the interposer structure 600 . For example, the at least one conductive via 630 is an electronic component (eg, the first printed circuit board 331 of FIG. 5 ) disposed at the lower end (eg, -z direction of FIG. 14 ) of the interposer structure 600 . ) and an electronic component (eg, the second printed circuit board 332 of FIG. 5 ) disposed on the upper end (eg, the +z direction of FIG. 14 ) of the interposer structure 600 may be electrically connected. As another example, the at least one conductive via 630 may include a cylindrical (or “hole-shaped”) conductive via (eg, the at least one first conductive via 531 of FIG. 11D ), but is not limited thereto. it is not According to another embodiment (not shown), the at least one conductive via 630 is located inside the slot and has a rectangular bar-shaped conductive via (eg, at least one of FIG. 11D ) having a specified length and/or thickness. of the second conductive via 532).

In one example, the at least one conductive via 630 is formed in a direction (eg, in FIG. 15a, at least one second opening ( A second protruding portion 632 protruding in a direction in which 622a is formed (eg, the -z direction of FIGS. 15A and 15B ) may be included. For example, the first protruding portion 631 of the at least one conductive via 630 protrudes from the top surface 610a of the insulating layer 610 to one surface of the first solder resist layer 621 facing the +z direction. can be As another example, the second protruding portion 632 of the at least one conductive via 630 may protrude from the bottom surface 610b of the insulating layer 610 to one surface of the second solder resist layer 622 in the -z direction. can

According to an embodiment, the conductive pad 650 may be positioned inside the at least one through hole 612 of the insulating layer 610 to surround the outer peripheral surface of the at least one conductive via 630 . In one example, the conductive pad 650 may be formed by plating the inside of the at least one through hole 612 . In another example, the conductive pad 650 is positioned between the inner side of the at least one through hole 612 and the outer circumferential surface of the at least one conductive via 630 , so that the at least one conductive via 630 is formed in the insulating layer 610 . can be firmly fixed to the

According to an embodiment, the presolder 640 may be a top region (eg, a region in the +z direction of FIGS. 15A and 15B ) and/or a bottom region (eg, FIGS. 15A and 15B ) of the interposer structure 600 . -z-direction region), and may serve to fix the electronic component disposed at the upper end and/or lower end of the interposer structure 600 to the interposer structure 600 .

In one embodiment, the presolder 640 may include a first presolder 641 and/or a second presolder 642 . In one example, the first presolder 641 includes at least one conductive via 630 exposed to the outside of the interposer structure 600 through the at least one first opening 621a of the first solder resist layer 621 . ) may be disposed on the first protruding portion 631 . For example, the first presolder 641 may be seated on one end of the first protruding portion 631 (eg, one end in the +z direction of FIGS. 15A and 15B ). In another example, the second presolder 642 includes at least one conductive via 630 exposed to the outside of the interposer structure 600 through the at least one second opening 622a of the second solder resist layer 622 . ) may be disposed on the second protruding portion 632 . For example, the second presolder 642 may be seated on one end of the second protruding portion 632 (eg, one end in the -z direction of FIGS. 15A and 15B ).

According to an embodiment, the interposer structure 600 may secure electronic components to the top and/or bottom of the interposer structure 600 via the first presolder 641 and/or the second presolder 642 . can For example, the interposer structure 600 applies heat to the first presolder 641 to form a second printed circuit board ( Example: The second printed circuit board 332 of FIG. 5) may be soldered. As another example, the interposer structure 600 applies heat to the second presolder 642 so that the lower end of the interposer structure 600 (eg, the -z direction of FIGS. 15A and 15B ) is formed on a first printed circuit board (eg, : The first printed circuit board 331 of FIG. 5) may be soldered.

According to an embodiment, the interposer structure 600 includes a first protruding portion 631 and/or a second protruding portion 632 protruding in an upper direction and/or a lower direction with respect to the insulating layer 610 . A space in which the presolder 640 can be seated may be formed without forming a land through the at least one conductive via 630 . In one example, as the interposer structure 600 is formed in a landless structure that does not include a land, a pitch between the conductive vias 630 to secure a space for the land to be formed. )(P ₃ ) may not be separated more than a specified distance. For example, the aforementioned interposer structure 600 having a landless structure may form a distance between the conductive vias 630 closer than that of the interposer structure including the land. According to an embodiment, the interposer structure 600 _{forms a distance P 3} between the conductive vias 630 to be close, so that a plurality of printed circuit boards disposed on top and/or bottom of the interposer structure 600 . Electronic components (eg, the first printed circuit board 331 and the second printed circuit board 332 of FIG. 5 ) may be disposed or mounted at a high density.

Referring to FIG. 15A , according to an embodiment, the interposer structure 600 may further include a side plating part 660 . In one example, the side plating portion 660 may be positioned on at least one region of the side surface 610c of the insulating layer 610 to electromagnetically shield the interposer structure 600 . In the present disclosure, the side surface 610c of the insulating layer 610 is positioned between the top surface 610a and the bottom surface 610b of the insulating layer 610, and the space between the top surface 610a and the bottom surface 610b. may mean a side surrounding the . For example, the side plating unit 660 may shield noise generated inside the interposer structure 600 (eg, noise generated from electronic components) from leaking to the outside of the interposer structure 600 , or Noise introduced from the outside of the structure 600 may be shielded.

Referring to FIG. 15B , according to another embodiment, the interposer structure 600 may not include a side plating portion for electromagnetically shielding the interposer structure 600 . In one example, the at least one conductive via 630 may include a bar-shaped conductive via (eg, the at least one second conductive via 532 of FIG. 11D ), and the bar-shaped conductive via may include: It may be formed to have a specified length and/or thickness to operate as a ground. The interposer structure 600 according to another embodiment may electromagnetically shield the interposer structure 600 without including a separate side plating part through a bar-shaped conductive via serving as a ground.

Hereinafter, a manufacturing process of the interposer structure 600 according to an exemplary embodiment will be described with reference to FIGS. 16 and 17A to 17F .

16 is a flowchart illustrating an operation of manufacturing an interposer structure according to another exemplary embodiment.

17A is a view for explaining an operation of forming at least one through hole in a printed circuit board, according to an exemplary embodiment. 17B is a diagram for explaining an operation of plating the inside of at least one through hole and/or a side surface of an insulating layer, according to an embodiment. 17C is a diagram for describing an operation of filling at least one through hole with a conductive material and planarizing a printed circuit board, according to an exemplary embodiment. 17D is a diagram for describing an operation of etching a printed circuit board, according to an exemplary embodiment. 17E is a view for explaining an operation of forming a solder resist layer on an upper surface and/or a lower surface of a printed circuit board, according to an embodiment. 17F is a diagram for explaining an operation of forming a presolder, according to an exemplary embodiment.

17A to 17E show a manufacturing operation for some regions (eg, region C in FIG. 14 ) of an interposer structure (or “printed circuit board structure”), and other regions of the interposer structure are manufactured through the same operation. can be Hereinafter, in describing the manufacturing operation of the interposer structure of FIG. 16, it will be described with reference to the configuration of FIGS. 17A to 17E.

16 and 17A , in the manufacturing operation of the interposer structure according to an embodiment, the printed circuit board 601 is processed in operation 1601 to penetrate at least one region of the printed circuit board 601 . A through hole 612 (or “via hole”) (eg, at least one through hole 612 of FIG. 7 ) may be formed. For example, the printed circuit board 601 may include an insulating layer 610 (eg, the insulating layer 610 of FIG. 14 ) and/or a top surface 610a of the insulating layer 610 (eg, the top surface of FIG. 14 ). 610a) and a copper foil 602 (or "copper clad") disposed on a bottom surface 610b (eg, bottom surface 610b of FIG. 14 ), and at least one through The hole 612 may pass through at least one region of the insulating layer 610 and the copper foil 602 . According to an embodiment, the at least one through hole 612 may be formed by drilling at least one region of the printed circuit board 601 . However, drilling is only an example of a processing method of forming the at least one through-hole 612, and according to another embodiment, the at least one through-hole 612 is formed through laser processing or punching processing. may be formed. According to another embodiment, the manufacturing operation of the interposer structure may form at least one through hole 612 and/or a slot (eg, the slot 513 of FIG. 11D ) in operation 1601 . In one example, the slot may be formed to have a larger area than the at least one through hole 612 . In another example, the slot may be formed in substantially the same or similar manner to the machining method of forming the at least one through hole 612 . For example, the slot may be formed through at least one of a plurality of drilling processing, a plurality of punching processing, or a plurality of laser processing, but is not limited thereto.

16 and 17B , in the structure manufacturing operation of the interposer according to an embodiment, at least one region of the printed circuit board 601 may be plated in operation 1602 . In one example, in operation 1602 , at least one region of the inside of at least one through hole 612 of the printed circuit board 601 and/or at least one region of a side surface of the printed circuit board 601 may be plated. Through the operation 1602 described above, the conductive pad 650 (eg, the conductive pad 650 of FIGS. 15A and 15B ) and/or the side plating part 660 (eg: A side plating portion 660 of FIG. 15A may be formed. In the process of forming the side plating part 660 , for example, after plating the side surface of the insulating layer 610 , a dry film is applied to at least one region of the side surface of the insulating layer 610 where the side plating part is to be formed. It may include an operation of attaching the . In another example, by exposing, developing, and etching at least one region of the side surface of the insulating layer 610 to which the dry film is attached, and then peeling the dry film attached to the insulating layer 610, the insulating layer 610 ), a side plating part 660 may be formed in at least one region of the side surface. In another example, in operation 1602 , only the inside of the at least one through hole 612 of the printed circuit board 601 may be plated, so that the side plating portion 660 may not be formed.

16 and 17C , the structure manufacturing operation of the interposer according to an embodiment may include a conductive material (or “conductive material”) inside the at least one through hole 612 formed in the printed circuit board 601 in operation 1603 . ") can be filled. In one example, in operation 1603, the inside of the at least one through hole 612 may be filled with a conductive material through a hole plugging printing technique, but the inside of the at least one through hole 612 is filled with a conductive material. The method is not limited to the above-described embodiment. In another example, the conductive material filled in the at least one through hole 612 may be a material other than copper. The conductive material may include, for example, at least one of silver paste, aluminum, silver-aluminum, carbon paste, or carbon nanotube paste. However, the present invention is not limited thereto. Although not shown in the drawing, in operation 1603, the inside of the slot may be filled with a conductive material.

The structure manufacturing operation of the interposer according to an embodiment may planarize (or “polish”) the top surface and/or the bottom surface of the printed circuit board 601 in operation 1604 . For example, in the process of filling the inside of the at least one through hole 612 with a conductive material in operation 1603 , a region protruding toward the top and/or bottom of the printed circuit board 601 may be formed. The structure manufacturing operation of the interposer according to an embodiment may include at least one conductive via 630 (eg, FIG. The conductive via 630 of FIGS. 15A and 15B may be formed. In one example, in operation 1604 , the top surface and/or the bottom surface of the printed circuit board 601 may be planarized through brush processing or buffing. In another example, in operation 1604 , the top surface and/or the bottom surface of the printed circuit board 601 may be planarized through a polishing process. For example, the polishing process may include at least one of mechanical polishing or chemical mechanical polishing (CMP).

16 and 17D , in the structure manufacturing operation of the interposer according to an embodiment, the insulating layer 610 is etched by etching the top surface and/or the bottom surface of the printed circuit board 601 in operation 1605 . ) may be removed from the copper foil 602 disposed on the upper surface and the lower surface. In one example, as the at least one conductive via 630 is formed of a material other than copper, the at least one conductive via 630 is formed in the process of etching the top and/or bottom surfaces of the printed circuit board 601 . may not be removed. In another example, as the copper foil 602 disposed on the top surface 610a and the bottom surface 610b of the insulating layer 610 is removed, the top surface 610a and/or the bottom surface of the insulating layer 610 is removed. A partial region of the at least one conductive via 630 protruding from the 610b may be formed. For example, in operation 1605 , the first protruding portion 631 of the at least one conductive via 630 protruding in the +z direction from the top surface 610a of the insulating layer 610 (eg, FIGS. 15A and 15B ). of the first protruding portion 631) and/or the second protruding portion 632 of the at least one conductive via 630 protruding in the -z direction from the bottom surface 610b of the insulating layer 610 (eg, in FIG. 15a, the second protruding portion 632 of FIG. 15b) may be formed.

16 and 17E , in the structure manufacturing operation of the interposer according to an embodiment, in operation 1606 , solder is applied to at least one region of the upper surface 610a and/or the lower surface 610b of the insulating layer 610 . A resist layer 620 (eg, the solder resist layer 620 of FIGS. 15A and 15B ) may be formed. In one example, in operation 1606 , solder resist ink is applied to a region other than a region where at least one conductive via 630 of the top surface 610a and/or the bottom surface 610b of the insulating layer 610 is disposed. ), the solder resist layer 620 may be formed through a process of curing the applied ink by applying UV (ultraviolet ray) to the applied ink, but is not limited thereto. For example, a first solder resist layer 621 (eg, the first solder resist layer 621 of FIGS. 15A and 15B ) may be formed on the upper surface 610a of the insulating layer 610 in operation 1605 . and a second solder resist layer 622 (eg, the second solder resist layer 622 of FIGS. 15A and 15B ) may be formed on the lower surface 610b of the insulating layer 610 . As another example, as the solder resist ink is applied to an area other than the area where the conductive vias 630 are disposed, at least one agent is applied to the area corresponding to the at least one conductive via 630 of the first solder resist layer 621 . One opening 621a (eg, at least one first opening 621a of FIGS. 15A and 15B ) may be formed. Similarly, in the region corresponding to the at least one conductive via 630 of the second solder resist layer 622 , at least one second opening 622a (eg, at least one second opening in FIGS. 15A and 15B ) is provided. (622a)) may be formed.

16 and 17F , the structure manufacturing operation of the interposer according to an exemplary embodiment includes a first protruding portion 631 and/or a second protruding portion 632 of the at least one conductive via 630 in operation 1607 . ) may be formed with a presolder 640 (eg, the presolder 640 of FIG. 14 ). In one example, in operation 1607 , a first presolder 641 is formed on at least one region of the first protruding portion 631 of the at least one conductive via 630 , and the first presolder 641 of the at least one conductive via 630 is A second presolder 642 may be formed on at least one region of the second protruding portion 632 . The first presolder 641 and/or the second presolder 642 may be applied to the first protruding portion 631 and/or the second protruding portion 632 using, for example, a metal mask. After applying or squeezing solder cream (or "solder paste"), it is formed through a process of melting the applied solder cream (or "reflow process"). However, the present invention is not limited thereto. The manufacturing operation of the interposer structure according to an embodiment may manufacture the interposer structure 600 that does not include a land for seating the presolder 640 through the above-described operations 1601 to 1607 .

The interposer structures 400, 500, and 600 of the present disclosure include insulating layers 341, 410, 510, and 610, first solder resist layers 421, 521, 621 (solder resist layer), and a second solder resist layer ( 422, 522, 622, at least one conductive via 342, 430, 630 (via), a first presolder 441, 541, 641 (presolder) and a second presolder 442, 542, 642 may include The insulating layers 341 , 410 , 510 , and 610 may include at least one through hole. The first solder resist layers 421 , 521 , and 621 are positioned in at least one region of the top surface of the insulating layers 341 , 410 , 510 , and 610 , and are formed in a region corresponding to the at least one through hole. It may include one first opening 421a, 521a, 621a. The second solder resist layers 422 , 522 , and 622 are positioned in at least one region of the bottom surface of the insulating layers 341 , 410 , 510 , and 610 , and are formed in a region corresponding to the at least one through hole. One second opening 422 , 521b , 522b , and 622a may be included. The at least one conductive via 342 , 430 , and 630 may be located in the at least one through hole. The at least one conductive via 342 , 430 , 630 includes first protruding portions 431 , 531a and 631 protruding in the direction of the at least one first opening 421a , 521a , 621a (protruding portion) and second protruding portions 432 , 531b and 632 protruding in the direction of the at least one second opening 422 , 521b , 522b and 622a . The first presolders 441 , 541 , and 641 may be disposed on top of the first protruding portions 431 , 531a , and 631 of the at least one conductive via 342 , 430 , and 630 . The second presolders 442 , 542 , and 642 may be disposed at lower ends of the second protruding portions 432 , 531b and 632 of the at least one conductive via 342 , 430 , and 630 .

The first protruding portions 431 , 531a , 631 of the interposer structures 400 , 500 , and 600 of the present disclosure are formed on the top surface of the insulating layers 341 , 410 , 510 and 610 with the first solder resist It may be formed to protrude up to the layers 421 , 521 , and 621 .

The second protruding portions 432 , 531b , and 632 of the interposer structures 400 , 500 and 600 of the present disclosure are formed on the lower surface of the insulating layers 341 , 410 , 510 and 610 with the second solder resist It may be formed to protrude up to the layers 422 , 522 , and 622 .

The interposer structures 400 , 500 , and 600 of the present disclosure include a conductive pad 650 positioned inside the at least one through hole and disposed to surround the outer circumferential surface of the at least one conductive via 342 , 430 , 630 . may include more.

The interposer structures 400 , 500 , and 600 of the present disclosure are located in at least one region of a side surface of the insulating layers 341 , 410 , 510 , and 610 , and electromagnetically connect the interposer structures 400 , 500 , and 600 . The shielding side plating parts 450 and 660 may be further included.

The at least one conductive via 342 , 430 , and 630 of the interposer structures 400 , 500 , and 600 of the present disclosure may be formed in a cylindrical shape.

The interposer structures 400 , 500 and 600 of the present disclosure include a first printed circuit board 331 and the interposer structures 400 , 500 and 600 disposed on top of the interposer structures 400 , 500 and 600 . It may further include a second printed circuit board 332 disposed at the bottom of the. The first printed circuit board 331 may be electrically connected to the second printed circuit board 332 through the at least one conductive via 342 , 430 , and 630 .

The first printed circuit board 331 of the interposer structures 400, 500, and 600 of the present disclosure is connected to the interposer structures 400, 500, and 600 through the first presolders 441, 541, and 641. can be fixed to the top of the

The second printed circuit board 332 of the interposer structures 400, 500, and 600 of the present disclosure is connected to the interposer structures 400, 500, and 600 through the second presolders 442, 542, and 642. can be fixed at the bottom of the

The insulating layers 341 , 410 , 510 , and 610 of the interposer structures 400 , 500 and 600 of the present disclosure, when viewed from the top of the interposer structures 400 , 500 and 600 , the first printed circuit It may be formed in a band shape formed along at least one edge of the substrate 331 or the second printed circuit board 332 .

The interposer structures 400 , 500 , and 600 of the present disclosure include insulating layers 341 , 410 , 510 , and 610 , first solder resist layers 421 , 521 , 621 , and second solder resist layers 422 , 522 , 622 . ), the first conductive vias 530 and 531 (via), the second conductive via 532 , the first presolders 441 , 541 , 641 (presolder), and the second presolders 442 , 542 , 642 may include The insulating layers 341 , 410 , 510 , and 610 may include at least one through hole and a slot. The first solder resist layers 421 , 521 , and 621 are positioned in at least one region of the top surface of the insulating layers 341 , 410 , 510 , and 610 , and are formed in a region corresponding to the at least one through hole. It may include one first opening 421a , 521a , and 621a and at least one second opening 422 , 521b , 522b , and 622a formed in an area corresponding to at least one area of the slot. The second solder resist layers 422 , 522 , and 622 are positioned in at least one region of the bottom surface of the insulating layers 341 , 410 , 510 , and 610 , and are formed in a region corresponding to the at least one through hole. It may include one third opening and at least one fourth opening formed in a region corresponding to at least one region of the slot. The first conductive vias 530 and 531 may be positioned in the at least one through hole and formed to have a first height. The first conductive vias 530 and 531 may include a first protrusion portion 431 , 531a , 631 formed to protrude in a direction of the at least one first opening 421a , 521a , 621a , and the at least one third opening. It may include second protruding portions 432 , 531b , and 632 formed to protrude in the direction. The second conductive via 532 may be positioned in the slot and formed to have a second height lower than the first height. The first presolders 441 , 541 , and 641 may be disposed on top of the first conductive vias 530 and 531 and the second conductive via 532 . The second presolders 442 , 542 , and 642 may be disposed at lower ends of the first conductive vias 530 and 531 and the second conductive via 532 .

The first conductive vias 530 and 531 of the interposer structures 400 , 500 , and 600 of the present disclosure may be formed in a cylindrical shape.

The second conductive via 532 of the interposer structures 400, 500, and 600 of the present disclosure has a bar shape having a designated length when viewed from the top of the interposer structures 400, 500, and 600. can be formed with

The second conductive via 532 of the interposer structures 400 , 500 , and 600 of the present disclosure may operate as a ground that electromagnetically shields the interposer structures 400 , 500 , and 600 . .

The second conductive via 532 of the interposer structures 400 , 500 , and 600 of the present disclosure may be formed to have the same height as the insulating layers 341 , 410 , 510 , and 610 .

The first protruding portions 431 , 531a and 631 of the first conductive vias 530 and 531 of the interposer structures 400 , 500 and 600 of the present disclosure may include the insulating layers 341 , 410 , 510 , and 610 . ) may be formed to protrude from the top surface to the first solder resist layer 421 , 521 , 621 .

The second protruding portions 432 , 531b , and 632 of the first conductive vias 530 and 531 of the interposer structures 400 , 500 and 600 of the present disclosure may include the insulating layers 341 , 410 , 510 , and 610 . ) may be formed to protrude from the bottom surface to the second solder resist layer 422 , 522 , and 622 .

The interposer structures 400 , 500 , and 600 of the present disclosure may further include a first conductive pad 650 and a second conductive pad 650 . The first conductive pad 650 may be positioned inside the at least one through hole and may be disposed to surround outer peripheral surfaces of the first conductive vias 530 and 531 . The second conductive pad 650 may be positioned inside the slot and may be disposed to surround an outer circumferential surface of the second conductive via 532 .

The interposer structures 400 , 500 , and 600 of the present disclosure may include a first printed circuit board 331 , a second printed circuit board 332 , an electronic component, and an interposer. The second printed circuit board 332 may be spaced apart from the first printed circuit board 331 to face at least one surface of the first printed circuit board 331 . The electronic component may be disposed on the first printed circuit board 331 or the second printed circuit board 332 . The interposer is positioned between the first printed circuit board 331 and the second printed circuit board 332 , and forms a space between the first printed circuit board 331 and the second printed circuit board 332 . It may be arranged to surround. The interposer includes an insulating layer 341 , 410 , 510 , and 610 , a first solder resist layer 421 , 521 , 621 , a second solder resist layer 422 , 522 , 622 , and a first conductive via 530 . , 531) may be included. The insulating layers 341 , 410 , 510 , and 610 include a first surface facing the first printed circuit board 331 and a second surface facing the second printed circuit board 332 , and the first surface and at least one through hole formed through the second surface. The first solder resist layers 421 , 521 , and 621 are disposed in at least one region of the first surface of the insulating layer 341 , 410 , 510 , and 610 in a region corresponding to the at least one through hole. Formed first openings 421a, 521a, and 621a may be included. The second solder resist layers 422 , 522 , and 622 are disposed on at least one region of the second surface of the insulating layer 341 , 410 , 510 , and 610 , and in a region corresponding to the at least one through hole. The second openings 422 , 521b , 522b , and 622a are formed. The first conductive vias 530 and 531 are located inside the at least one through hole, and the first solder resist layers 421, 521, 621) and the second solder resist layer (422, 522, 622) on the second surface of the insulating layer (341, 410, 510, 610) and the formed first protrusion (431, 531a, 631) It may include second protruding portions 432 , 531b , and 632 formed to protrude up to . The first printed circuit board 331 may be electrically connected to the second printed circuit board 332 through the first conductive vias 530 and 531 .

The interposer of the interposer structure 400 , 500 , 600 of the present disclosure is located inside the slot and the slot passing through the first and second surfaces of the insulating layer 341 , 410 , 510 and 610 . A second conductive via 532 electrically connecting the first printed circuit board 331 and the second printed circuit board 332 may be further included.

The first conductive vias 530 and 531 of the interposer structures 400 , 500 , and 600 of the present disclosure may be formed in a cylindrical shape. The second conductive via 532 may be formed in a bar shape having a designated length when viewed from an upper end of the interposer.

The second conductive via 532 of the interposer structures 400 , 500 , and 600 of the present disclosure may operate as a ground for electromagnetically shielding the at least one electronic component.

In the specific embodiments of the present disclosure described above, elements included in the disclosure are expressed in the singular or plural according to the specific embodiments presented. However, the singular or plural expression is appropriately selected for the context presented for convenience of description, and the present disclosure is not limited to the singular or plural element, and even if the element is expressed in plural, it is composed of the singular or singular. Even an expressed component may be composed of a plurality of components.

Meanwhile, although specific embodiments have been described in the detailed description of the present disclosure, various modifications are possible without departing from the scope of the present disclosure. Therefore, the scope of the present disclosure should not be limited to the described embodiments and should be defined by the claims described below as well as the claims and equivalents.

400, 500, 600: interposer structure
341, 410, 510, 610: insulating layer
421, 521, 621: first solder resist layer
422, 522, 622: second solder resist layer
342, 430, 630: conductive vias
441, 541, 641: first presolder
442, 542, 642: second presolder
341, 410, 510, 610: insulating layer
421a, 521a, 621a: first opening
422, 521b, 522b, 622a: second opening
431, 531a, 631: first protruding portion
432, 531b, 632: second protruding portion
650: conductive pad
450, 660: side plating

Claims (20)

In the interposer structure,
an insulating layer including at least one through hole;
a first solder resist layer positioned on at least one region of an upper surface of the insulating layer and including at least one first opening formed in a region corresponding to the at least one through hole;
a second solder resist layer positioned on at least one region of the lower surface of the insulating layer and including at least one second opening formed in a region corresponding to the at least one through hole;
At least one conductive via positioned in the at least one through hole, the at least one conductive via may include a first protruding portion protruding in a direction of the at least one first opening and the at least one a second protruding portion protruding in the direction of one second opening;
a first presolder disposed on top of the first protruding portion of the at least one conductive via; and
and a second presolder disposed on a lower end of the second protruding portion of the at least one conductive via. The method according to claim 1,
The first protruding part,
The interposer structure is formed to protrude from the top surface of the insulating layer to the first solder resist layer. 3. The method according to claim 2,
The second protruding portion,
The interposer structure is formed to protrude from the bottom surface of the insulating layer to the second solder resist layer. The method according to claim 1,
The interposer structure further comprising: a conductive pad positioned inside the at least one through hole and disposed to surround an outer circumferential surface of the at least one conductive via. The method according to claim 1,
The interposer structure further comprising; a side plating portion positioned in at least one region of a side surface of the insulating layer and electromagnetically shielding the interposer structure. The method according to claim 1,
The at least one conductive via is formed in a cylindrical shape, the interposer structure. The method according to claim 1,
a first printed circuit board disposed on top of the interposer structure; and
Further comprising; a second printed circuit board disposed at the lower end of the interposer structure,
and the first printed circuit board is electrically connected to the second printed circuit board through the at least one conductive via. 8. The method of claim 7,
The first printed circuit board is fixed to an upper end of the interposer structure through the first presolder,
The second printed circuit board is fixed to a lower end of the interposer structure through the second presolder. 8. The method of claim 7,
The insulating layer is formed in a band shape formed along at least one edge of the first printed circuit board or the second printed circuit board when viewed from an upper end of the interposer structure. In the interposer structure,
an insulating layer including at least one through hole and a slot;
At least one first opening positioned in at least one region of the top surface of the insulating layer and formed in a region corresponding to the at least one through hole and at least one second opening formed in a region corresponding to at least one region of the slot a first solder resist layer comprising two openings;
At least one third opening positioned in at least one region of the lower end surface of the insulating layer and formed in a region corresponding to the at least one through hole and at least one third opening formed in an region corresponding to at least one region of the slot a second solder resist layer comprising 4 openings;
A first conductive via positioned in the at least one through hole and formed to have a first height, the first conductive via includes a first protruding portion protruding in a direction of the at least one first opening, and the a second protruding portion protruding in the direction of the at least one third opening;
a second conductive via positioned in the slot and formed to have a second height lower than the first height;
a first presolder disposed on top of the first conductive via and the second conductive via; and
and a second presolder disposed at lower ends of the first conductive via and the second conductive via. 11. The method of claim 10,
The first conductive via is formed in a cylindrical shape, the interposer structure. 11. The method of claim 10,
The second conductive via is formed in a bar shape having a specified length when viewed from an upper end of the interposer structure. 13. The method of claim 12,
The second conductive via operates as a ground that electromagnetically shields the interposer structure. 11. The method of claim 10,
The second conductive via is formed at the same height as the insulating layer, the interposer structure. 15. The method of claim 14,
The first protruding portion of the first conductive via is formed to protrude from the top surface of the insulating layer to the first solder resist layer,
The second protruding portion of the first conductive via is formed to protrude from the lower end surface of the insulating layer to the second solder resist layer. 11. The method of claim 10,
a first conductive pad positioned inside the at least one through hole and disposed to surround an outer circumferential surface of the first conductive via; and
and a second conductive pad positioned inside the slot and disposed to surround an outer circumferential surface of the second conductive via. In an electronic device,
a first printed circuit board;
a second printed circuit board spaced apart from the first printed circuit board and facing at least one surface of the first printed circuit board;
at least one electronic component disposed on the first printed circuit board or the second printed circuit board; and
an interposer positioned between the first printed circuit board and the second printed circuit board, and disposed to surround a space between the first printed circuit board and the second printed circuit board; and
The interposer is
Insulation including a first surface facing the first printed circuit board and a second surface facing the second printed circuit board, and at least one through hole formed through the first surface and the second surface floor;
a first solder resist layer disposed on at least one region of the first surface of the insulating layer and including a first opening formed in a region corresponding to the at least one through hole;
a second solder resist layer disposed on at least one region of the second surface of the insulating layer and including a second opening formed in a region corresponding to the at least one through hole; and
A first protruding portion positioned inside the at least one through hole and protruding from the first surface of the insulating layer to the first solder resist layer and the second solder resist layer at the second surface of the insulating layer a first conductive via including a second protruding portion protruding to the
and the first printed circuit board is electrically connected to the second printed circuit board through the first conductive via. 18. The method of claim 17,
The interposer is
a slot passing through the first surface and the second surface of the insulating layer; and
and a second conductive via positioned inside the slot and electrically connecting the first printed circuit board and the second printed circuit board. 19. The method of claim 18,
The first conductive via is formed in a cylindrical shape,
The second conductive via is formed in a bar shape having a specified length when viewed from an upper end of the interposer. 20. The method of claim 19,
The second conductive via operates as a ground for electromagnetically shielding the at least one electronic component.

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