KR20210125314A - Compact type fault recorder - Google Patents

Abstract

The present invention relates to a compact type fault recording apparatus comprising: a power unit supplying power; an analog interface module receiving voltage or current sources and convert them into a digital signal to transmit it to a CPU module; a digital interface module receiving operation contact of electric power equipment to transmit state information to the CPU module; a data communication module communicating data and a signal; and the CPU module acquiring an instantaneous value or an effective value of a voltage or a current from the analog interface module or the digital interface module and measuring at least one electric power quality among voltage regulation, a harmonic wave, voltage unbalance, and voltage fluctuation through operational management to determine whether a fault occurs.

Description

COMPACT TYPE FAULT RECORDER

The present invention relates to a reduced-type fault recording device used in a power system.

In general, power quality is a measure of how stable or within the allowable standard of elements such as voltage magnitude, frequency, and waveform constituting electricity.

When the power quality in the power system deteriorates, the utilization rate of electrical equipment is lowered, and problems such as a decrease in output, an increase in the temperature of the power system, an increase in loss, a decrease in lifespan, a malfunction, and a failure occur. Regarding the power quality that causes these problems, the Ministry of Trade, Industry and Energy is concerned about power quality such as frequency (Hz), voltage magnitude (V), harmonic distortion factor (%), and allowable (standard) range of voltage unbalance factor (%). related standards, IEEE 1159, IEC 61000-4-30, EN50160, IEC 60050-615, etc. are established.

On the other hand, in general, a miniature fault recorder is a device for detecting and recording a fault in a power system, and the device is built in a small size so that it can be utilized in various environments. As an example of such a reduced-type failure recording device, Korean Patent Registration No. 10-1452980 (title: power system reduction-type failure recording apparatus and failure recording system including the same) is disclosed.

The reduced fault recorder of the 980 patent is equipped with a PT (Power Transformer) having a constant transformation ratio in order to measure a large voltage signal to be measured. However, the generally used PT has a certain size of volume, which is an obstacle to miniaturization of the miniaturized fault recorder.

1. No. 10-1452980 (Registration date: October 14, 2014) (Title: Power system reduced fault recorder and fault record system including it)

The problem to be solved by the present invention is to provide a miniaturized fault recording device capable of miniaturization.

In addition, the problem to be solved by the present invention is a reduced-type fault recording device that measures and records power quality with respect to voltage magnitude (V), harmonic distortion ratio (%), voltage unbalance ratio (%), etc., which are factors related to power quality is to provide

It is not limited to the technical problems as described above, and other technical problems may be inferred from the following embodiments.

The present invention according to an embodiment for solving the above problems is a power supply unit that supplies power, an analog interface unit that receives voltage and current sources and converts them into digital signals and transmits them to the CPU unit, receives the operating contacts of power facilities and receives status information A digital interface unit that transmits data and signals to the CPU module, a data communication unit that communicates data and signals, and an instantaneous or rms value of voltage or current from the analog interface module and the digital interface module is obtained and processed for voltage fluctuations, harmonics, and voltage unbalance , It provides a reduced-type fault recording device including the CPU module for determining whether a failure by measuring the power quality of at least one of the voltage fluctuations.

The CPU unit measures whether the voltage magnitude exceeds the permissible standard and the holding time exceeding the permissible standard with respect to the effective value of the received voltage to determine a failure due to short-time voltage fluctuation or a failure due to long-time voltage fluctuation. It is called a failure when the THD (Total Harmonic Distortion, unit %) calculated using the extracted harmonic component is extracted by discrete Fourier transform of the instantaneous value of voltage or current exceeds the set standard THD. Using the harmonic monitoring unit to discriminate, and the phasor value of the three-phase voltage converted from the instantaneous value of the received three-phase voltage, the zero-phase voltage and the steady-state voltage are calculated, and the After calculating the unbalance ratio, when the calculated unbalance ratio exceeds the reference unbalance ratio, it may include a voltage imbalance monitoring unit that determines a failure.

The CPU unit monitors the rms value of the received voltage for a unit monitoring time, determines the number of times the rms value exceeds the set reference rms value, and determines that it is a failure when the number of excess exceeds the set number of arrivals. It may further include a monitoring unit.

The voltage fluctuation monitoring unit compares the magnitude of the effective value of the received voltage with at least one of a first reference value that is 1.1pu of the rated voltage, a second reference value that is 0.9pu, and a third reference value that is 0.1pu, and the first reference value is greater than or equal to the first reference value. When it falls within one of the range, the second range that is equal to or less than the second reference value and is greater than the third reference value, and the third range that is less than or equal to the third reference value, the holding time exceeding the allowable standard may be measured.

The harmonic monitoring unit performs discrete Fourier transform on the instantaneous value of the received voltage or current to extract harmonic components from the 1st to the 63rd, and the harmonic components from the 1st to the 63rd are THD using Equation 4 below can be calculated.

The analog interface unit performs a function of changing the size of the voltage source to be measured within a measurable range, and a voltage dividing type PT composed of a plurality of resistors and two inductors and a function of changing the size of the current source to be measured within a measurable range. CT, an A/D converter in which an analog input source receives a signal amplified through an amplifier and converts it into a digital signal, and the A/D It may include the amplifier performing a function of transmitting to the converter.

In the voltage dividing type PT, a plurality of resistors are connected in series to a first input terminal and a second input terminal, and a first and a second output terminal are respectively coupled to both ends of one of the plurality of resistors, respectively, of the output resistance An inductor is added between each end and one end of the first and second output terminals to insulate the first and second input terminals and the first and second output terminals from each other.

According to an embodiment of the present invention, the overall volume of the miniaturized fault recording device can be made super-sized by using a partial pressure type PT composed of small electronic components without using a PT (Power Transformer) having a predetermined volume. let there be

According to an embodiment of the present invention, it is possible to measure power quality with respect to voltage magnitude (V), harmonic distortion ratio (%), voltage unbalance ratio (%), etc. which are factors related to power quality with one device and record it in case of failure. let there be

1 is a view showing a usage environment of a reduced-type fault recording device according to an embodiment of the present invention.
2 is a block diagram of a reduced fault recording apparatus according to an embodiment of the present invention.
3 is a block diagram of an analog interface unit in the reduced fault recording apparatus according to an embodiment of the present invention.
4 is a block diagram of a partial pressure type PT according to an embodiment of the present invention.
5 is a block diagram of the CPU unit in the reduced fault recording apparatus according to an embodiment of the present invention.
6 is a flowchart of an operation of monitoring voltage fluctuations in a reduced fault recording device according to an embodiment of the present invention.
7 is a flowchart of an operation of monitoring harmonic analysis in the reduced fault recording device according to an embodiment of the present invention.
8 is a flowchart of an operation of monitoring voltage imbalance in a reduced fault recording device according to an embodiment of the present invention.
9 is a flowchart of an operation of monitoring voltage fluctuations in a reduced fault recording device according to an embodiment of the present invention.

Below, some embodiments will be described clearly and in detail with reference to the accompanying drawings so that those of ordinary skill in the art to which the present invention pertains (hereinafter, those skilled in the art) can easily practice the present invention. will be. Also, the term “unit” used in the specification may mean a hardware component or a circuit.

Hereinafter, a reduced-type failure recording apparatus according to an embodiment of the present invention will be described with reference to the accompanying drawings.

1 is a view showing a usage environment of a reduced-type fault recording device according to an embodiment of the present invention. Referring to FIG. 1 , a plurality of reduced fault recording devices 1000 according to an embodiment of the present invention are installed in a power system line, are interconnected through a communication network 2000 such as a LAN network, and a host server 3000 . is connected with

Each of the plurality of reduced fault recording devices 1000 measures the power quality of the power system line installed in a predetermined area, and determines and records the failure according to the power quality measurement result.

Such a reduced fault recording device 1000 may be installed in a power system including a generator, a GIS, a substation and a switchboard, and the voltage and It receives a current and receives a signal representing an operation of a power facility applied from a circuit breaker for cutting off a load, and detects and records whether a power system line is faulty and a power system operation function.

When an accident occurs in any power system line, the reduced fault recorder 1000 installed in the power system line in which the accident occurs stores the fault record data and transmits the fault record data to a preset external terminal. In this case, the reduced failure recording device 1000 may convert the failure recording data into a data format suitable for a pre-registered external terminal, and then transmit the converted failure recording data.

The host server 3000 performs a function of monitoring the plurality of reduced fault recording devices 1000 . That is, the host server 3000 monitors whether the plurality of miniature fault recorders 1000 operate normally, and receives and stores various data including fault record data transmitted from the plurality of miniature fault recorders 1000 . perform the function

2 is a block diagram of a reduced fault recording apparatus according to an embodiment of the present invention. Referring to FIG. 2 , the reduced fault recording device 1000 according to the embodiment of the present invention includes a power supply unit 100 , an analog interface unit 200 , a digital interface unit 300 , a data communication unit 400 , and a CPU unit ( 500 ), data storage 600 , and a control unit 700 .

The power supply unit 100 performs a function of supplying power to the reduced fault recording device to the device.

The analog interface unit 200 receives voltage and current sources, converts them into digital signals, and transmits them to the CPU unit 500 . In addition, the analog interface module 200 filters the AC rated voltage and the rated current from the outside through a voltage dividing type PT (Potential Transformer) and a CT (Current Transformer) for each source, and performs digital data through analog/digital conversion. After converting to , the converted digital data is transmitted to the CPU unit 500 . The analog interface unit 200 amplifies the secondary voltage and current values received through the voltage divider type PT and CT through an amplifier, and then converts them into digital data using an A/D converter.

The digital interface unit 300 performs a function of receiving the operation contact of the power facility and transmitting the state to the CPU unit 500 . The digital interface unit 300 is configured to accommodate dry contact and wet contact in order to accommodate various contact types of external devices.

The data communication unit 400 performs a function of communicating data and signals between each component, and transmits the failure recording data from the reduced failure recording device 1000 to the host server 3000 or control from the host server 3000 . It performs the function of receiving a signal.

The CPU unit 500 acquires signal data from the analog interface unit 200 and the digital interface unit 300 and performs a function of arithmetic processing. The CPU unit 500 measures the power quality of the power system line based on the acquired signal data, determines whether a failure occurs according to the measurement result, and generates and records the failure record data. The CPU unit 500 may additionally perform a function of determining the location of a failure and/or a function of converting the failure record data into a data format suitable for the external terminal or the host server 3000 .

The data storage unit 600 performs a function of storing data on whether an accident has occurred according to the power quality measurement, an IP address of an external terminal to which the failure record data is to be transmitted, and the like. The control unit 700 performs a function of controlling the operations of the power supply unit 100 , the analog interface unit 200 , the digital interface unit 300 , the data communication unit 400 , the CPU unit 500 , and the data storage unit 600 . do.

3 is a block diagram of an analog interface unit in the reduced fault recording apparatus according to an embodiment of the present invention. Referring to FIG. 3 , the analog interface unit 200 includes an A/D converter 210 , an amplifier 220 , a comparator 230 , a voltage dividing type PT 240 , and a CT 250 .

The A/D converter 210 receives a signal amplified by an analog input source through an amplifier and converts it into a digital signal. The amplifier 220 performs a function of amplifying the amplitude of the signal received through the voltage dividing type PT 240 and the CT 250 and transmitting the amplified signal to the A/D converter 210 . The comparator 230 performs a function of automatically switching through comparison with a reference voltage since the CT 250 needs to be sent to the A/D converter 210 after switching according to the range of the current value.

The voltage dividing type PT 240 performs a function of changing the size of the voltage source to be measured within a measurable range, and is composed of electronic elements to enable overall downsizing of the device 100 . The CT 250 performs a function of changing the size of the current source to be measured within a measurable range. In this embodiment, an external clamp type is used to measure without affecting the existing protection device panel.

Here, the partial pressure type PT 240 according to an embodiment of the present invention will be described in more detail with reference to FIG. 4 . 4 is a block diagram of a partial pressure type PT according to an embodiment of the present invention.

Referring to FIG. 4 , the voltage dividing type PT 240 according to an embodiment of the present invention includes a plurality of resistors connected in series to a first input terminal IN A and a second input terminal IN B. Output terminals (OUT A, OUT B) are coupled at both ends, respectively. Therefore, the voltage measured through the output terminals OUT A and OUT B is a divided voltage applied to the output resistor and has a lower voltage value than the input voltage.

In FIG. 4A , the number of resistors constituting the voltage dividing type PT 240 is 7, and the output resistance is R6 as an example. However, the number of resistors constituting the voltage dividing type PT 240 and the resistance value of each resistor may vary according to a measurable voltage range, and the output resistance is also appropriately determined by the manufacturer. Also, although the output resistance is illustrated as one resistor R6 in FIG. 4, it may be composed of two resistors or more resistors.

On the other hand, in configuring the voltage dividing type PT 240 , when only resistors are used, when disturbance (noise) is mixed with the signal input to the input terminals IN A and IN B, the disturbance is directly generated at the output terminals OUT A and OUT B. ), it is possible to apply an impact to a measuring device that takes the output of the output terminal as an input, that is, the CPU unit 500 .

In order to solve this problem, the present invention adds inductors L1 and L2 between one end of the output resistor R6 and one end of the output terminal OUT A and OUT B, respectively, as shown in FIG. Insulate (IN A, IN B) and output terminals (OUT A, OUT B) from each other.

At this time, in the present invention, when two inductors L1 and L2 are used, each inductor L1 and L2 is configured as shown in FIG. 4 (b) and (c) in order to reduce the size of the component. .

4 (b) and (c), each of the inductors (L1, L2) is a PCB substrate 10, a plurality of first copper foil patterns 11 wired with copper foil on the upper portion of the PCB substrate 10, A plurality of second copper foil patterns 12 and first copper foil patterns 11 and a plurality of second copper foil patterns 12 and 11 wired with copper foil on the lower portion of the PCB substrate 10 penetrate through the second copper foil pattern 12 and the substrate 10 to form a single first copper foil It is configured to include a plurality of via holes 13 for electrically connecting the pattern 11 and one second copper foil pattern 12 .

Here, the first and second copper foil patterns 11 and 12 have a constant thickness and a constant length and width, and the via hole 13 has a conductive layer (not shown) formed therein to form the first and second copper foil patterns 11 and 12 . ) are electrically connected. The first and second copper foil patterns 11 and 12 also have a resistance component.

In the first and second inductors L1 and L2, the length of the wiring pattern in which the first and second copper foil patterns 11 and 12 are wired on the PCB substrate 10 is ℓ, the width of the wiring pattern is W, and the substrate If the thickness of (10) is h, the inductance La of the first and second inductors L1 and L2 can be expressed by Equation 1 below.

(Equation 1)

In addition, the inductance Lb in the via hole 13 can be expressed by Equation 2 below.

(Equation 2)

In Equation 2, r is the radius of the via hole 13 and h is the length of the via hole 13 .

Hereinafter, the CPU unit 500 will be described in more detail with reference to FIG. 5 . 5 is a block diagram of the CPU unit in the reduced fault recording apparatus according to an embodiment of the present invention.

Referring to FIG. 5A , the CPU unit 500 includes a failure determination unit 510 , a failure location calculation unit 520 , a data conversion unit 530 , and a failure recording unit 540 .

The failure determination unit 510 monitors voltage fluctuations, harmonics monitoring, voltage imbalance monitoring, and voltage fluctuations using the voltage and current RMS data or instantaneous values measured in a measurement module such as the voltage dividing type PT 240 and CT 250 . At least one of the power quality is measured, and it is determined whether there is a failure according to the power quality.

The fault location calculation unit 520 performs a function of calculating a fault location in the power system line where the accident has occurred. Here, the failure location calculation unit 520 includes a unidirectional failure point expression unit (not shown) and a two-way failure point expression unit (not illustrated). The one-way fault point expression unit detects the fault point location when an accident occurs when the reduced fault recorder is installed on only one side of the transmission line. The algorithm used at this time is a fault impedance measurement method based on the constants of the transmission line of the self-end. When a device is installed and monitored on only one side of the transmission line, it measures and calculates preset line constants and fault voltage phasor/current phasor/impedance values to calculate the fault type (ie, short-circuit fault or ground fault) and fault distance. perform the function

The bidirectional fault point expression unit acquires the line constant and fault voltage phasor/current phasor/impedance values from both ends of the line as in unidirectional when devices are installed and monitored at both ends of the transmission line, and after synchronizing the time of both ends, In the event of a failure, it performs the function of calculating the distance by converting the distribution ratio of the failure data measured at both ends to the distance. The bidirectional fault point expression unit enables accurate calculation of the fault distance according to the distribution ratio of the positive impedance of both ends analyzed from the synchronized fault file even if the power impedance and line impedance of the transmitting and receiving ends are known or their values are not accurate when an accident occurs.

The data conversion unit 530 performs a function of converting the failure record data into a data format suitable for a pre-registered external terminal. In the case of this embodiment, when a failure file is recorded, it is converted into a COMTRADE file and transmitted to the host server in the converted data format.

On the other hand, if a failure occurs at both ends, the host server calculates the failure distance by using these two COMTRADE files. The host server can calculate the fault distance by using the bidirectional COMTRADE file or fault record data. In order to calculate the fault distance, line information from both ends must be input in advance, and the total line length, normal line impedance, and zero segment line impedance are required as input parameters. These basic parameters become constants of the impedance-based fault point expression algorithm, and the fault distance is calculated by calculating the fault voltage and fault current stored in the case of a power line short-circuit or ground fault in the fault recorder. And, since it is necessary to compare different files at both ends, it is necessary to synchronize the time to accurately estimate the failure distance.

The fault location calculation unit 520 and the data conversion unit 530 may be omitted from the configuration of the fault recording device 100 according to the embodiment of the present invention by the manufacturer.

The failure recording unit 540 stores failure recording data when a failure occurs in the power system line. If an accident is detected and an accident occurs again while data recording is being performed, the record is extended for the set post trigger time from the time of the recurrence of the accident. In the present embodiment, the range of the maximum recording value is up to 10 seconds, and the number of retriggers within the range of 10 seconds is not limited. This time can be arbitrarily set by the operator.

Referring to FIG. 5B , the failure determination unit 510 according to an embodiment of the present invention includes a voltage fluctuation monitoring unit 511 , a harmonic monitoring unit 512 , a voltage imbalance monitoring unit 513 , and voltage fluctuation monitoring. part 514 .

The voltage fluctuation monitoring unit 511 measures the magnitude of the effective value of the received voltage to determine whether the voltage exceeds the permissible standard and whether the voltage exceeds the permissible standard and determines whether the failure is due to short-time voltage fluctuations or long-term voltage fluctuations. do.

A detailed operation of the voltage fluctuation monitoring unit 511 will be described with reference to FIG. 6 . 6 is a flowchart of an operation of monitoring voltage fluctuations in a reduced fault recording device according to an embodiment of the present invention.

Referring to FIG. 6 , the voltage fluctuation monitoring unit 511 receives the time at which the RMS value of the voltage received in real time and the RMS value (unit, pu) of the received voltage are calculated through the analog interface unit 200 ( S601).

Then, the voltage fluctuation monitoring unit 511 compares whether the effective value of the received voltage exceeds the set three reference values, that is, the first reference value, the second reference value, and the third reference value (S602), and the effective value of the voltage at the time of exceeding the reference value It is determined to what extent the value belongs to a size range (S603). Here, the first reference value is 1.1pu, the second reference value is 0.9pu, and the third reference value is 0.1pu.

Specifically, the voltage fluctuation monitoring unit 511 determines whether the received rms value is greater than or equal to the first reference value of 1.1pu, and if the rms value is less than 1.1pu, the rms value is greater than the third reference value of 0.1pu and the second reference value Determines whether it is smaller than 0.9pu. In addition, the voltage fluctuation monitoring unit 511 determines whether the effective value is less than or equal to 0.1pu, which is the third reference value. That is, the voltage fluctuation monitoring unit 511 determines which size range the rms value belongs to among a first range equal to or greater than the first reference value, a second range smaller than the second reference value and larger than the third reference value, and a third range less than or equal to the third reference value. do.

Then, the voltage fluctuation monitoring unit 511 repeats the steps S601 to S603 for the rms values received thereafter and counts the holding time when the received rms values are continuously maintained within the first, second, and third ranges (S604). ).

While counting the holding time, the voltage fluctuation monitoring unit 511 determines whether the voltage rms value has returned to the normal state (S605), and when the rms voltage of the voltage returns to the normal state, the holding time count is stopped and counted. The failure type is determined using the maintenance time and the magnitude of the rms voltage at the time of initial detection of the failure (S606).

At this time, the determination of the failure type is determined as a short-time voltage fluctuation if the voltage at the time of initial detection of the received failure falls within one of the first to third ranges and the holding time is 1 minute or less, as shown in FIG. If the voltage at the time of initial detection of the failure falls within one of the first to third ranges and the holding time exceeds 1 minute, it is determined that the voltage fluctuates for a long time.

In the case of short-time voltage fluctuations, the voltage fluctuation sensing unit 511 determines that the voltage is maintained as 'Instantaneous' if the voltage holding time is greater than 0.5 cycle (about 0.08 seconds) and less than 30 cycles (about 0.5 seconds), 30cycle (about 0.5 seconds) If it is greater than 3 seconds, it is judged as 'Momentary', and if it is greater than 3 seconds and less than 1 minute, it is judged as 'Temporary/'.

And the voltage fluctuation detection unit 511 determines that the voltage at the time of initial failure detection falls within the first range as 'Swell', and if it falls within the second range, determines as 'Sag', and falls within the third range. It is judged as 'Interruption'.

In the process S606, the voltage fluctuation detection unit 511 has a voltage level at the initial detection time of the failure within the first range, and the holding time is greater than 0.5 cycle (about 0.08 seconds) and less than or equal to 30 cycles (about 0.5 seconds), the voltage fluctuation The detection unit 511 determines that the type of failure is 'Swell (Ins)'.

In the case of long-time voltage fluctuations, the voltage fluctuation detection unit 511 determines that the voltage at the time of initial failure detection is 0.0pu ~ 0.1pu as 'Interruption sustained', and if 0.1pu ~ 0.9pu, 'Under-Voltages' If it is 1.1pu~1.2pu, it is judged as 'Over-Voltages'.

When the voltage fluctuation monitoring unit 511 determines the failure type, it stores information about the failure type, that is, information on the failure type (S607), and then repeats steps S601 to S607.

Next, the operation of the harmonic monitoring unit 512 will be described with reference to FIG. 7 . 7 is a flowchart of an operation of monitoring harmonic analysis in the reduced fault recording device according to an embodiment of the present invention.

Referring to FIG. 7 , the harmonic monitoring unit 512 receives an instantaneous value of one cycle of voltage or current (see (b) of FIG. 7 ) ( S701 ). In addition, the harmonic monitoring unit 512 performs DTF (Discrete Fourier Transform, Discrete Fourier Transform) on the instantaneous value of one cycle of the received voltage or current as in Equation 3 below to obtain harmonic components (DC) from the 1st to the 63rd. ) is extracted (decomposed) (S702).

(Equation 3)

Then, the harmonic monitoring unit 512 calculates THD (Total Harmonic Distortion, total harmonic distortion, unit %) using the following Equation 4 for the 1st to 63rd harmonic components (S703), and the calculated THD and The set reference THD is compared (S704).

(Equation 4)

The harmonic monitoring unit 512 determines whether the calculated THD exceeds the reference THD through the comparison of the process S605 (S705), and if it is determined that the calculated THD exceeds the reference THD, it is a failure in which the quality of harmonics exceeds the reference value. After determining and storing the failure data (eg, voltage and current waveforms) (S706), processes S601 to S605 are continuously performed.

Of course, when it is determined that the calculated THD does not exceed the reference THD, the harmonic monitoring unit 512 performs a normal processing operation without taking a separate action (S707), and then proceeds to the steps S701 to S706.

Hereinafter, the operation of the voltage imbalance monitoring unit 513 will be described with reference to FIG. 8 . 8 is a flowchart of an operation of monitoring voltage imbalance in a reduced fault recording device according to an embodiment of the present invention. Referring to FIG. 8 , the failure recording apparatus 100 of the present invention sets three-phase voltages (U-phase voltage, V-phase voltage, and W-phase voltage) (S801). Then, the voltage imbalance monitoring unit 513 receives the instantaneous value of the three-phase voltage (S802, see FIG. 8B), and converts the received instantaneous value into a phasor (complex number) format (S803).

_{The voltage imbalance monitoring unit 513 calculates a zero-part voltage (V o} ) using the following Equation (5) with respect to the phasor value of the converted three-phase voltage, and uses the following Equation (6) to calculate the positive-sequence voltage (V) ₁ ) is calculated, and the reverse-phase voltage (V ₂ ) is calculated using Equation 7 below ( S804 ).

(Equation 5)

(Equation 6)

(Equation 7)

In Equations 5 to 7, V _A is the voltage of the U phase, V _B is the voltage on phase V, and V _C is the voltage on phase W.

Then, the voltage unbalance monitoring unit 513 applies the following Equation 8 to the positive-sequence _{voltage (V 1} ) and the negative-sequence voltage (V _{2 ) calculated using Equations 6 and 7 to the unbalance factor (} Unbalance Factor) is calculated (S805).

(Equation 8)

Then, the voltage unbalance monitoring unit 513 compares the calculated unbalance ratio with a preset reference unbalance ratio (S806), and determines whether the calculated unbalance ratio exceeds the reference unbalance ratio (S807).

If the voltage imbalance monitoring unit 513 determines that the unbalance ratio calculated through the process S807 exceeds the reference unbalance ratio, it is determined as a failure and stores the failure data (eg, voltage and current waveform data) (S808), S801 Steps to S806 are repeatedly performed.

On the other hand, if the voltage imbalance monitoring unit 513 determines that the unbalance ratio calculated through the process S807 does not exceed the reference unbalance ratio, it performs a normal processing operation without taking a separate action (S809), and processes S801 to S807 is performed repeatedly.

Hereinafter, an operation of the voltage fluctuation monitoring unit 514 according to an embodiment of the present invention will be described with reference to FIG. 9 . 9 is a flowchart of an operation of monitoring voltage fluctuations in a reduced fault recording device according to an embodiment of the present invention.

Referring to FIG. 9 , first, when the user designates a set period and number of times, the device 100 of the present invention registers the set time and number of times designated by the user ( S901 ). Here, the set time is the unit monitoring time performed by the voltage fluctuation monitoring unit 514, and the number of times is the number of times the rms voltage measured during the unit monitoring time exceeds the reference rms value input in advance.

The voltage fluctuation monitoring unit 514 receives a unit rms value of one voltage cycle (S902).

The voltage fluctuation monitoring unit 514 detects the received unit RMS voltage and determines whether the detected voltage is equal to or greater than a set reference value (reference voltage). The voltage fluctuation monitoring unit 514 performs an operation of monitoring whether the unit rms voltage is equal to or greater than the reference value (reference voltage) or not, for a plurality of unit rms values received during the set unit monitoring time, and accordingly The number of times the effective value has reached the reference value is determined (S903).

Then, the voltage fluctuation monitoring unit 514 compares the determined number of arrivals with the preset number of arrivals (S904), and determines whether the determined number of arrivals exceeds the set number of arrivals (S905).

When the voltage fluctuation monitoring unit 514 determines that the number of arrivals determined through the process S805 exceeds the set number of arrivals, the voltage fluctuation monitoring unit 514 determines a failure and stores the failure data (eg, voltage and current waveform data) (S906), the process S901 to S905 are repeatedly performed.

On the other hand, if the voltage fluctuation monitoring unit 514 determines that the number of arrivals determined through the process S905 does not exceed the set number of arrivals, it performs a normal processing operation without taking a separate action (S907), and repeats the processes S901 to S905 to do it

The above descriptions are intended to provide exemplary configurations and acts for implementing the present invention. The technical spirit of the present invention will include not only the embodiments described above, but also implementations that can be obtained by simply changing or modifying the above embodiments. In addition, the technical spirit of the present invention will include implementations that can be achieved by easily changing or modifying the embodiments described above in the future.

1000: reduced fault recorder 2000: communication network
3000: host server 100: power unit
200: analog interface unit 300: digital interface unit
400: data communication unit 500: CPU unit
600: data storage unit 700: control unit
210: A/D converter 220: amplifier
230: comparator 240: partial pressure PT
250: CT 510: failure determination unit
520: fault location calculation unit 530: data conversion unit
540: fault log 511: voltage fluctuation monitoring unit
512: harmonic monitoring unit 513: voltage unbalance monitoring unit
514: voltage fluctuation monitoring unit

Claims (7)

power supply unit,
An analog interface unit that receives voltage and current sources, converts them into digital signals, and transmits them to the CPU unit;
A digital interface unit that receives the operating contact of the power facility and transmits status information to the CPU module;
a data communication unit for communicating data and signals; and
The CPU that determines whether there is a failure by acquiring an instantaneous or rms value of voltage or current from the analog interface module and the digital interface module, processing it, and measuring the power quality of at least one of voltage fluctuations, harmonics, voltage imbalances, and voltage fluctuations A miniature fault recorder including a module. In claim 1,
The CPU unit,
A voltage fluctuation monitoring unit that measures whether the voltage magnitude exceeds the allowable standard and the holding time exceeding the allowable standard for the rms value of the received voltage to determine a failure due to a short-time voltage fluctuation or a failure due to a long-term voltage fluctuation;
In case the THD (Total Harmonic Distortion, unit %) calculated using the extracted harmonic component is extracted by discrete Fourier transform of the instantaneous value of the received voltage or current exceeds the set standard THD a harmonic monitoring unit that determines a failure; and
Using the phasor value of the three-phase voltage converted from the instantaneous value of the received three-phase voltage, the zero-phase voltage and the positive-sequence voltage are calculated, and the unbalance factor is calculated using the calculated zero-phase voltage and the positive-sequence voltage. A voltage unbalance monitoring unit that determines a failure when one unbalance ratio exceeds the standard unbalance ratio;
A miniature fault recorder comprising a. In claim 1 or 2,
The CPU unit monitors the rms value of the received voltage for a unit monitoring time, determines the number of times the rms value exceeds the set reference rms value, and determines that it is a failure when the number of excess exceeds the set number of arrivals. A reduced fault recording device further comprising a monitoring unit. In claim 3,
The voltage fluctuation monitoring unit compares the magnitude of the effective value of the received voltage with at least one of a first reference value that is 1.1pu of the rated voltage, a second reference value that is 0.9pu, and a third reference value that is 0.1pu, and the first reference value is greater than or equal to the first reference value. A reduced-type fault recorder that measures the holding time exceeding the allowable standard when it falls within one of a range, a second range that is less than the second reference value and is greater than the third reference value, and a third range that is less than or equal to the third reference value. In claim 3,
The harmonic monitoring unit performs discrete Fourier transform on the instantaneous value of the received voltage or current to extract harmonic components from the 1st to the 63rd, and the harmonic components from the 1st to the 63rd are THD using the following equation A miniature fault recorder that calculates .

In claim 1 or 2,
The analog interface unit,
It performs the function of changing the size of the voltage source to be measured within the measurable range, and a voltage dividing type PT consisting of a plurality of resistors and two inductors,
CT, which performs the function of changing the size of the current source to be measured within the measurable range;
An A/D converter in which the analog input source receives the amplified signal through the amplifier and converts it into a digital signal, and
and the amplifier performing a function of amplifying the magnitude of the signal received through the voltage dividing type PT and the CT and transmitting the amplified signal to the A/D converter. In claim 6,
The partial pressure PT is,
A plurality of resistors are connected in series to a first input terminal and a second input terminal, and first and second output terminals are respectively coupled to both ends of one output resistor among the plurality of resistors, each end of the output resistor and the second input terminal A reduced fault recording device for insulating the first and second input terminals and the first and second output terminals from each other by adding an inductor between one end of each of the first and second output terminals.

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