KR20210124082A - 구성 가능한 일관성 장치들을 위한 시스템 및 방법 - Google Patents

구성 가능한 일관성 장치들을 위한 시스템 및 방법 Download PDF

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Publication number
KR20210124082A
KR20210124082A KR1020210044465A KR20210044465A KR20210124082A KR 20210124082 A KR20210124082 A KR 20210124082A KR 1020210044465 A KR1020210044465 A KR 1020210044465A KR 20210044465 A KR20210044465 A KR 20210044465A KR 20210124082 A KR20210124082 A KR 20210124082A
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South Korea
Prior art keywords
memory
server
workload
cluster
switch
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KR1020210044465A
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English (en)
Korean (ko)
Inventor
크리슈나 티. 말라디
앤드류 창
이산 나자파바디
야세르 에이. 자그흐룰
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삼성전자주식회사
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Priority claimed from US17/135,901 external-priority patent/US20210373951A1/en
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Publication of KR20210124082A publication Critical patent/KR20210124082A/ko

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0831Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17306Intercommunication techniques
    • G06F15/17331Distributed shared memory [DSM], e.g. remote direct memory access [RDMA]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356Indirect interconnection networks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/62Details of cache specific to multiprocessor cache arrangements
    • G06F2212/621Coherency control relating to peripheral accessing, e.g. from DMA or I/O device
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020210044465A 2020-04-06 2021-04-06 구성 가능한 일관성 장치들을 위한 시스템 및 방법 KR20210124082A (ko)

Applications Claiming Priority (12)

Application Number Priority Date Filing Date Title
US202063006073P 2020-04-06 2020-04-06
US63/006,073 2020-04-06
US202063031509P 2020-05-28 2020-05-28
US202063031508P 2020-05-28 2020-05-28
US63/031,508 2020-05-28
US63/031,509 2020-05-28
US202063057746P 2020-07-28 2020-07-28
US63/057,746 2020-07-28
US202063068054P 2020-08-20 2020-08-20
US63/068,054 2020-08-20
US17/135,901 US20210373951A1 (en) 2020-05-28 2020-12-28 Systems and methods for composable coherent devices
US17/135,901 2020-12-28

Publications (1)

Publication Number Publication Date
KR20210124082A true KR20210124082A (ko) 2021-10-14

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Application Number Title Priority Date Filing Date
KR1020210044465A KR20210124082A (ko) 2020-04-06 2021-04-06 구성 가능한 일관성 장치들을 위한 시스템 및 방법

Country Status (3)

Country Link
KR (1) KR20210124082A (zh)
CN (1) CN113553170A (zh)
TW (1) TW202211035A (zh)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115174409A (zh) * 2022-06-30 2022-10-11 无锡芯光互连技术研究院有限公司 一种基于cxl协议的网络连接方法及系统
WO2023086574A1 (en) * 2021-11-11 2023-05-19 FLC Technology Group, Inc. Memory pooling bandwidth multiplier using final level cache system
US11880305B2 (en) 2018-06-18 2024-01-23 FLC Technology Group, Inc. Method and apparatus for using a storage system as main memory
US11989142B2 (en) 2021-12-10 2024-05-21 Samsung Electronics Co., Ltd. Efficient and concurrent model execution

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115686872B (zh) * 2022-12-30 2023-03-21 浪潮电子信息产业股份有限公司 基于bmc的内存资源处理设备、方法、装置及介质

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11880305B2 (en) 2018-06-18 2024-01-23 FLC Technology Group, Inc. Method and apparatus for using a storage system as main memory
WO2023086574A1 (en) * 2021-11-11 2023-05-19 FLC Technology Group, Inc. Memory pooling bandwidth multiplier using final level cache system
US11989142B2 (en) 2021-12-10 2024-05-21 Samsung Electronics Co., Ltd. Efficient and concurrent model execution
CN115174409A (zh) * 2022-06-30 2022-10-11 无锡芯光互连技术研究院有限公司 一种基于cxl协议的网络连接方法及系统

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Publication number Publication date
CN113553170A (zh) 2021-10-26
TW202211035A (zh) 2022-03-16

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