KR20210035413A - Explicit peripheral kernel application to matrix-based intra prediction in video codecs - Google Patents

Abstract

Disclosed are a video signal processing method for encoding or decoding a video signal, and a device therefor. According to the present invention, efficiency of video coding can be increased. Moreover, the encoding device (100) comprises a transform unit (110), a quantization unit (115), a dequantization unit (120), a reverse transform unit (125), a filtering unit (130), a prediction unit (150), and an entropy coding unit (160).

Description

Explicit peripheral kernel application method according to matrix-based intra prediction in video codec {EXPLICIT PERIPHERAL KERNEL APPLICATION TO MATRIX-BASED INTRA PREDICTION IN VIDEO CODECS}

The present invention relates to a video signal processing method and apparatus, and more particularly, to a video signal processing method and apparatus for encoding or decoding a video signal.

Compression coding refers to a series of signal processing techniques for transmitting digitized information through a communication line or storing it in a format suitable for a storage medium. Objects of compression encoding include objects such as audio, video, and text, and in particular, a technique for performing compression encoding on an image is referred to as video compression. Compression coding of a video signal is performed by removing redundant information in consideration of spatial correlation, temporal correlation, and probabilistic correlation. However, due to the recent development of various media and data transmission media, a more efficient video signal processing method and apparatus is required.

According to an embodiment of the present invention, it is possible to increase the efficiency of video coding.

In order to solve the above problems, the present invention provides various video signal processing apparatuses and video signal processing methods.

According to an embodiment of the present invention, it is possible to increase the efficiency of video coding.

1 is a schematic block diagram of a video signal encoding apparatus according to an embodiment of the present invention.
2 is a schematic block diagram of a video signal decoding apparatus according to an embodiment of the present invention.
3 shows an embodiment in which a coding tree unit is divided into coding units within a picture.
4 shows an embodiment of a method for signaling the division of a quad tree and a multi-type tree.
Figure 5. A general directional intra prediction method is shown.
Figure 6. A matrix-based intra prediction method is shown.
Fig. 7. In the case of Explicit MTS, conditions for using multiple transform kernels and explicit transform identifier parsing when MTS intra prediction

The terms used in the present specification have been selected as currently widely used general terms as possible while considering functions in the present invention, but this may vary according to the intention, custom, or the emergence of new technologies of technicians in the field. In addition, in certain cases, there are terms arbitrarily selected by the applicant, and in this case, the meaning will be described in the description of the corresponding invention. Therefore, it should be noted that the terms used in the present specification should be interpreted based on the actual meaning of the term and the entire contents of the present specification, not a simple name of the term.

In this specification, some terms may be interpreted as follows. Coding can be interpreted as encoding or decoding in some cases. In this specification, an apparatus for generating a video signal bitstream by performing encoding (encoding) of a video signal is referred to as an encoding apparatus or an encoder, and an apparatus for restoring a video signal by performing decoding (decoding) of a video signal bitstream is decoding. It is referred to as a device or decoder. In addition, in this specification, a video signal processing apparatus is used as a term for a concept including both an encoder and a decoder. Information is a term including all values, parameters, coefficients, elements, etc., and the meaning may be interpreted differently in some cases, so the present invention is not limited thereto. The'unit' is used to refer to a basic unit of image processing or a specific position of a picture, and refers to an image area including both a luma component and a chroma component. In addition,'block' refers to an image region including a specific component among luma components and chroma components (ie, Cb and Cr). However, depending on the embodiment, terms such as'unit','block','partition', and'area' may be used interchangeably. In addition, in this specification, a unit may be used as a concept including all of a coding unit, a prediction unit, and a transform unit. A picture refers to a field or a frame, and the terms may be used interchangeably according to embodiments.

1 is a schematic block diagram of an apparatus for encoding a video signal according to an embodiment of the present invention. Referring to FIG. 1, the encoding apparatus 100 of the present invention includes a transform unit 110, a quantization unit 115, an inverse quantization unit 120, an inverse transform unit 125, a filtering unit 130, and a prediction unit 150. ) And an entropy coding unit 160.

The transform unit 110 converts a residual signal that is a difference between the input video signal and the prediction signal generated by the prediction unit 150 to obtain a transform coefficient value. For example, Discrete Cosine Transform (DCT), Discrete Sine Transform (DST), or Wavelet Transform may be used. In the discrete cosine transform and discrete sine transform, transform is performed by dividing the input picture signal into a block form. In transformation, coding efficiency may vary depending on the distribution and characteristics of values in the transformation region. The quantization unit 115 quantizes a transform coefficient value output from the transform unit 110.

In order to improve coding efficiency, the picture signal is not coded as it is, but a reconstructed picture by predicting a picture using a region already coded through the prediction unit 150 and adding a residual value between the original picture and the predicted picture to the predicted picture. The method of obtaining is used. In order to prevent mismatches from occurring in the encoder and decoder, information available in the decoder must be used when performing prediction in the encoder. To this end, the encoder performs a process of reconstructing the encoded current block again. The inverse quantization unit 120 inverse quantizes the transform coefficient value, and the inverse transform unit 125 restores the residual value by using the inverse quantization transform coefficient value. Meanwhile, the filtering unit 130 performs a filtering operation to improve the quality and encoding efficiency of the reconstructed picture. For example, a deblocking filter, a sample adaptive offset (SAO), an adaptive loop filter, and the like may be included. The filtered picture is output or stored in a decoded picture buffer (DPB) 156 to be used as a reference picture.

The prediction unit 150 includes an intra prediction unit 152 and an inter prediction unit 154. The intra prediction unit 152 performs intra prediction within the current picture, and the inter prediction unit 154 predicts the current picture using a reference picture stored in the decoded picture buffer 156. Perform. The intra prediction unit 152 performs intra prediction from reconstructed samples in the current picture, and transmits intra-encoding information to the entropy coding unit 160. The intra encoding information may include at least one of an intra prediction mode, a Most Probable Mode (MPM) flag, and an MPM index. The inter prediction unit 154 may include a motion estimation unit 154a and a motion compensation unit 154b. The motion estimation unit 154a obtains a motion vector value of the current region by referring to a specific region of the reconstructed reference picture. The motion estimation unit 154a transfers motion information (reference picture index, motion vector information, etc.) for the reference region to the entropy coding unit 160. The motion compensation unit 154b performs motion compensation using the motion vector value transmitted from the motion estimation unit 154a. The inter prediction unit 154 transfers inter encoding information including motion information on the reference region to the entropy coding unit 160.

When the above picture prediction is performed, the transform unit 110 obtains a transform coefficient value by transforming a residual value between the original picture and the predicted picture. In this case, the transformation may be performed in units of a specific block within the picture, and the size of the specific block may vary within a preset range. The quantization unit 115 quantizes the transform coefficient values generated by the transform unit 110 and transmits the quantization to the entropy coding unit 160.

The entropy coding unit 160 entropy-codes quantized transform coefficients, intra-encoding information, and inter-encoding information to generate a video signal bitstream. In the entropy coding unit 160, a variable length coding (VLC) method and an arithmetic coding method may be used. The variable length coding (VLC) method converts input symbols into consecutive codewords, and the length of the codeword may be variable. For example, frequently occurring symbols are expressed as short codewords, and infrequently occurring symbols are expressed as long codewords. As a variable length coding scheme, a context-based adaptive variable length coding (CAVLC) scheme may be used. Arithmetic coding converts consecutive data symbols into one prime number, and arithmetic coding can obtain an optimal prime bit necessary to represent each symbol. Context-based Adaptive Binary Arithmetic Code (CABAC) may be used as arithmetic coding.

The generated bitstream is encapsulated in a basic unit of a Network Abstraction Layer (NAL) unit. The NAL unit includes an integer number of coded coding tree units. To decode a bitstream in a video decoder, first, the bitstream must be separated into NAL unit units, and then each separated NAL unit must be decoded. Meanwhile, information necessary for decoding a video signal bitstream is a high-level set such as a picture parameter set (PPS), a sequence parameter set (SPS), and a video parameter set (VPS). It may be transmitted through RBSP (Raw Byte Sequence Payload).

Meanwhile, the block diagram of FIG. 1 shows the encoding apparatus 100 according to an embodiment of the present invention, and separately displayed blocks are shown by logically distinguishing elements of the encoding apparatus 100. Accordingly, the elements of the encoding apparatus 100 described above may be mounted as one chip or as a plurality of chips according to the design of the device. According to an embodiment, the operation of each element of the encoding apparatus 100 described above may be performed by a processor (not shown).

2 is a schematic block diagram of a video signal decoding apparatus 200 according to an embodiment of the present invention. Referring to FIG. 2, the decoding apparatus 200 of the present invention includes an entropy decoding unit 210, an inverse quantization unit 220, an inverse transform unit 225, a filtering unit 230, and a prediction unit 250.

The entropy decoding unit 210 entropy-decodes the video signal bitstream and extracts transform coefficients, intra-encoding information, and inter-encoding information for each region. The inverse quantization unit 220 inverse quantizes the entropy-decoded transform coefficient, and the inverse transform unit 225 restores a residual value by using the inverse quantization transform coefficient. The video signal processing apparatus 200 restores the original pixel value by summing the residual value obtained by the inverse transform unit 225 with the predicted value obtained by the prediction unit 250.

Meanwhile, the filtering unit 230 improves image quality by filtering a picture. This may include a deblocking filter for reducing block distortion and/or an adaptive loop filter for removing distortion of an entire picture. The filtered picture is output or stored in the decoded picture buffer (DPB) 256 to be used as a reference picture for the next picture.

The prediction unit 250 includes an intra prediction unit 252 and an inter prediction unit 254. The prediction unit 250 generates a prediction picture using the encoding type decoded by the entropy decoding unit 210 described above, transform coefficients for each region, intra/inter encoding information, and the like. In order to restore a current block on which decoding is performed, a current picture including the current block or a decoded area of other pictures may be used. An intra picture or I picture (or tile/slice) using only the current picture for reconstruction, that is, performing only intra prediction (or tile/slice), a picture capable of performing both intra prediction and inter prediction (or, Tile/slice) is called an inter picture (or tile/slice). In order to predict the sample values of each block among inter-pictures (or tiles/slices), a picture (or tile/slice) using at most one motion vector and a reference picture index is a predictive picture or a P picture (or , Tile/slice), and a picture (or tile/slice) using up to two motion vectors and a reference picture index is referred to as a bi-predictive picture or a B picture (or tile/slice). In other words, a P picture (or tile/slice) uses at most one set of motion information to predict each block, and a B picture (or tile/slice) uses at most two motion information to predict each block. Use a set. Here, the motion information set includes one or more motion vectors and one reference picture index.

The intra prediction unit 252 generates a prediction block using intra-encoding information and reconstructed samples in the current picture. As described above, the intra encoding information may include at least one of an intra prediction mode, a Most Probable Mode (MPM) flag, and an MPM index. The intra prediction unit 252 predicts pixel values of the current block by using reconstructed pixels located on the left and/or above of the current block as reference pixels. According to an embodiment, the reference pixels may be pixels adjacent to the left boundary of the current block and/or pixels adjacent to the upper boundary. According to another embodiment, the reference pixels may be adjacent pixels within a predetermined distance from the left boundary of the current block among pixels of the neighboring block of the current block and/or pixels adjacent within a predetermined distance from the upper boundary of the current block. At this time, the neighboring block of the current block is a left (L) block, an upper (A) block, a lower left (BL) block, an upper right (AR) block, or an upper left (Above Left) block adjacent to the current block. AL) may include at least one of the blocks.

The inter prediction unit 254 generates a prediction block by using a reference picture and inter encoding information stored in the decoded picture buffer 256. The inter-encoding information may include motion information (reference picture index, motion vector information, etc.) of the current block for the reference block. Inter prediction may include L0 prediction, L1 prediction, and Bi-prediction. L0 prediction refers to prediction using one reference picture included in the L0 picture list, and L1 prediction refers to prediction using one reference picture included in the L1 picture list. For this, one set of motion information (eg, a motion vector and a reference picture index) may be required. In the bi-prediction scheme, up to two reference regions may be used, and the two reference regions may exist in the same reference picture or in different pictures. That is, in the bi-prediction method, up to two sets of motion information (for example, a motion vector and a reference picture index) may be used, and the two motion vectors may correspond to the same reference picture index or to different reference picture indexes. May correspond. In this case, the reference pictures may be displayed (or output) temporally before or after the current picture.

The inter prediction unit 254 may obtain a reference block of the current block by using the motion vector and the reference picture index. The reference block exists in a reference picture corresponding to a reference picture index. Also, a pixel value of a block specified by a motion vector or an interpolated value thereof may be used as a predictor of the current block. For motion prediction with pixel accuracy in sub-pel units, for example, an 8-tap interpolation filter may be used for a luma signal and a 4-tap interpolation filter may be used for a chroma signal. However, the interpolation filter for motion prediction in units of subpels is not limited thereto. In this way, the inter prediction unit 254 performs motion compensation for predicting a texture of a current unit from a previously reconstructed picture using motion information.

A reconstructed video picture is generated by adding a prediction value output from the intra prediction unit 252 or the inter prediction unit 254 and a residual value output from the inverse transform unit 225. That is, the video signal decoding apparatus 200 reconstructs the current block by using the prediction block generated by the prediction unit 250 and the residual obtained from the inverse transform unit 225.

Meanwhile, the block diagram of FIG. 2 shows the decoding apparatus 200 according to an embodiment of the present invention, and separately displayed blocks are shown by logically distinguishing elements of the decoding apparatus 200. Accordingly, the elements of the decoding apparatus 200 described above may be mounted as one chip or as a plurality of chips according to the design of the device. According to an embodiment, the operation of each element of the decoding apparatus 200 described above may be performed by a processor (not shown).

3 shows an embodiment in which a coding tree unit (CTU) is divided into coding units (CUs) in a picture. In the process of coding a video signal, a picture may be divided into a sequence of coding tree units (CTUs). The coding tree unit is composed of an NXN block of luma samples and two blocks of chroma samples corresponding thereto. The coding tree unit may be divided into a plurality of coding units. The coding unit refers to a basic unit for processing a picture in the above-described video signal processing, that is, intra/inter prediction, transformation, quantization, and/or entropy coding. The size and shape of the coding unit in one picture may not be constant. The coding unit may have a square or rectangular shape. The rectangular coding unit (or rectangular block) includes a vertical coding unit (or vertical block) and a horizontal coding unit (or horizontal block). In this specification, a vertical block is a block having a height greater than a width, and a horizontal block is a block having a width greater than the height. In addition, in the present specification, a non-square block may refer to a rectangular block, but the present invention is not limited thereto.

Referring to FIG. 3, a coding tree unit is first divided into a quad tree (QT) structure. That is, in a quad tree structure, one node having a size of 2NX2N may be divided into four nodes having a size of NXN. In this specification, the quad tree may also be referred to as a quaternary tree. Quad-tree partitioning can be performed recursively, and not all nodes need to be partitioned to the same depth.

Meanwhile, a leaf node of the aforementioned quad tree may be further divided into a multi-type tree (MTT) structure. According to an embodiment of the present invention, in a multi-type tree structure, one node may be divided into a horizontal or vertically divided binary (binary) or ternary (ternary) tree structure. That is, in the multi-type tree structure, there are four division structures: vertical binary division, horizontal binary division, vertical ternary division, and horizontal ternary division. According to an embodiment of the present invention, both widths and heights of nodes in each tree structure may have a power of 2. For example, in a binary tree (Binary Tree, BT) structure, a node having a size of 2NX2N may be divided into two NX2N nodes by vertical binary division, and divided into two 2NXN nodes by horizontal binary division. In addition, in a ternary tree (TT) structure, a node of 2NX2N size is divided into nodes of (N/2)X2N, NX2N and (N/2)X2N by vertical ternary division, and horizontal binary division. It can be divided into 2NX(N/2), 2NXN, and 2NX(N/2) nodes by. This multi-type tree division can be performed recursively.

A leaf node of a multi-type tree can be a coding unit. If the coding unit is not too large for the maximum transform length, the coding unit is used as a unit of prediction and transform without further division. Meanwhile, in the aforementioned quad tree and multi-type tree, at least one of the following parameters may be defined in advance or transmitted through RBSP of a higher level set such as PPS, SPS, VPS, and the like. 1) CTU size: the size of the root node of the quad tree, 2) the minimum QT size (MinQtSize): the minimum QT leaf node size allowed, 3) the maximum BT size (MaxBtSize): the maximum BT root node size allowed, 4) Maximum TT size (MaxTtSize): Maximum allowed TT root node size, 5) Maximum MTT depth (MaxMttDepth): Maximum allowed depth of MTT segmentation from leaf nodes of QT, 6) Minimum BT size (MinBtSize): allowed Minimum BT leaf node size, 7) Minimum TT size (MinTtSize): Minimum allowed TT leaf node size.

4 shows an embodiment of a method for signaling the division of a quad tree and a multi-type tree. Preset flags may be used to signal the division of the quad tree and multi-type tree described above. 4, a flag'qt_split_flag' indicating whether to divide a quad tree node, a flag'mtt_split_flag' indicating whether to divide a multi-type tree node, and a flag'mtt_split_vertical_flag' indicating a split direction of a multi-type tree node. 'Or at least one of'mtt_split_binary_flag' indicating the split shape of the multi-type tree node may be used.

According to an embodiment of the present invention, the coding tree unit is a root node of a quad tree, and may be first divided into a quad tree structure. In the quad tree structure,'qt_split_flag' is signaled for each node'QT_node'. If the value of'qt_split_flag' is 1, the node is divided into 4 square nodes, and if the value of'qt_split_flag' is 0, the node becomes'QT_leaf_node', a leaf node of the quad tree.

Each quad tree leaf node'QT_leaf_node' may be further divided into a multi-type tree structure. In the multi-type tree structure,'mtt_split_flag' is signaled for each node'MTT_node'. When the value of'mtt_split_flag' is 1, the corresponding node is divided into a plurality of rectangular nodes. When the value of'mtt_split_flag' is 0, the corresponding node becomes'MTT_leaf_node' of the multi-type tree. When the multi-type tree node'MTT_node' is divided into a plurality of rectangular nodes (that is, when the value of'mtt_split_flag' is 1),'mtt_split_vertical_flag' and'mtt_split_binary_flag' for the node'MTT_node' will be additionally signaled. I can. When the value of'mtt_split_vertical_flag' is 1, vertical division of the node'MTT_node' is indicated, and when the value of'mtt_split_vertical_flag' is 0, horizontal division of the node'MTT_node' is indicated. In addition, when the value of'mtt_split_binary_flag' is 1, the node'MTT_node' is divided into two rectangular nodes, and when the value of'mtt_split_binary_flag' is 0, the node'MTT_node' is divided into three rectangular nodes.

The present invention relates to a multiple transform kernel application method applied to a residual signal generated by a matrix-based intra prediction method in a video codec.

MIP is a matrix-based intra prediction method. Unlike conventional prediction methods that have directionality from pixels of neighboring blocks, MIP is an intra-prediction method that generates a residual signal by obtaining a prediction signal from a pixel of a neighboring block using a predefined matrix and an offset value. Say.

Figure 5. General Directional Intra Prediction Method

Figure 6. Matrix-based intra prediction method

과 오프셋 값

을 이용하여 예측한다. MIP를 통한 예측 방법을 통해 얻은 잔차 신호는 예측 방법이 기존의 방향성 예측 방법에 비해 잔차의 방향성이 약하고 신호의 특징이 균일한 성질을 가진다. 방향성 인트라 예측에 강한 압축 성능을 보이는 DST-7과 DCT-8의 커널을 이용하는 것 보다 DCT-2와 같이 입력 신호가 균일할 때 보다 높은 에너지 압축 성능을 보이는 커널이 매우 유리하다. 5 and 6 show a matrix-based general directional intra prediction direction and a matrix-based intra prediction method, respectively. As shown in Fig. 6, a matrix B composed of pixels of neighboring blocks and a predefined matrix in order to generate a prediction signal in the current block

And offset values

Use to make predictions. The residual signal obtained through the prediction method through MIP has a property that the prediction method has a weaker direction of the residual and the signal characteristics are uniform compared to the conventional directional prediction method. A kernel that shows higher energy compression performance when the input signal is uniform, such as DCT-2, is much more advantageous than using the kernels of DST-7 and DCT-8, which have strong compression performance for directional intra prediction.

Accordingly, the present invention proposes a method and condition for applying a main transform kernel to a residual signal generated by a matrix-based intra prediction method.

First, in the video codec, the main transform is transformed using a number of transform kernels such as DCT-2, DST-7, and DCT-8, which are transform kernels, on the residual signal obtained through prediction. , MTS) method. In this case, expressing which multi-transformation kernel to use with an explicit identifier and transmitting it is called Explicit Multiple Transform Selection. This transform kernel can apply a separable transform kernel to the horizontal and vertical directions of a block, and different transform kernels may be applied to the horizontal and vertical directions. First, when the MTS identification ID (MTS_ID) is 0, conversion is performed by applying a pair of DST-2 and DCT-2 conversion kernels in the horizontal and vertical directions. In this case, the characteristics of the residual signal may be advantageous when it is uniform within the block. On the other hand, when MTS_ID is not 0, (DST-7, DST-7), (DST-7, DCT-8), (DCT-8, DST-7), (DCT-8) are used for the horizontal and vertical directions of the block. , DCT-8) Transformation pair can be applied and an identifier can be assigned to each. Unlike the DCT-2 transform pair, the DST-7 and DCT-8 transform kernels are very advantageous for residual signals obtained through directional prediction, such as intra prediction, and have actually obtained a lot of coding performance in intra prediction.

The transform kernel identifier MTS_ID can be transmitted from the encoder to the decoder, and the decoder can parse it to recognize which transform kernel is used during inverse transform.

)과 오프셋 값(

)을 이용하여 잔차 신호를 예측하므로 생성된 예측 잔차 신호는 방향성 신호를 갖기 보다는 균일한 성분을 갖는 잔차 신호를 갖는 경향이 크다. 이러한 성질에 기반하여 본 발명에서는 MTS_ID를 부호화기에서 복호화기로 전송하여 예측 타입과 모드에 따라서 어떤 커널을 사용할지 명시적으로 나타내는 명시적 MTS의 경우, MIP로 생성한 예측 잔차에 대하여 DST-7 및 DCT-8 주 변환 커널을 제한하고 DCT-2 변환 커널을 사용하여 부호화 효율을 향상시키는 방법을 제안한다. 도 7은 명시적 MTS의 경우, 현재 블록이 MIP 여부에 따라 다중 변환 커널의 사용여부와 다중 변환 커널 ID 파싱에 관한 조건을 나타낸다. As described above, MIP is a predefined matrix (

) And the offset value (

) Is used to predict the residual signal, so the generated prediction residual signal tends to have a residual signal having a uniform component rather than a directional signal. Based on this property, in the present invention, in the case of an explicit MTS that explicitly indicates which kernel to use according to the prediction type and mode by transmitting the MTS_ID from the encoder to the decoder, DST-7 and DCT for the prediction residual generated by MIP. We propose a method of limiting the -8 main transform kernel and improving the coding efficiency by using the DCT-2 transform kernel. 7 shows whether a multi-transform kernel is used and a condition for parsing a multi-transform kernel ID according to whether the current block is MIP in the case of explicit MTS.

Fig. 7. In the case of Explicit MTS, conditions for using multiple transformation kernels and parsing explicit transformation identifiers in MTS intra prediction

In FIG. 7, isMIP represents intra_mip_flag defined in the CU. If isMIP=1 (intra_mip_flag=1), it indicates that the current block is a MIP intra prediction block, otherwise, it is not a MIP intra prediction block. When the current block is a MIP block, only the DCT-2 transform kernel is used for the prediction residual, and the MTS_ID is inferred as 0 without parsing. Here, MTS_ID is an identifier (tu_mts_idx) of a multi-transformation kernel defined in the TU, and MTS_ID=0 indicates a DCT-2 transform kernel pair. Table 1 shows conditions for parsing MTS_ID in combination with intra_mip_flag and other conditions.

Conditions for parsing the identifier MTS_ID representing the multi-transformation kernel if( ((CuPredMode[ chType ][ x0 ][ y0] = = MODE_INTER && sps_explicit_mts_inter_enabled_flag)
| | (CuPredMode[ chType ][ x0 ][ y0] = = MODE_INTRA && sps_explicit_mts_intra_enabled_flag)) && (!transform_skip_flag[ x0 ][ y0]) && !intra_mip_flag) tu_mts_idx [x0 ][ y0]

As shown in Table 1, when explicit MTS is used, tu_mts_id, that is, MTS_ID, is parsed only when MIP is not used, and the kernel corresponding to MTS_ID is used. Otherwise, tu_mts_idx is inferred as 0, and only the DCT-2 kernel pair is used.

In the case of hardware implementation, the method according to embodiments of the present invention includes one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), and Programmable Logic Devices (PLDs). , Field Programmable Gate Arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, and the like.

In the case of implementation by firmware or software, the method according to the embodiments of the present invention may be implemented in the form of a module, procedure, or function that performs the functions or operations described above. The software code can be stored in a memory and driven by a processor. The memory may be located inside or outside the processor, and may exchange data with the processor through various known means.

The above description of the present invention is for illustrative purposes only, and those of ordinary skill in the art to which the present invention pertains will be able to understand that other specific forms can be easily modified without changing the technical spirit or essential features of the present invention. will be. Therefore, it should be construed that the above-described embodiments are illustrative and limiting in all respects. For example, each component described as a single type may be implemented in a distributed manner, and similarly, components described as being distributed may also be implemented in a combined form.

The scope of the present invention is indicated by the claims to be described later rather than the detailed description, and all changes or modified forms derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

Claims (1)

How to process video signals.

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