KR20210000828A - Method and apparatus for processing video signal using secondary transform - Google Patents

Abstract

Disclosed are a video signal processing method for encoding or decoding a video signal and a device thereof. An encoding device of the present invention includes a transform unit, a quantization unit, an inverse quantization unit, an inverse transform unit, a filtering unit, a prediction unit, and an entropy coding unit. Coding efficiency of a video signal may be increased.

Description

How to generate quadratic transform coefficients in video codec {METHOD AND APPARATUS FOR PROCESSING VIDEO SIGNAL USING SECONDARY TRANSFORM}

The present invention relates to a video signal processing method and apparatus, and more particularly, to a video signal processing method and apparatus for encoding or decoding a video signal.

Compression coding refers to a series of signal processing techniques for transmitting digitized information through a communication line or storing it in a format suitable for a storage medium. Targets for compression encoding include audio, video, and text, and in particular, a technique for performing compression encoding on an image is referred to as video compression. Compression coding of a video signal is performed by removing redundant information in consideration of spatial correlation, temporal correlation, and probabilistic correlation. However, due to the recent development of various media and data transmission media, a more efficient method and apparatus for processing a video signal is required.

The present invention has an object to increase the coding efficiency of a video signal.

In order to solve the above problems, the present invention provides various video signal processing apparatuses and video signal processing methods.

According to an embodiment of the present invention, coding efficiency of a video signal may be improved.

1 is a schematic block diagram of a video signal encoding apparatus according to an embodiment of the present invention.
2 is a schematic block diagram of a video signal decoding apparatus according to an embodiment of the present invention.
3 shows an embodiment in which a coding tree unit is divided into coding units within a picture.
4 shows an embodiment of a method for signaling division of a quad tree and a multi-type tree.
5 shows a method of generating quadratic transform coefficients for a 4x4 transform block.
6 shows a method of generating quadratic transform coefficients for 8x4 and 4x8 transform blocks.
7 shows a method of generating quadratic transform coefficients for an Nx4, 4xN (N ≥ 16) transform block.
8 shows a method of generating quadratic transform coefficients for a 16x8 transform block.
9 shows a method of generating quadratic transform coefficients for an 8x16 transform block.
10 shows a method of generating quadratic transform coefficients for a 16x16 transform block.
11 shows a method of generating quadratic transform coefficients for an NxM transform block.

The terms used in the present specification have been selected as currently widely used general terms as possible while considering the functions of the present invention, but this may vary according to the intention, custom, or the emergence of new technologies of the skilled person in the art. In addition, in certain cases, there are terms arbitrarily selected by the applicant, and in this case, the meaning will be described in the description of the corresponding invention. Therefore, it should be noted that the terms used in the present specification should be interpreted based on the actual meaning of the term and the entire contents of the present specification, not a simple name of the term.

In the present specification, some terms may be interpreted as follows. Coding can be interpreted as encoding or decoding in some cases. In this specification, an apparatus for generating a video signal bitstream by performing encoding (encoding) of a video signal is referred to as an encoding apparatus or an encoder, and an apparatus for restoring a video signal by performing decoding (decoding) of a video signal bitstream is decoding It is referred to as a device or decoder. In addition, in this specification, a video signal processing apparatus is used as a term for a concept including both an encoder and a decoder. Information is a term that includes all values, parameters, coefficients, elements, etc., and the meaning may be interpreted differently in some cases, so the present invention is not limited thereto. The'unit' is used to refer to a basic unit of image processing or a specific position of a picture, and refers to an image area including both a luma component and a chroma component. In addition,'block' refers to an image area including a specific component among luma components and chroma components (ie, Cb and Cr). However, depending on the embodiment, terms such as'unit','block','partition', and'area' may be used interchangeably. In addition, in this specification, the unit may be used as a concept including all of a coding unit, a prediction unit, and a transform unit. A picture refers to a field or a frame, and the terms may be used interchangeably according to embodiments.

1 is a schematic block diagram of a video signal encoding apparatus according to an embodiment of the present invention. Referring to FIG. 1, the encoding apparatus 100 of the present invention includes a transform unit 110, a quantization unit 115, an inverse quantization unit 120, an inverse transform unit 125, a filtering unit 130, and a prediction unit 150. ) And an entropy coding unit 160.

The transform unit 110 converts a residual signal that is a difference between an input video signal and a prediction signal generated by the prediction unit 150 to obtain a transform coefficient value. For example, Discrete Cosine Transform (DCT), Discrete Sine Transform (DST), or Wavelet Transform may be used. Discrete cosine transform and discrete sine transform are transformed by dividing the input picture signal into a block form. In transformation, coding efficiency may vary depending on the distribution and characteristics of values in the transformation region. The quantization unit 115 quantizes a transform coefficient value output from the transform unit 110.

In order to improve coding efficiency, the picture signal is not coded as it is, but a reconstructed picture by predicting a picture using a region already coded through the prediction unit 150 and adding a residual value between the original picture and the predicted picture to the predicted picture. The method of obtaining is used. In order to prevent mismatches from occurring in the encoder and decoder, information available in the decoder must be used when performing prediction in the encoder. To this end, the encoder performs a process of reconstructing the encoded current block. The inverse quantization unit 120 inverse quantizes the transform coefficient value, and the inverse transform unit 125 restores the residual value by using the inverse quantization transform coefficient value. Meanwhile, the filtering unit 130 performs a filtering operation to improve the quality and encoding efficiency of the reconstructed picture. For example, a deblocking filter, a sample adaptive offset (SAO), and an adaptive loop filter may be included. The filtered picture is output or stored in a decoded picture buffer (DPB) 156 to be used as a reference picture.

The prediction unit 150 includes an intra prediction unit 152 and an inter prediction unit 154. The intra prediction unit 152 performs intra prediction within the current picture, and the inter prediction unit 154 predicts the current picture using a reference picture stored in the decoded picture buffer 156. Perform. The intra prediction unit 152 performs intra prediction from reconstructed samples in the current picture, and transmits intra encoding information to the entropy coding unit 160. The intra encoding information may include at least one of an intra prediction mode, a Most Probable Mode (MPM) flag, and an MPM index. The inter prediction unit 154 may include a motion estimation unit 154a and a motion compensation unit 154b. The motion estimation unit 154a obtains a motion vector value of the current region by referring to a specific region of the reconstructed reference picture. The motion estimation unit 154a transfers motion information (reference picture index, motion vector information, etc.) for the reference region to the entropy coding unit 160. The motion compensation unit 154b performs motion compensation using the motion vector value transmitted from the motion estimation unit 154a. The inter prediction unit 154 transmits inter encoding information including motion information on the reference region to the entropy coding unit 160.

When the above picture prediction is performed, the transform unit 110 obtains a transform coefficient value by transforming a residual value between the original picture and the predicted picture. In this case, the transformation may be performed in units of a specific block within the picture, and the size of the specific block may vary within a preset range. The quantization unit 115 quantizes the transform coefficient values generated by the transform unit 110 and transmits the quantization to the entropy coding unit 160.

The entropy coding unit 160 entropy-codes quantized transform coefficients, intra-encoding information, and inter-encoding information to generate a video signal bitstream. In the entropy coding unit 160, a variable length coding (VLC) method and an arithmetic coding method may be used. The variable length coding (VLC) method converts input symbols into consecutive codewords, and the length of the codeword may be variable. For example, frequently occurring symbols are expressed as short codewords, and infrequently occurring symbols are expressed as long codewords. As a variable length coding scheme, a context-based adaptive variable length coding (CAVLC) scheme may be used. Arithmetic coding converts consecutive data symbols into one prime number, and arithmetic coding can obtain an optimal prime bit necessary to represent each symbol. Context-based Adaptive Binary Arithmetic Code (CABAC) may be used as arithmetic coding.

The generated bitstream is encapsulated in a basic unit of a Network Abstraction Layer (NAL) unit. The NAL unit includes a coded integer number of coding tree units. In order to decode a bitstream in a video decoder, the bitstream must first be separated into NAL units, and then each separated NAL unit must be decoded. Meanwhile, information necessary for decoding a video signal bitstream is a high-level set such as a picture parameter set (PPS), a sequence parameter set (SPS), and a video parameter set (VPS). It may be transmitted through RBSP (Raw Byte Sequence Payload).

Meanwhile, the block diagram of FIG. 1 shows the encoding apparatus 100 according to an embodiment of the present invention, and separately displayed blocks are shown by logically distinguishing elements of the encoding apparatus 100. Accordingly, the elements of the encoding apparatus 100 described above may be mounted as one chip or as a plurality of chips according to the design of the device. According to an embodiment, the operation of each element of the encoding apparatus 100 described above may be performed by a processor (not shown).

2 is a schematic block diagram of a video signal decoding apparatus 200 according to an embodiment of the present invention. Referring to FIG. 2, the decoding apparatus 200 of the present invention includes an entropy decoding unit 210, an inverse quantization unit 220, an inverse transform unit 225, a filtering unit 230, and a prediction unit 250.

The entropy decoding unit 210 entropy-decodes the video signal bitstream and extracts transform coefficients, intra-encoding information, and inter-encoding information for each region. The inverse quantization unit 220 inverse quantizes the entropy-decoded transform coefficient, and the inverse transform unit 225 restores a residual value by using the inverse quantization transform coefficient. The video signal processing apparatus 200 restores the original pixel value by summing the residual value obtained by the inverse transform unit 225 with the predicted value obtained by the prediction unit 250.

Meanwhile, the filtering unit 230 improves image quality by filtering a picture. This may include a deblocking filter for reducing block distortion and/or an adaptive loop filter for removing distortion of an entire picture. The filtered picture is output or stored in the decoded picture buffer (DPB) 256 to be used as a reference picture for the next picture.

The prediction unit 250 includes an intra prediction unit 252 and an inter prediction unit 254. The prediction unit 250 generates a prediction picture by using an encoding type decoded by the entropy decoding unit 210 described above, a transform coefficient for each region, and intra/inter encoding information. In order to restore a current block on which decoding is performed, a current picture including the current block or a decoded area of other pictures may be used. An intra picture or an I picture (or tile/slice) using only the current picture for restoration, that is, performing only intra prediction (or tile/slice), a picture capable of performing both intra prediction and inter prediction (or, Tile/slice) is called an inter picture (or tile/slice). In order to predict the sample values of each block among inter-pictures (or tiles/slices), a picture (or tile/slice) using at most one motion vector and a reference picture index is a predictive picture or a P picture (or , Tile/slice), and a picture (or tile/slice) using up to two motion vectors and a reference picture index is referred to as a bi-predictive picture or a B picture (or tile/slice). In other words, a P picture (or tile/slice) uses at most one set of motion information to predict each block, and a B picture (or tile/slice) uses at most two motion information to predict each block. Use a set. Here, the motion information set includes one or more motion vectors and one reference picture index.

The intra prediction unit 252 generates a prediction block using intra-encoding information and reconstructed samples in the current picture. As described above, the intra encoding information may include at least one of an intra prediction mode, a Most Probable Mode (MPM) flag, and an MPM index. The intra prediction unit 252 predicts pixel values of the current block by using reconstructed pixels located on the left and/or above of the current block as reference pixels. According to an embodiment, the reference pixels may be pixels adjacent to the left boundary of the current block and/or pixels adjacent to the upper boundary. According to another embodiment, the reference pixels may be adjacent pixels within a preset distance from the left boundary of the current block among pixels of the neighboring block of the current block and/or pixels adjacent within a preset distance from the upper boundary of the current block. At this time, the neighboring block of the current block is a left (L) block, an upper (A) block, a lower left (BL) block, an upper right (AR) block, or an upper left (Above Left) block. AL) may include at least one of the blocks.

The inter prediction unit 254 generates a prediction block using a reference picture and inter encoding information stored in the decoded picture buffer 256. The inter encoding information may include motion information (reference picture index, motion vector information, etc.) of the current block for the reference block. Inter prediction may include L0 prediction, L1 prediction, and Bi-prediction. L0 prediction means prediction using one reference picture included in the L0 picture list, and L1 prediction means prediction using one reference picture included in the L1 picture list. For this, a set of motion information (eg, a motion vector and a reference picture index) may be required. In the bi-prediction scheme, up to two reference regions may be used, and the two reference regions may exist in the same reference picture or may exist in different pictures. That is, in the bi-prediction method, up to two sets of motion information (for example, a motion vector and a reference picture index) may be used, and the two motion vectors may correspond to the same reference picture index or to different reference picture indexes. May correspond. In this case, the reference pictures may be displayed (or output) temporally before or after the current picture.

The inter prediction unit 254 may obtain a reference block of the current block using a motion vector and a reference picture index. The reference block exists in a reference picture corresponding to a reference picture index. Also, a pixel value of a block specified by a motion vector or an interpolated value thereof may be used as a predictor of the current block. For motion prediction with pixel accuracy in sub-pel units, for example, an 8-tap interpolation filter for a luma signal and a 4-tap interpolation filter for a chroma signal may be used. However, the interpolation filter for motion prediction in units of subpels is not limited thereto. In this way, the inter prediction unit 254 performs motion compensation for predicting a texture of a current unit from a previously restored picture using motion information.

A reconstructed video picture is generated by adding a prediction value output from the intra prediction unit 252 or the inter prediction unit 254 and a residual value output from the inverse transform unit 225. That is, the video signal decoding apparatus 200 reconstructs the current block by using the prediction block generated by the prediction unit 250 and the residual obtained from the inverse transform unit 225.

Meanwhile, the block diagram of FIG. 2 shows the decoding apparatus 200 according to an embodiment of the present invention, and separately displayed blocks are shown by logically distinguishing elements of the decoding apparatus 200. Therefore, the elements of the decoding apparatus 200 described above may be mounted as one chip or as a plurality of chips according to the design of the device. According to an embodiment, the operation of each element of the decoding apparatus 200 described above may be performed by a processor (not shown).

3 shows an embodiment in which a coding tree unit (CTU) is divided into coding units (CUs) in a picture. In the process of coding a video signal, a picture may be divided into a sequence of coding tree units (CTUs). The coding tree unit is composed of an NXN block of luma samples and two blocks of chroma samples corresponding thereto. The coding tree unit may be divided into a plurality of coding units. The coding unit refers to a basic unit for processing a picture in the above-described video signal processing, that is, intra/inter prediction, transformation, quantization, and/or entropy coding. The size and shape of a coding unit in one picture may not be constant. The coding unit may have a square or rectangular shape. The rectangular coding unit (or rectangular block) includes a vertical coding unit (or vertical block) and a horizontal coding unit (or horizontal block). In this specification, a vertical block is a block having a height greater than a width, and a horizontal block is a block having a width greater than the height. In addition, in the present specification, a non-square block may refer to a rectangular block, but the present invention is not limited thereto.

Referring to FIG. 3, a coding tree unit is first divided into a quad tree (QT) structure. That is, in a quad tree structure, one node having a size of 2NX2N may be divided into four nodes having a size of NXN. In this specification, the quad tree may also be referred to as a quaternary tree. Quad-tree partitioning can be performed recursively, and not all nodes need to be partitioned to the same depth.

Meanwhile, the leaf node of the quad tree described above may be further divided into a multi-type tree (MTT) structure. According to an embodiment of the present invention, in a multi-type tree structure, one node may be divided into a horizontal or vertically divided binary (binary) or ternary (ternary) tree structure. That is, in the multi-type tree structure, there are four division structures: vertical binary division, horizontal binary division, vertical ternary division, and horizontal ternary division. According to an embodiment of the present invention, both widths and heights of nodes in each tree structure may have a power of 2. For example, in a binary tree (Binary Tree, BT) structure, a node having a size of 2NX2N may be divided into two NX2N nodes by vertical binary division, and divided into two 2NXN nodes by horizontal binary division. In addition, in a ternary tree (TT) structure, a node of 2NX2N size is divided into nodes of (N/2)X2N, NX2N and (N/2)X2N by vertical ternary division, and horizontal binary division It can be divided into 2NX(N/2), 2NXN, and 2NX(N/2) nodes by. This multi-type tree division can be performed recursively.

Leaf nodes of a multi-type tree can be coding units. If the coding unit is not too large for the maximum transform length, the coding unit is used as a unit of prediction and transform without further division. Meanwhile, in the above-described quad tree and multi-type tree, at least one of the following parameters may be defined in advance or transmitted through RBSP of a higher level set such as PPS, SPS, and VPS. 1) CTU size: the size of the root node of the quad tree, 2) the minimum QT size (MinQtSize): the minimum QT leaf node size allowed, 3) the maximum BT size (MaxBtSize): the maximum BT root node size allowed, 4) Maximum TT size (MaxTtSize): Maximum allowed TT root node size, 5) Maximum MTT depth (MaxMttDepth): Maximum allowable depth of MTT split from leaf node of QT, 6) Minimum BT size (MinBtSize): Allowed Minimum BT leaf node size, 7) Minimum TT size (MinTtSize): Minimum allowed TT leaf node size.

4 shows an embodiment of a method for signaling division of a quad tree and a multi-type tree. Pre-set flags may be used to signal the division of the quad tree and multi-type tree described above. 4, a flag'qt_split_flag' indicating whether to divide a quad tree node, a flag'mtt_split_flag' indicating whether to divide a multi-type tree node, and a flag'mtt_split_vertical_flag' indicating a splitting direction of a multi-type tree node. 'Or at least one of a flag'mtt_split_binary_flag' indicating the split shape of the multi-type tree node may be used.

According to an embodiment of the present invention, the coding tree unit is a root node of a quad tree, and may be divided first into a quad tree structure. In the quad tree structure,'qt_split_flag' is signaled for each node'QT_node'. If the value of'qt_split_flag' is 1, the node is divided into 4 square nodes, and if the value of'qt_split_flag' is 0, the node becomes'QT_leaf_node', a leaf node of the quad tree.

Each quad tree leaf node'QT_leaf_node' may be further divided into a multi-type tree structure. In the multi-type tree structure,'mtt_split_flag' is signaled for each node'MTT_node'. When the value of'mtt_split_flag' is 1, the corresponding node is divided into a plurality of rectangular nodes. When the value of'mtt_split_flag' is 0, the corresponding node becomes'MTT_leaf_node' of the multi-type tree. When the multi-type tree node'MTT_node' is divided into a plurality of rectangular nodes (i.e., when the value of'mtt_split_flag' is 1),'mtt_split_vertical_flag' and'mtt_split_binary_flag' for the node'MTT_node' will be additionally signaled. I can. When the value of'mtt_split_vertical_flag' is 1, vertical division of the node'MTT_node' is indicated, and when the value of'mtt_split_vertical_flag' is 0, horizontal division of the node'MTT_node' is indicated. In addition, when the value of'mtt_split_binary_flag' is 1, the node'MTT_node' is divided into two rectangular nodes, and when the value of'mtt_split_binary_flag' is 0, the node'MTT_node' is divided into three rectangular nodes.

The present invention relates to generation of transform coefficients when performing a first-order transform and a second-order transform on a residual signal in a video codec. The quadratic transformation refers to performing a quadratic transformation on the first transformation coefficients such as DCT-2, DST-7, DCT-8, etc. for the prediction residual block. In the present invention, the second transformation is defined as a non-separable transformation. .

The present invention includes applying a transform kernel when performing a quadratic transform on various block types that have been transformed by the first order, a method of converting a transform coefficient into a zero transform quantization coefficient, and a process of scanning the second transform quantization coefficient.

First, when the first-order transformed transform block is a 4x4 block, the first-order transform coefficients are arranged into a 1x16 one-dimensional vector in order to perform a non-separable quadratic transform. A 1x8 quadratic transform coefficient is generated by applying a 16x8 transform kernel, which is a first-order transform kernel, to this transform vector.

An example of this is shown in FIG. 5.

Fig. 5. Generation of quadratic transform coefficients for 4x4 transform blocks

At this time, since the 16x8 quadratic transformation kernel is applied without applying the 16x16 quadratic transformation kernel to the first transformation kernel, as shown in FIG. 5, the 9th to 16th transformation coefficients after the 2nd transformation become zero transformation coefficients. A bitstream is generated by quantizing and scanning second-order transform coefficients from the first to the eighth.

Second, when the first-order transformed blocks are 8x4 and 4x8 blocks, we propose a method of dividing the 8x4 and 4x8 transform blocks in half and then applying the second-order transform to only part of the first-order transform coefficients. As in the first case, a 16x8 or 8x16 first-order transform kernel is applied to a 4x4 block to which a second-order transform is applied. An example of this is shown in FIG. 5.

Fig. 6. Generation of quadratic transform coefficients for 8x4 and 4x8 transform blocks

As shown in FIG. 6, with respect to the first-order transform coefficient of the 8x4 transform block, the second-order transform is performed only on the coefficient corresponding to the left of the transform block, and the coefficient corresponding to the right maintains the first-order transform coefficient. For a 4x4 first-order transform block performing quadratic transform, as in the first case, the transform coefficients are sorted into a 1x16 vector and a 16x8 transform kernel, which is a first-order transform kernel, is applied to the transform vector to generate a 1x8 quadratic transform coefficient. As shown in FIG. 6, the 9th to 16th transform coefficients after the second-order transform become zero transform coefficients. A bitstream is generated by quantizing and scanning second-order transform coefficients from the first to the eighth. Similarly, for a 4x8 block, the same method as for a coefficient positioned on the left side of the case of 8x4 is used for the coefficient positioned at the top of the first-order transform coefficient, and maintains the first-order transform coefficient for the lower block.

In FIG. 7, the case where the third, first-order transformed transform block is Nx4 and 4xN (N≥16).

Fig. 7. Generation of quadratic transform coefficients for Nx4, 4xN (N ≥ 16) transform blocks

As shown in FIG. 7, the Nx4 block is divided into two 4x4 blocks and the remaining block, and then quadratic transformation is performed in the same manner as in FIGS. 5 and 6 for two 4x4 blocks located on the left side. And for the remaining right (N-8)x4 blocks, the first-order transform coefficient can be maintained or the zero transform coefficient can be made. In the case of a 4xN block, after dividing into two 4x4 blocks on the upper side and the remaining 4x(N-8) blocks, the same method as in Figs. 5 and 6 is used for the upper two 4x4 blocks, and the remaining 4x(N-8) blocks For, the first-order transform coefficient can be maintained or the zero transform coefficient can be made.

The fourth, the first-order transformed transform blocks are 16x8 and 8x16 shown in FIGS. 8 and 9.

Figure 8. Generation of quadratic transform coefficients for 16x8 transform blocks

Fig. 9. Generation of quadratic transform coefficients for 8x16 transform blocks

As shown in FIGS. 8 and 9, each block is divided into four 4x4 and one 8x8 block. At this time, a total of 64 coefficients corresponding to four 4x4 blocks are aligned with a 1x64 vector. Sort order is from top left to bottom right in zigzag order. A quadratic transform coefficient is generated by multiplying the quadratic transform kernel 64x8. The 8 quadratic transform coefficients obtained at this time are quantized and scanned. Since the 64x8 transform kernel is applied, three of the four 4x4 blocks become zero transform coefficients. In addition, the left or lower 8x8 block can be made into a zero transform coefficient or a first order transform coefficient can be maintained.

Fig. 10. Generation of quadratic transform coefficients for 16x16 transform blocks

Fig. 10 shows a case in which the first transformed transform block is 16x16. As shown in the figure, after dividing into four 4x4 blocks on the upper left and three 8x8 blocks, the generation of quadratic transform coefficients for the four 4x4 blocks is the same as in FIG. 9. For the remaining 8x8 blocks, zero transform coefficients can be made or the first-order transform kernel coefficients can be maintained.

Sixth, when the size of the first-order transformed transform block is NxM, we propose the generation of second-order transform coefficients. In this case, the size of the transform block includes 32x16, 16x32, 32x8, and 8x32. An example of this is shown in FIG. 11. In this case, quadratic transformation is performed only for 3 4x4 blocks in the zigzag direction from the top left in the NxM block. A total of 48 transform coefficients are sorted into a 1x48 vector. Sort order is in zigzag block order. In this case, when the quadratic transform kernel 48x8 is applied, a total of eight quadratic transform coefficients are generated, which are displayed as shown in the upper left corner of FIG. 11. Among the four 4x4 blocks in the upper left corner, a 4x4 block to which a quadratic transform is not applied maintains a first-order transform kernel, and the remaining three 8x8 blocks can be made into zero transform coefficients or maintain a first-order transform coefficient.

Fig. 11. Generation of quadratic transform coefficients for NxM transform blocks

The above-described embodiments of the present invention can be implemented through various means. For example, embodiments of the present invention may be implemented by hardware, firmware, software, or a combination thereof.

In the case of hardware implementation, the method according to embodiments of the present invention includes one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), and Programmable Logic Devices (PLDs). , Field Programmable Gate Arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, and the like.

In the case of implementation by firmware or software, the method according to the embodiments of the present invention may be implemented in the form of a module, procedure, or function that performs the functions or operations described above. The software code can be stored in a memory and driven by a processor. The memory may be located inside or outside the processor, and data may be exchanged with the processor through various known means.

The above description of the present invention is for illustrative purposes only, and those of ordinary skill in the art to which the present invention pertains will be able to understand that it can be easily modified into other specific forms without changing the technical spirit or essential features of the present invention. will be. Therefore, it should be construed that the above-described embodiments are illustrative and limiting in all respects. For example, each component described as a single type may be implemented in a distributed manner, and similarly, components described as being distributed may also be implemented in a combined form.

The scope of the present invention is indicated by the claims to be described later rather than the detailed description, and all changes or modified forms derived from the meaning and scope of the claims and their equivalent concepts should be interpreted as being included in the scope of the present invention. do.

Claims (1)

How to process video signals.

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