KR20210001823U - Align system for wafer with IR - Google Patents

Align system for wafer with IR Download PDF

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KR20210001823U
KR20210001823U KR2020210002227U KR20210002227U KR20210001823U KR 20210001823 U KR20210001823 U KR 20210001823U KR 2020210002227 U KR2020210002227 U KR 2020210002227U KR 20210002227 U KR20210002227 U KR 20210002227U KR 20210001823 U KR20210001823 U KR 20210001823U
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wafer
mask
mark
infrared camera
recognized
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KR2020210002227U
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Korean (ko)
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KR200497510Y1 (en
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정광호
김형수
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주식회사 야스
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/682—Mask-wafer alignment
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/042—Coating on selected surface areas, e.g. using masks using masks
    • H01L51/0011—
    • H01L51/56—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/166—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask

Abstract

본 고안의 목적은 불투명 웨이퍼에 대해 마스크와의 얼라인을 확인하고 교정할 수 있는 웨이퍼 얼라인 시스템을 제공하고자 하는 것이다.
상기 목적에 따라 본 고안은 적외선 카메라를 적용한 웨이퍼 얼라인 시스템을 제공한다.
즉, 본 고안은 웨이퍼와 그 아래 배치된 마스크에 대하여, 웨이퍼 이면에 제1 마크를, 마스크 상면에 제2마크를 형성하고, 적외선 카메라를 웨이퍼 위편에 배치하여, 제1 마크가 인식될 수 있는 초점 거리에 적외선 카메라를 위치시켜 웨이퍼 위치를 정렬한 다음, 적외선 카메라를 하강시켜 제2 마크가 인식될 수 있는 초점 거리에 도달시켜 제2 마크를 인식하여 마스크와 웨이퍼를 최종 정렬한다.An object of the present invention is to provide a wafer alignment system capable of confirming and correcting alignment with a mask for an opaque wafer.
In accordance with the above object, the present invention provides a wafer alignment system to which an infrared camera is applied.
That is, the present invention forms a first mark on the back surface of the wafer and a second mark on the upper surface of the mask with respect to the wafer and the mask disposed thereunder, and by placing an infrared camera on the upper side of the wafer, the first mark can be recognized After positioning the infrared camera at the focal length to align the wafer position, the infrared camera is lowered to reach the focal length at which the second mark can be recognized, and the second mark is recognized to finally align the mask and the wafer.

Description

적외선을 이용한 웨이퍼 얼라인 시스템{Align system for wafer with IR}Wafer alignment system using infrared

본 고안은 마이크로 올레드(Micro OLED) 제조 증착 공정에 적용되는 웨이퍼 얼라인 시스템에 관한 것이다. The present invention relates to a wafer alignment system applied to a micro OLED manufacturing deposition process.

실리콘 웨이퍼에 박막을 형성하고자 하는 경우, 마스크를 웨이퍼에 합착하고 웨이퍼와 마스크의 얼라인 상태를 확인 및 교정할 필요가 있다. 그런데 실리콘 웨이퍼는 투명성이 낮아 기존의 유리기판과 같은 투명 기판에 적용되던 얼라인 시스템을 그대로 적용할 수 없다. When a thin film is to be formed on a silicon wafer, it is necessary to attach a mask to the wafer and to check and correct the alignment state between the wafer and the mask. However, since silicon wafers have low transparency, the alignment system applied to transparent substrates such as existing glass substrates cannot be applied as it is.

공개특허 10-2018-0031692호는 웨이퍼 얼라인 시스템에 대해 공개하지만, 여기서도 투명 웨이퍼를 전제로 하고 있다. Patent Publication No. 10-2018-0031692 discloses a wafer alignment system, but also assumes a transparent wafer here.

본 고안의 목적은 불투명 웨이퍼에 대해 마스크와의 얼라인을 확인하고 교정할 수 있는 웨이퍼 얼라인 시스템을 제공하고자 하는 것이다. An object of the present invention is to provide a wafer alignment system capable of confirming and correcting alignment with a mask for an opaque wafer.

상기 목적에 따라 본 고안은 적외선 카메라를 적용한 웨이퍼 얼라인 시스템을 제공한다.In accordance with the above object, the present invention provides a wafer alignment system to which an infrared camera is applied.

본 고안은 웨이퍼와 그 아래 배치된 마스크에 대하여, 웨이퍼 이면에 제1 마크를, 마스크 상면에 제2마크를 형성하고, 적외선 카메라를 웨이퍼 위편에 배치하여, 제1 마크가 인식될 수 있는 초점 거리에 적외선 카메라를 위치시켜 웨이퍼 위치를 정렬한 다음, 적외선 카메라를 하강시켜 제2 마크가 인식될 수 있는 초점 거리에 도달시켜 제2 마크를 인식하여 마스크와 웨이퍼를 최종 정렬한다.The present invention forms a first mark on the back surface of the wafer and a second mark on the upper surface of the mask with respect to the wafer and the mask disposed thereunder, and arranges an infrared camera on the upper side of the wafer, so that the first mark can be recognized at a focal length After aligning the wafer position by placing the infrared camera on the , the infrared camera is lowered to reach a focal length at which the second mark can be recognized, and the second mark is recognized to finally align the mask and the wafer.

상기에서, 정렬의 정밀도는 10μm 이내로 한다.In the above, the alignment precision is set to within 10 μm.

상기에서, 웨이퍼와 마스크의 간격은 1 내지 10mm로 유지한다.In the above, the gap between the wafer and the mask is maintained at 1 to 10 mm.

상기에서, 제1 마크와 제2 마크는 웨이퍼와 마스크 각각의 에지부분에 4개의 점을 포함하게 하며, 웨이퍼와 마스크에 대해 각각 다른 적외선 파장을 발생시키는 소재로 구성한다. In the above, the first mark and the second mark include four points on the edge portions of the wafer and the mask, respectively, and are composed of a material that generates different infrared wavelengths for the wafer and the mask.

본 고안에 따르면 불투명 웨이퍼에 대해 마스크와의 얼라인을 확인하고 교정할 수 있다. According to the present invention, it is possible to check and correct alignment with a mask for an opaque wafer.

도 1은 본 고안을 설명하는 개략적인 구성도이다. 1 is a schematic configuration diagram illustrating the present invention.

이하, 첨부도면을 참조하여 본 고안의 바람직한 실시예에 대해 상세히 설명한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도 1을 보면, 실리콘 웨이퍼와 니켈로 된 마스크가 이격된 상태로 배치되고 웨이퍼 상부에 적외선 카메라가 배치된 것이 나타나있다. Referring to FIG. 1 , it is shown that a silicon wafer and a mask made of nickel are disposed in a spaced apart state, and an infrared camera is disposed on the wafer.

실리콘 웨이퍼는 불투명하므로 일반 카메라를 이용하여 얼라인 할 수 없으며, 본 고안은 적외선 카메라를 적용하여 그러한 문제점을 극복하였다. Since the silicon wafer is opaque, it cannot be aligned using a general camera, and the present invention overcomes such a problem by applying an infrared camera.

실리콘 웨이퍼 후면에 4개의 점을 포함한 제1 마크를 형성한다. 적외선 카메라에 의해 명확히 식별될 수 있도록 실리콘과 다른 적외선 파장을 방출하는 소재로 구성한다. 마스크의 경우 상면에 4개의 점을 포함한 제2 마크를 형성하며 이때에도 적외선 카메라의 식별력을 고려하여 마스크와 다른 적외선 파장을 방출하는 소재로 마크를 형성한다. 마크는 웨이퍼 상면, 마스크 이면에 형성될 수도 있지만 본 실시예에서와 같이 서로 간격을 좁히도록 형성되는 것이 바람직하다.A first mark including four dots is formed on the back surface of the silicon wafer. It is made of a material that emits different infrared wavelengths than silicon so that it can be clearly identified by an infrared camera. In the case of a mask, a second mark including four dots is formed on the upper surface, and even at this time, the mark is formed with a material emitting a different infrared wavelength than the mask in consideration of the identification power of the infrared camera. The marks may be formed on the upper surface of the wafer and the back surface of the mask, but are preferably formed so as to narrow the distance from each other as in the present embodiment.

웨이퍼와 마스크의 얼라인은 다음과 같이 실시한다.The wafer and the mask are aligned as follows.

웨이퍼 위편에 배치된 적외선 카메라를 하강시켜, 제1 마크가 인식될 수 있는 초점 거리에 위치시켜 제1 마크를 기준으로 하여 웨이퍼 위치를 정렬한다. 초점거리는 대략 30mm(±10μm) 정도이다. By lowering the infrared camera disposed on the upper side of the wafer, the first mark is positioned at a recognizable focal length to align the wafer position with respect to the first mark. The focal length is approximately 30mm (±10μm).

다음, 적외선 카메라를 하강시켜 제2 마크가 인식될 수 있는 초점 거리에 도달시켜 제2 마크를 인식하여 마스크와 웨이퍼를 최종 정렬한다.Next, the infrared camera is lowered to reach a focal length at which the second mark can be recognized, and the second mark is recognized to finally align the mask and the wafer.

본 실시예의 경우, 웨이퍼와 마스크의 간격은 1mm 정도로 하였지만, 웨이퍼와 마스크의 간격은 1 내지 10mm로 유지할 수 있다. In the present embodiment, the distance between the wafer and the mask is set to be about 1 mm, but the distance between the wafer and the mask may be maintained at 1 to 10 mm.

본 고안에 따른 정렬의 정밀도는 10μm 이내로 상당히 높은 신뢰도를 나타낼 수 있다. The alignment precision according to the present invention can represent a fairly high reliability within 10 μm.

상기에서, 마스크의 소재는 니켈 외에 다른 소재로 아루어질 수 있다. In the above, the material of the mask may be made of a material other than nickel.

이와 같이 하여 기존의 투명 기판과 마스크를 정렬하던 얼라인 시스템을 거의 그대로 활용하면서 불투명한 웨이퍼와 마스크를 얼라인할 수 있다. In this way, it is possible to align an opaque wafer and a mask while almost using the alignment system for aligning the existing transparent substrate and mask.

본 고안의 권리는 위에서 설명된 실시 예에 한정되지 않고 청구범위에 기재된 바에 의해 정의되며, 본 고안의 분야에서 통상의 지식을 가진 자가 청구범위에 기재된 권리범위 내에서 다양한 변형과 개작을 할 수 있다는 것은 자명하다.The rights of the present invention are not limited to the above-described embodiments, but are defined by the claims, and those of ordinary skill in the art can make various modifications and adaptations within the scope of the claims. it is self-evident

Claims (2)

마이크로 올레드(Micro OLED) 제조 증착 공정에 적용되는 웨이퍼 얼라인 시스템으로서,
웨이퍼와 마스크를 얼라인하기 위하여,
실리콘으로 된 웨이퍼;
상기 웨이퍼와 이격되게 배치된 마스크;
상기 웨이퍼 상부에 배치된 적외선 카메라;
상기 웨이퍼의 이면에 형성되되, 실리콘 웨이퍼와 다른 적외선 파장을 방출하는 소재로 된 제1 마크; 및
상기 마스크 상면에 형성되되, 상기 마스크와 다른 적외선 파장을 방출하는 소재로 된 제2 마크;를 포함하고,
제1 마크가 인식될 수 있는 초점 거리에 적외선 카메라를 위치시켜 웨이퍼 위치를 정렬한 다음, 적외선 카메라를 하강시켜 제2 마크가 인식될 수 있는 초점 거리에 도달시켜 제2 마크를 인식하여 마스크와 웨이퍼를 최종 정렬 하며, 정렬의 정밀도는 10μm 이내인 것을 특징으로 하는 마이크로 올레드(Micro OLED) 제조 증착 공정에 적용되는 웨이퍼 얼라인 시스템.A wafer alignment system applied to a micro OLED manufacturing deposition process, comprising:
To align the wafer and the mask,
silicon wafer;
a mask spaced apart from the wafer;
an infrared camera disposed on the wafer;
a first mark formed on the back surface of the wafer and made of a material emitting an infrared wavelength different from that of the silicon wafer; and
a second mark formed on the upper surface of the mask and made of a material emitting a different infrared wavelength than the mask; and
Position the infrared camera at a focal length where the first mark can be recognized to align the wafer position, and then lower the infrared camera to reach the focal length where the second mark can be recognized to recognize the second mark to recognize the mask and wafer. A wafer alignment system applied to the micro OLED manufacturing deposition process, characterized in that the final alignment is performed and the alignment precision is within 10 μm. 제1항에 있어서, 웨이퍼와 마스크의 간격은 1 내지 10mm로 유지하는 것을 특징으로 하는 마이크로 올레드(Micro OLED) 제조 증착 공정에 적용되는 웨이퍼 얼라인 시스템.

The wafer alignment system according to claim 1, wherein the distance between the wafer and the mask is maintained at 1 to 10 mm.
KR2020210002227U 2021-07-14 2021-07-14 Align system for wafer with IR KR200497510Y1 (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09181285A (en) * 1995-12-25 1997-07-11 Nec Corp Semiconductor substrate and its manufacture
KR20010093666A (en) * 2000-03-28 2001-10-29 미즈따니군지 Positioning apparatus used in a process for producing multi-layered printed circuit board and method of using the same
KR20020086221A (en) * 2001-05-10 2002-11-18 가부시키가이샤 아도테크 엔지니어링 Aligner
KR200356556Y1 (en) * 2004-04-19 2004-07-15 주식회사 신우 엠에스티 Mask aligner having microscope system being capable of observing plural alignment marks simultaneously and adjusting optical axis
JP2007512694A (en) * 2003-11-28 2007-05-17 ズス・マイクロテック・リソグラフィ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング Direct alignment in mask position adjuster
KR20120097995A (en) * 2011-02-28 2012-09-05 주식회사 에스에프에이 Method for aligning substrates and deposition system using thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09181285A (en) * 1995-12-25 1997-07-11 Nec Corp Semiconductor substrate and its manufacture
KR20010093666A (en) * 2000-03-28 2001-10-29 미즈따니군지 Positioning apparatus used in a process for producing multi-layered printed circuit board and method of using the same
KR20020086221A (en) * 2001-05-10 2002-11-18 가부시키가이샤 아도테크 엔지니어링 Aligner
JP2007512694A (en) * 2003-11-28 2007-05-17 ズス・マイクロテック・リソグラフィ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング Direct alignment in mask position adjuster
KR200356556Y1 (en) * 2004-04-19 2004-07-15 주식회사 신우 엠에스티 Mask aligner having microscope system being capable of observing plural alignment marks simultaneously and adjusting optical axis
KR20120097995A (en) * 2011-02-28 2012-09-05 주식회사 에스에프에이 Method for aligning substrates and deposition system using thereof

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