KR20200115790A - Liquid crystal display - Google Patents

Abstract

According to one embodiment of the present invention, a liquid crystal display device includes: an upper substrate and a lower substrate opposite to the upper substrate; a liquid crystal layer positioned between the upper substrate and the lower substrate; a gate insulating film positioned on the lower substrate; a color filter positioned on the gate insulating film; a pattern layer positioned on the color filter; a planarization layer positioned on the pattern layer; and a pixel electrode positioned on the planarization layer. The pattern layer includes a plurality of irregularities, and the pattern layer has a refractive index between the refractive index of the color filter and the planarization layer. The present invention provides the liquid crystal display device capable of increasing transmittance of the liquid crystal display device.

Description

Liquid crystal display device {LIQUID CRYSTAL DISPLAY}

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device that improves transmittance by reducing light reflected into the liquid crystal display device.

Depending on the light emission method, the display device is a liquid crystal display (LCD), an organic light emitting diode display (OLED display), a plasma display panel (PDP), and an electrophoretic display device. display).

The liquid crystal display device includes two substrates arranged to face each other, an electrode formed on the substrate, and a liquid crystal layer interposed between the substrates, and a voltage is applied to the electrodes to rearrange the liquid crystal molecules of the liquid crystal layer. It is a display device that adjusts the amount. Accordingly, the liquid crystal display is divided into a transmissive liquid crystal display that displays an image using a backlight as a light source and a reflective liquid crystal display that displays an image using natural light as a light source without the use of a backlight.

In the case of a transmissive liquid crystal display, light emitted from a backlight passes through each layer constituting the liquid crystal display to display an image. In this case, light may be reflected toward the backlight at the boundary of the layer due to the difference in refractive index of each layer. Accordingly, the amount of light emitted to the front surface of the liquid crystal display decreases, and the transmittance of the liquid crystal display decreases.

The present invention has been devised to solve the above problems, and an object thereof is to provide a liquid crystal display device capable of increasing the transmittance of the liquid crystal display device.

A liquid crystal display according to an exemplary embodiment includes an upper substrate and a lower substrate facing the upper substrate; a liquid crystal layer positioned between the upper substrate and the lower substrate; a gate insulating film positioned on the lower substrate; a gate insulating film positioned on the gate insulating film A color filter; a pattern layer disposed on the color filter; a planarization layer disposed on the pattern layer; a pixel electrode disposed on the planarization layer; wherein the pattern layer includes a plurality of irregularities, and the pattern layer is a color filter It has a refractive index between the refractive index of and the refractive index of the planarization layer.

The irregularities may have a shape of a hemisphere, a cylinder, a polygonal column, a cone, or a polygonal pyramid.

The color filter may have a refractive index different from that of the planarization layer.

The pattern layer may have the same refractive index as the color filter.

The pattern layer may overlap the pixel electrode.

The pattern layer may include at least one of silicon nitride (SiNx), silicon oxide (SiOx), a photosensitive organic material, and a low dielectric constant insulating material.

The pattern layer may have a refractive index of 1.3 or more and 2.2 or less.

The planarization layer may include at least one of silicon nitride (SiNx), silicon oxide (SiOx), a photosensitive organic material, and a low dielectric constant insulating material.

The planarization layer may have a refractive index of 1.8 or more and 2.2 or less.

A liquid crystal display device according to another exemplary embodiment of the present invention includes an upper substrate and a lower substrate facing the upper substrate; a liquid crystal layer positioned between the upper substrate and the lower substrate; a pattern layer positioned on the lower substrate; and a pattern layer on the pattern layer A planarization layer disposed; a color filter disposed on the planarization layer; a pixel electrode disposed on the color filter; wherein the pattern layer includes a plurality of irregularities, and the pattern layer is between the refractive index of the lower substrate and the refractive index of the planarization layer Has a refractive index of

The irregularities may have any one of a hemispherical shape, a cylinder shape, a polygonal column shape, a conical shape, and a polygonal pyramid shape.

The pattern layer may be made of the same material as the lower substrate.

The pattern layer may be integral with the lower substrate.

The pattern layer may overlap the pixel electrode.

The pattern layer may be made of SiO ₂ .

The pattern layer may have a refractive index of 1.3 or more and 2.2 or less.

The planarization layer may include at least one of silicon nitride (SiNx), silicon oxide (SiOx), a photosensitive organic material, and a low dielectric constant insulating material.

The planarization layer may have a refractive index of 1.8 or more and 2.2 or less.

The display device according to the present invention provides the following effects.

By reducing the amount of light reflected from the inside of the liquid crystal display, it is possible to improve the transmittance of the liquid crystal display.

1 is a diagram illustrating a display panel and a peripheral circuit connected thereto of a liquid crystal display according to an exemplary embodiment of the present invention.
2 is a diagram schematically illustrating pixels included in the display panel of FIG. 1.
3 is a plan view illustrating one pixel according to an exemplary embodiment of the present invention.
4 is a cross-sectional view taken along line II′ of FIG. 3.
5 is a plan view of a color filter, a pattern layer, and a planarization layer.
6 is a cross-sectional view taken along the line II-II' of FIG. 5 and a schematic diagram illustrating a change in refractive index due to a pattern layer.
7A to 7C are cross-sectional views taken along the line II-II' of FIG. 5 according to another embodiment of the present invention.
8 is a graph showing the transmittance according to the height and diameter of the irregularities of the pattern layer.
9 is another cross-sectional view taken along line II′ of FIG. 3.

Advantages and features of the present invention, and a method of achieving them will become apparent with reference to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms different from each other, and only these embodiments make the disclosure of the present invention complete, and common knowledge in the art to which the present invention pertains. It is provided to completely inform the scope of the invention to those who have it, and the invention is only defined by the scope of the claims. Accordingly, in some embodiments, well-known process steps, well-known device structures, and well-known techniques have not been described in detail in order to avoid obscuring interpretation of the present invention. The same reference numerals refer to the same components throughout the specification.

In the drawings, the thicknesses are enlarged to clearly express various layers and regions. The same reference numerals are assigned to similar parts throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the case where the other part is "directly above", but also the case where there is another part in the middle. Conversely, when one part is "directly above" another part, it means that there is no other part in the middle. Further, when a part such as a layer, film, region, plate, etc. is said to be "under" another part, this includes not only the case where the other part is "directly below", but also the case where there is another part in the middle. Conversely, when one part is "right under" another part, it means that there is no other part in the middle.

Spatially relative terms "below", "beneath", "lower", "above", "upper", etc., as shown in the figure It may be used to easily describe the correlation between the device or components and other devices or components. Spatially relative terms should be understood as terms including different directions of the device during use or operation in addition to the directions shown in the drawings. For example, if an element shown in the figure is turned over, an element described as “below” or “beneath” of another element may be placed “above” another element. Accordingly, the exemplary term “below” may include both directions below and above. The device may be oriented in other directions, and thus spatially relative terms may be interpreted according to the orientation.

In the present specification, when a part is said to be connected to another part, this includes not only a case in which it is directly connected, but also a case in which it is electrically connected with another element interposed therebetween. In addition, when a part includes a certain component, it means that other components may be further included rather than excluding other components unless otherwise indicated.

In the present specification, terms such as first, second, and third may be used to describe various elements, but these elements are not limited by the terms. The terms are used for the purpose of distinguishing one component from other components. For example, without departing from the scope of the present invention, a first component may be referred to as a second or third component, and similarly, a second or third component may be alternately named.

Unless otherwise defined, all terms (including technical and scientific terms) used in the present specification may be used as meanings that can be commonly understood by those of ordinary skill in the art to which the present invention belongs. In addition, terms defined in a commonly used dictionary are not interpreted ideally or excessively unless explicitly defined specifically.

Hereinafter, a liquid crystal display device according to the present invention will be described in detail with reference to FIGS. 1 to 9.

1 is a diagram illustrating a display panel and a peripheral circuit connected thereto of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a diagram schematically illustrating pixels included in the display panel of FIG. 1. 3 is a plan view showing one pixel according to an exemplary embodiment of the present invention, and FIG. 4 is a cross-sectional view taken along line II′ of FIG. 3.

Referring to FIG. 1, the display device of the present invention includes a display panel 10, a gate driver 411, and a data driver 431.

The display panel 10 includes a lower panel 100, an upper panel 200, and a liquid crystal layer 300. The display panel 10 is divided into a display area (DA) and a non-display area (NDA).

The display area DA of the display panel 10 corresponds to the display area DA of the lower panel 100 and the display area DA of the upper panel 200. The non-display area NDA of the display panel 10 corresponds to the non-display area NDA of the lower panel 100 and the non-display area NDA of the upper panel 200.

The lower panel 100 includes a lower substrate 101, a plurality of gate lines GL1 to GLi, a plurality of data lines DL1 to DLj, and a common line (not shown).

The data lines DL1 to DLj cross the gate lines GL1 to GLi. The gate lines GL1 to GLi extend to the non-display area NDA and are connected to the gate driver 411, and the data lines DL1 to DLj extend to the non-display area NDA, and the data driver 431 Is connected to.

The gate driver 411 includes a plurality of gate driving integrated circuits 413. The gate driving integrated circuits 413 generate gate signals and sequentially supply them to the first to i-th gate lines GL1 to GLi.

Each gate driving integrated circuit 413 is mounted on a gate carrier 415. The gate carriers 415 are electrically connected to the lower panel 100. For example, each of the gate carriers 415 may be electrically connected between the circuit board 451 and the non-display area NDA of the lower panel 100.

The data driver 431 includes a plurality of data driving integrated circuits 433. The data driving integrated circuits 433 receive digital image data signals and data control signals from a timing controller. After sampling the digital image data signals according to the data control signal, the data driving integrated circuits 433 latch the sampled image data signals corresponding to one horizontal line every horizontal period and convert the latched image data signals into the data lines DL1. To DLj). That is, the data driving integrated circuits 433 convert digital image data signals from the timing controller into analog image signals using a gamma voltage input from a power supply (not shown) and supply them to the data lines DL1 to DLj. do.

Each data driving integrated circuit 433 is mounted on a data carrier 435. The data carriers 435 are connected between the circuit board 451 and the lower panel 100. For example, each of the data carriers 435 may be electrically connected between the circuit board 451 and the non-display area NDA of the lower panel 100.

The timing controller and the power supply unit described above may be located on the circuit board 451, and the data carrier 435 includes input wirings for transmitting various signals from the timing controller and the power supply unit to the data driving integrated circuit 433. And output wirings for transmitting image data signals output from the data driving integrated circuit 433 to corresponding data lines. Meanwhile, the at least one carrier 415 and 435 may further include auxiliary wirings for transmitting various signals from the timing controller and the power supply to the gate driver 411, and these auxiliary wirings are located on the lower panel 100. It is connected to the panel wirings. These panel wirings connect the auxiliary wirings and the gate driver 411 to each other. Panel wirings may be formed in the non-display area NDA of the lower panel 100 in a line-on-glass method.

Referring to FIG. 2, the display panel 10 includes a plurality of pixels R, G, and B. The pixels R, G, and B are positioned in the display area DA of the display panel 10 as shown in FIG. 2.

The pixels R, G, and B are arranged in a matrix form. The pixels R, G, and B are divided into a red pixel R displaying a red image, a green pixel G displaying a green image, and a blue pixel B displaying a blue image. In this case, the red pixels R, the green pixels G, and the blue pixels B adjacent in the horizontal direction may be unit pixels for displaying one unit image.

The j pixels (hereinafter, n-th horizontal line pixels) arranged along the n-th horizontal line (n is any one of 1 to i) are individually provided to each of the first to j-th data lines DL1 to DLj. Connected. In addition, the nth horizontal line pixels are commonly connected to the nth gate line. Accordingly, the n-th horizontal line pixels receive the n-th gate signal in common. That is, all j pixels arranged on the same horizontal line receive the same gate signal, but pixels located on different horizontal lines receive different gate signals. For example, the red pixel R and the green pixel G located on the first horizontal line HL1 both receive the first gate signal, while the red pixel R and the green pixel R located on the second horizontal line HL2 The green pixel G receives a second gate signal having a timing different from these.

Each pixel R, G, and B includes a thin film transistor TFT, a liquid crystal capacitor Clc, and an auxiliary capacitor Cst, as shown in FIG. 2.

The thin film transistor TFT is turned on according to the gate signal from the gate line GLi. The turned-on thin film transistor TFT supplies the analog image data signal provided from the data line DLj to the liquid crystal capacitor Clc and the auxiliary capacitor Cst.

The liquid crystal capacitor Clc includes a pixel electrode PE and a common electrode CE positioned opposite each other.

The storage capacitor capacitor Cst includes a pixel electrode PE and an opposite electrode positioned to face each other. Here, the opposite electrode may be a front gate line GLi-1 or a common line (not shown).

3 and 4, the display panel 10 includes a lower substrate 101, a thin film transistor (TFT), a gate insulating layer 131, a color filter 133, a pattern layer 135, and a planarization layer 137. , A pixel electrode PE, an upper substrate 201, a common electrode CE, and a liquid crystal layer 300. Here, the thin film transistor TFT includes a gate electrode GE, a semiconductor layer SM, a source electrode SE, and a drain electrode DE.

The lower substrate 101 and the upper substrate 201 may be insulating substrates having light transmission characteristics and flexible characteristics, such as a plastic substrate. However, the present invention is not limited thereto, and the lower substrate 101 may be made of a hard substrate such as a glass substrate.

The gate line GL and the gate electrode GE are positioned on the lower substrate 101. In order to connect the gate line GL to another layer or an external driving circuit, a connection portion (eg, an end portion) thereof may have a larger area than other portions thereof.

At least one of the gate line GL and the gate electrode GE is an aluminum-based metal such as aluminum (Al) or an aluminum alloy, or a silver-based metal such as silver (Ag) or a silver alloy, or copper (Cu) or It may be made of a copper-based metal such as a copper alloy, or a molybdenum-based metal such as molybdenum (Mo) or a molybdenum alloy. Alternatively, at least one of the gate line GL and the gate electrode GE may be made of any one of chromium (Cr), tantalum (Ta), and titanium (Ti). Alternatively, at least one of the gate line GL and the gate electrode GE may have a multilayer structure including at least two conductive layers having different physical properties.

The gate insulating layer 131 is positioned on the gate line GL and the gate electrode GE. In this case, the gate insulating layer 131 may be positioned on the entire surface of the lower substrate 101 including the gate line GL and the gate electrode GE.

The gate insulating layer 131 may be made of silicon nitride (SiNx) or silicon oxide (SiOx). The gate insulating layer 131 may have a multilayer structure including at least two insulating layers having different physical properties.

The semiconductor layer SM is positioned on the gate insulating layer 131. In this case, the semiconductor layer SM overlaps the gate electrode GE. The semiconductor layer SM may be made of amorphous silicon or polycrystalline silicon.

Meanwhile, although not shown, the ohmic contact layer may be positioned on the semiconductor layer SM. The ohmic contact layer may be made of a material such as n+ hydrogenated amorphous silicon in which an n-type impurity such as phosphorus is doped at a high concentration, or may be made of silicide. The ohmic contact layer may form a pair and may be positioned on the semiconductor layer SM.

The source electrode SE is positioned on one side of the semiconductor layer SM. The source electrode SE extends from the data line DL. For example, as shown in FIG. 3, the source electrode SE has a shape protruding from the data line DL toward the gate electrode GE. The source electrode SE overlaps the semiconductor layer SM and the gate electrode GE. The source electrode SE is preferably made of a refractory metal such as molybdenum, chromium, tantalum, and titanium, or an alloy thereof, and may have a multilayer structure including a refractory metal film and a low resistance conductive film.

The drain electrode DE is located on the other side of the semiconductor layer SM. The drain electrode DE overlaps the gate electrode GE and the semiconductor layer SM. The drain electrode DE is connected to the pixel electrode PE. The drain electrode DE may also have the same material and structure (multilayer structure) as the source electrode SE described above. In other words, the drain electrode DE and the source electrode SE may be simultaneously manufactured by the same process.

The gate electrode GE, the source electrode SE, and the drain electrode DE form a thin film transistor TFT together with the semiconductor layer SM. At this time, a channel of the thin film transistor TFT is located in a portion of the semiconductor layer SM between the source electrode SE and the drain electrode DE.

The data line DL is positioned on the gate insulating layer 131. The data line DL may also have the same material and structure (multilayer structure) as the source electrode SE described above. In other words, the data line DL and the source electrode SE may be simultaneously formed by the same process.

The color filter 133 is positioned on the source electrode SE, the drain electrode DE, and the gate insulating layer 131. The color filter 133 may be any one of a red color filter, a green color filter, a blue color filter, and a white color filter. The color filter 133 may be positioned on the upper substrate 201 instead of the lower substrate 101. The color filter 133 may be made of a photosensitive resin having the above-described color (any one of red, green, blue, and white).

The pattern layer 135 is positioned on the color filter 133. The pattern layer 135 may be located on the entire surface of the lower substrate 101. Unlike this, the pattern layer 135 may be positioned only in an area overlapping the pixel electrode PE. Specifically, the unevenness 135b of the pattern layer 135 may be positioned to overlap the pixel electrode PE.

The pattern layer 135 may be made of silicon nitride (SiNx) or silicon oxide (SiOx). However, the present invention is not limited thereto, and the pattern layer 135 may have a multilayer structure including at least two insulating layers having different physical properties. In addition, it may have a single-layer or multi-layer structure including a photosensitivity organic material or a low dielectric constant insulating material such as a-Si:C:O and a-Si:O:F.

The planarization layer 137 is positioned on the color filter 133 and the pattern layer 135. The planarization layer 137 serves to planarize the upper portion of the pattern layer 135.

The pixel electrode PE is connected to the drain electrode DE through the drain contact hole. The pixel electrode PE is positioned on the planarization layer 137. The pixel electrode PE may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In this case, ITO may be a polycrystalline or single crystal material, and IZO may also be a polycrystalline or single crystal material.

The liquid crystal layer 300 is positioned between the lower panel 100 and the upper panel 200. The liquid crystal layer 300 has negative dielectric anisotropy and may include vertically aligned liquid crystal molecules. Alternatively, the liquid crystal layer 300 may include a photopolymerization material, and in this case, the photopolymerization material may be a reactive monomer or a reactive mesogen.

The upper panel 200 includes an upper substrate 201 and a common electrode CE positioned on the upper substrate 201, as shown in FIG. 4.

The common electrode CE is positioned on the upper substrate 201 and may be disposed on the entire surface of the upper substrate 201. The common electrode CE may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In this case, ITO may be a polycrystalline or single crystal material, and IZO may also be a polycrystalline or single crystal material. The common electrode CE is connected to a common line (not shown) of the lower panel 100 through a short portion (not shown). The common electrode CE receives a common voltage from a common line (not shown) through a short portion (not shown). The common electrode CE to which the common voltage is applied generates an electric field in the liquid crystal layer 300 together with the pixel electrode PE to which the data voltage is applied to determine the direction of liquid crystal molecules of the liquid crystal layer 300 and display an image. .

5 is a plan view of a color filter, a pattern layer, and a planarization layer, and FIG. 6 is a cross-sectional view taken along line II-II' of FIG. 5 and a schematic diagram illustrating a change in refractive index by the pattern layer.

5 and 6, the pattern layer 135 includes a reference layer 135a and a plurality of irregularities 135b. The reference layer 135a is positioned on the color filter 133, and the plurality of irregularities 135b are positioned on the reference layer 135a. However, the present invention is not limited thereto, and the reference layer 135a may be omitted in another embodiment of the present invention.

The plurality of irregularities 135b may be disposed to be spaced apart at regular intervals. The present invention is not limited thereto, and the plurality of irregularities 135b may be spaced apart from each other at different intervals.

According to an embodiment of the present invention, the plurality of irregularities 135b may be formed through an imprinting process after spin coating. In addition, a pattern (mask) may be formed through an imprinting process and then etched to form a plurality of irregularities 135b. Meanwhile, a plurality of irregularities 135b may be formed through a photoresist process. However, the present invention is not limited thereto, and a plurality of irregularities 135b may be formed through other processes.

A planarization layer 137 is positioned on the pattern layer 135, and the planarization layer 137 flattens the upper portions of the plurality of irregularities 135b. The planarization layer 137 may be made of silicon nitride (SiNx) or silicon oxide (SiOx). However, the present invention is not limited thereto, and the planarization layer 137 may have a multilayer structure including at least two insulating layers having different physical properties. In addition, it may have a single-layer or multi-layer structure including a photosensitivity organic material or a low dielectric constant insulating material such as a-Si:C:O and a-Si:O:F.

According to an embodiment of the present invention, the color filter 133 may have a refractive index different from that of the planarization layer 137. For example, the color filter 133 may have a refractive index of 1.4 or more and 1.6 or less, and the planarization layer 137 may have a refractive index of 1.9 or more and 2.1 or less. Specifically, the color filter 133 may have a refractive index of 1.5, and the planarization layer 137 may have a refractive index of 2.0. In this case, the material forming the pattern layer 135 may have the same refractive index as the color filter 133. For example, the pattern layer 135 may be made of a material having a refractive index of 1.4 or more and 1.6 or less. Specifically, the pattern layer 135 may be made of a material having a refractive index of 1.5.

When light travels to two layers having different refractive indices, reflection of light may occur at the boundary between the two layers. Specifically, when light travels from a layer having a low refractive index to a layer having a high refractive index, reflection occurs at the boundary between the two layers. In this case, as the difference between the refractive indices of the two layers increases, the reflection of light increases. Accordingly, light emitted from the backlight is reflected toward the backlight, so that the transmittance of the liquid crystal display device may decrease.

According to an embodiment of the present invention, as illustrated in FIG. 6, the refractive index of the pattern layer 135 may be gradually changed by a plurality of irregularities 135b. For example, as shown in FIG. 6, the refractive index of the pattern layer 135 is gradually from the refractive index of the color filter 133 located under the pattern layer 135 to the planarization layer 137 located on the pattern layer 135. Changes with the refractive index of Specifically, the refractive index between the reference layer 135a and the planarization layer 137 in the region where the plurality of irregularities 135b are formed is gradually from the refractive index of the reference layer 135b or the color filter 133 to the refractive index of the planarization layer 137 Change.

The light L1 emitted from the backlight passes through the color filter 133, the pattern layer 135, and the planarization layer 137 and sequentially proceeds. As shown in FIG. 6, a part of light L1 emitted from the backlight is reflected (L2) at the boundary between the two layers, and a part passes (L3) through the pattern layer 135 and the planarization layer 137. At this time, the refractive index between the reference layer 135a and the planarization layer 137 due to the plurality of irregularities 135b gradually changes from the refractive index of the reference layer 135a to the refractive index of the planarization layer 137. Accordingly, the sharp difference in refractive index between the two stacked layers is gradually changed, so that reflection of light L2 due to the difference in refractive index may be reduced.

Accordingly, the pattern layer 135 including the plurality of irregularities 135b may improve transmittance of the display device by reducing light reflection due to a sharp difference in refractive indices between the two stacked layers.

7A to 7C are cross-sectional views taken along line II-II' of FIG. 5 according to another embodiment of the present invention, and FIG. 8 is a graph showing transmittance according to height and diameter of moth-eyes of a pattern layer. to be.

7A to 7C, the pattern layer 135 may be hemispherical, cylindrical, polygonal, conical, or polygonal. Specifically, referring to FIG. 7A, the plurality of irregularities 135b of the pattern layer 135 may have a conical shape. Accordingly, the pattern layer 135 may have a moth-eye shape. As shown in FIG. 7B, the pattern layer 135 may have a cylindrical shape. As shown in FIG. 7C, the pattern layer 135 may have a hemispherical shape.

Referring to FIGS. 7A and 8, the transmittance of the display device may vary according to the height h and the diameter D in the plane of the conical irregularities 135b. For example, when the height (h) of the unevenness (135b) is 500nm or more and 1000nm or less, and the planar diameter (D) of the unevenness (135b) is 100nm, as shown in FIG. 8, the transmittance of light emitted from the backlight Can be greatly improved. However, the present invention is not limited thereto, and in order to improve the transmittance of light emitted from the backlight, the height h and the planar diameter D of the irregularities 135b may be adjusted.

7B and 8, when the height h of the unevenness 135b having a cylindrical shape is 380 nm, the transmittance of light emitted from the backlight may be about 87%. However, the present invention is not limited thereto, and in order to improve the transmittance of light emitted from the backlight, the height h and the planar diameter D of the irregularities 135b may be adjusted.

9 is a cross-sectional view taken along line II′ of FIG. 3 according to another embodiment of the present invention.

Among the descriptions related to the liquid crystal display according to another exemplary embodiment of the present invention, descriptions overlapping with those related to the liquid crystal display according to the exemplary embodiment will be omitted.

The display panel 10 according to another embodiment of the present invention includes a lower substrate 101, a pattern layer 135, a planarization layer 137, a thin film transistor (TFT), a color filter 133, and a pixel electrode PE. , An upper substrate 201, a common electrode CE, and a liquid crystal layer 300. Here, the thin film transistor TFT includes a gate electrode GE, a semiconductor layer SM, a source electrode SE, and a drain electrode DE.

According to another embodiment of the present invention, the pattern layer 135 is positioned on the lower substrate 101. In particular, the pattern layer 135 may be positioned to overlap the pixel electrode PE.

Referring to FIG. 9, the pattern layer 135 includes a plurality of irregularities 135b. The plurality of irregularities 135b are positioned on the lower substrate 101. However, the present invention is not limited thereto, and in another embodiment of the present invention, the pattern layer 135 may further include a reference layer 135a between the plurality of irregularities 135b and the lower substrate 101.

In another embodiment of the present invention, the pattern layer 135 may be made of the same material as the lower substrate 101. Accordingly, the pattern layer 135 may be formed integrally with the lower substrate 101.

The plurality of irregularities 135b may be disposed to be spaced apart at regular intervals. The present invention is not limited thereto, and the plurality of irregularities 135b may be spaced apart from each other at different intervals.

According to an embodiment of the present invention, the plurality of irregularities 135b may be formed through an etching process using nano beads. In addition, hydrogen silsesquioxane (HSQ) may be imprinted to form a plurality of irregularities 135b. Meanwhile, after forming a mask by depositing silver (Au), a plurality of irregularities 135b may be formed through a dry-etching process. However, the present invention is not limited thereto, and a plurality of irregularities 135b may be formed through other processes.

A planarization layer 137 is positioned on the pattern layer 135, and the planarization layer 137 flattens the upper portions of the plurality of irregularities 135b.

According to an embodiment of the present invention, the planarization layer 137 may be made of silicon nitride (SiNx) or silicon oxide (SiOx). The planarization layer 137 may have a multilayer structure including at least two insulating layers having different physical properties.

According to another embodiment of the present invention, the lower substrate 101 may have a refractive index different from that of the planarization layer 137. For example, the lower substrate 101 may have a refractive index of 1.4 or more and 1.6 or less, and the planarization layer 137 may have a refractive index of 1.9 or more and 2.1 or less. Specifically, the lower substrate 101 may have a refractive index of 1.5, and the planarization layer 137 may have a refractive index of 2.0. In this case, the material forming the pattern layer 135 may have the same refractive index as the lower substrate 101. For example, the pattern layer 135 may be made of a material having a refractive index of 1.4 or more and 1.6 or less. Specifically, the pattern layer 135 may be made of a material having a refractive index of 1.5.

According to an embodiment of the present invention, the refractive index of the pattern layer 135 may be gradually changed by the plurality of patterns 135b due to the plurality of irregularities 135b. For example, the refractive index of the pattern layer 135 gradually changes from the refractive index of the lower substrate 101 located under the pattern layer 135 to the refractive index of the planarization layer 137 located on the pattern layer 135. Specifically, the refractive index between the lower substrate 101 and the planarization layer 137 in the region where the unevenness 135b is located gradually changes from the refractive index of the lower substrate 101 to the refractive index of the planarization layer 137.

Accordingly, it is possible to reduce a sharp difference in refractive index between the two stacked layers, thereby reducing reflection of light due to the difference in refractive index.

Accordingly, a sharp difference in refractive indices between the two layers stacked by the pattern layer 135 including a plurality of irregularities 135b is reduced, reducing the light reflected into the display device among the light emitted from the backlight, and thus displaying The transmittance of the device can be improved.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and that various substitutions, modifications, and changes are possible within the scope of the technical spirit of the present invention. It will be obvious to those who have the knowledge of.

10: display panel
100: lower panel
200: top panel
101: lower substrate
201: upper substrate
300: liquid crystal layer
135: pattern layer
135a: reference layer
135b: irregularities
137: planarization layer

Claims (18)

An upper substrate and a lower substrate facing the upper substrate;
A liquid crystal layer positioned between the upper substrate and the lower substrate;
A gate insulating layer on the lower substrate;
A color filter on the gate insulating layer;
A pattern layer on the color filter;
A planarization layer on the pattern layer;
Includes; a pixel electrode positioned on the planarization layer,
The pattern layer includes a plurality of irregularities,
The pattern layer has a refractive index between the refractive index of the color filter and the planarization layer. The liquid crystal display of claim 1, wherein the irregularities have a shape of a hemisphere, a cylinder, a polygonal column, a cone, and a polygonal pyramid. The liquid crystal display of claim 1, wherein the color filter has a refractive index different from that of the planarization layer. The liquid crystal display of claim 3, wherein the pattern layer has the same refractive index as the color filter. The liquid crystal display of claim 1, wherein the pattern layer overlaps the pixel electrode. The method of claim 1. The pattern layer includes at least one of silicon nitride (SiNx), silicon oxide (SiOx), a photosensitive organic material, and a low dielectric constant insulating material. The liquid crystal display of claim 6, wherein the pattern layer has a refractive index of 1.3 or more and 2.2 or less. The liquid crystal display of claim 1, wherein the planarization layer includes at least one of silicon nitride (SiNx), silicon oxide (SiOx), a photosensitive organic material, and a low dielectric constant insulating material. The liquid crystal display of claim 8, wherein the planarization layer has a refractive index of 1.8 or more and 2.2 or less. An upper substrate and a lower substrate facing the upper substrate;
A liquid crystal layer positioned between the upper substrate and the lower substrate;
A pattern layer on the lower substrate;
A planarization layer on the pattern layer;
A color filter positioned on the planarization layer;
Including; a pixel electrode positioned on the color filter,
The pattern layer includes a plurality of irregularities,
The pattern layer has a refractive index between the refractive index of the lower substrate and the planarization layer. The liquid crystal display of claim 10, wherein the irregularities have a shape of any one of a hemispherical shape, a cylinder shape, a polygonal column shape, a cone shape, and a polygonal pyramid shape. The liquid crystal display of claim 10, wherein the pattern layer is made of the same material as the lower substrate. The liquid crystal display of claim 12, wherein the pattern layer is integrated with the lower substrate. The liquid crystal display of claim 10, wherein the pattern layer overlaps the pixel electrode. The method of claim 10. The pattern layer is a liquid crystal display made of SiO ₂ . The liquid crystal display of claim 15, wherein the pattern layer has a refractive index of 1.3 or more and 2.2 or less. The liquid crystal display of claim 10, wherein the planarization layer includes at least one of silicon nitride (SiNx), silicon oxide (SiOx), a photosensitive organic material, and a low dielectric constant insulating material. The liquid crystal display of claim 17, wherein the planarization layer has a refractive index of 1.8 or more and 2.2 or less.

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