KR20200062875A - Apparatus for estimating depth of self-discharging - Google Patents

Abstract

According to one embodiment of the present invention, a self-discharge degree estimation apparatus, capable of estimating a self-discharge degree by making a cell assembly discharged by itself by including a discharge switch and a charge switch connected in series with each other on a charge and discharge path supplying a self-discharge current to the cell assembly, includes: a voltage measurement part formed to measure a voltage from both ends of the cell assembly by being electrically connected with both ends of the cell assembly; a current measurement part formed to measure a self-discharge current flowing along the charge and discharge path based on an electric signal received from a current sensor by being electrically connected with the current sensor provided on the charge and discharge path of the cell assembly; a self-discharge circuit formed to enable the self-discharge current of the cell assembly to flow by being electrically connected with the charge and discharge path; and a processor formed to receive a value of the voltage of both ends and a value of the self-discharge current from the voltage measurement part and the current measurement part respectively, estimate an internal resistance voltage in the internal resistance of the cell assembly based on the value of the voltage of both ends and the value of the self-discharge current, and estimate the self-discharge degree of the cell assembly based on the internal resistance value and a reference resistance value. The self-discharge degree estimation apparatus can reduce heat generated in the process of self-discharge.

Description

Apparatus for estimating depth of self-discharging}

The present invention relates to a self-discharge estimation apparatus, and more particularly, to a self-discharge estimation apparatus capable of effectively estimating the self-discharge of a battery in the process of self-discharging a battery having one or more secondary cells.

In recent years, as demand for portable electronic products such as laptops, video cameras, and portable telephones has rapidly increased, and development of electric vehicles, energy storage batteries, robots, and satellites has started in earnest, high-performance secondary batteries capable of repeated charging and discharging Research is actively underway.

Currently commercialized secondary batteries include nickel-cadmium batteries, nickel-metal hydride batteries, nickel-zinc batteries, and lithium secondary batteries. Among these, lithium secondary batteries are free of charge and discharge because they have little memory effect compared to nickel-based secondary batteries, The self-discharge rate is very low, and it is spotlighted for its high energy density.

Batteries are used in a variety of fields, such as electric-powered vehicles or smart grid systems, in recent years, a field in which the battery is frequently used requires a large capacity. In order to increase the capacity of the battery pack, there may be a method of increasing the capacity of the secondary battery, that is, the battery cell itself, but in this case, the effect of increasing the capacity is not great, there is a physical limitation in expanding the size of the secondary battery, and the management is inconvenient. Have Therefore, a battery pack in which a plurality of battery modules are connected in series and in parallel is widely used.

A typical lithium ion battery cell is composed of a porous positive electrode current collector, a negative electrode current collector, and an electrode assembly made of an overlapping form of a separator, and a cell exterior material accommodating the electrode assembly and electrolyte. These battery cells may be divided into can type battery cells or pouch type battery cells according to the shape of the cell exterior material.

On the other hand, the safety issue of the battery is the biggest social issue in recent years. In the case of a laptop or a mobile phone, the use of the population is rapidly increasing, and the explosion of the battery not only causes damage to portable electronic products, but can also lead to fire, so it is urgent to secure battery safety. Therefore, in the related art, various protection devices are used to secure the safety of the battery by blocking the self-discharge current when detecting an abnormal condition of the battery.

Such a conventional battery pack protection device is connected to a cell assembly made of at least one battery cell, and generally, a line through which a self-discharge current flows to protect the battery pack when an abnormal condition such as overcharge, overdischarge, short circuit, or overcurrent occurs And a sense resistor for sensing the magnitude of the self-discharge current and a fuse to irreversibly disconnect the current flow.

In addition, the conventional battery pack protection device may estimate the internal impedance of the cell assembly using the self-discharge current and the voltage of the cell assembly, and check the aging degree of the cell assembly using the aging data of the cell assembly according to the internal impedance.

However, such a conventional battery pack protection device has a problem in that voltage fluctuations above a certain voltage of the cell assembly for estimating the internal impedance occur because the cell assembly must be discharged or charged over a certain voltage in the process of estimating the internal impedance.

The present invention was created under the background of the prior art as described above, and relates to a self-discharge estimation apparatus capable of effectively estimating self-discharge of a battery in a process of self-discharging a battery having one or more secondary cells.

Other objects and advantages of the present invention can be understood by the following description, and will be more clearly understood by examples of the present invention. In addition, it will be readily appreciated that the objects and advantages of the present invention can be realized by means and combinations thereof.

The self-discharge estimation apparatus according to an embodiment of the present invention for achieving the above object is provided with a charge switch and a discharge switch connected in series with each other on the charge-discharge path for supplying the self-discharge current to the cell assembly, the cell An apparatus for estimating self-discharge by self-discharging an assembly, comprising: a voltage measuring unit electrically connected to both ends of a cell assembly and configured to measure voltages at both ends of the cell assembly; A current measuring unit electrically connected to a current sensor provided on a charge/discharge path of the cell assembly and configured to measure a self-discharge current flowing through the charge/discharge path based on an electrical signal received from the current sensor; A self-discharge circuit connected to the charge-discharge path and configured to flow a self-discharge current of the cell assembly; And the values of the both ends voltage and the self-discharge current, respectively, from the voltage measurement section and the current measurement section, and the internal resistance of the cell assembly based on the values of the both ends voltage and the self-discharge current. And a processor configured to estimate the internal resistance value of and to estimate the self-discharge of the cell assembly based on the internal resistance value and the reference resistance value.

In addition, the self-discharge circuit, the self-discharge switch is configured to be electrically connected to the processor to receive a control command from the processor, and open and close the self-discharge circuit based on the control command received from the processor; And a regulator that is electrically connected to the self-discharge switch and the cell assembly and outputs a self-discharge induction voltage.

Further, the processor may control the regulator such that the value of the self-discharge induction voltage is less than the value of the voltage across the terminals.

In addition, the self-discharge circuit may be configured such that one end is electrically connected directly to the positive terminal of the cell assembly, and the other end is electrically connected to the negative terminal of the cell assembly.

In addition, the self-discharge switch and the charge switch located on the charge-discharge path, each has a source terminal, a gate terminal and a drain terminal, and the source terminal of the self-discharge switch is electrically connected to the source terminal of the charge switch It can be configured to be directly connected.

The processor may control the operation of the self-discharge switch such that the self-discharge current flows sequentially through the cell assembly, the self-discharge switch, and the regulator.

The processor may calculate the self-discharge of the cell assembly using a ratio of the internal resistance value to the reference resistance value.

The processor may calculate the self-discharge of the cell assembly as the ratio of the reference resistance value to the internal resistance value is high.

In addition, the BMS according to an embodiment of the present invention includes an apparatus for estimating self-discharge according to the present invention.

In addition, the battery pack according to an embodiment of the present invention includes a self-discharge estimation apparatus according to the present invention.

According to an aspect of the present invention, there is an advantage in that the battery is self-discharged to estimate the internal resistance value and estimate the self-discharge rate based on the estimated internal resistance value, thereby accurately recognizing the deterioration degree of the battery.

In particular, according to an embodiment of the present invention, an improved self-discharge estimation apparatus capable of reducing heat generated during a self-discharge process for estimating self-discharge by minimizing the synthetic resistance of a closed circuit in which self-discharge is performed Can be provided.

In addition, the present invention may have various other effects, and other effects of the present invention may be understood by the following description, and may be more clearly understood by examples of the present invention.

The following drawings attached to the present specification illustrate preferred embodiments of the present invention, and the present invention serves to further understand the technical idea of the present invention together with the detailed description of the invention described below, and thus the present invention is described in such drawings. It should not be interpreted as being limited to.
1 is a diagram schematically showing a functional configuration of an apparatus for estimating self-discharge according to an embodiment of the present invention.
2 is a view schematically showing a configuration in which the self-discharge estimation apparatus according to an embodiment of the present invention is connected to a part of the battery pack.
3 is a view schematically showing a configuration in which a self-discharge circuit according to an embodiment of the present invention is connected to a part of a battery pack.
4 shows a path through which the self-discharge current flows according to an embodiment of the present invention.
5 is a view schematically showing a configuration in which the self-discharge estimation apparatus according to another embodiment of the present invention is connected to a part of the battery pack.
6 is a view schematically showing a configuration in which the self-discharge circuit according to another embodiment of the present invention is connected to a part of the battery pack.
7 shows a path through which the self-discharge current flows according to another embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, the terms or words used in the specification and claims should not be interpreted as being limited to ordinary or lexical meanings, and the inventor appropriately explains the concept of terms in order to explain his or her invention in the best way. Based on the principle that it can be defined, it should be interpreted as meanings and concepts consistent with the technical spirit of the present invention.

Therefore, the embodiments shown in the embodiments and the drawings described in this specification are only the most preferred embodiments of the present invention, and do not represent all of the technical spirit of the present invention. It should be understood that there may be equivalents and variations.

In addition, in the description of the present invention, when it is determined that detailed descriptions of related well-known structures or functions may obscure the subject matter of the present invention, detailed descriptions thereof will be omitted.

Throughout the specification, when a part “includes” a certain component, this means that other components may be further included, rather than excluding other components, unless otherwise specified. Also, terms such as'processor' described in the specification mean a unit that processes at least one function or operation, and may be implemented by hardware or software, or a combination of hardware and software.

In addition, throughout the specification, when a part is "connected" to another part, it is not only "directly connected", but also "indirectly connected" with another element in between. Includes.

In the present specification, the secondary battery includes a negative terminal and a positive terminal, and means one independent cell that is physically separable. For example, one pouch-type lithium polymer cell may be considered as a secondary battery.

The self-discharge estimation apparatus 1 according to an embodiment of the present invention may be a device that self-discharges the cell assembly 10 including one or more secondary batteries. More specifically, the self-discharge estimation apparatus 1 according to an embodiment of the present invention, the value of the voltage across the cell assembly 10 and the value of the self-discharge current measured during self-discharge of the cell assembly 10 It may be a device for estimating self-discharge of the cell assembly 10 as a basis.

For example, the self-discharge estimation apparatus 1 according to an embodiment of the present invention, as shown in the configuration of FIG. 2, each other on the charge-discharge path that supplies the self-discharge current to the cell assembly 10 A charging switch 30 and a discharge switch 50 connected in series may be provided.

The charging switch 30 may open and close the charge/discharge path so that current flows in a direction to charge the cell assembly 10. For example, the charging switch 30 is located on the charge/discharge path between the positive terminal of the cell assembly 10 and the positive terminal of the battery pack to charge and discharge so that current flows in a direction to charge the cell assembly 10. The path can be opened and closed.

The discharge switch 50 may open and close the charge/discharge path so that current flows in a direction to discharge the cell assembly 10. For example, the discharge switch 50 is located on the charge/discharge path between the positive terminal of the cell assembly 10 and the positive terminal of the battery pack to charge and discharge so that current flows in a direction to discharge the cell assembly 10. The path can be opened and closed.

For example, in the self-discharge estimation apparatus 1 according to an embodiment of the present invention, as shown in the configuration of FIG. 2, one end of the charging switch 30 is directly connected to the positive terminal of the cell assembly 10 The charging switch 30 and the discharge switch 50 may be connected in series so that one end of the discharge switch 50 is directly connected to the positive terminal (+) of the battery pack.

For example, the charge switch 30 and the discharge switch 50 according to an embodiment of the present invention, as a field effect transistor (FET) device having a gate, drain and source terminal, between the gate terminal and the source terminal It can be turned on or off depending on whether a channel is formed according to the applied voltage. For example, the FET device may be a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

1 is a diagram schematically showing a functional configuration of a self-discharge estimation apparatus according to an embodiment of the present invention, and FIG. 2 is a self-discharge estimation apparatus according to an embodiment of the present invention. It is a diagram schematically showing a configuration connected to.

1 and 2, the self-discharge estimation apparatus 1 according to an embodiment of the present invention includes a voltage measurement unit 200, a current measurement unit 300, a temperature measurement unit 400, and a self-discharge. Circuit 100 and processor 500.

The voltage measuring unit 200 may be electrically connected to both ends of the cell assembly 10. For example, as shown in the configuration of FIG. 2, the voltage measuring unit 200 may be electrically connected to both ends of the cell assembly 10 so as to send and receive electrical signals.

In addition, the voltage measuring unit 200 may be configured to measure the voltage across the cell assembly 10. More specifically, the voltage measuring unit 200 may measure the voltage at both ends of the cell assembly 10 based on electrical signals received from both ends of the cell assembly 10. The voltage measuring unit 200 may be connected to the positive terminal of the cell assembly 10 and the negative terminal of the cell assembly 10 to measure voltages across both ends of the cell assembly 10.

Preferably, the voltage measuring unit 200 may be electrically connected to the processor 500 to send and receive electrical signals. In addition, the voltage measuring unit 200 measures the potential difference between the positive terminal of the cell assembly 10 and the negative terminal of the cell assembly 10 at a time interval under the control of the processor 500 and measures the magnitude of the measured voltage. The signal indicated may be output to the processor 500. For example, the voltage measurement unit 200 may be implemented using a voltage measurement circuit generally used in the art.

The current measurement unit 300 is electrically connected to the current sensor 70 provided on the charge/discharge path connected to the cell assembly 10 to receive an electrical signal from the current sensor 70. In addition, the current measurement unit 300 may be configured to measure a self-discharge current flowing through a charge/discharge path based on an electrical signal received from the current sensor 70.

For example, as shown in the configuration of FIG. 2, the current measuring unit 300 according to an embodiment of the present invention may be electrically connected to both ends of the current sensor 70. Here, the current sensor 70 may be electrically connected between the negative terminal of the cell assembly 10 and the negative terminal of the battery pack. In addition, the current measurement unit 300 may measure the voltage across the current sensor 70 and measure the current flowing through the charge/discharge path based on the voltage across the current sensor 70. For example, the current measurement unit 300 may measure the current flowing through the charge/discharge path using Ohm's law based on the resistance value of the current sensor 70 and the voltage across the current sensor 70.

Preferably, the current measuring unit 300 may be electrically connected to the processor 500 to send and receive electrical signals. In addition, the current measurement unit 300 repeatedly measures the size of the charging or discharging current of the cell assembly 10 at a time interval under the control of the processor 500 and transmits a signal indicating the magnitude of the measured current to the processor 500 ). For example, the current sensor 70 may be implemented using a Hall sensor or sense resistor commonly used in the art.

The self-discharge circuit 100 may be configured to flow a self-discharge current of the cell assembly 10. In addition, the self-discharge circuit 100, as shown in the configuration of Figure 2, one end and the other end is connected to the charge-discharge path, in particular, one end is electrically directly connected to the positive terminal of the cell assembly 10, The other end may be configured to be electrically connected to the negative terminal of the cell assembly 10.

Preferably, the self-discharge circuit 100 according to an embodiment of the present invention may include a self-discharge switch 110 and a regulator 120, as shown in the configuration of FIG. 2.

The self-discharge switch 110 may be electrically connected to the processor 500 to send and receive electrical signals. Also, the self-discharge switch 110 may receive a control command from the processor 500 and open and close the self-discharge circuit 100 based on the control command received from the processor 500.

The regulator 120 is electrically connected to the self-discharge switch 110 and the cell assembly 10 to output a self-discharge induced voltage.

Here, the self-discharge induction voltage may be a voltage that induces the cell assembly 10 to self-discharge, and may be a voltage less than the value of the voltage across both ends of the cell assembly 10.

For example, when the value of the voltage that can be output by the regulator 120 is 2V to 10V, and the value of the voltage at both ends of the cell assembly 10 is 6V, the regulator 120 is the voltage at both ends of the output voltage value. A self-discharge induction voltage, which is a value of a voltage of 2V or more and less than 6V, may be output.

Accordingly, the self-discharge current due to the difference between the value of the self-discharge induced voltage and the voltage of both ends may flow in the charge/discharge path and the self-discharge circuit 100 of the cell assembly 10.

The operation of the regulator 120 may be controlled according to a control command of the processor 500.

The processor 500 may be electrically connected to the voltage measuring unit 200 and the current measuring unit 300 so as to exchange electrical signals. In addition, the processor 500 may receive values of voltages at both ends of the cell assembly 10 and values of self-discharge currents from the voltage measurement unit 200 and the current measurement unit 300, respectively.

In addition, the processor 500, the inside of the cell assembly 10 based on the value of the voltage at both ends of the cell assembly 10 and the self-discharge current received from the voltage measurement unit 200 and the current measurement unit 300 The internal resistance value of the resistor Rz can be estimated. For example, the processor 500 uses the Ohm's law based on the value of the voltage across the cell assembly 10 and the value of the self-discharge current, and the internal resistance value of the internal resistance Rz of the cell assembly 10. Can be calculated.

That is, the processor 500 controls the regulator 120 so that the regulator 120 outputs a self-discharge induced voltage that is less than the value of the voltage across both ends, and thereby, the value of the self-discharge current flowing through the charge/discharge path. And the internal resistance value of the internal resistance Rz of the cell assembly 10 using Ohm's law based on the difference between the value of the self-discharge induction voltage and the voltage of both ends.

The processor 500 may estimate the self-discharge of the cell assembly 10 based on the estimated internal resistance value and the reference resistance value.

More specifically, the processor 500 may calculate self-discharge using a ratio of the internal resistance value to the reference resistance value. Here, the reference resistance value may be a resistance value of the internal resistance Rz of the cell assembly 10 in which no deterioration has occurred.

That is, the processor 500 may calculate an increase rate of the internal resistance value of the increased internal resistance Rz due to the deterioration of the cell assembly 10 compared to a reference resistance value as self-discharge.

Accordingly, the higher the ratio of the internal resistance value of the internal resistance Rz to the reference resistance value, the higher the self-discharge of the cell assembly may be.

On the other hand, the processor 500 may determine that the cell assembly 10 is degenerated if the self-discharge exceeds the reference self-discharge. Thereafter, when it is determined that the cell assembly 10 is over-degraded, the processor 500 may output a warning signal to the BMS described later.

Preferably, the self-discharge switch 110 and the charge switch 30 according to an embodiment of the present invention may be a FET having a gate terminal, a source terminal and a drain terminal. Here, the processor 500 according to an embodiment of the present invention outputs a control signal that directly or indirectly controls the voltage applied between the gate terminal and the source terminal of each of the self-discharge switch 110 and the charging switch 30. The self-discharge switch 110 and the charge switch 30 can control whether each channel is formed, and accordingly, the on-off operation of the self-discharge switch 110 and the charge switch 30 can be controlled.

Preferably, the self-discharge estimation apparatus 1 according to an embodiment of the present invention may further include a memory device 600, as shown in the configurations of FIGS. 1 and 2.

The memory device 600 may be electrically connected to the processor 500 to send and receive electrical signals. In addition, the memory device 600 may store information necessary for controlling the self-discharge switch 110, the charge switch 30, and the discharge switch 50 in advance.

On the other hand, the processor 500, in order to perform the above-described operation, the processor 500 known in the art, application-specific integrated circuit (ASIC), other chipsets, logic circuits, registers, communication modems and / or data It may be implemented in a form that selectively includes a processing device.

On the other hand, the memory device 600 has no particular limitation on its type, as long as it is a storage medium that can record and erase information. For example, the memory device 600 may be a RAM, ROM, register, hard disk, optical recording medium, or magnetic recording medium. The memory device 600 may also be electrically connected to the processor 500, for example, through a data bus or the like, so that each can be accessed by the processor 500. The memory device 600 may also store and/or update and/or erase and/or transmit data generated when a program that includes various control logics performed by the processor 500 and/or control logic is executed. have.

3 is a diagram schematically showing a configuration in which a self-discharge circuit according to an embodiment of the present invention is connected to a part of a battery pack, and FIG. 4 is a path through which the self-discharge current flows according to an embodiment of the present invention. Shows.

Referring to FIGS. 3 and 4, the self-discharge estimation apparatus according to an embodiment of the present invention may constitute a closed circuit connecting the cell assembly 10 and the regulator 120. More specifically, the self-discharge estimation apparatus, as shown in the configuration of FIGS. 2 and 3, constitutes an electrical closed circuit connected to the regulator 120 from the cell assembly 10 through the self-discharge switch 110. Can be.

The self-discharge switch 110 and the charging switch 30 according to an embodiment of the present invention, as shown in the configuration of Figure 3, the source terminal (LS, CS), the gate terminal (LG, CG) and Drain terminals LD and CD may be provided, respectively.

The self-discharge switch 110 and the charging switch 30 are provided on the self-discharge circuit 100 and the charge-discharge path, respectively, and can be selectively turned on or off. Here, the self-discharge switch 110 and the charging switch 30 are field effect transistor (FET) devices having gate, drain, and source terminals, and whether or not a channel is formed according to a voltage applied between the gate terminal and the source terminal. It can be turned on or off by. For example, the FET device may be a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

In addition, the self-discharge switch 110 and the charging switch 30 may be provided with parasitic diodes 111 and 31, respectively. 3, when the self-discharge switch 110 and the charging switch 30 are provided with parasitic diodes 111 and 31, respectively, the self-discharge switch 110 and the charging switch 30, It can be divided into FET bodies 112 and 32 and parasitic diodes 111 and 31. Here, the parasitic diodes 111 and 31 are diodes connected in parallel with the FET bodies 112 and 32, and may perform a rectifying action that conducts rectification in one direction.

On the other hand, in the embodiment of Figure 3, the charging switch 30 is implemented by an N-type MOSFET, the self-discharge switch 110, is implemented by a P-type MOSFET, the charging switch 30 and the self-discharge switch ( 110) is not limited to N-type MOSFET and P-type MOSFET, respectively.

Preferably, the source terminal LS of the self-discharge switch 110 according to an embodiment of the present invention is electrically connected to the source terminal CS of the charging switch 30, as shown in the configuration of FIG. It can be configured to be directly connected. Through this configuration, the self-discharge estimation apparatus according to an embodiment of the present invention may constitute a closed circuit composed of only the cell assembly 10, the self-discharge switch 110, and the regulator 120. Here, a self-discharge current may flow in the closed circuit.

More preferably, the processor 500 according to an embodiment of the present invention, as shown in the configuration of Figure 4, the self-discharge current cell assembly 10, the self-discharge switch 110 and the regulator 120 It is possible to control the operation of the self-discharge switch 110 to flow sequentially. For example, referring to FIGS. 3 and 4 together, a self-discharge estimation apparatus according to an embodiment of the present invention includes a closed circuit composed of only the cell assembly 10, the self-discharge switch 110, and the regulator 120. Can be configured. Here, the processor 500 may turn on the self-discharge switch 110 so that the self-discharge current flows. More specifically, the self-discharge current may sequentially flow through the cell assembly 10, the FET body 112 of the self-discharge switch 110, and the regulator 120.

5 is a view schematically showing a configuration in which the self-discharge estimation apparatus according to another embodiment of the present invention is connected to a part of the battery pack. In addition, in this embodiment, detailed descriptions of parts to which the description of the preceding embodiment can be similarly applied will be omitted, and parts with differences will be mainly described.

1 and 5, an apparatus for estimating self-discharge according to another embodiment of the present invention may include a self-discharge circuit 100 ′.

The self-discharge circuit 100 ′ may be configured such that a self-discharge current of the cell assembly 10 flows. In addition, the self-discharge circuit 100', as shown in the configuration of Figure 5, one end is connected to the charge-discharge path and the other end is connected to the ground (G) of the BMS is the self-discharge current of the cell assembly 10 It can be configured to flow.

Preferably, the self-discharge circuit 100' according to another embodiment of the present invention may include a self-discharge switch 110 and a self-discharge resistor 130, as shown in the configuration of FIG. 5.

The self-discharge switch 110 may be electrically connected to the processor 500 to send and receive electrical signals. Also, the self-discharge switch 110 may receive a control command from the processor 500 and open and close the self-discharge circuit 100 ′ based on the control command received from the processor 500.

The self-discharge resistor 130 may be a resistor that consumes a self-discharge current. For example, as shown in the configuration of FIG. 5, the self-discharge resistor 130 may be configured to consume the self-discharge current by being located between the self-discharge switch 110 and the ground G of the BMS. .

The processor 500, the voltage of the both ends of the cell assembly 10 received from the voltage measuring unit 200 and the current measuring unit 300, the value of the self-discharge current and the discharge resistance value of the self-discharge resistor 130 The internal resistance value of the internal resistance Rz of the cell assembly 10 may be estimated based on. For example, the processor 500 uses the Ohm's law based on the value of the voltage across the cell assembly 10, the value of the self-discharge current, and the discharge resistance value to determine the internal resistance Rz of the cell assembly 10. ) Can calculate the internal resistance value.

The processor 500 may estimate the self-discharge of the cell assembly 10 based on the estimated internal resistance value in the same manner as one embodiment, and determine over-deterioration.

Preferably, in the self-discharge circuit 100' according to another embodiment of the present invention, as shown in the configuration of FIG. 5, one end of the self-discharge circuit 100' is connected to the positive terminal of the cell assembly 10. It can be configured to be electrically connected directly. More specifically, the self-discharge circuit 100', as shown in the configuration of Figure 5, one end of the self-discharge circuit 100' between the positive terminal of the cell assembly 10 and one end of the charging switch 30 It can be configured to connect directly to. Also, the other end of the self-discharge circuit 100' may be directly connected to the ground G of the BMS.

6 is a diagram schematically showing a configuration in which a self-discharge circuit according to another embodiment of the present invention is connected to a part of a battery pack, and FIG. 7 is a path through which a self-discharge current flows according to another embodiment of the present invention. Shows.

6 and 7, the self-discharge estimation apparatus according to another embodiment of the present invention may constitute a closed circuit connecting the cell assembly 10 and the self-discharge resistor 130. More specifically, the self-discharge estimation apparatus, as shown in the configuration of FIGS. 5 and 6, self-discharges after passing the self-discharge switch 110 from the cell assembly 10 using the ground (G) of the BMS as a connection point An electrical closed circuit connected to the resistor 130 may be configured.

The self-discharge switch 110 and the charging switch 30 according to another embodiment of the present invention, as shown in the configuration of Figure 6, the source terminal (LS, CS), the gate terminal (LG, CG) and Drain terminals LD and CD may be provided, respectively.

The self-discharge switch 110 and the charging switch 30 are provided on the self-discharge circuit 100' and the charge-discharge path, respectively, and can be selectively turned on or off.

Preferably, the source terminal LS of the self-discharge switch 110 according to another embodiment of the present invention, as shown in the configuration of FIG. 6, is electrically connected to the source terminal CS of the charging switch 30 It can be configured to be directly connected. Through this configuration, the self-discharge estimation apparatus according to another embodiment of the present invention may constitute a closed circuit composed of only the cell assembly 10, the self-discharge switch 110, and the self-discharge resistor 130. Here, a self-discharge current may flow in the closed circuit.

In addition, through this configuration, the self-discharge estimation apparatus according to another embodiment of the present invention minimizes the heat generated by self-discharge by minimizing the number of elements through which the self-discharge current passes, thereby minimizing the synthetic resistance of the closed circuit. can do.

More preferably, the processor 500 according to another embodiment of the present invention, as shown in the configuration of Figure 7, self-discharge current cell assembly 10, self-discharge switch 110 and self-discharge resistance ( The operation of the self-discharge switch 110 may be controlled so that 130) flows sequentially. For example, referring to FIGS. 6 and 7 together, an apparatus for estimating self-discharge according to another embodiment of the present invention includes only the cell assembly 10, the self-discharge switch 110 and the self-discharge resistor 130. A closed loop can be constructed. Here, the processor 500 may turn on the self-discharge switch 110 so that the self-discharge current flows. More specifically, the self-discharge current may sequentially flow through the cell assembly 10, the FET body 112 of the self-discharge switch 110, the self-discharge resistor 130 and the ground G.

The self-discharge estimation apparatus according to the present invention can be applied to a BMS. That is, the BMS according to the present invention may include the self-discharge estimation device according to the present invention described above. In this configuration, at least a portion of each component of the self-discharge estimation apparatus according to the present invention may be implemented by supplementing or adding a function of a configuration included in a conventional BMS. For example, the processor 500 and the memory device 600 of the self-discharge estimation apparatus according to the present invention may be implemented as components of a battery management system (BMS).

In addition, the self-discharge estimation apparatus according to the present invention may be provided in the battery pack. That is, the battery pack according to the present invention may include the self-discharge estimation device according to the present invention described above. Here, the battery pack may include one or more secondary cells, the self-discharge estimation device, electronic products (including BMS, relays, fuses, etc.) and a case.

Further, when the control logic is implemented in software, the processor may be implemented as a set of program modules. At this time, the program module may be stored in the memory device and executed by the processor.

Further, at least one of the various control logics of the processor is combined, and the combined control logics are written in a computer-readable code system, so that the computer-readable accessibility is not limited. As an example, the recording medium includes at least one or more selected from the group including ROM, RAM, registers, CD-ROM, magnetic tape, hard disk, floppy disk, and optical data recording device. In addition, the code system may be distributed and stored on a networked computer and executed. In addition, functional programs, codes and segments for implementing the combined control logics can be easily inferred by programmers in the art to which the present invention pertains.

As described above, although the present invention has been described by a limited number of embodiments and drawings, the present invention is not limited by this, and the technical idea of the present invention and the following will be described by those skilled in the art to which the present invention pertains. Of course, various modifications and variations are possible within the equivalent scope of the claims to be described.

On the other hand, although terms such as'memory device' and'processor' are used in the present specification, this refers to a logical configuration unit and does not necessarily indicate a component that may or may not be physically separated. Is self-evident.

1, 1': self-discharge estimation device
10: Cell assembly
Rz: internal resistance
30: charge switch
31: parasitic diode
32: FET body
50: discharge switch
70: current sensor
100, 100': self-discharge circuit
110: self-discharge switch
111: parasitic diode
112: FET body
120: regulator
130: self-discharge resistance
200: voltage measuring unit
300: current measuring unit
500: processor
600: memory device
G: ground
CD: Drain terminal
CS: Source terminal
CG: gate terminal
LD: Drain terminal
LS: Source terminal
LG: Gate terminal

Claims (10)

A voltage measuring unit electrically connected to both ends of the cell assembly and configured to measure voltages at both ends of the cell assembly;
A current measuring unit electrically connected to a current sensor provided on a charge/discharge path of the cell assembly and configured to measure a self-discharge current flowing through the charge/discharge path based on an electrical signal received from the current sensor;
A self-discharge circuit connected to the charge-discharge path and configured to flow a self-discharge current of the cell assembly; And
The voltage measurement unit and the current measurement unit receive the value of the both ends voltage and the self-discharge current from each, respectively, and based on the value of the both ends voltage and the self-discharge current value of the internal resistance of the cell assembly A processor configured to estimate an internal resistance value and estimate the self-discharge of the cell assembly based on the internal resistance value and a reference resistance value
Self-discharge estimation apparatus comprising a.
According to claim 1,
The self-discharge circuit,
A self-discharge switch electrically connected to the processor to receive a control command from the processor and to open and close the self-discharge circuit based on the control command received from the processor; And
A regulator that is electrically connected to the self-discharge switch and the cell assembly to output a self-discharge induction voltage.
Self-discharge estimation apparatus characterized in that it comprises a.
According to claim 2,
And the processor controls the regulator so that the value of the self-discharge induction voltage is less than the value of the voltage at both ends.
According to claim 2,
The self-discharge circuit is self-discharge estimation device, characterized in that one end is electrically connected to the positive terminal of the cell assembly, the other end is electrically connected to the negative terminal of the cell assembly.
The method of claim 4,
The self-discharge switch and the charge-discharge switch and the charge switch located on the charge-discharge path have a source terminal, a gate terminal, and a drain terminal, respectively.
The source terminal of the self-discharge switch, the self-discharge estimation apparatus, characterized in that configured to be electrically connected directly to the source terminal of the charging switch.
The method of claim 5,
And the processor controls the operation of the self-discharge switch so that the self-discharge current flows sequentially through the cell assembly, the self-discharge switch, and the regulator.
According to claim 1,
The processor,
A self-discharge estimation apparatus for calculating the self-discharge of the cell assembly using a ratio of the reference resistance value to the internal resistance value.
The method of claim 7,
The processor,
The higher the ratio of the internal resistance value to the reference resistance value, the higher the self-discharge conductivity of the cell assembly.
A BMS comprising the self-discharge estimation apparatus according to any one of claims 1 to 8.
A battery pack comprising the self-discharge estimation apparatus according to any one of claims 1 to 8.

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