KR20200027283A - Light emitting diode and method for manufacturing the same - Google Patents

Abstract

Disclosed are a light emitting diode having high reflectance in all directions and a manufacturing method thereof. According to the present invention, the light emitting diode comprises: a substrate; a first conductive nitride semiconductor layer, an active layer, and a second conductive nitride semiconductor layer sequentially located on the substrate; an n side electrode located on the first conductive nitride semiconductor layer; and a p side electrode located on the second conductive nitride semiconductor layer. The p side electrode includes a plate layer, and a reflection layer located on the plate layer. The plate layer includes a plurality of nano holes surrounded by metal, and a conductive layer located inside the nano holes.

Description

LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME}

The present invention relates to a light-emitting diode having high reflectivity in all directions and a method for manufacturing the same.

The nitride-based semiconductor is a material having a relatively high energy band gap, and is used as a blue light emitting device. For example, GaN semiconductors have an energy band gap of about 3.4 eV. Materials having an Al _x In _y Ga _(1-xy) N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) structure are widely used in nitride semiconductors.

1 is a cross-sectional view of a conventional light emitting diode. Referring to FIG. 1, the light emitting diode includes a buffer layer 11, an n-type nitride semiconductor layer 12, an active layer 14, and a p-type nitride semiconductor layer 15 sequentially stacked on the substrate 10. Then, a p-side electrode 20 positioned on the p-type nitride semiconductor layer 15, a buffer pad 21 positioned on the p-side electrode 20, and an n-type nitride semiconductor in which a predetermined region is exposed through etching And an n-side electrode 22 formed on the layer 12. The light emitted from the active layer 14 is emitted not only in the upper direction but also in the lower direction. The light emitted in the lower direction, that is, the substrate direction is partially reflected by the substrate and emitted in the upper direction. However, since most of the light that cannot be emitted in the upper direction is lost, there is a problem in that the light intensity of the light emitting diode is lowered.

2 is a cross-sectional view of a conventional light emitting diode having a flip chip structure. The flip-chip structure reverses the light emitting diode of FIG. 1 to fix the p-electrode 23 and the n-electrode 22 with solder, which is an electric conductor, and allows light generated from the active layer 14 to emerge upwards. It is a structure. In this structure, the light emitting diode includes a substrate 10, a buffer layer 11, an n-type nitride semiconductor layer 12, an active layer 14, and a p-type nitride semiconductor layer 15 from the top. Then, a p-side reflective electrode 23 positioned on the p-type nitride semiconductor layer 15, a p-bump 30 positioned on the p-side reflective electrode 23, and an n-type exposed by a predetermined region through etching It includes an n-side electrode 22 formed on the nitride semiconductor layer 12, an n-bump 31 positioned on the n-side reflective electrode 22, and a wafer 32.

In the flip-chip structure, high reflection characteristics of the p-side reflective electrode 23 are required to extract light in a downward direction in an upward direction. In addition, there is a problem in that the ohmic contact resistance between the p-type nitride semiconductor layer 15 and the p-side reflective electrode 23 must also be considered.

3 is a cross-sectional view of a conventional vertical type light emitting diode. This structure includes an n-side electrode 22, an n-type nitride semiconductor layer 12, an active layer 14, a p-type nitride semiconductor layer 15, a p-side reflective electrode 23, a bonding material 24 from the top, and It includes a carrier wafer 33. The vertical structure is a structure in which a conductive substrate is deposited on a p-type nitride semiconductor layer in the light emitting diode of FIG. 1, and then the lower substrate is separated from the upper light emitting diode to emit light in reverse. Also in this structure, high reflection characteristics of the p-side reflective electrode 23 are required as in FIG. 2.

Meanwhile, materials such as aluminum (Al) and silver (Ag) having high reflectivity have high reflectivity characteristics of 90% or more in the visible region. However, in the case of silver (Ag), during heat treatment, a phenomenon in which silver (Ag) moves occurs, so that the reflectivity in actual silver (Ag) is reduced. In addition, silver (Ag) has a high ohmic contact resistance with the p-type nitride semiconductor layer, and thus requires a separate ohmic contact layer.

Background art related to the present invention includes Republic of Korea Patent Publication No. 10-2018-0060157 (published on Jun. 7, 2018), the above document describes a method for manufacturing a gallium nitride-based light emitting diode and a gallium nitride-based light emitting diode thereby have.

An object of the present invention is to provide a light emitting diode having high reflectivity in all directions using a p-side electrode including a plate layer and a reflective layer.

Another object of the present invention is to provide a method for manufacturing a light emitting diode.

In the present invention, the substrate; A first conductive type nitride semiconductor layer, an active layer, and a second conductive type nitride semiconductor layer sequentially positioned on the substrate; An n-side electrode positioned on the first conductive type nitride semiconductor layer; And a p-side electrode positioned on the second conductive type nitride semiconductor layer, wherein the p-side electrode includes a plate layer; And a reflective layer positioned on the plate layer, wherein the plate layer is provided with a light emitting diode including a plurality of nano holes surrounded by metal and a conductive layer positioned inside the nano hole.

In addition, (a) sequentially forming a first conductive type nitride semiconductor layer, an active layer, and a second conductive type nitride semiconductor layer on a substrate according to the present invention; (b) forming an n-side electrode on the first conductive type nitride semiconductor layer; And (c) forming a p-side electrode on the second conductive type nitride semiconductor layer, wherein the p-side electrode is a plurality of nano holes surrounded by metal and located inside the nano hole. A method for manufacturing a light emitting diode in which a reflective layer is formed on a plate layer including a conductive layer is provided.

The light emitting diode according to the present invention is positioned between the second conductive type nitride semiconductor layer 230 and the reflective layer 420, a plate layer 410 including a plurality of nano holes 430. Accordingly, light in the active layer region is extracted from the interface between the reflective layer 420 and the plate layer 410 and the interface between the second conductive type nitride semiconductor layer 230 and the plate layer 410 to the outside. Shows high light extraction efficiency. In addition, the light emitting diode of the present invention can ensure high reflectivity in the ultraviolet-visible light region (200 nm to 800 nm) regardless of the wavelength.

1 is a cross-sectional view of a conventional light emitting diode.
2 is a cross-sectional view of a conventional light emitting diode having a flip chip structure.
3 is a cross-sectional view of a conventional vertical type light emitting diode.
4 is a cross-sectional view of a light emitting diode of the present invention.
5 is a flow chart showing a method of manufacturing a light emitting diode of the present invention.
6 is a perspective view (a) of a light emitting diode of the present invention, a schematic view (b) showing a manufacturing process, and an optical microscope image (c) of a plate layer.
7 is a graph (e) of analyzing the average reflectance (a, b), coverage ratio, SEM, OM images (c, d) of the p-side electrode of the present invention, and height and length of the plate layer.
8 is a graph (d) showing reflectance (a), current-voltage characteristics (b), output intensity (c), electrical input power and optical output power of the p-side electrode of the present invention.
FIG. 9 is a graph (e) showing a 3D-FDTD simulated distant image image (a-d) and a distant intensity ratio.

Advantages and features of the present invention, and methods for achieving them will be clarified with reference to embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the present embodiments allow the disclosure of the present invention to be complete, and common knowledge in the technical field to which the present invention pertains. It is provided to fully inform the holder of the scope of the invention, and the invention is only defined by the scope of the claims. The same reference numerals refer to the same components throughout the specification.

Hereinafter, a light emitting diode and a method of manufacturing the same according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

4 is a cross-sectional view of a light emitting diode of the present invention. 4, the light emitting diode of the present invention is a substrate 100, a first conductive type nitride semiconductor layer 210, an active layer 220, a second conductive type nitride semiconductor layer 230 located on the substrate, It includes an n-side electrode 300 and a p-side electrode 400.

The substrate 100 may be formed of sapphire, silicon (Si), silicon carbide (SiC), or gallium oxide (Ga ₂ 0 ₃ ), but is not limited thereto.

The semiconductor layer 200 includes a first conductive type nitride semiconductor layer 210, an active layer 220, and a second conductive type nitride semiconductor layer 230.

One of the first conductive type nitride semiconductor layer 210 and the second conductive type nitride semiconductor layer 230 may be an n-type nitride semiconductor layer, and the other may be a p-type nitride semiconductor layer.

Hereinafter, it will be described under the assumption that the first conductive type nitride semiconductor layer 210 is an n-type nitride semiconductor layer and the second conductive type nitride semiconductor layer 230 is a p-type nitride semiconductor layer.

The first conductive type nitride semiconductor layer 210 is formed of a nitride doped with an n-type dopant, and the n-type dopant may be silicon (Si), germanium (Ge), tin (Sn), or the like. Here, the first conductive type nitride semiconductor layer 210 may have a structure in which a layer of Si-doped AlGaN or non-doped AlGaN is stacked.

A buffer layer (not shown) is selectively formed between the substrate 100 and the first conductive type nitride semiconductor layer 210. The buffer layer is for solving lattice mismatch between the substrate 100 and the first conductive type nitride semiconductor layer 210 or improving crystallinity. The buffer layer is formed of, for example, AlN or GaN.

The active layer 220 is typically formed of an InGaN / GaN multi-quantum well (MQW) structure. The active layer 220 generates light while re-combination of electrons supplied from the first conductive type nitride semiconductor layer 210 and holes supplied from the second conductive type nitride semiconductor layer 230. The active layer 220 has a quantum barrier (QB) layer and a quantum well (Quantum well, QW) layer, respectively, Al _x Ga _y In _z N (in this case, x + y + z = 1, 0≤x≤1 , 0≤y≤1).

The second conductive type nitride semiconductor layer 230 is formed of a doped nitride or a non-doped nitride. The p-type dopant may be one or two or more selected from magnesium (Mg), zinc (Zn), and cadmium (Cd). A GaN or AlGaN layer may be used as the second conductive type nitride semiconductor layer 230.

In order to inject electrons into the first conductive type nitride semiconductor layer 210, an n-side electrode 300 is electrically connected to an exposed surface of the first conductive type nitride semiconductor layer 210. The n-side electrode 300 may be a metal such as gold, silver, copper, chromium, titanium, tungsten, nickel, silicon, aluminum, molybdenum, or an alloy thereof.

Further, in order to inject holes into the second conductive type nitride semiconductor layer 230, a p-side electrode 400 is formed to be electrically connected to the second conductive type nitride semiconductor layer 230.

The p-side electrode 400 includes a plate layer 410 and a reflective layer 420 positioned on the plate layer 410.

The plate layer 410 includes a plurality of nano holes 430 surrounded by a metal 450 and a conductive layer 440 positioned inside the nano holes 430. Here, the plurality of nano-holes 430 refers to a structure in which air is filled in a nano-sized hole. The hole size is preferably 50 to 15000 nm. At this time, the hole size means a diameter when the shape of the hole is circular, and a length of the side when it is polygonal. Further, it is preferable that the period of the hole is 80 to 20000 nm. At this time, the period means the distance between the hole and the center of the hole.

In addition, the thickness of the plate layer 410 including the plurality of nano holes 430 is preferably 10 to 1000 nm. If it is out of this range, it is difficult to process the plate layer 410, and there is a problem in that reflection characteristics are deteriorated.

The hole is preferably formed of a triangular grid or a square grid. The shape of the lattice formed by the hole means a polygonal shape formed by imaginary lines connecting the centers of holes adjacent to each other. When the hole is formed of a triangular grating or a square grating, there is an advantage that the reflection characteristics are improved by the periodic arrangement of the holes.

The conductive layer 440 is formed to maintain a nano hole of the plate layer 410 while maintaining an ohmic contact with the semiconductor layer 200. The conductive layer 440 preferably includes a metal oxide such as ITO, or a metal having a high work function and conductivity such as Ag, Au, Ti, and Ni.

The metal 450 reflects the light emitted from the semiconductor layer 200 so that it enters the p-type nitride semiconductor again, thereby improving light extraction efficiency. The metal 450 is deposited through a micro hole in the process of forming the first reflective layer 421. Therefore, the material of the metal 450 is the same material as the first reflective layer 421. The metal 450 may be selected from, for example, aluminum, gold, or silver, and it is preferable to use aluminum.

The reflective layer 420 includes a first reflective layer 421. The first reflective layer 421 is formed of an aluminum material to be the same as the metal 450 component. In addition, the reflective layer 420 further includes a second reflective layer 422 formed on the first reflective layer 421. The second reflective layer 422 is formed to prevent oxidation of the first reflective layer 421. The second reflective layer 422 may be selected from platinum, nickel, or palladium, for example, and platinum is preferably used.

In the present invention, by using the reflective layer 420, it maintains the reflectance in the ultraviolet region as well as the visible region, there is an effect that the light extraction efficiency is improved. When the light extraction efficiency is improved, there is an effect that the luminous efficiency of the LED is improved as a result.

As such, in order to improve the luminous efficiency of the light emitting diode, the internal quantum efficiency, which is the efficiency of converting electrical energy into light energy inside the light emitting layer, and the light extraction efficiency, which is the efficiency of emitting light generated inside, to the outside must be improved.

The p-side electrode 400 of the present invention maintains the ohmic contact with the semiconductor layer 200 while preventing the reduction in reflectivity in the ultraviolet region as well as the visible region, thereby improving light extraction efficiency. As a result, the p-side electrode 400 has an effect of improving the light emission efficiency of the light emitting diode.

5 is a flow chart showing a method of manufacturing a light emitting diode of the present invention.

Referring to FIG. 5, a method of manufacturing a light emitting diode of the present invention includes forming a first conductive type nitride semiconductor layer, an active layer, and a second conductive type nitride semiconductor layer on a substrate (S110), and a first conductive type nitride semiconductor layer The step of forming an n-side electrode on (S120), and forming a p-side electrode on the second conductive type nitride semiconductor layer (S130).

First, the first conductive type nitride semiconductor layer 210, the active layer 220, and the second conductive type nitride semiconductor layer 230 are sequentially formed on the substrate 100.

The first conductive type nitride semiconductor layer 210, the active layer 220, and the second conductive type nitride semiconductor layer 230 may be grown by an epitaxial lateral over growth method. The epitaxial lateral overgrowth method is a method of suppressing the defects formed at the interface between the sapphire substrate and the semiconductor layer from moving vertically by increasing the horizontal growth rate compared to the vertical growth rate during semiconductor material growth. In the present invention, the semiconductor layer 200 may be grown by epitaxial lateral overgrowth using MOCVD (Metal Organic Chemical Vapor Deposition) or HVPE (Hydride or Halide Vapor Phase Epitaxy). The epitaxial lateral overgrowth method may reduce the occurrence of strain due to a difference in lattice constant and a difference in thermal expansion coefficient between the substrate and the first conductive type nitride semiconductor layer 210.

In order to form the n-side electrode 300 on the first conductive type nitride semiconductor layer 210, the active layer 220 and the second conductive type nitride semiconductor layer 230 are etched. Then, an n-side electrode 300 is formed on the exposed first conductive type semiconductor layer 210. The n-side electrode 300 may be formed by electron beam evaporation.

Subsequently, a p-side electrode 400 is formed on the second conductive type nitride semiconductor layer 230. The process of forming the p-side electrode 400 is as follows.

Referring to FIG. 6B, the conductive layer 440 is deposited on the second conductive type nitride semiconductor layer 230 in a mesh form through a lithography process. Here, the mesh shape refers to a structure having a line width of several nanometers. Deposition is performed by sputtering, bi-beam evaporation, thermal evaporation, chemical vapor deposition, and the like. Then, the deposited material is annealed in a rapid heat treatment process in an oxygen atmosphere or a nitrogen atmosphere. The conductive layer 440 may be deposited with a width (horizontal, vertical) of 2 to 10 μm and a thickness (height) of 10 to 400 nm. In a state where the conductive layer 440 is patterned, the photoresist 500 is applied to a region where the conductive layer 440 is not deposited. 6 (c), the photoresist 500 has a nano-sized plate shape (rectangular PR nanoplate). The nano-sized plate may be approximately 80-100 nm in height. Here, photoresist PR is a photosensitive material and is used when forming a pattern using light. Photoresist (PR) is divided into negative and positive. Negative PR means that when light is shined, the unlit part is removed, and positive PR is when light is shined, only the lighted part is removed. When the photoresist is coated with UV, the coated photosensitive material reacts.

In a state where the photoresist 500 is applied, the first reflective layer 421 is formed on the conductive layer 440 and the photoresist. The first reflective layer 421 may be formed of aluminum, gold, or silver. It is preferable to use aluminum as the band gap of the semiconductor layer 200 increases. The thickness of the first reflective layer 421 may be approximately 100 to 400 nm.

Next, micro holes are formed in the first reflective layer 421 at regular intervals. The holes are micro-sized in diameter. It is preferable that the hole formed in the first reflective layer 421 is located on the area where the photoresist 500 is applied. Through the hole, the photoresist 500 is removed by wet etching through the solution. The solution may include acetone. The area from which the photoresist 500 has been removed forms a plurality of nano holes 430.

Next, the first reflective layer 421 is formed on the first reflective layer 421 with holes. In other words, the first reflective layer 421 is re-deposited on the patterned first reflective layer 421. In the process of redepositing the first reflective layer 421, a metal 450 is deposited between the plurality of nano holes 430 through the hole. Then, the second reflective layer 422 is further formed on the first reflective layer 421. The thickness of the second reflective layer 422 may be approximately 100 to 500 nm. Deposition may be performed using a sputtering method, a two-beam deposition method, a thermal deposition method, a chemical vapor deposition method, or the like.

The operation of the light emitting diode of the present invention will be described as follows.

When a voltage is applied through the n-side electrode 300 and the p-side electrode 400, electrons and holes flow from the n-type nitride semiconductor layer and the p-type nitride semiconductor layer to the active layer 220. Electrons and holes emit light as recombination occurs. Light emitted from the active layer 220 proceeds above and below the active layer 220. The light traveling upward is emitted to the outside through the p-type nitride semiconductor layer. A portion of the light traveling down exits the outside of the light emitting diode, and a portion of the light may be reflected by the p-side electrode 400.

7 to 9, the air film / Al, air-nano plate / Al electrode refers to the p-side electrode of the present invention, and includes a plate layer (a plurality of nano holes surrounded by Al and ITO located inside the nano hole). ) / Al layer has a structure in which a Pt layer is deposited.

7 is a graph (e) of analyzing the average reflectance (a, b), coverage ratio of the p-side electrode of the present invention, SEM, OM images (c, d), and height and length of the plate layer.

7 (a) shows the calculated average reflectance R ( Θ ) of the air film / Al, MgF ₂ film / Al and SiO ₂ film / Al as a function of the incident angle of light. R ( Θ ) is the average reflectance of light with TE and TM polarization. That is, R ( Θ ) = (RTE + RTM) / 2.

In this calculation, the incident wavelength (λ) was kept constant at 365 nm. And it was assumed that the dielectric layer satisfies the 1/4 wavelength condition (t = λ / 4nd). Here, n denotes the refractive index of the dielectric layer, and d denotes the thickness of the dielectric layer. The reflectance curves were calculated using refractive index values of n _AlGaN = 2.4, n _air = 1, n _MgF2 = 1.38, n _SiO2 = 1.49, n _Al = 0.38, and k _Al = 4.28.

In (b) of FIG. 7, the air film / Al (t = 91.3 nm) electrode shows the highest reflectance of 96.6%. These results show that the reflectance of the electrode is increased by using an air layer having a refractive index of 1.

Referring to (c) of FIG. 7, as the size of the air-nano plate increases, the coverage also varies from 25% to 70%, in order to investigate the effect of air-nano plate coverage. Became. The OM images showing (IV) to (IV) show that the air-nano plates with coverage of 25%, 40%, 55%, and 70% are evenly distributed on the electrodes.

The SEM image of FIG. 7 (d) clearly shows that the height of the air-nano plate is approximately 91 nm. In addition, in FIG. 7 (e), the air-nano plates are regularly and uniformly arranged, and all the air-nano plates have a thickness of about 91 nm.

8 is a graph (d) showing reflectance (a), current-voltage characteristics (b), output intensity (c), electrical input power and optical output power of the p-side electrode of the present invention.

In FIG. 8 (a), all air-nano plate / Al electrodes have a higher reflectance than the ITO film / Al electrode. The reflectances of the air-nano plate / Al electrodes with air-nano plate coverage of 25%, 40%, 55%, and 70% were 76.3%, 79.4%, 82.7%, and 83.8% at 365 nm wavelength, respectively. It can be seen that due to the rapid change in the refractive index at the interface between the air and the p-type nitride semiconductor layer, the reflectance of the air-nanoplate / Al electrode increased significantly as the coverage of the air-nanoplate increased.

In order to investigate the electrical and optical properties of the air-nano plate / Al electrode in a 365 nm ultraviolet light emitting diode, Lambertian light output power-voltage (L-I-V) was measured.

FIG. 8 (b) shows that due to the change in the ITO ohmic contact area, the I-V characteristic of the air-nano plate / Al electrode changes according to the coverage of the air-nano plate. The forward voltage of the ITO film / Al electrode was lower than 3.5 V at the injection current of 20 mA.

However, looking at Figure 8 (c), the air-nano plate / Al electrode having a range of 25% to 70% showed relatively improved light output.

FIG. 8 (d) shows that as the coverage of the air-nanoplate / Al electrode measured at 20 mA increases, the light output and electrical input power (P = I × V) of the electrode increase. In particular, the air-nano plate / Al electrode with 40% coverage showed the largest increase in light output power. The light output could be significantly improved by the air-nano plate / Al electrode.

To further compare the optical properties of the air-nano plate / Al electrode, a program based on a 3D finite element analysis method, 3D-FDTD (3-dimensional finite difference time domain) was used. The refractive indexes of AlGaN, ITO film, air, MgF ₂ and SiO ₂ used in the simulation were 2.4, 2.1, 1.0, 1.38 and 1.49, respectively. A point light source with an emission wavelength of 365 nm was located in the AlGaN layer. To obtain the photon intensity of the electrodes, 3D-FDTD simulation was performed. And, photon intensity was measured using long-distance detection. The area of all electrodes was fixed at 5 × 5 μm, and the thickness of the dielectric layer was fixed at 1/4 wavelength of UV emission in the dielectric material.

9 is a graph (e) showing the ratio of the 3D-FDTD simulated distant image images (a to d) and the distant intensity. The image includes a sapphire substrate, AlGaN layer, dielectric layer, ITO ohmic layer and Al layer. Referring to FIG. 9, the air-nano plate / Al electrode increased the output intensity at all detected angles. This structure showed a remarkably high reflectance and light output. The improvement of the light output seems to be due to the large amount of air contained in the electrode, and the low ultraviolet absorption in the ITO region. Therefore, the structure of the p-side electrode according to the present invention indicates that it is the most efficient reflector.

Therefore, the light emitting diode of the present invention has an effect of having high reflectivity in all directions. In addition, it can be applied to a flip-chip structure or a light emitting diode having a vertical structure.

The embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and may be manufactured in various different forms, and having ordinary knowledge in the technical field to which the present invention pertains. It will be understood that a person can be implemented in other specific forms without changing the technical spirit or essential features of the present invention. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive.

100: substrate
200: semiconductor layer
210: first conductive type nitride semiconductor layer
220: active layer
230: second conductive type nitride semiconductor layer
300: n-side electrode
400: p-side electrode
410: plate layer
420: reflective layer
421: first reflective layer
422: second reflective layer
430: nano hole
440: conductive layer
450: metal
500: Port resist (PR)

Claims (10)

Board;
A first conductive type nitride semiconductor layer, an active layer, and a second conductive type nitride semiconductor layer sequentially positioned on the substrate;
An n-side electrode positioned on the first conductive type nitride semiconductor layer; And
And a p-side electrode positioned on the second conductive type nitride semiconductor layer.
The p-side electrode
Plate layer; And a reflective layer positioned on the plate layer.
The plate layer is a light emitting diode including a plurality of nano holes surrounded by a metal, and a conductive layer positioned inside the nano hole.
According to claim 1,
The reflective layer is a light emitting diode comprising an aluminum layer.
According to claim 2,
The reflective layer further comprises a platinum layer located on the aluminum layer.
According to claim 1,
The conductive layer is a light emitting diode comprising ITO.
According to claim 1,
The material of the metal is the same light-emitting diode as the material of the reflective layer.
According to claim 1,
The metal is a light-emitting diode comprising aluminum.
(a) sequentially forming a first conductive type nitride semiconductor layer, an active layer, and a second conductive type nitride semiconductor layer on a substrate;
(b) forming an n-side electrode on the first conductive type nitride semiconductor layer; And
(c) forming a p-side electrode on the second conductive type nitride semiconductor layer; including,
The p-side electrode
A method of manufacturing a light emitting diode in which a reflective layer is formed on a plate layer including a plurality of nano holes surrounded by metal and a conductive layer positioned inside the nano hole.
The method of claim 7,
Step (c) is
(c1) depositing a conductive layer in a mesh form using a lithography process;
(c2) applying a photoresist to a region where the conductive layer is not deposited, and then forming a first reflective layer on the conductive layer and the photoresist;
(c3) forming a hole in the first reflective layer to remove the applied photoresist; And
(c4) forming a first reflective layer on the first reflective layer having the holes; a method of manufacturing a light emitting diode comprising a.
The method of claim 7,
The conductive layer is a method of manufacturing a light emitting diode comprising ITO.
The method of claim 8,
After step (c4),
(c5) forming a second reflective layer on the reformed first reflective layer; further comprising a method of manufacturing a light emitting diode.

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