KR20190138578A - Electronic device - Google Patents

Abstract

An electronic device comprises a first substrate, a first conductive layer, a plurality of first electrode pads, a plurality of first light emitting units, a plurality of first signal pads, and a conductive structure. The first conductive layer is arranged on the first substrate. The first electrode pads are arranged on the first conductive layer. The first light emitting units overlap the first electrode pads and are arranged on the first electrode pads. The first light emitting units are in electric connection with the first electrode pads. The first signal pads are arranged on the first conductive layer and are in electric connection with the first conductive layer. The conductive structure is arranged on the first signal pads. At least two of the first signal pads are in electric connection with each other through the conductive structure.

Description

Electronic device {ELECTRONIC DEVICE}

This application claims the benefit of U.S. Provisional Application No. 62 / 680,665, filed June 5, 2018, and claims the benefit of Chinese Patent Application No. 2011910104660.7, filed February 1, 2019, which is hereby incorporated by reference in its entirety. .

Embodiments of the present disclosure relate to electronic devices, and more particularly to electronic devices that contain a conductive structure.

As technology advances, some electronic devices are designed to have larger sizes, higher resolutions, thinner or narrower frames, and the like, and tiled electronic devices are designed to have these characteristics. Current electronic devices still have many aspects that need improvement. Therefore, how to satisfy the above characteristics has become a problem.

In general, non-uniform signal transmission may occur because the thickness of the conductive layer disposed on the array substrate becomes thin and the impedance of the conductive layer becomes high. This problem requires increasing the number of circuit boards to increase costs or having more space on the array board and it is difficult to meet the demand for narrow frames. Accordingly, the present disclosure proposes some embodiments that can address the above problem.

According to some embodiments of the present disclosure, the electronic device includes a first substrate, a first conductive layer, a plurality of first electrode pads, a plurality of first light emitting units, a plurality of first signal pads, and a conductive structure. The first conductive layer is disposed on the first substrate. The first electrode pad is disposed on the first conductive layer. The first light emitting unit overlaps the first electrode pad and is disposed on the first electrode pad. The first light emitting units are electrically connected to the first electrode pads, respectively. The first signal pad is disposed on the first conductive layer and is electrically connected to the first conductive layer. The conductive structure is disposed on the first signal pad, and at least two of the first signal pads are electrically connected to each other through the conductive structure.

Various aspects of embodiments of the present disclosure may be best understood from the following detailed description when read in conjunction with the accompanying drawings. It is to be understood that, according to standard practice in industry, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.
1 is a partial top view illustrating an electronic device according to an embodiment of the present disclosure.
2 is a partial top view illustrating an electronic device according to an embodiment of the present disclosure.
3 is a partial cross-sectional view illustrating a tiled electronic device 101 along the AA ′ and BB ′ lines of FIG. 1.
4 is a partial top view of an electronic device according to another embodiment of the present disclosure.
FIG. 5 is a partial cross-sectional view illustrating an electronic device along the CC ′ line of FIG. 4.
6 is a partial top view illustrating an electronic device according to another embodiment of the present disclosure.
FIG. 7 is a partial cross-sectional view illustrating an electronic device along line C 1 -C 1 ′ in FIG. 6.
8 is a partial top view illustrating an electronic device according to an embodiment of the present disclosure.
9 is a partial top view illustrating an electronic device according to an embodiment of the present disclosure.
10 is a partial top view illustrating a tiled electronic device according to an embodiment of the present disclosure.

The following disclosure provides many different embodiments or examples for the implementation of various other features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, in the following description the placement (or formation) of the first feature on the second feature may include an embodiment in which the first and second features are disposed (or formed) in direct contact and the first and the first feature. It may also include embodiments in which additional features may be disposed (or formed) between the first and second features such that the two features may not be in direct contact.

It should be understood that additional steps may be performed before, during or after the illustrated method, and in other embodiments of the illustrated method some steps may be substituted or omitted.

Further, spatially related terms such as "below" (e.g., beneath, below, lower), "above" (e.g., above, upper), etc. may be applied to other element (s) or feature (s) as illustrated herein in the figures. It may be used for ease of description describing the relationship of one element or feature to a. Spatial relationship terms are intended to include other orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 45 degrees or at other orientations), and the spatial relationship descriptors used herein may similarly be interpreted accordingly.

Terms such as "about" and "substantially" generally refer to +/- 20% of the stated value, +/- 10% of the more generally mentioned value, +/- 5% of the more generally mentioned value, +/- 3% of more commonly mentioned values, +/- 2% of more generally mentioned values, +/- 1% of more generally mentioned values, +/- of more generally mentioned values 0.5%. Mentioned values in the present disclosure are approximations. That is, unless there is a specific description of the terms "about", "substantially", the stated value includes the meaning of "about", "substantially".

The terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers, and / or sections, but these elements, components, regions, layers, and / or sections may be used herein. It should be understood that it should not be limited by terminology. These terms are only used to distinguish one element, component, region, layer, or section from another region, layer or section. Thus, the first element, component, region, layer, or section described below may be referred to as a second element, component, region, layer, or section without departing from the teachings of the present disclosure.

Unless defined otherwise, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. Generally used terms as defined in the dictionary should be interpreted to have a meaning consistent with their meaning in the context of the related art, and idealized or overly formatted unless explicitly so defined in the embodiments of the present disclosure. It should be understood that it should not be interpreted in a sense.

In addition, the components of the drawings are merely exemplary, and the dimensions (including the length, width or height) of the components should not be limited to the drawings. In addition, the electronic device described in the present disclosure may include a display device, a light emitting device, a detection device, a touch device or other suitable device, but the disclosed embodiments are not limited thereto.

1 is a partial top view illustrating an electronic device 100 according to an embodiment of the disclosure. 2 is a partial top view illustrating a tiled electronic device 101 according to one embodiment of the disclosure. 3 is a partial cross-sectional view illustrating the tiled electronic device 101 along the A-A 'line and the B-B' line of FIG. In the embodiment illustrated in FIG. 1, the electronic device 100 may include a substrate, and in the embodiment illustrated in FIG. 2, the tiled electronic device 101 may include a plurality of substrates. The corresponding location or material of the element (or layer) on the substrate of the electronic device 100 may be the same or similar to the corresponding element (or layer) disposed on the plurality of substrates of the tiled electronic device 101. The aforementioned element (or layer) may refer to the following embodiment (as illustrated in FIGS. 1-3) in more detail: a conductive layer, electrode pad, light emitting unit, signal pad or other suitable element (or layer). It may include. Thus, a cross sectional view of the electronic device 100 may refer to a cross sectional view as illustrated in FIG. 3.

1 and 3, the electronic device 100 may include a first substrate 11, a first conductive layer 21, a plurality of first electrode pads 31, a plurality of first light emitting units 41, A plurality of first signal pads 51 and the conductive structure 60 is included. The first conductive layer 21 may be electrically connected to the plurality of first electrode pads 31 and the plurality of first signal pads 51. For example, the first substrate 11 may be an array substrate, and the first conductive layer 21 may be disposed (or formed) on the first substrate 11. In some embodiments, the first conductive layer 21 may be used as a conductive line for transmitting a voltage signal. The material of the first conductive layer 21 may be a metal (e.g., copper, molybdenum, aluminum, tungsten, gold, chromium, nickel, platinum, titanium), an alloy (e.g., an alloy of the metal), a transparent conductive material, or other suitable conductivity. Materials, or combinations thereof, but is not limited thereto. Transparent conductive materials include indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), antimony doped tin oxide (ATO), aluminum doped zinc oxide (AZO). It may include, but is not limited to. The first conductive layer 21 may comprise a single layer material, a multilayer material or a composite material. In some embodiments, the first electrode pad 31 is disposed on the first conductive layer 21, and the first light emitting unit 41 overlaps the first electrode pad 31 and the first electrode pad 31. The first light emitting unit 41 is electrically connected to the first electrode pad 31, respectively. More specifically, the cathode (and / or anode) of the first light emitting unit 41 may be electrically connected to the first conductive layer 21 through the first electrode pad 31. That is, the first electrode pad 31 can be used as the pad of the first light emitting unit 41. In some embodiments, the first light emitting unit 41 may include, but is not limited to, a light emitting diode (LED), a micro LED, a mini LED, a quantum dot light emitting diode (QLED / QDLED), a quantum dot or other suitable component. no. In some embodiments, the first light emitting unit 41 may include, but is not limited to, an organic light emitting diode (OLED).

In some embodiments, the first signal pad 51 is disposed on the first conductive layer 21 and electrically connected to the first conductive layer 21, and the conductive structure 60 is the first signal pad 51. And at least two of the first signal pads 51 are electrically connected to each other through the conductive structure 60 as illustrated in FIG. 3. For example, the first signal pad 51 is disposed between the conductive structure 60 and the first conductive layer 21 in the Z-direction (ie, the normal direction of the first substrate 11), and the conductive structure ( 60 is electrically connected to the first conductive layer 21 through the first signal pad 51 as illustrated in FIGS. 1 and 3. In some embodiments, the conductive structure 60 may overlap at least a portion of the first signal pad 51 in the Z-direction.

In some embodiments, the conductive structure 60 is electrically connected to a circuit board 70 or a voltage-signal supply circuit (not shown) as illustrated in FIG. 1. The circuit board 70 may include, but is not limited to, a flexible printed circuit (FPC), a chip on film (COF), or a printed circuit board (PCB). In some embodiments, the circuit board 70 may be electrically connected to the first conductive layer 21 through the conductive pad 80 (see FIG. 3). More specifically, the circuit board 70 is disposed on the first substrate 11, and at least one voltage signal transmitted (supplied) through the circuit board 70 is connected to the first conductive structure through the conductive structure 60. The signal may be transferred to the layer 21, and the voltage signal may be transmitted to the first light emitting unit 41 through the first conductive layer 21. The first light emitting unit 41 may modulate the light to be emitted or the brightness of the light according to the received voltage signal, but the present disclosure is not limited thereto. The above-described voltage signal may include, but is not limited to, a supply voltage (eg, VDD, VSS), a bias voltage, a reset voltage, a ground voltage GND, or other suitable voltage signal.

In some embodiments, the first signal pad 51 may be used as a power pad, but is not limited thereto. In some embodiments, the material of the first electrode pad 31 may be the same as the material of the signal pad 51 or the material of the first electrode pad 31 may be different from the material of the signal pad 51. In some embodiments, the material of the first electrode pad 31 (or the material of the signal pad 51) includes nickel, copper, gold, tin, silver, other suitable conductive materials, alloys of the metals, or combinations thereof. Although it can do it, it is not limited to this. Note that the connection relationship between the first signal pad 51 and the first conductive layer 21 is not limited to that illustrated in FIG. 3. Another suitable conductive material may be disposed between the first signal pad 51 and the first conductive layer 21.

In some embodiments, the voltage signal transmitted (or supplied) through the circuit board 70 may have a low impedance conductive structure 60 that may increase the efficiency of transferring the voltage signal or reduce the number of circuit boards 70. By the light emitting unit (eg, the first light emitting unit 41). For example, the impedance of the conductive structure 60 may increase the thickness T of the conductive structure 60 as illustrated in FIG. 3, or may cause low impedance materials (eg, gold, silver, copper) to form the conductive structure 60. ), But the present disclosure is not limited to this. In some embodiments, the thickness T of the conductive structure 60 may be equal to or greater than the thickness T2 of the first conductive layer 21 as illustrated in FIG. 3, but is not limited thereto. The thickness T of the conductive structure 60 may be defined as the maximum thickness in the Z-direction of the conductive structure 60, and the thickness T2 of the first conductive layer 21 may be the first conductive layer. It can be defined as the minimum thickness in the Z-direction. A detailed measuring method of the thickness will be described later.

In some embodiments, the first substrate 11 may be divided into a first region 11-1 and a second region 11-2, and as illustrated in FIG. 1, the first region 11-1. ) May be adjacent to the second region 11-2. The first area 11-1 may be a non-operating area (or a non-display area), and the second area 11-2 may be an operating area (or a display area). In some embodiments, as illustrated in FIG. 1, each of the outermost first light emitting units may have at least one side edge closest to the edge of the first substrate 11. The connecting line (such as the broken line illustrated in FIG. 1) of these side edges (or extension lines of the side edges) may form the second region 11-2 of the first substrate 11, and the second region ( A region other than 11-2) is the first region 11-1 of the first substrate 11. For example, the first light emitting unit 41 may include a light emitting diode, a micro LED, a mini LED, or a quantum dot light emitting diode, and the profile of the first light emitting unit 41 has a Z− on the first substrate 11. It may be formed by the boundary of the first light emitting unit 41 protruding in the direction, but is not limited thereto, and the side edge closest to the edge of the first substrate 11 can be obtained from the profile. Otherwise, the profile of the first light emitting unit 41 may be formed by the boundary of the top layer (or element) included in the first light emitting unit 41 projecting in the Z-direction on the first substrate 11. However, the present invention is not limited thereto, and the side edge closest to the edge of the first substrate 11 can be obtained from this profile. In some embodiments, one of the first light emitting units 41 may include a cathode electrode, an anode electrode or a light emitting layer, but is not limited thereto.

In some embodiments (not shown), the first light emitting unit 41 includes an organic light emitting diode, and the boundary of the first light emitting unit 41 may be formed by the pixel forming layer PDL, but is not limited thereto. It is not. For example, a pixel formation layer (not shown) may be disposed on the first substrate 11, and the pixel formation layer may have a plurality of openings. The first light emitting unit 41 may be disposed to correspond to or overlap the opening of the pixel formation layer. The protruding region of the opening of the pixel formation layer on the first substrate 11 may be formed as a profile of the first light emitting unit 41, but is not limited thereto.

As illustrated in FIG. 1, the first light emitting unit 41 may be disposed to correspond to the second region 11-2 of the first substrate 11 (or overlap the second region 11-2). can do). That is, the first light emitting unit 41 may be disposed in the second region 11-2. The conductive structure 60 may be disposed to correspond to the first region 11-1 of the first substrate 11 (or may overlap the first region 11-1). That is, the conductive structure 60 may be disposed in the first region 11-1, but is not limited thereto.

In some embodiments, the conductive structure 60 may have at least one opening O, and the opening O may be disposed corresponding to the second region 11-2 as illustrated in FIG. 1 or (Or may overlap the second region 11-2); Alternatively, the opening O may overlap at least one of the first light emitting units 41. In some embodiments, at least a portion of the conductive structure 60 may overlap at least one of the first light emitting units 41.

2 and 3, the electronic device 101 may be a tiled electronic device. The electronic device 101 includes a first substrate 11, a first conductive layer 21, a plurality of first electrode pads 31, a plurality of first light emitting units 41, and a plurality of first signal pads 51. And the conductive structure 60. The electronic device 101 also includes a second substrate 12, a second conductive layer 22, a plurality of second electrode pads 32, a plurality of second light emitting units 42, and a plurality of second signal pads ( 52). The second substrate 12 may be an array substrate. The second conductive layer 22 may be disposed (or formed) on the second substrate 12, and the second conductive layer 22 may include a plurality of second electrode pads 32 and a plurality of second signal pads ( 52) may be electrically connected. The material of the second conductive layer 22, the material of the second electrode pad 32, and / or the material of the second signal pad 52 are the material of the first conductive layer 21, the first electrode pad 31. Material and / or material of the first signal pad 51 may be the same or different.

In some embodiments (FIG. 3), the second electrode pad 32 is disposed on the second conductive layer 22, and the second light emitting unit 42 may overlap the second electrode pad 32 ( Or on the second electrode pad), and the second light emitting unit 42 is electrically connected to the second electrode pad 32, respectively. The second electrode pad 32 may be used as a pad of the second light emitting unit 42, and the second light emitting unit 42 may be electrically connected to the second conductive layer 22 through the second electrode pad 32. Can be.

In some embodiments, second signal pad 52 is disposed on second conductive layer 22, second signal pad 52 is electrically connected to second conductive layer 22, and conductive structure 60. ) Is disposed on the second signal pad 52, and at least two of the second signal pads 52 are electrically connected to each other through the conductive structure 60 as illustrated in FIG. 3. For example, the second signal pad 52 is disposed between the conductive structure 60 and the second conductive layer 22 in the Z-direction (ie, the normal direction of the second substrate 12). In some embodiments, the conductive structure 60 is electrically connected to the second conductive layer 22 through the second signal pad 52 as illustrated in FIGS. 2 and 3. In some embodiments, the conductive structure 60 may overlap at least a portion of the second signal pad 52 in the Z-direction.

In addition, similar to the first substrate 11, the second substrate 12 may be divided into a first region 12-1 and a second region 12-2, and the first region 12-1 may be divided into two regions. ) May be adjacent to (or may surround) the second region 12-2. The first region 12-1 of the second substrate 12 may be an inactive region (or non-display region), and the second region 12-2 of the second substrate 12 may be an operating region (or display). Area). The definition of the first region 12-1 of the second substrate 12 and the definition of the second region 12-2 of the second substrate 12 are the first regions 11-1 of the first substrate 11. ) And the definition of the second region 11-2 of the first substrate 11, and thus will not be repeated here. As illustrated in FIG. 2, the second light emitting unit 42 may be disposed to correspond to the second region 12-2 of the second substrate 12 (or overlap the second region 12-2). can do). That is, the second light emitting unit 42 may be disposed in the second region 12-2. The conductive structure 60 may be disposed to correspond to the first region 12-1 of the second substrate 12 (or may overlap the first region 12-1). That is, the conductive structure 60 may be disposed in the first region 12-1, but is not limited thereto. In some embodiments, the second signal pad 52 may be disposed corresponding to the first area 12-1 (or may overlap the first area 12-1). That is, the second signal pad 52 may be disposed in the first region 12-1, but is not limited thereto.

In some embodiments, the conductive structure 60 may have at least one opening O, which may be the second region 11-2 and / or as illustrated in FIG. 2. 12-2) (or may overlap second region 12-2); Alternatively, the opening O may overlap at least one of the first light emitting units 41 and / or at least one of the second light emitting units 42. In some embodiments, at least a portion of the conductive structure 60 may overlap at least one of the second light emitting units 42.

In some embodiments, the circuit board 70 may be electrically connected to at least one of the first signal pads 51 and at least one of the second signal pads 52 through the conductive structure 60. Specifically, at least one voltage signal transmitted (or supplied) through the circuit board 70 may be transmitted to the first conductive layer 21 and / or the second conductive layer 22 through the conductive structure 60. The voltage signal may be transmitted to the first light emitting unit 41 through the first conductive layer 21, and the voltage signal may be transmitted to the second light emitting unit 42 through the second conductive layer 22. It may be, but is not limited thereto. The second signal pad 52 can be used to connect the conductive structure 60 to the second conductive layer 22. In some embodiments, the second signal pad 52 may be used as a power pad, but is not limited thereto.

In some embodiments, the connection relationship between the various elements (or layers) or materials of the various elements (or layers) disposed on the second substrate 12 may be similar to that disposed on the first substrate 11 except for the conductive structure. It may be the same or similar. The aforementioned element (or layer) may comprise a conductive layer, an electrode pad, a light emitting unit, a signal pad or other suitable element (or layer).

Although the electronic device 101 having four substrates is used as an example, it should be understood that the present disclosure is not limited thereto. The electronic device may be a tiled electronic device with more or fewer substrates. Substrate (including first substrate 11 or second substrate 12), light emitting unit (including first light emitting unit 41 or second light emitting unit 42), signal pad (first signal pad (Including the 51 or the second signal pad 52) or other elements shown in the figures of the present disclosure are exemplary only, and the present disclosure is not limited thereto. Although the substrates (including the first substrate 11 or the second substrate 12) as illustrated in the figures of the present disclosure are shown to be rectangular, they are exemplary. In some embodiments, the shape of the substrate (including the first substrate 11 or the second substrate 12) may comprise a curved, polygonal, obtuse, acute or irregular shape. In addition, the number of circuit boards 70, the position of the circuit board 70, or the method of electrically connecting the circuit board 70 and the conductive structure 60 are not limited to the embodiment shown in Figs. . In some embodiments, circuit board 70 may be in direct contact with conductive structure 60 and circuit board 70 may be electrically connected to conductive structure 60; The circuit board 70 may be electrically connected to the conductive structure 60 by another conductive element (eg, the circuit structure LS) to be described in the following FIGS. 6 and 7.

In some embodiments, the conductive structure 60 may be manufactured by inkjet printing or net technology and may be disposed on the first signal pad 51 and the second signal pad 52 by compression, welding, or laser heating. However, the present disclosure is not limited to this.

In some embodiments, electronic device 101 (or electronic device 100) may include a protective layer CL, which may be on conductive structure 60 as illustrated in FIG. 3. Can be arranged. In some embodiments, the protective layer CL covers the conductive structure 60 and does not overlap or cover the light emitting units (eg, the first light emitting unit 41 and the second light emitting unit 42). Can be, but is not limited to this. In some embodiments, the protective layer CL may cover a portion of the insulating layer IL, and the insulating layer IL may be disposed between the first conductive layer 21 and the first light emitting unit 41. have. In some embodiments, the insulating layer IL may be disposed between the second conductive layer 22 and the second light emitting unit 42, but is not limited thereto. In some embodiments, the material of the protective layer CL may include, but is not limited to, an absorbing material, a light blocking material, a material having a buffering property, a material having a protective property, or a combination thereof. In some embodiments, the material of the protective layer CL may be waterproof, antistatic or antifouling. In some embodiments, the protective layer CL may comprise a single layer material, a multilayer material or a composite material. In some embodiments, the thickness T4 of the protective layer CL may be less than or equal to the thickness T of the conductive structure 60. In another embodiment, the thickness T4 of the protective layer CL may be greater than or equal to the thickness T of the conductive structure 60. The thickness T4 of the protective layer CL may be defined as the minimum thickness in the Z-direction of the protective layer CL. In some embodiments, the material of the protective layer CL may include a transparent material, and at least a portion of the protective layer CL may or may not overlap the light emitting unit.

4 is a partial top view illustrating an electronic device 102 according to another embodiment of the disclosure. FIG. 5 is a partial cross-sectional view illustrating electronic device 102 along line CC ′ in FIG. 4. The embodiment illustrated in FIG. 4 is similar to the embodiment as illustrated in FIG. 1. The first substrate 11 may be divided into a first region 11-1 and a second region 11-2, and the plurality of first light emitting units 41 correspond to the second region 11-2. Can be arranged. The difference between the embodiment as illustrated in FIG. 4 and the embodiment as illustrated in FIG. 1 is that the conductive structure 60 of the electronic device 102 may have a first region 11-1 and a second region 11-. 2) (or may overlap the first region 11-1 and the second region 11-2). That is, the conductive structure 60 may be disposed in the first region 11-1 and the second region 11-2.

In some embodiments, the conductive structure 60 may be divided into a first portion 61 and a second portion 62 as illustrated in FIGS. 4 and 5. The first portion 61 may be disposed to correspond to the first region 11-1 (or may overlap the first region 11-1). That is, the first portion 61 may be disposed in the first region 11-1. The second portion 62 may be disposed to correspond to the second region 11-2 (or may overlap the second region 11-2). That is, the second part 62 may be disposed in the second area 11-2.

In some embodiments, the second portion 62 of the conductive structure 60 may include at least one signal line SL. In FIG. 4, the signal line SL may extend along the X-direction, but is not limited thereto. In other embodiments (eg, the embodiment shown in FIG. 9), the signal lines SL may extend along the Y-direction or in other directions. In some embodiments, the material of the signal line SL may include, but is not limited to, a material having a low impedance. In some embodiments, the material of the signal line SL may include, but is not limited to, a metal (eg, gold, silver, copper, etc.), an alloy, or other suitable material. In some embodiments, the material of the signal line SL may comprise a single layer material, a multilayer material, or a composite material.

In some embodiments, the thickness T1 of the signal line SL may be greater than or equal to the thickness T2 of the first conductive layer 21 as shown in FIG. 5. In some embodiments, the thickness T of the first portion 61 of the conductive structure 60 may be the same as or different from the thickness T1 of the signal line SL. In some embodiments, the material of the first portion 61 of the conductive structure 60 may be the same or different from the material of the second portion 62 (eg, the signal line SL) of the conductive structure 60. . In some embodiments, the material of the first portion 61 of the conductive structure 60 is the same as the material of the signal line SL, and the thickness T of the first portion 61 of the conductive structure 60 is shown in FIG. As illustrated in FIG. 5, the thickness T1 of the signal line SL may be substantially the same, but is not limited thereto. In some embodiments, the first portion 61 and the signal line SL of the conductive structure 60 may be manufactured in the same process. In some embodiments, the first portion 61 of the conductive structure 60 may be connected to or in contact with the second portion 62 of the conductive structure 60.

In some embodiments, the width W of the signal line SL of the second portion 62 of the conductive structure 60 is equal to the gap between two adjacent first light emitting units 41 as shown in FIG. 5. gap) (S) may be less than or equal to. The width W may be defined as the maximum width of the signal line SL along a direction perpendicular to the extending direction of the signal line SL. For example, the signal line SL extends along the X-direction as shown in FIGS. 4 and 5, whereby the width W may be defined by the maximum width in the Y-direction of the signal line SL. , Y-direction may be perpendicular to the X- and Z-directions. The gap S may be defined as a minimum gap between two adjacent first light emitting units 41 in a direction orthogonal to the extending direction of the signal line SL. For example, the signal line SL extends along the X-direction as shown in FIGS. 4 and 5, and the gap S is the minimum between two adjacent first light emitting units 41 in the Y-direction. Can be defined as a gap.

In some embodiments, the ratio of the width W of the signal line SL of the second portion 62 of the conductive structure 60 to the gap S between two adjacent first light emitting units 41 ( That is, W / S) may be 0.05 to 0.95 (0.05 ≦ W / S ≦ 0.95). In some embodiments, the W / S can be 0.05 to 0.4 (0.05 ≦ W / S ≦ 0.4) or 0.4 to 0.7 (0.4 ≦ W / S ≦ 0.7), or 0.7 to 0.95 (0.7 ≦ W / S ≦ 0.95). have.

If the width W of the signal line SL of the second portion 62 of the conductive structure 60 is narrow, the impedance may be high, and a voltage signal may not be uniformly transmitted to the light emitting unit. In addition, when the width W of the signal line SL of the second part 62 is larger than the gap S, the first light emitting unit 41 (and / or the second light emitting unit 42) is emitted. Light may be shielded, which may affect the brightness of the light. Therefore, if the W / S is within the above range, the uniformity of the voltage signal transmitted to the light emitting unit can be increased, or the influence of the brightness of light can be reduced.

The width W and / or the gap S may be measured using an optical microscope OM, but is not limited thereto. The OM image may include at least two first light emitting units 41 and one signal line SL, and the width W may be obtained by measuring the maximum width of the signal line SL in the image. The gap S may be obtained by measuring the minimum gap between two adjacent light emitting units of the first light emitting unit 41, but is not limited thereto. The width W and the gap S can be obtained by observing a local cross sectional view (eg, but not limited to C-C 'cross sectional view of FIG. 5) using a scanning electron microscope (SEM). In the local cross section, the width W can be obtained by measuring the maximum width of the signal line SL, and the gap S can be obtained by measuring the minimum gap between two adjacent first light emitting units 41, It is not limited to this.

As illustrated in FIG. 5, the signal line SL of the second portion 62 of the conductive structure 60 may have a thickness T1, and the first conductive layer 21 may have a thickness T2. Can be. In some embodiments, the ratio of the thickness T1 to the thickness T2 may be 10 to 300 (10 ≦ T1 / T2 ≦ 300), but is not limited thereto. In some embodiments, the ratio of the thickness T1 to the thickness T2 may be 10 to 200 (10 ≦ T1 / T2 ≦ 200). In some embodiments, the ratio of the thickness T1 to the thickness T2 may be 10 to 100 (10 ≦ T1 / T2 ≦ 100). In some embodiments, thickness T1 may be greater than or equal to thickness T2. The thickness T1 may be defined as the maximum thickness in the Z-direction of the signal line SL, and the thickness T2 may be defined as the minimum thickness in the Z-direction of the first conductive layer 21.

In some embodiments, the thickness T2 of the first conductive layer 21 may be 1 μm to 10 μm (1 μm ≦ T2 ≦ 10 μm). In some embodiments, the thickness T2 of the first conductive layer 21 may be 1 μm to 2 μm (1 μm ≦ T2 ≦ 2 μm), or 5 μm to 10 μm (5 μm ≦ T2 ≦ 10 μm). have. The thickness T1 of the signal line SL may be 100 μm to 300 μm (100 μm ≦ T1 ≦ 300 μm). In some embodiments, the thickness T1 of the signal line SL may be 100 μm to 200 μm (100 μm ≦ T1 ≦ 200 μm), or 200 μm to 300 μm (200 μm ≦ T1 ≦ 300 μm). In some embodiments, one of the first signal pads 51 may have a thickness T3, as shown in FIG. 5, and the signal line (T) for one of the thicknesses T3 of the first signal pads 51. The ratio of the thickness T1 of the SL) may be 0.05 to 100 (0.05 ≦ T1 / T3 ≦ 100), but is not limited thereto. In some embodiments, the ratio of the thickness T1 to the thickness T3 may be 0.5 to 50 (0.5 ≦ T1 / T3 ≦ 50). The thickness of the elements can be obtained by observing a local cross section (eg, but not limited to, CC ′ cross section in FIG. 5) using a scanning electron microscope, and the thickness of the corresponding element (or layer) is local. It should be understood that measurements can be made in the cross section or by other suitable measurement methods.

6 is a partial top view illustrating an electronic device 102 ′ in accordance with another embodiment of the present disclosure. FIG. 7 is a partial cross-sectional view illustrating the electronic device 102 'along the C1-C1' line of FIG. The embodiment shown in FIG. 6 is similar to the embodiment shown in FIG. 4. The difference between the embodiment shown in FIG. 6 and the embodiment shown in FIG. 4 is that the electronic device 102 ′ may further include a circuit structure LS, wherein the circuit structure LS is formed of the first substrate 11. The first region 11-1 may be disposed corresponding to the first region 11-1 (or may overlap the first region 11-1 of the first substrate 11). In some embodiments, the circuit structure LS may be disposed below the first portion 61 of the conductive structure 60, as illustrated in FIG. 7, wherein the first portion 61 is a circuit structure LS. It may be electrically connected to the conductive pad 80 of the circuit board 70 through, but is not limited thereto. In some embodiments, the circuit structure LS may be disposed below the first portion 61 of the conductive structure 60, and the conductive structure 60 is connected to the voltage-signal supply circuit (not shown) through the circuit structure LS. H) may be electrically connected, but is not limited thereto. In some embodiments, the circuit structure LS may include a composite layer structure that may include at least one dielectric layer DL and at least one circuit layer LL, wherein the circuit layer LL is shown in FIG. 7. As shown in the drawing, it may be electrically connected to the conductive pad 80 of the circuit board 70, but is not limited thereto.

8 is a partial top view illustrating an electronic device 103 according to an embodiment of the disclosure. It should be noted that some elements may be omitted in FIG. 8 for brevity. The electronic device 103 shown in FIG. 8 is similar to the electronic device 102 shown in FIG. 4. One of the differences between these electronic devices is that the conductive structure 60 of the electronic device 103 can be interdigitated. For example, the conductive structure 60 may include a first portion 61 and a second portion 62. The first portion 61 may be divided into sections 61-1 and 61-2, and the second portion 62 may include at least one first signal line SL1 and at least one second signal. The line SL2 may be included, but is not limited thereto.

In some embodiments, the first signal line SL1 and the second signal line SL2 may extend along the X-direction as shown in FIG. 8, but are not limited thereto. In some embodiments, the first signal line SL1 and the second signal line SL2 may be alternately arranged. That is, the first signal line SL1 and the second signal line SL2 may not overlap in the Z-direction, but are not limited thereto. In some embodiments, the material of the first signal line SL1 may be the same as or different from the material of the second signal line SL2. In some embodiments, the first signal line SL1 may be connected to the section 61-1 of the first portion 61, and the first signal line SL1 is connected to the circuit board through the section 61-1. 71) (or a voltage-signal supply circuit) may be electrically connected, but is not limited thereto. In some embodiments, the second signal line SL2 may be connected to the section 61-2 of the first portion 61, and the second signal line SL2 is connected to the circuit board (2) through the section 61-2. 72) (or a voltage-signal supply circuit) may be electrically connected, but is not limited thereto.

In some embodiments, circuit board 71 and circuit board 72 may be used to supply or transmit the same voltage signal or different voltage signals. For example, circuit board 71 may be used to supply or deliver a supply voltage VDD, and circuit board 72 may be used to supply or convey a supply voltage VSS or ground reference voltage, but It is not limited. In some embodiments, section 61-1 and 61-1 may be electrically insulated from each other.

In some embodiments, the electronic device 103 may further include at least one circuit board 73, and the circuit board 73 may be disposed on the first substrate. More specifically, the conductive pads (not shown) of the circuit board 73 are conductive pads (not shown) of the first substrate 11 as shown in FIG. 8, but are conductive pads of the first signal pads and the first electrode pads. And (s) are electrically connected to the The conductive pads of the circuit board 73 may be electrically connected directly to the conductive pads of the first substrate 11 or the conductive pads of the circuit board 73 may conduct the first substrate 11 through the anisotropic conductive film (ACF). It may be electrically connected to the pad.

9 is a partial top view illustrating an electronic device 104 in accordance with an embodiment of the present disclosure. It should be noted that some elements may be omitted in FIG. 9 for brevity. The electronic device 104 shown in FIG. 9 is similar to the electronic device 102 shown in FIG. 4. One of the differences between these electronic devices may include a signal line SL in which the second portion 62 of the conductive structure 60 extends along the X-direction and a signal line SL extending in the Y-direction. Is there. That is, the signal line SL of the second part 62 may form a grid structure (or net structure), but is not limited thereto. The light emission (or display) uniformity of the electronic device may be increased by the conductive structure 60. In some embodiments, the second portion 62 of the conductive structure 60 may include a signal line SL extending along the other direction. In some embodiments, the shape of the second portion 62 of the conductive structure 60 may have another irregular shape. In some embodiments, one of the first light emitting units 41 may be connected and disposed corresponding to at least one of the first signal pads 51, as shown in FIG. 9. In some embodiments, the number of first signal pads 51 and / or the position of the first signal pads 51 connected and arranged corresponding to different first light emitting units 41 may be the same or different.

10 is a partial top view illustrating a tiled electronic device 1 according to one embodiment of the disclosure. As shown in FIG. 10, the tiled electronic device 1 may include a plurality of electronic devices 100 ′. For example, the structure of the electronic device 100 'may include the structure of the electronic device 100 shown in FIG. 1, except for the conductive structure 60, the structure of the electronic device 102 shown in FIG. 2, and FIG. 6. It may be similar to the structure of the electronic device 102 ′ shown in FIG. 8, the structure of the electronic device 103 shown in FIG. 8, or the structure of the electronic device 104 shown in FIG. 9.

In some embodiments, the conductive structure 60 'of the tiled electronic device 1 may be divided into a first portion 61' and a second portion 62 ', as shown in FIG. The portion 61 'may be disposed corresponding to the non-operating area (or non-display area) (or may overlap the non-operating area (or non-display area)) and the second part 62' may be the operating area ( Or a display area) (or may overlap the operation area (or display area)). In some embodiments, the material of the first portion 61 'of the conductive structure 60' may be the same as or similar to the material of the first portion 61 of the conductive structure 60, and the conductive structure 60 ' The material of second portion 62 ′ may be the same as or similar to the material of second portion 62 of conductive structure 60. In this embodiment, the material of the first portion 61 'of the conductive structure 60' may be the same as or different from the material of the second portion 62 'of the conductive structure 60'.

In some embodiments, the first portion 61 ′ of the conductive structure 60 ′ may be disposed corresponding to a tiled seam TG between two substrates as shown in FIG. 10 ( Alternatively, the tile shim TG may overlap, and the first portion 61 ′ may be electrically connected to the at least one signal line SL and the circuit board 70. More specifically, the first portion 61 ′ may be electrically connected to the circuit board 70 (eg, the conductive pad 80 of the circuit board 70), and the first portion 61 ′ may provide a voltage signal. It may be transferred to the signal line SL (or the voltage-signal supply circuit). The signal line SL may be arranged in correspondence with (or overlapping) the signal pads (eg, the first signal pad 51 or the second signal pad 52 described above) on another substrate and electrically connected thereto. The voltage signal may be transmitted to a light emitting unit (eg, the first light emitting unit 41 or the second light emitting unit 42 described above) in another substrate through the signal line SL of the second portion 62 ′. However, it is not limited to this. Due to the conductive structure 60 ', the transfer efficiency of the voltage signal can be improved, or the number of circuit boards 70 (or the number of voltage-signal supply circuits) can be reduced.

In general, tiled electronic devices may need to be individually installed and electrically connected to separate circuit boards between different substrates, and the tiled shim may be larger because the circuit boards need to occupy some space on the substrate. An electronic device (or tiled electronic device) of an embodiment according to the present disclosure may address this problem.

In some embodiments, a protective material (referred to as protective layer CL), shielding material, other suitable material, or a combination thereof may be disposed (or coated) on conductive structure 60 '(or conductive structure 60). Can be. The shielding material can be used to shield the tiled shim TG between the substrates and the protective material can be used to reduce collisions or to increase the yield of the electronic device.

The foregoing description has outlined features of various embodiments so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes or structures for carrying out the same purposes and / or achieving the same advantages as the embodiments introduced herein. In addition, those skilled in the art should appreciate that equivalent configurations may be made without departing from the spirit and scope of the present disclosure and that various changes, substitutions, and alterations can be made without departing from the spirit and scope of the present disclosure. Therefore, the scope of protection should be determined through the claims. In addition, while some embodiments of the present disclosure have been disclosed above, it is not intended to limit the scope of the present disclosure.

Reference to features, advantages, or similar language throughout this specification does not mean that all features and advantages that can be realized with the present disclosure must be present in any single embodiment of the present disclosure. Rather, language indicating features and advantages is understood to mean that a particular feature, advantage, or characteristic described in connection with a particular embodiment is included in at least one embodiment of the present disclosure. Thus, throughout this specification, discussions of features and advantages and similar languages may, but do not necessarily, refer to the same embodiment.

In addition, the described features, advantages, and characteristics described in this disclosure can be combined in any suitable manner in one or more embodiments. Those skilled in the relevant art will recognize that, in light of the description herein, may practice the present disclosure without one or more specific features or advantages of particular embodiments. In other instances, additional features and advantages may be recognized in certain embodiments that may not be present in all embodiments of the present disclosure.

Claims (20)

In an electronic device,
A first substrate;
A first conductive layer disposed on the first substrate;
A plurality of first electrode pads disposed on the first conductive layer;
A plurality of first light emitting units overlapping the first electrode pads and disposed on the first electrode pads, the plurality of first light emitting units being electrically connected to the plurality of first electrode pads, respectively;
A plurality of first signal pads disposed on the first conductive layer and electrically connected to the first conductive layer; And
A conductive structure disposed on the plurality of first signal pads
Including,
At least two of the plurality of first signal pads are electrically connected to each other through the conductive structure. The display device of claim 1, wherein the first substrate has a first region and a second region adjacent to the first region, and the plurality of first light emitting units are disposed corresponding to the second region, and the conductive structure includes: And a first portion disposed corresponding to said first region. The method of claim 2, wherein the conductive structure further includes a second portion disposed corresponding to the second region, and at least some of the plurality of first signal pads are disposed corresponding to the second region. , Electronic device. The method of claim 3, wherein the second portion includes at least one signal line, and the width of the at least one signal line is equal to a gap between two adjacent first light emitting units of the plurality of first light emitting units. less than or equal to the gap. The electronic device of claim 4, wherein the ratio of the width of the at least one signal line to the gap between two adjacent first light emitting units of the plurality of first light emitting units is between 0.05 and 0.95. The electronic device of claim 4 wherein the material of the at least one signal line comprises metals or alloys. 4. The electronic device of claim 3, wherein the second portion comprises a plurality of signal lines, the plurality of signal lines extending along a first direction. The method of claim 3, wherein the second portion includes a plurality of first signal lines and a plurality of second signal lines, and the plurality of first signal lines and the plurality of second signal lines are alternately disposed. Electronic device. 4. The circuit of claim 3, wherein the second portion includes a plurality of first signal lines and a plurality of second signal lines, the plurality of first signal lines being electrically connected to a first circuit board. And the plurality of second signal lines are electrically connected to a second circuit board. The electronic device of claim 3 wherein the second portion comprises a plurality of signal lines, the plurality of signal lines forming a grid structure. The method of claim 2,
A circuit structure disposed corresponding to the first region; And
At least one circuit board electrically connected to at least one of the plurality of first signal pads through the conductive structure
The electronic device further comprises. The electronic device of claim 11, wherein the circuit structure comprises at least one dielectric layer and at least one circuit layer. The method of claim 4, wherein the at least one signal line has a first thickness, the first conductive layer has a second thickness, and the ratio of the first thickness to the second thickness is between 10 and 300. Phosphorus, electronic device. The method of claim 4, wherein the at least one signal line has a first thickness, one of the plurality of first signal pads has a third thickness, and the ratio of the first thickness to the third thickness is 0.05. And between 100 and the electronic device. The electronic device of claim 1 wherein the conductive structure is used to transmit a voltage signal. The electronic device of claim 15 wherein the voltage signal comprises a supply voltage, a bias voltage, a reset voltage or a ground voltage. The method of claim 1,
A second substrate;
A second conductive layer disposed on the second substrate;
A plurality of second electrode pads disposed on the second conductive layer;
A plurality of second light emitting units overlapping the plurality of second electrode pads and disposed on the plurality of second electrode pads, and electrically connected to the plurality of second electrode pads, respectively; And
A plurality of second signal pads disposed on the second conductive layer and electrically connected to the second conductive layer
More,
At least one of the plurality of second signal pads is electrically connected to at least one of the plurality of first signal pads through the conductive structure. The method of claim 17,
And at least one circuit board electrically connected to at least one of the plurality of second signal pads and electrically connected to at least one of the plurality of first signal pads through the conductive structure. The electronic device of claim 17, wherein a tiled seam is formed between the first substrate and the second substrate, and at least a portion of the conductive structure is disposed corresponding to the tiled seam. The method of claim 1,
And a protective layer disposed on the conductive structure.

Images