KR20190063022A - Thin film trnasistor, method for manufacturing the same and display device comprising the same - Google Patents

Abstract

An embodiment of the present invention provides a thin film transistor which comprises: an oxide semiconductor layer on a substrate; a gate insulating film on the oxide semiconductor layer; a gate electrode, on the gate insulting film, at least partially overlapping the gate the oxide semiconductor layer; a source electrode connected to the oxide semiconductor layer; and a drain electrode connected to the oxide semiconductor layer. The oxide semiconductor layer includes a channel unit overlapping the gate electrode and a connection unit not overlapping the gate electrode. The hydrogen concentration of the connection unit is lower than that of the channel unit, and the fluorine (F) concentration of the connection unit is higher than that of the channel unit.

Description

TECHNICAL FIELD [0001] The present invention relates to a thin film transistor, a method of manufacturing the same, and a display device including the same. BACKGROUND OF THE INVENTION [0002]

The present invention relates to a thin film transistor, a method of manufacturing the thin film transistor, and a display device including the thin film transistor. More specifically, the present invention relates to a thin film transistor having an oxide semiconductor layer containing fluorine (F), a manufacturing method thereof, and a display device including such a thin film transistor.

Transistors are widely used as switching devices or driving devices in the field of electronic devices. In particular, since a thin film transistor can be manufactured on a glass substrate or a plastic substrate, it can be used as a switching element of a display device such as a liquid crystal display device or an organic light emitting device It is widely used.

The thin film transistor includes an amorphous silicon thin film transistor in which amorphous silicon is used as an active layer, a polycrystalline silicon thin film transistor in which polycrystalline silicon is used as an active layer, and a polycrystalline silicon thin film transistor in which an oxide semiconductor is used as an active layer Oxide semiconductor thin film transistor.

The amorphous silicon thin film transistor (a-Si TFT) has advantages of short manufacturing time and low production cost since amorphous silicon can be deposited in a short time to form an active layer. On the other hand, the amorphous silicon thin film transistor has a disadvantage that its use is limited to an active matrix organic light emitting diode (AMOLED) or the like because its mobility is low and its current driving capability is not good and a threshold voltage is changed.

A polycrystalline silicon thin film transistor (poly-Si TFT) is formed by crystallizing amorphous silicon after the amorphous silicon is deposited. Since a process for crystallizing amorphous silicon is required in the process of manufacturing a polycrystalline silicon thin film transistor, the manufacturing cost is increased due to an increase in the number of processes, and a crystallization process is performed at a high process temperature. Therefore, the polycrystalline silicon thin film transistor is applied to a large- There is a difficulty in having. Further, due to the polycrystalline characteristics, it is difficult to secure the uniformity of the polycrystalline silicon thin film transistor.

An oxide semiconductor TFT has desired physical properties because it can form an oxide constituting the active layer at a relatively low temperature, has a high mobility, and has a large resistance change according to the content of oxygen. And can be easily obtained. Further, due to the nature of the oxide, the oxide semiconductor is transparent, which is also advantageous for realizing a transparent display. However, the oxide semiconductor layer may be damaged during the patterning process including etching, heat treatment, etc., and reliability of the thin film transistor may be deteriorated.

[Prior Art Literature]

[Patent Literature]

1. Korean Patent Publication No. 10-2012-0103953

2. Korean Patent Laid-Open No. 10-2009-0132323

One embodiment of the present invention is to provide a thin film transistor including an oxide semiconductor layer having a connection portion doped with fluorine.

Another embodiment of the present invention is to provide a thin film transistor including a connection portion that is made conductive by fluorine treatment, thereby preventing the reliability from being lowered due to heat treatment, and a manufacturing method thereof.

Another embodiment of the present invention is to provide a thin film transistor including a gate insulating film covering the entire surface of an oxide semiconductor layer and preventing an insulation failure between the gate electrode and the oxide semiconductor layer and a manufacturing method thereof.

Another embodiment of the present invention is to provide a display device including such a thin film transistor.

According to an embodiment of the present invention, there is provided a semiconductor device comprising: an oxide semiconductor layer on a substrate; a gate insulating film on the oxide semiconductor layer; a gate electrode on the gate insulating film at least partially overlapping with the oxide semiconductor layer; And a drain electrode spaced apart from the source electrode and connected to the oxide semiconductor layer, wherein the oxide semiconductor layer includes a channel portion overlapping the gate electrode, and a connection portion at least a portion of which does not overlap with the gate electrode , The hydrogen concentration of the connection portion is lower than the hydrogen concentration of the channel portion, and the fluorine (F) concentration of the connection portion is higher than the fluorine (F) concentration of the channel portion.

The gate insulating film is disposed on the entire surface of the oxide semiconductor layer in the direction opposite to the substrate.

The connection portion has a fluorine concentration of 0.1 to 10 atomic% (at%).

The connection portion has a hydrogen concentration of 1/10 to 1/1000 of the channel portion.

According to another embodiment of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming an oxide semiconductor layer on a substrate; doping fluorine (F) into the oxide semiconductor layer; irradiating ultraviolet light onto the oxide semiconductor layer doped with fluorine; Forming a gate insulating film on the oxide semiconductor layer, forming a gate electrode on the gate insulating film at least partially overlapping the oxide semiconductor layer, and forming a source electrode and a drain electrode connected to the oxide semiconductor layer, The method comprising the steps of:

The gate insulating film is formed on the entire surface of the oxide semiconductor layer.

The step of doping the fluorine (F) may be performed before the step of forming the gate insulating film.

The step of doping the fluorine (F) may be performed after the step of forming the gate electrode.

The connection portion of the oxide semiconductor layer is formed by the fluorine doping and the ultraviolet irradiation, and the connection portion is doped to have a fluorine concentration of 0.1 to 10 atomic% (at%).

The method of manufacturing a thin film transistor may further include forming a light blocking layer on the substrate and forming a buffer layer on the light blocking layer before forming the oxide semiconductor layer, And is formed to overlap with the light blocking layer.

According to another embodiment of the present invention, there is provided a thin film transistor including a substrate, a thin film transistor disposed on the substrate, and a first electrode connected to the thin film transistor, wherein the thin film transistor includes an oxide semiconductor layer on the substrate, A gate electrode on the gate insulating film, a source electrode connected to the oxide semiconductor layer, and a drain electrode spaced apart from the source electrode and connected to the oxide semiconductor layer, the oxide semiconductor layer being overlapped at least partially with the oxide semiconductor layer, Wherein a concentration of hydrogen in the connection portion is lower than a concentration of hydrogen in the channel portion and a concentration of fluorine (F) in the connection portion is lower than a concentration of hydrogen in the channel portion, Is higher than the fluorine (F) concentration in the negative.

According to an embodiment of the present invention, the connection portion of the oxide semiconductor layer is made conductive by fluorine doping, thereby preventing the reliability of the thin film transistor from being deteriorated by hydrogen or heat treatment. Further, as the gate insulating film covers the entire surface of the oxide semiconductor layer, defective insulation between the gate electrode and the oxide semiconductor layer in the thin film transistor is prevented.

The display device according to an embodiment of the present invention including the thin film transistor as described above can have excellent reliability and driving stability.

In addition to the effects mentioned above, other features and advantages of the present invention are described below. These and other objects, features, and advantages of the present invention will become apparent to those skilled in the art to which the present invention pertains.

1 is a cross-sectional view of a thin film transistor according to an embodiment of the present invention.
2 is a cross-sectional view of a thin film transistor according to another embodiment of the present invention.
3 is a cross-sectional view of a thin film transistor according to another embodiment of the present invention.
4A to 4K are cross-sectional views illustrating a manufacturing process of a thin film transistor according to another embodiment of the present invention.
5A to 5C are schematic views for explaining the conduction and stabilization of the oxide semiconductor layer by fluorine doping and ultraviolet irradiation.
6A to 6D are cross-sectional views illustrating a manufacturing process of a thin film transistor according to another embodiment of the present invention.
7 is a schematic cross-sectional view of a display device according to another embodiment of the present invention.
8 is a schematic cross-sectional view of a display device according to another embodiment of the present invention.
9A to 9E are schematic views of a manufacturing process of a thin film transistor according to a comparative example.
10 is a graph illustrating a result of measuring the resistance of the first connection part over time while maintaining the temperature at 300 ° C by applying heat to the thin film transistor according to the comparative example.
11 is a graph illustrating a result of measuring the resistance of the first connection part with time while maintaining the temperature of 300 DEG C by applying heat to the thin film transistor of FIG.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. And the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited to those shown in the drawings. Like elements throughout the specification may be referred to by like reference numerals. In the following description of the present invention, a detailed description of related arts will be omitted when it is determined that the gist of the present invention may be unnecessarily obscured.

Where the terms "comprises", "having", "comprising", and the like are used herein, other portions may be added unless the expression "only" is used. Where an element is referred to in the singular, it includes the plural unless specifically stated otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is used, one or more other portions may be located between the two portions.

The terms spatially relative, "below," "lower," "above," "upper," and the like, And may be used to easily describe the correlation with other elements or components. Spatially relative terms should be understood to include, in addition to the orientation shown in the drawings, terms that include different orientations of the device during use or operation. For example, when inverting an element shown in the figures, an element described as "below" or "beneath" of another element may be placed "above" another element. Thus, the exemplary term "below" can include both downward and upward directions. Likewise, the exemplary terms "above" or "phase" can include both upward and downward directions.

In the case of a description of a temporal relationship, for example, if the temporal relationship is described by 'after', 'after', 'after', 'before', etc., May not be continuous unless they are not used.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

It should be understood that the term "at least one" includes all possible combinations from one or more related items. For example, the meaning of " at least one of the first item, the second item and the third item " means not only the first item, the second item or the third item, but also the second item and the second item among the first item, May refer to any combination of items that may be presented from more than one.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other, partially or wholly, technically various interlocking and driving, and that the embodiments may be practiced independently of each other, It is possible.

Hereinafter, a thin film transistor, a method of manufacturing the same, and a display device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. In adding reference numerals to the constituent elements of the drawings, the same constituent elements may have the same sign as possible even if they are displayed on different drawings

1 is a cross-sectional view of a thin film transistor 100 according to an embodiment of the present invention.

1, a thin film transistor 100 according to an embodiment of the present invention includes an oxide semiconductor layer 130 on a substrate 110, a gate insulating layer 120 on an oxide semiconductor layer 130, a gate insulating layer 120, A source electrode 150 connected to the oxide semiconductor layer 130 and a drain electrode 160 separated from the source electrode 150 and connected to the oxide semiconductor layer 130. The gate electrode 140,

The oxide semiconductor layer 130 includes a channel portion 131 overlapping the gate electrode 140 and connection portions 133a and 133b at least a portion of which does not overlap with the gate electrode 140.

As the substrate 110, glass or plastic may be used. Transparent plastic having a flexible property as plastic, for example, polyimide, may be used.

Although not shown, a buffer layer may be disposed on the substrate 110. The buffer layer may comprise at least one of silicon oxide and silicon nitride. The buffer layer protects the oxide semiconductor layer 130, and the upper portion of the substrate 110 can be planarized.

The oxide semiconductor layer 130 is disposed on the substrate 110. The oxide semiconductor layer 130 includes an oxide semiconductor material. For example, the oxide semiconductor layer 130 may be formed of an oxide semiconductor such as IZO (InZnO), IGO (InGaO), ITO (InSnO), IGZO, InGaZnOn, IZZTO, GaZnSnO, ) Based oxide semiconductor material. However, an embodiment of the present invention is not limited thereto, and the oxide semiconductor layer 130 may be formed by another oxide semiconductor material known in the art.

The detailed structure of the oxide semiconductor layer 130 will be described later.

A gate insulating layer 120 is disposed on the oxide semiconductor layer 130. The gate insulating film 120 may include at least one of silicon oxide and silicon nitride. The gate insulating film 120 may have a single film structure or may have a multi-film structure.

According to one embodiment of the present invention, the gate insulating film 120 is disposed on the entire surface of the oxide semiconductor layer 130 in the direction opposite to the substrate 110. The surface of the oxide semiconductor layer 130 in the direction opposite to the substrate 110 is referred to as a first surface 130a of the oxide semiconductor layer 130. [

More specifically, the gate insulating layer 120 may be disposed on the front surface of the substrate 110 including the oxide semiconductor layer 130. As a result, the first surface 130a of the oxide semiconductor layer 130 can be completely covered with the gate insulating film 120. [ If the gate insulating film 120 completely covers the first surface 130a of the oxide semiconductor layer 130, an insulation failure between the gate electrode 140 and the oxide semiconductor layer 130 can be prevented.

Referring to FIG. 9C, the gate insulating film 120 is patterned similarly to the gate electrode 140. In this case, a leakage current may be generated between the gate electrode 140 and the oxide semiconductor layer 130 due to residues or other impurities of the material forming the gate electrode 140, or a leakage current may be generated between the gate electrode 140 and the oxide semiconductor layer 130. [ A short may be generated between the first and second electrodes 130 and 130. When leakage current or short circuit occurs, the thin film transistor does not function properly.

The thickness of the gate insulating layer 120 may be increased to prevent a leakage current or a short circuit between the gate electrode 140 and the oxide semiconductor layer 130. In this case, the switching characteristics of the thin film transistor are lowered, and the thin film transistor is thickened.

The gate insulating film 120 completely covers the first surface 130a of the oxide semiconductor layer 130 so that the leakage current between the gate electrode 140 and the oxide semiconductor layer 130 Or a short circuit is prevented, thereby ensuring the reliability of the thin film transistor 100. Particularly, even if the thickness of the gate insulating film 120 is reduced, leakage current or short circuit between the gate electrode 140 and the oxide semiconductor layer 130 is not generated, so that the thin film transistor can be thinned and the switching characteristic is improved .

The gate electrode 140 is disposed on the gate insulating film 120. Specifically, the gate electrode 140 is insulated from the oxide semiconductor layer 130 and overlaps with the oxide semiconductor layer 130 at least partially. As shown in FIG. 1, the structure of the thin film transistor 100 in which the gate electrode 140 is disposed on the oxide semiconductor layer 130 is also referred to as a top gate structure.

The gate electrode 140 may be formed of an aluminum-based metal such as aluminum or an aluminum alloy, a silver-based metal such as silver or silver alloy, a copper-based metal such as copper or a copper alloy, (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti), for example, molybdenum series metals such as molybdenum (Mo) or molybdenum alloy. The gate electrode 140 may have a multilayer structure including at least two conductive films having different physical properties.

An interlayer insulating film 170 is disposed on the gate electrode 140. The interlayer insulating film 170 is made of an insulating material. Specifically, the interlayer insulating layer 170 may be formed of an organic material, an inorganic material, or a laminate of an organic material layer and an inorganic material layer.

A source electrode 150 and a drain electrode 160 are disposed on the interlayer insulating film 170. The source electrode 150 and the drain electrode 160 are spaced apart from each other and connected to the oxide semiconductor layer 130, respectively. The source electrode 150 and the drain electrode 160 are connected to the oxide semiconductor layer 130 through the contact hole formed in the gate insulating layer 120 and the interlayer insulating layer 170, respectively.

 The source electrode 150 and the drain electrode 160 may be formed of at least one selected from the group consisting of Mo, Al, Cr, Au, Ti, Cu), and alloys thereof. The source electrode 150 and the drain electrode 160 may be formed of a single layer made of a metal or a metal alloy, or may be formed of multiple layers of two or more layers.

Hereinafter, the oxide semiconductor layer 130 will be described in more detail.

The oxide semiconductor layer 130 includes a channel portion 131 overlapping the gate electrode 140 and connection portions 133a and 133b at least a portion of which does not overlap with the gate electrode 140. [ The oxide semiconductor layer 130 is connected to the source electrode 150 and the drain electrode 160 in the connection portions 133a and 133b. The connection portions 133a and 133b include a first connection portion 133a connected to the source electrode 150 and a second connection portion 133b connected to the drain electrode 160. [

The channel portion 131 overlaps the gate electrode 140 of the oxide semiconductor layer 130. A channel of the oxide semiconductor layer 130 is formed in the channel part 131.

At least a part of the connection portions 133a and 133b does not overlap with the gate electrode 140. [ The entire connection portions 133a and 133b may not overlap with the gate electrode 140 and a part of the connection portions 133a and 133b may overlap with the gate electrode 140. [

The connection portions 133a and 133b may be formed by selectively conducting the oxide semiconductor layer 130. For the purpose of conducting, the regions of the connecting portions 133a and 133b may be plasma-treated. These connection portions 133a and 133b have excellent conductivity and high mobility. The oxide semiconductor layer 130 can make excellent electrical contact with the source electrode 150 and the drain electrode 160 through the connection portions 133a and 133b. The connection portions 133a and 133b are also referred to as "a conductor forming portion ".

According to an embodiment of the present invention, the connection portions 133a and 133b include fluorine (F). For example, the connection portions 133a and 133b may be formed by doping a part of the oxide semiconductor layer 130 with fluorine (F).

The concentration of hydrogen (H) in the connection portions 133a and 133b is lower than the concentration of hydrogen (H) in the channel portion 131 and the concentration of fluorine (F) Is higher than the fluorine (F) concentration of the portion (131).

When the oxide semiconductor layer 130 is doped with fluorine, the fluorine atoms may be replaced with oxygen atoms in the oxide semiconductor inner layer 130, or fluorine may be filled in the oxygen vacancy positions, have. As described above, when the fluorine atoms in the oxide semiconductor layer 130 are replaced with oxygen or oxygen deficient positions, the carrier density is increased and the conductivity is increased. Therefore, the fluorine-doped connection portions 133a and 133b can be made conductive.

The fluorine can form a stable bond in the oxide semiconductor layer 130. Therefore, in the case of fluorine doping, fluorine diffusion into the channel part 131 is not generated unlike the case of hydrogen doping, so that conduction of the channel part 131 can be prevented. As a result, the stability and reliability of the oxide semiconductor layer 130 can be improved.

Also, according to an embodiment of the present invention, ultraviolet rays are irradiated to the oxide semiconductor layer 130 after fluorine doping. The ultraviolet ray irradiation may form a stable bond of metal-oxygen or metal-fluorine, while hydrogen may be removed from the oxide semiconductor layer 130, so that the concentration of hydrogen in the oxide semiconductor layer 130 may be lowered.

For example, in a state where the channel part 131 is masked, fluorine doping and ultraviolet ray irradiation are performed in an area other than the channel part 131, so that the connection parts 133a and 133b can be formed. The channel portion 131 and the connecting portions 133a and 133b are distinguished from each other by the selective fluorine doping and ultraviolet irradiation and the fluorine concentration of the connecting portions 133a and 133b is higher than the fluorine concentration of the fluorine F And the concentration of hydrogen (H) in the connecting portions 133a and 133b becomes lower than the concentration of hydrogen (H) in the channel portion 131.

As a result, the conductive connection portions 133a and 133b can provide excellent electrical connection with the source electrode 150 and the drain electrode 160. [ On the other hand, the channel portion 131 is hardly influenced by fluorine doping and ultraviolet irradiation, and excellent semiconductor characteristics can be maintained.

As a result of fluorine doping and ultraviolet irradiation, the connecting portions 133a and 133b may have a fluorine (F) concentration of 10 times or more the atomic number of the channel portion 131. Since the connection portions 133a and 133b have a high fluorine (F) concentration, the connection portions 133a and 133b can have excellent conductivity even when a small amount of hydrogen is contained. More specifically, when the concentration of fluorine (F) is 10 times or more higher than that of the channel part 131, the connection parts 133a and 133b can have stable electrical conductivity. On the other hand, it is not easy for the connection portions 133a and 133b to have a fluorine (F) concentration of 10 ¹⁴ times or more than the channel portion 131 due to the nature of the doping process. Thus, according to one embodiment of the present invention, the connection portions 133a and 133b may have a fluorine (F) concentration of 10 to 10 ¹⁴ times as much as the channel portion 131 on the basis of the atomic number.

According to an embodiment of the present invention, the connection portions 133a and 133b may have a fluorine concentration of 0.1 to 10 atomic% (at%). Here, the atomic% concentration of fluorine is a percentage (%) of fluorine atoms relative to the total atoms contained in the connecting portions 133a and 133b. If the fluorine concentration of the connecting portions 133a and 133b is less than 0.1 atomic%, the connecting portions 133a and 133b may not have sufficient conductivity. On the other hand, in order for the fluorine concentration of the connection portions 133a and 133b to exceed 10 atomic%, the doping time may become long and the oxide semiconductor layer 130 may be damaged because doping must be performed at high temperature and high pressure. In addition, if the fluorine concentration is too high, the stability of the oxide semiconductor layer 130 may be deteriorated. Therefore, the fluorine concentration of the connecting portions 133a and 133b can be adjusted in the range of 0.1 to 10 atomic% (at%).

Unlike hydrogen, fluorine forms a stable bond in the oxide semiconductor layer 130. Therefore, even if the thin film transistor 100 is heat-treated, the fluorine is not removed from the connecting portions 133a and 133b, and the electrical characteristics of the connecting portions 133a and 133b do not deteriorate after the heat treatment. In addition, since the fluorine is not easily released, the possibility that the channel portion 131 is made conductive by the released fluorine is very low. In general, hydrogen does not form a stable bond in the oxide semiconductor layer 140. Therefore, when the hydrogen concentration is high, the hydrogen in the connection portions 133a and 133b is released by the heat treatment, and the resistance of the connection portions 133a and 133b is increased to increase the resistance of the connection portions 133a and 133b and the source electrode 150 or the drain electrode 160 may be deteriorated. However, according to one embodiment of the present invention, since the hydrogen concentration of the connecting portions 133a and 133b is very low, the possibility of hydrogen escape by heat treatment is low, and accordingly, the resistance of the connecting portions 133a and 133b There is almost no increase. Therefore, the thin film transistor according to one embodiment of the present invention can have excellent thermal stability.

As a result of fluorine doping and ultraviolet irradiation, the connecting portions 133a and 133b can have a hydrogen concentration of 1/10 or less of the channel portion 131 on the atomic number basis. Due to the decrease in hydrogen concentration, the connection portions 133a and 133b can have stable electrical characteristics and can block hydrogen. However, hydrogen is not completely removed from the connecting portions 133a and 133b. Therefore, the connection portions 133a and 133b can have a hydrogen concentration of 1/1000 or more of the channel portion 131 on the basis of the atomic number, for example.

According to one embodiment of the present invention, the connection portions 133a and 133b may have a hydrogen concentration of 0.1 to 5 atomic% (at%). When the hydrogen concentration of the connection portions 133a and 133b exceeds 5 atomic%, the stability of the oxide semiconductor layer 130 may be deteriorated. On the other hand, even when fluorine doping and ultraviolet irradiation are performed, it is not easy to lower the hydrogen concentration of the connecting portions 133a and 133b to less than 0.1 atom%.

2 is a cross-sectional view of a thin film transistor 200 according to another embodiment of the present invention. Hereinafter, in order to avoid duplication, descriptions of the components already described are omitted.

The thin film transistor 200 of FIG. 2 further includes a light blocking layer 180 on the substrate 110 and a buffer layer 121 on the light blocking layer 180, as compared to the thin film transistor 100 of FIG.

The light blocking layer 180 overlaps with the oxide semiconductor layer 130. The light blocking layer 180 blocks light incident on the oxide semiconductor layer 130 from the outside to prevent the oxide semiconductor layer 130 from being damaged by external incident light. The light blocking layer 180 may be made of an electrically conductive material such as a metal.

A buffer layer 121 is disposed on the light blocking layer 180. The buffer layer 121 may include at least one of silicon oxide and silicon nitride. The buffer layer 121 may be formed of a single film or may have a laminated structure in which two or more films are laminated. The buffer layer 121 has excellent insulating property and planarization property and can protect the oxide semiconductor layer 130.

3 is a cross-sectional view of a thin film transistor 300 according to another embodiment of the present invention.

3, the drain electrode 160 is connected to the light blocking layer 180 as well as the oxide semiconductor layer 130, as compared with the thin film transistor 200 of FIG. The light blocking layer 180 has conductivity. The drain electrode 160 is connected to the oxide semiconductor layer 130 for stable driving of the thin film transistor 300.

3, the drain electrode 160 is connected to the light blocking layer 180 through the contact hole CH3 formed in the buffer layer 121, the gate insulating layer 120, and the interlayer insulating layer 170. Referring to FIG.

Hereinafter, a method of manufacturing the thin film transistor 200 will be described with reference to FIGS. 4A to 4K. 4A to 4K are a manufacturing process diagram of the thin film transistor 200 according to another embodiment of the present invention.

Referring to FIG. 4A, a light blocking layer 180 is formed on a substrate 110.

Glass can be used for the substrate 110, and a plastic that can be bent or rolled can be used. An example of the plastic used as the substrate 110 is polyimide. When the polyimide is used as the substrate 110, a heat-resistant polyimide that can withstand high temperatures can be used, considering that a high-temperature process is performed on the substrate 110.

When plastic is used as the substrate 110, a process such as vapor deposition, etching, etc. can be performed in a state where the plastic substrate is disposed on a carrier substrate made of a highly durable material such as glass.

The light blocking layer 180 prevents the oxide semiconductor layer 130 from being damaged by light incident from the outside. The light blocking layer 180 may be made of a material that reflects or absorbs light, for example, an electrically conductive material such as a metal.

Referring to FIG. 4B, a buffer layer 121 is formed on a substrate 110 including a light blocking layer 180. The buffer layer 121 may be formed of silicon oxide or silicon nitride. The buffer layer 121 may have a single-layer or multi-layer structure.

Referring to FIG. 4C, an oxide semiconductor material layer 135 is formed on the buffer layer 121. The oxide semiconductor material layer 135 is made of an oxide semiconductor material. For example, the oxide semiconductor material layer 135 may be formed of an oxide semiconductor material such as IZO (InZnO), IGO (InGaO), ITO, InGaZnO, IGZTO, InSnZnO) based oxide semiconductor material. The oxide semiconductor material layer 135 may be formed by vapor deposition or sputtering.

A photoresist layer 175 is formed on the oxide semiconductor material layer 135 layer. The photoresist layer 175 may be made of, for example, a negative type photoresist.

Next, after the pattern mask 210 is disposed on the photoresist layer 175, exposure is performed. The pattern mask 210 includes a light shielding portion 211, a translucent portion 212, and a transparent portion 213. And the light L1 is irradiated through the pattern mask 210 to perform selective exposure. Ultraviolet rays may be irradiated for exposure.

Referring to FIG. 4D, a photoresist pattern 176 is formed by exposure and development using the pattern mask 210. Etching is performed using the photoresist pattern 176 as a mask. As a method of etching, dry etching (D / E) may be applied. A gas containing fluorine may be used for dry etching (D / E). As the gas containing fluorine, for example, nitrogen trifluoride (NF ₃ ) may be used.

Referring to FIG. 4E, the oxide semiconductor layer 130 is formed by dry etching (D / E), and the oxide semiconductor layer 130 is doped with fluorine (F).

More specifically, after the oxide semiconductor layer 130 is formed by dry etching (D / E), fluorine contained in the gas used for the dry etching (D / E) can be doped into the oxide semiconductor layer 130 . The step of doping fluorine (F) may include, for example, applying NF ₃ gas onto the oxide semiconductor layer 130.

At this time, the residual pattern 177, which is a part of the photoresist pattern remaining after the dry etching (D / E), acts as a doping mask. The residual pattern 177 is located on the channel portion 131. By the residual pattern 177, the channel portion 131 is not doped with fluorine, and the region other than the channel portion 131 is doped with fluorine. This fluorine doping forms the connecting portions 133a and 133b (see FIG. 4F). The connection portions 133a and 133b that are made conductive by fluorine doping have excellent conductivity and can have a high carrier density.

Referring to FIG. 4F, ultraviolet light L2 is irradiated onto the fluorine-doped oxide semiconductor layer 130. At this time, the residual pattern 177 blocks the ultraviolet ray L2. As a result, ultraviolet light L2 can be irradiated to only the connecting portions 133a and 133b. Hydrogen is removed by ultraviolet irradiation, so that the connecting portions 133a and 133b can be stabilized. The ultraviolet ray may have a wavelength of (L2), for example, 150 nm to 300 nm.

Referring to FIG. 4G, after the fluorine doping and ultraviolet irradiation, the residual pattern 177 is removed to complete the oxide semiconductor layer 130 having the channel portion 131 and the connecting portions 133a and 133b.

Referring to FIG. 4H, a gate insulating layer 120 is formed on the oxide semiconductor layer 130. A gate insulating film 120 is formed on the entire surface of the oxide semiconductor layer 130. Referring to FIGS. 4E to 4G, the step of doping fluorine is performed prior to the step of forming the gate insulating film 120.

Since the gate insulating film 120 completely covers the surface of the oxide semiconductor layer 130, the risk of leakage current or short circuit between the gate electrode 140 and the oxide semiconductor layer 130 is prevented, . Therefore, even if the gate insulating film 120 has a small thickness, a leakage current or a short circuit between the gate electrode 140 and the oxide semiconductor layer 130 can be prevented.

Referring to FIG. 4I, a gate electrode 140 is formed on the gate insulating layer 120. The gate electrode 140 is insulated from the oxide semiconductor layer 130 and overlapped with the channel portion 131.

Referring to FIG. 4J, an interlayer insulating film 170 is formed on the gate electrode 140. The interlayer insulating layer 170 may be formed of an organic material, an inorganic material, or a laminate of an organic material layer and an inorganic material layer.

Referring to FIG. 4K, the source electrode 150 and the drain electrode 160 are formed on the interlayer insulating layer 170. [0154] Referring to FIG. The source electrode 150 and the drain electrode 160 are spaced apart from each other and connected to the oxide semiconductor layer 130, respectively.

The source electrode 150 and the drain electrode 160 are formed by etching at least two contact holes that partially expose the oxide semiconductor layer 130 by etching the interlayer insulating layer 170 and the gate insulating layer 120, The source electrode 150 and the drain electrode 160 may be connected to the oxide semiconductor layer 130, respectively.

The source electrode 150 is connected to the oxide semiconductor layer 130 at the first connection portion 133a and the drain electrode 160 is connected to the oxide semiconductor layer 130 at the second connection portion 133b. As a result, a thin film transistor 200 as shown in FIG. 4K is produced.

5A to 5C are schematic views for explaining the conduction and stabilization of the oxide semiconductor layer 130 by fluorine doping and ultraviolet irradiation.

5A, an oxide semiconductor layer containing indium (In), gallium (Ga), zinc (Zn), and oxygen (O) as a metal M has an oxygen vacancy VO, It has hydrogen (H) combined with oxygen (O)

Referring to FIG. 5B, fluorine (F) is filled in an oxygen vacancy site by fluorine (F) doping, and oxygen (O) is substituted by fluorine (F). The oxide semiconductor layer is doped with fluorine (F), so that free electrons (e-) are generated, and the oxide semiconductor layer becomes conductive.

Referring to FIG. 5C, when ultraviolet rays are irradiated to the fluorine (F) -doped oxide semiconductor layer, oxygen vacancies (Vo) are filled with oxygen (O) or fluorine (F) oxygen vacancies are filled with oxygen to stabilize the oxide semiconductor layer. As a result, the thermal stability of the connecting portions 133a and 133b is improved.

The binding energy of oxygen and fluorine is shown in Table 1 below.

Binding energy of oxygen Bonding energy of fluorine Type of coupling Bond energy (KJ / mol) Type of coupling Bond energy (KJ / mol) In-O 346 In-F 506 Ga-O 374 Ga-F 577 Zn-O 284 Zn-F 364 O-H 459 O-F 565 Si-O 452 Si-F 565

Referring to Table 1, it can be seen that the bonding energy of fluorine is greater than the bonding energy of oxygen. Thus, since the bonding energy of fluorine is greater than the bonding energy of oxygen, the fluorine bond is more stable than the oxygen bond. Therefore, oxygen is substituted by fluorine by fluorine doping, so that the stability of the oxide semiconductor layer can be improved.

6A to 6D are a manufacturing process diagram of the thin film transistor 200 according to another embodiment of the present invention.

6A, a light blocking layer 180 is formed on a substrate 110, a buffer layer 121 is formed on the light blocking layer 180, an oxide semiconductor layer 130 is formed on the buffer layer 121, A gate insulating layer 120 is formed on the oxide semiconductor layer 130 and a gate electrode 140 is formed on the gate insulating layer 120. Here, the oxide semiconductor layer 130 is in a state before it is doped with fluorine.

Referring to FIG. 6B, the oxide semiconductor layer 130 is doped with fluorine. More specifically, fluorine is applied to the gate insulating film 120 and the gate electrode 140, so that the oxide semiconductor layer 130 is doped with fluorine. NF ₃ gas can be injected onto the gate insulating film 120 and the gate electrode 140 for fluorine application.

In the fluorine doping step shown in Fig. 6B, the gate electrode 140 acts as a mask. Since fluorine is not penetrated through the gate electrode 140 made of metal, the region overlapping with the gate electrode 140 is not doped with fluorine. Therefore, fluorine is doped only in a region not overlapping with the gate electrode 140, and a conductor is formed.

6C, a region of the oxide semiconductor layer 130 overlapped with the gate electrode 140 is not doped with fluorine to form a channel portion 131. A region that is not overlapped with the gate electrode 140 is doped with fluorine And become connection portions 133a and 133b.

Next, referring to FIG. 6D, ultraviolet rays L2 are irradiated to the oxide semiconductor layer 130 doped with fluorine. At this time, the gate electrode 140 acts as a mask for shielding ultraviolet rays, so that the ultraviolet rays L2 are not irradiated to the channel portion 131, and only ultraviolet rays are irradiated to the connection portions 133a and 133b.

7 is a schematic cross-sectional view of a display device 400 according to another embodiment of the present invention.

A display device 400 according to another embodiment of the present invention includes a substrate 110, a thin film transistor 200, and an organic light emitting diode 270 connected to the thin film transistor 200.

FIG. 7 shows a display device 400 including the thin film transistor 200 of FIG. However, another embodiment of the present invention is not limited thereto, and the thin film transistors 100 and 300 shown in FIGS. 1 and 3 may be applied to the display device 400 of FIG.

Referring to FIG. 7, a display device 400 includes a substrate 110, a thin film transistor 200 disposed on the substrate 110, and a first electrode 271 connected to the thin film transistor 200. The display device 400 also includes an organic layer 272 disposed on the first electrode 271 and a second electrode 273 disposed on the organic layer 272. [

Specifically, the substrate 110 may be made of glass or plastic. A buffer layer 121 is disposed on the substrate 110. A light blocking layer 180 is disposed between the substrate 110 and the buffer layer 121.

The thin film transistor 200 is disposed on the buffer layer 121. The thin film transistor 200 includes an oxide semiconductor layer 130 on the buffer layer 121, a gate insulating film 120 on the oxide semiconductor layer 130, a gate electrode 140 on the gate insulating film 120, an oxide semiconductor layer 130, And a drain electrode 160 spaced apart from the source electrode 150 and connected to the oxide semiconductor layer 130.

The oxide semiconductor layer 130 includes a channel portion 131 overlapping the gate electrode 140 and connection portions 133a and 133b at least a portion of which does not overlap with the gate electrode 140. [ The concentration of hydrogen H in the connecting portions 133a and 133b is lower than the concentration of hydrogen H in the channel portion 131 and the concentration of fluorine F in the connecting portions 133a and 133b is lower than the concentration of fluorine F in the channel portion 131. [ Concentration.

A passivation layer 191 may be disposed on the thin film transistor 200. The passivation layer 191 protects the thin film transistor 200. The passivation layer 191 may be omitted.

The planarization layer 190 is disposed on the passivation layer 191 to planarize the upper portion of the substrate 110. The planarizing film 190 may be formed of an organic insulating material such as acrylic resin having photosensitivity, but is not limited thereto.

The first electrode 271 is disposed on the planarization film 190. The first electrode 271 is connected to the drain electrode 160 of the thin film transistor 200 through a contact hole provided in the planarization layer 190.

The bank layer 250 is disposed on the first electrode 271 and the planarizing film 190 to define a pixel region or a light emitting region. For example, the bank layer 250 is arranged in a matrix structure in a boundary region between a plurality of pixels, whereby a pixel region can be defined.

The organic layer 272 is disposed on the first electrode 271. The organic layer 272 may also be disposed on the bank layer 250. That is, the organic layer 272 may not be separated for each pixel but may be connected to each other between adjacent pixels.

The organic layer 272 includes an organic light emitting layer. The organic layer 272 may include one organic light emitting layer, and may include two organic light emitting layers stacked one above the other or an organic light emitting layer. In this organic layer 272, light having any one of red, green, and blue colors may be emitted, and white light may be emitted.

The second electrode 273 is disposed on the organic layer 272.

The first electrode 271, the organic layer 272 and the second electrode 273 are laminated to form the organic light emitting diode 270. The organic light emitting diode 270 may function as a light amount adjusting layer in the display device 400.

Although not shown, when the organic layer 272 emits white light, a color filter for filtering the white light emitted from the organic layer 272 by wavelength may be used for the individual pixels. The color filter is disposed on the movement path of the light. In the case of the so-called bottom emission method in which the light emitted from the organic layer 272 advances toward the lower substrate 110, the color filter is disposed below the organic layer 272, A color filter is disposed on the organic layer 272 in the case of the so-called top emission method in which the light is emitted toward the upper second electrode 273.

8 is a schematic cross-sectional view of a display device 500 according to another embodiment of the present invention.

8, a display device 500 according to another embodiment of the present invention includes a substrate 110, a thin film transistor 200 disposed on the substrate 110, a first thin film transistor 200 connected to the thin film transistor 200, Electrode 381 as shown in FIG. The display device 500 also includes a liquid crystal layer 382 on the first electrode 381 and a second electrode 383 on the liquid crystal layer 382.

The liquid crystal layer 382 serves as a light amount adjusting layer. Thus, the display device 500 shown in Fig. 8 is a liquid crystal display device including a liquid crystal layer 382. Fig.

8 includes a substrate 110, a thin film transistor 200, a planarization film 190, a first electrode 381, a liquid crystal layer 382, a second electrode 383, A barrier layer 320, color filters 341 and 342, a light shielding portion 350, and an opposite substrate 310. [

The substrate 110 may be made of glass or plastic. A buffer layer 121 is disposed on the substrate 110. A light blocking layer 180 is disposed between the substrate 110 and the buffer layer 121.

Referring to FIG. 8, a thin film transistor 200 is disposed on a buffer layer 121 on a substrate 110. The thin film transistor 200 includes an oxide semiconductor layer 130 on the buffer layer 121, a gate insulating film 120 on the oxide semiconductor layer 130, a gate electrode 140 on the gate insulating film 120, an oxide semiconductor layer 130, And a drain electrode 160 spaced apart from the source electrode 150 and the source electrode 150 and connected to the oxide semiconductor layer 130.

The oxide semiconductor layer 130 includes a channel portion 131 overlapping the gate electrode 140 and connection portions 133a and 133b at least a portion of which does not overlap with the gate electrode 140. [ The concentration of hydrogen H in the connecting portions 133a and 133b is lower than the concentration of hydrogen H in the channel portion 131 and the concentration of fluorine F in the connecting portions 133a and 133b is lower than the concentration of fluorine F in the channel portion 131. [ Concentration.

A passivation layer 191 is disposed on the thin film transistor 200. The passivation layer 191 protects the thin film transistor 200. The passivation layer 191 may be omitted. The planarization layer 190 is disposed on the passivation layer 191 of the thin film transistor 200 to planarize the upper portion of the substrate 110.

The first electrode 381 is disposed on the planarization film 190. The first electrode 381 is connected to the drain electrode 160 of the thin film transistor 200 through a contact hole provided in the planarization layer 190.

The counter substrate 310 is disposed opposite to the substrate 110.

And the light shielding portion 350 is disposed on the counter substrate 310. [ The light shielding portion 350 has a plurality of openings. The plurality of openings are arranged corresponding to the first electrode 381 which is a pixel electrode. The light shielding portion 350 shields light from the portions excluding the openings. The light shielding portion 350 is not necessarily required, and may be omitted.

The color filters 341 and 342 are disposed on the counter substrate 310 and selectively block the wavelength of light incident from the backlight unit (not shown). Specifically, the color filters 341 and 342 may be disposed in a plurality of openings defined by the light shielding portion 350. [ Each of the color filters 341 and 342 can represent any one of red, green, and blue colors. Each of the color filters 341 and 342 may represent a color other than red, green, and blue.

The barrier layer 320 may be disposed on the color filters 341 and 342 and the light-shielding portion 350. The barrier layer 320 may be omitted.

The second electrode 383 is disposed on the barrier layer 320. For example, the second electrode 383 may be positioned on the front surface of the counter substrate 310. The second electrode 383 may be formed of a transparent conductive material such as ITO or IZO.

The first electrode 381 and the second electrode 383 are opposed to each other and a liquid crystal layer 382 is disposed therebetween. The second electrode 383 applies an electric field to the liquid crystal layer 382 together with the first electrode 381.

When the opposing surfaces between the substrate 110 and the opposing substrate 310 are defined as upper surfaces of the corresponding substrates and the surfaces opposite to the upper surfaces are respectively defined as the lower surface of the substrate 110, And the polarizing plate may be disposed on the lower surface of the counter substrate 310, respectively.

FIGS. 9A to 9E show the manufacturing process of the thin film transistor according to the comparative example.

9A, a light blocking layer 180 is formed on a substrate 110, a buffer layer 121 is formed on the light blocking layer 180, an oxide semiconductor layer 130 is formed on the buffer layer 121, A gate insulating layer 120 is formed on the oxide semiconductor layer 130 and a gate electrode 140 is formed on the gate insulating layer 120. The gate insulating layer 120 is patterned similarly to the gate electrode 140. In Fig. 9A, the oxide semiconductor layer 130 is in a state before it is doped with fluorine.

Referring to FIG. 9B, the oxide semiconductor layer 130 is doped with hydrogen (H). Hydrogen is applied onto the oxide semiconductor layer 130 for hydrogen doping. For hydrogen application, a gas such as SiH ₄ or NH ₃ may be implanted into the oxide semiconductor layer 130.

In the hydrogen doping step shown in Fig. 9B, the gate electrode 140 and the gate insulating film 120 act as masks. As a result, hydrogen is not doped in the region of the oxide semiconductor layer 130 overlapping with the gate electrode 140, and hydrogen is doped only in a region not overlapping the gate electrode 140, thereby making it conductive.

Referring to FIG. 9C, a region of the oxide semiconductor layer 130 overlapping with the gate electrode 140 is not doped with hydrogen to form a channel portion 131, and a region not overlapped with the gate electrode 140 is doped with hydrogen And become connection portions 133a and 133b.

9C, when the gate insulating layer 120 is patterned, a leakage current flows between the gate electrode 140 and the oxide semiconductor layer 130 due to a residue or other impurities of the gate electrode 140 forming material Or a short between the gate electrode 140 and the oxide semiconductor layer 130 may occur. In addition, the oxide semiconductor layer 130 may be damaged during the patterning process. As a result, the reliability of the thin film transistor can be lowered.

Next, referring to FIG. 9D, an interlayer insulating layer 170 is disposed on the entire surface of the substrate including the oxide semiconductor layer 130 and the gate electrode 140.

Referring to FIG. 9E, the source electrode 150 and the drain electrode 160 are formed on the interlayer insulating layer 170. [0156] FIG. The source electrode 150 and the drain electrode 160 are spaced apart from each other and connected to the oxide semiconductor layer 130, respectively.

The interlayer insulating layer 170 may be formed or the source electrode 150 and the drain electrode 160 may be heat-treated. Since hydrogen does not form a stable bond in the oxide semiconductor layer 140, hydrogen may be released from the connecting portions 133a and 133b by the heat treatment, and the resistance of the connecting portions 133a and 133b may be increased. As a result, electrical connection characteristics between the connection portions 133a and 133b and the source electrode 150 or the drain electrode 160 may be degraded.

In addition, when the hydrogen released from the connection portions 133a and 133b moves to the channel portion 131, the channel portion 131 may be made conductive and driving characteristics or switching characteristics of the TFT may be deteriorated.

A step is formed on the source electrode 150 and the drain electrode 160 or on the data wiring portion and the gate wiring portion due to the step difference due to the patterning of the gate insulating film 120, .

10 is a result of measuring the resistance of the first connection portion 133a over time while keeping the temperature at 300 ° C by applying heat to the thin film transistor according to the comparative example. Referring to FIG. 10, it can be seen that the resistance of the first connection portion 133a increases with time. The increase in the resistance shown in FIG. 10 means that the hydrogen contained in the first connection portion 133a is removed by the heat treatment. Due to the hydrogen desorption, the electrical characteristics of the first connection portion 133a are lowered, and the separated hydrogen may affect the channel portion 131. [

11 is a result of measuring the resistance of the first connection portion 133a with time while maintaining the temperature of 300 DEG C by applying heat to the thin film transistor 200 of FIG. Referring to FIG. 11, it can be seen that the resistance of the first connection part 133a does not greatly increase even if the time passes. In the thin film transistor 200 according to another embodiment of the present invention, the first connection portion 133a of the oxide semiconductor layer 130 is doped with fluorine rather than hydrogen. Unlike hydrogen, fluorine forms a stable bond in the oxide semiconductor layer 130, and thus is not removed by heat treatment. As a result, the electrical characteristics of the first connection portion 133a are not lowered, and the conduction of the channel portion 131 is not generated.

As described above, the thin film transistor according to an embodiment of the present invention has excellent reliability. In addition, the display device according to an embodiment of the present invention including such a thin film transistor can also have excellent reliability.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Will be apparent to those of ordinary skill in the art. Accordingly, the scope of the present invention is defined by the appended claims, and all changes or modifications derived from the meaning, scope, and equivalence of the claims are to be construed as being included within the scope of the present invention.

100, 200, 300: Thin film transistor
110: substrate 120: gate insulating film
130: oxide semiconductor layer 131: channel part
133a: first connection part 133b: first connection part
140: gate electrode 150: source electrode
160: drain electrode 170: interlayer insulating film
180: light blocking layer 190: planarization film
250: bank layer 270: organic light emitting element
271, 381: first electrode 272: organic layer
273, 383: second electrode 310: opposing substrate
341, 342: Color filter 350:
382: liquid crystal layer 400, 500: display device

Claims (11)

An oxide semiconductor layer on a substrate;
A gate insulating film on the oxide semiconductor layer;
A gate electrode over the gate insulating film at least partially overlapping the oxide semiconductor layer;
A source electrode connected to the oxide semiconductor layer; And
And a drain electrode spaced apart from the source electrode and connected to the oxide semiconductor layer,
The oxide semiconductor layer includes a channel portion overlapping the gate electrode; And a connection portion at least a portion of which does not overlap the gate electrode,
The hydrogen concentration of the connecting portion is lower than the hydrogen concentration of the channel portion,
The concentration of fluorine (F) in the connection portion is higher than the concentration of fluorine (F) in the channel portion,
Thin film transistor. The method according to claim 1,
And the gate insulating film is disposed on the entire surface of the oxide semiconductor layer in the direction opposite to the substrate. The method according to claim 1,
And the connection portion has a fluorine concentration of 0.1 to 10 atomic% (at%). The method according to claim 1,
Wherein the connection portion has a hydrogen concentration of 1/10 to 1/1000 of the channel portion. Forming an oxide semiconductor layer on the substrate;
Doping the oxide semiconductor layer with fluorine (F);
Irradiating the fluorine-doped oxide semiconductor layer with ultraviolet light;
Forming a gate insulating film on the oxide semiconductor layer;
Forming a gate electrode on the gate insulating film at least partially overlapping with the oxide semiconductor layer; And
And forming a source electrode and a drain electrode which are connected to the oxide semiconductor layer and are spaced apart from each other,
A method of manufacturing a thin film transistor. 6. The method of claim 5,
Wherein the gate insulating film is formed on the entire surface of the oxide semiconductor layer. 6. The method of claim 5,
Wherein the step of doping the fluorine (F) is performed before the step of forming the gate insulating film. 6. The method of claim 5,
Wherein the step of doping the fluorine (F) is performed after the step of forming the gate electrode. 6. The method of claim 5,
Wherein a connection portion of the oxide semiconductor layer is formed by the fluorine doping and the ultraviolet irradiation, and the connection portion is doped to have a fluorine concentration of 0.1 to 10 atomic% (at%). 6. The method of claim 5,
Before forming the oxide semiconductor layer,
Forming a light blocking layer on the substrate; And
And forming a buffer layer on the light blocking layer,
Wherein the oxide semiconductor layer is formed so as to overlap with the light blocking layer in plan view. Board;
A thin film transistor disposed on the substrate; And
And a first electrode connected to the thin film transistor,
The thin-
An oxide semiconductor layer on the substrate;
A gate insulating film on the oxide semiconductor layer;
A gate electrode over the gate insulating film at least partially overlapping the oxide semiconductor layer;
A source electrode connected to the oxide semiconductor layer; And
And a drain electrode spaced apart from the source electrode and connected to the oxide semiconductor layer,
The oxide semiconductor layer includes a channel portion overlapping the gate electrode; And a connection portion at least a portion of which does not overlap the gate electrode,
The hydrogen concentration of the connecting portion is lower than the hydrogen concentration of the channel portion,
The concentration of fluorine (F) in the connection portion is higher than the concentration of fluorine (F) in the channel portion,
Display device.

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