KR20190014945A - Organic light emitting diode display device and sensing method thereof - Google Patents

Abstract

The present invention relates to an organic light emitting diode display device capable of preventing an image quality defect due to a difference between a sensing value and compensation value in a transition period of an EVDD level and a sensing method thereof. According to one embodiment of the present invention, the organic light emitting diode display device comprises: a host set varying a high potential drive voltage according to a luminance analysis result of an input image; and a timing controller detecting a level transition period in which a level of the high potential drive voltage is gradually varied and controlling a sensing operation for a panel during the level transition period.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic light emitting diode (OLED) display device and a method of sensing the OLED display device.

The present invention relates to an organic light emitting diode (OLED) display device and a sensing method thereof that can prevent an image quality failure due to a difference between a sensing value and a compensation value in a transition period of a high potential driving voltage.

2. Description of the Related Art Recently, display devices using digital data to display images include liquid crystal displays (LCDs) using liquid crystals, organic light emitting diodes (OLED) displays using organic light emitting diodes, And an electrophoretic display (EPD).

Of these, OLED display devices are self-luminous devices that emit organic light-emitting layers by recombination of electrons and holes, and are expected to be a next-generation display device because of their high luminance, low driving voltage, and ultra thin films.

Each pixel constituting the OLED display device has an OLED element and a pixel circuit which independently drives the OLED element. The pixel circuit adjusts the brightness of the OLED element by adjusting the current Ids driving the OLED element by a driving thin film transistor (hereinafter, TFT) according to the driving voltage Vgs corresponding to the image data.

The OLED display device displays the current Ids with respect to the driving voltage Vgs of the same gradation when the characteristics of the subpixel are not uniform due to the threshold voltage (Vth) of the driving TFT, mobility, etc., The luminance unevenness may occur.

In order to solve this problem, an OLED display device mainly uses an external compensation technique for sensing characteristics of subpixels and compensating for characteristic deviations of subpixels based on sensing results.

Among the characteristics of each subpixel, since the mobility characteristics of the TFT are sensitive to the temperature change, the OLED display device changes the position of the subpixel sensed for each blank period of the frame during the display operation, And the mobility compensation value is updated.

In order to reduce the power consumption, the OLED display device has a dynamic power control (hereinafter referred to as " dynamic power control ") that adjusts the peak luminance (maximum white luminance) according to the input image and varies the high- ; DPC) operation is applied.

However, in the conventional OLED display device, the current value of the driving TFT varies depending on the change of the EVDD level in the transition period in which the EVDD level is variable. As a result, the mobility sensing value sensed from the subpixel in the section where the EVDD level changes is different from the previous sensing value. Therefore, the mobility sensing value and the mobility compensation value using the mobility sensitivity value include an error component due to the EVDD transition, so that the compensation accuracy of each subpixel is degraded, thereby causing a problem of image quality failure such as a horizontal line.

The present invention provides an organic light emitting diode (OLED) display device and a sensing method thereof that can prevent a picture quality defect due to a difference between a sensing value and a compensation value in a transition period of an EVDD level.

An OLED display according to an embodiment includes a panel, a gate driver for driving the gate line of the panel, a data driver for driving the data line of the panel, and a data driver for supplying a high potential driving voltage to the panel, A timing controller for detecting a level transition period in which the level of the high potential driving voltage is gradually changed and controlling the sensing operation for the panel during the level transition period, .

The host set provides timing information of a level transition period in which the level of the high potential driving voltage is variable, to the timing controller, and the timing controller detects the level transition interval using the provided timing information.

The data driver uses the analog-to-digital converter to downscale and sense the level of the high-potential driving voltage, and the timing controller monitors the level transition interval by upscaling the level of the high-potential driving voltage sensed by the downscaling .

According to another aspect of the present invention, there is provided a method of sensing an OLED display device, comprising: varying a high-potential driving voltage according to a luminance analysis result of an input image; detecting a level transition period in which a level of a high- And controlling the mobility sensing operation for the sub-pixels of the panel during a level transition period of the high potential driving voltage.

In one embodiment, the mobility sensing operation of each sub-pixel is turned off during the level transition period of the high-potential driving voltage, the mobility sensing value sensed during the level transition period is not applied to the compensation value, The compensation value calculated from the mobility sensing value can be adjusted by applying a gain according to the level of the mobility sensing value.

In one embodiment of the present invention, a control signal indicating a dynamic power control period is supplied from a host set, or a transition period in which the EVDD level is changed can be detected by using an ADC incorporated in the data driver.

In one embodiment of the present invention, the sensing operation is turned off during the detected EVDD transition period, or the sensed values obtained by the sensing operation progressed during the detected EVDD transition period are not applied to the compensation value, so that the transition interval of the EVDD level is the sensing value It is possible to prevent an image quality defect such as a horizontal line from being reflected in the compensation value.

In an embodiment of the present invention, compensating deviations due to the transition period of the EVDD level can be reduced by adjusting the compensation value by applying a gain according to the EVDD level during the transition period of the detected EVDD level, thereby improving the image quality defect.

1 is a block diagram schematically showing a configuration of an OLED display device according to an embodiment of the present invention.
2 is an equivalent circuit diagram illustrating a pixel circuit according to an embodiment of the present invention.
3 is a graph illustrating variation characteristics of peak brightness and EVDD level according to APL in a host set according to an exemplary embodiment of the present invention.
4 is a timing diagram showing a transition period of an EVDD level according to an embodiment of the present invention.
5 is a diagram illustrating a host set and a timing controller according to an embodiment of the present invention.
6 is a diagram illustrating a data driver and a timing controller according to an embodiment of the present invention.
FIG. 7 is a timing chart illustrating a real time sensing timing of an OLED display according to an exemplary embodiment of the present invention. Referring to FIG.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a system block diagram schematically showing an OLED display device according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram illustrating a pixel circuit according to an embodiment of the present invention.

Referring to FIG. 1, an OLED display includes a host set 700 and a display module 600. The display module 600 includes a timing controller 400, a memory 500, a data driver 300 and a gate driver 200 which are panel driving units, a panel 100, and the like.

The host set 700 may be any one of a system of a portable terminal such as a computer, a TV system, a set-top box, a tablet or a cellular phone. The host set 700 includes an image processing unit such as a system on chip (SoC). The host set 700 performs necessary image processing such as scaling an image to be displayed on the display module 600 in accordance with the resolution of the display module 600 and then outputs the processed image source together with timing control signals To the timing controller (400) of the display module (600). The timing control signals may include a dot clock, a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and the like. The host set 700 can control the sensing operation of the timing controller 400.

The host set 700 generates a high potential driving voltage (EVDD) required for driving each subpixel SP of the panel 100 and supplies the high potential driving voltage (EVDD) to the display module 600 through the power cable. The EVDD supplied from the host set 700 to the display module 600 is supplied to the panel 100 via a control PCB (Printed Circuit Board), a source PCB and the like mounted with the timing controller 400 and the like and the data driver 300 .

The panel 100 displays an image through a pixel array in which sub-pixels SP are arranged in a matrix form. The basic pixel can be composed of at least three subpixels capable of white representation by color mixing among white (W), red (R), green (G) and blue (B) subpixels. For example, the basic pixel may be subpixels of R / G / B combination, subpixels of W / R / G combination, subpixels of B / W / R combination, subpixels of G / Or a combination of W / R / G / B combinations of subpixels.

2, each of the subpixels SP includes an OLED element 10 (a first driving voltage) connected between an EVDD (first driving voltage) line PW1 and a low potential driving voltage And a pixel circuit including at least a first and a second switching TFTs ST1 and ST2 and a driving TFT DT and a storage capacitor Cst for driving the OLED element 10 independently. On the other hand, the pixel circuit may have various configurations different from the configuration of FIG.

The switching TFTs ST1 and ST2 and the driving TFT DT may be an amorphous silicon (a-Si) TFT, a poly-Si TFT, an oxide TFT, an organic TFT or the like have.

The OLED element 10 has an anode connected to the source node N2 of the driving TFT DT, a cathode connected to the EVSS line PW2, and an organic light emitting layer between the anode and the cathode. The anode is independent for each subpixel, but the cathode may be a common electrode shared by all the subpixels. When a driving current is supplied from the driving TFT DT, electrons from the cathode are injected into the organic light-emitting layer, holes from the anode are injected into the organic light-emitting layer, and electrons and holes recombine in the organic light- By emitting phosphors, light of brightness proportional to the current value of the drive current is generated.

The first switching TFT ST1 is driven by the first gate signal SCAN supplied from the gate driver 200 to the first gate line GLn1 and supplied from the data driver 300 to the data line DL And supplies the data voltage Vdata to the gate node N1 of the driving TFT DT.

The second switching TFT ST2 is driven by the second gate signal SENSE supplied from the gate driver 200 to the second gate line GLn2 and supplied from the data driver 300 to the reference line REF And supplies the reference voltage Vref to the source node N2 of the driving TFT DT. Further, when each sub-pixel SP is driven in the sensing mode, the second switching TFT ST2 outputs the current supplied from the driving TFT DT to the floating reference line REF.

The storage capacitor Cst connected between the gate node N1 and the source node N2 of the driving TFT DT is connected to the gate node N1 through the first and second switching TFTs ST1 and ST2 turned on during the scan period The difference voltage between the data voltage Vdata and the reference voltage Vref supplied to the first and second switching TFTs N1 and N2 is charged to the driving voltage Vgs of the driving TFT DT, ST1, and ST2 are turned off.

The driving TFT DT controls the current supplied from the EVDD line PW1 in accordance with the driving voltage Vgs supplied from the storage capacitor Cst to drive the driving current determined by the driving voltage Vgs to the OLED element 10 Thereby causing the OLED element 10 to emit light.

The driving TFT DT supplies data from the data driver 300 to the data line DL and the first data line DL during the scan period of the first and second gate signals SCAN and SENSE, A sensing data voltage Vdata supplied through the switching TFT ST1 and a reference voltage Vref supplied through the reference line REF and the second switching TFT ST2. The current of the driving TFT DT reflecting the driving characteristic (Vth, mobility) of the driving TFT DT is charged with the voltage to the line capacitor of the reference line REF through the second switching TFT ST2, ).

The gate driver 200 receives a gate control signal from the timing controller 400 and drives a plurality of gate lines of the panel 100. The gate driver 200 supplies a pulse of a gate-on voltage to the corresponding gate line during the driving (scanning) period of each gate line, and supplies a gate-off voltage during the non-driving period. The gate driver 200 may be disposed on both sides of the panel 100 and the gate signal may be simultaneously supplied from both sides of each gate line to reduce the delay of the gate signal.

 The gate driver 200 includes a plurality of gate ICs (integrated circuits) for dividing and driving the gate lines, and each gate IC is individually mounted on a circuit film such as a COF (Chip On Film) Or may be attached to both sides. Alternatively, the gate driver 200 may be formed in a GIP (Gate In Panel) type which is formed directly in the non-display area of the substrate together with the TFT array of the pixel array of the panel 100 and embedded in the panel 100. [

The data driver 300 converts the data supplied from the timing controller 400 into an analog data voltage and supplies the data voltage to the panel 100 using the data control signal supplied from the timing controller 400. The data driver 300 converts the digital data into the analog data voltage using the gradation-specific gamma voltage supplied from the gamma voltage generator.

The data driver 300 includes a plurality of data ICs for dividing and driving the data lines, and each data IC may be mounted on each circuit film and attached to the panel 100.

The data driver 300 supplies the data voltages for sensing as data lines to drive the respective sub pixels in the sensing mode under the control of the timing controller 400 and controls the driving characteristics of the driven sub pixels SP (Vth of the OLED, Vth of the OLED, etc.) is sensed as a voltage through the reference line, converted into digital sensing information (sensing data), and provided to the timing controller 400. [

The timing controller 400 drives the data driver 300 and the gate driver 200 using the timing control signals supplied from the host set 700 and the timing setting information (start timing, pulse width, etc.) And generates and supplies data control signals and gate control signals for controlling the respective timings.

The timing controller 400 compensates the image data supplied from the host set 700 using the compensation value stored in the memory 500 and supplies the compensated image data to the data driver 300. The timing controller 400 may further perform various image processing for compensating degradation of the OLED elements.

The timing controller 400 controls the display module 600 to operate in the sensing mode and controls the characteristics of each subpixel of the display panel 100 (Vth of the driving TFT, mobility, Vth, etc.) and can update the compensation information for each subpixel stored in the memory 500 using the sensing result.

For example, the timing controller 400 uses the information obtained by sensing the linear section in which the source voltage increases by driving the driving TFT in each sub-pixel, and calculates the mobility variation amount of the driving TFT sensitive to the driving environment such as temperature and light And updates the mobility compensation value of each sub pixel stored in the memory 500 using the calculation result. Since the mobility sensing for updating the mobility compensation value operates in a fast mode in which the sensing time is relatively short, an on sensing mode (ON RF), which is mainly allocated to the power on period, And a real-time sensing mode (RT) allocated to the blank period of the second memory.

The timing controller 400 senses the Vth of the driving TFT by using information obtained by sensing a period in which the driving TFT is driven in each sub-pixel and the source voltage reaches the saturation state, The Vth compensation value of the subpixel is updated. The Vth compensation value compensates for the Vth deviation of the sub-pixel driving TFT and also compensates for the Vth shifted by the electrical stress while the driving time has elapsed. Since the Vth sensing for updating the Vth compensation value operates in a slow mode requiring a longer sensing time than the fast mode described above, the Vth sensing can be performed in an off-sensing mode (OFF RS) assigned to a power-off period.

In order to reduce power consumption, the host set 700 detects an average picture level (APL) through an image analysis on a frame-by-frame basis with respect to an input image, and calculates a peak luminance And performs a dynamic power control (DPC) operation to vary the EVDD level of the display module 600 according to the adjusted peak luminance.

Referring to FIG. 3, in order to reduce power consumption, peak luminance in the host set 700 is determined to be in inverse proportion to APL. The peak luminance and the EVDD level gradually decrease as the APL is larger (the brightest image), and the smaller the APL (the darker the image), the more gradually the peak luminance and the EVDD level increase. The peak luminance and the EVDD level are maintained in the section where the APL is less than 30%.

Referring to FIG. 4, it can be seen that while the host set 700 changes the EVDD level from EVDD1 to EVDD2 by the DPC operation, the EVDD level has a transition period that gradually increases or decreases with a slope. When the current Ids of the driving TFT DT is sensed in the transition period of the EVDD level, the current amount Ids may be changed in accordance with the sensing timing, and may be reflected as an error component in the sensing value and the compensation value, resulting in image quality failure.

In order to prevent this, the timing controller 400 detects a transition period of the EVDD level in which the EVDD level is varied by the DPC operation of the host set 700 and controls the real-time mobility sensing operation during the transition period of the detected EVDD level .

The timing controller 400 does not apply the mobility sensing values obtained by the sensing operation progressed during the detected EVDD transition period to the compensation value, by turning off the mobility sensing during the detected transition period, so that the transition interval of the EVDD level becomes the sensing value And the compensation value. The timing controller 400 stores the number of the horizontal line on which the mobility sensing is performed in the memory when the mobility sensing is turned off during the detected transition period and moves from the next horizontal line of the stored horizontal line when the transition interval is completed The sensing operation can be performed.

Meanwhile, the timing controller 400 can reduce the compensation deviation due to the transition period of the EVDD level by adjusting the compensation value by applying the gain according to the EVDD level during the transition period of the detected EVDD level. For this purpose, the gain according to the EVDD level during the transition period of the EVDD level may be preset in the form of a look-up table (LUT) and stored in the memory 500.

5 is a diagram illustrating a host set and a timing controller according to an embodiment of the present invention.

Referring to FIG. 5, the timing controller 400 according to an exemplary embodiment may receive timing information (DPS start / done) of an EVDD transition interval from a host set 700 and detect a transition interval of the EVDD. The transition period of the EVDD is determined by the power characteristics of the host set 700. [ The EVDD transition period determined according to the power characteristic of the host set 700, the level difference of the transition interval of EVDD, and the like can be preset and stored in the LUT form in the host set 700. The host set 700 supplies timing information for a transition interval of EVDD, that is, start timing information (DPS start) and completion timing information (DPS done) of the EVDD transition period, which is varied by the DPC operation, to the timing controller 400 ).

6 is a diagram illustrating a sensing unit of a timing controller and a data driver according to an embodiment of the present invention.

Referring to FIG. 6, the timing controller 400 can detect a transition period of the EVDD level by sensing the EVDD level using the ADC 310 incorporated in the data driver 300.

The ADC 310 incorporated in the data driver 300 senses the characteristics of each subpixel SP through a sampling switch SAM and a reference line REF.

The data driver 300 may sense the EVDD level using the ADC 310. [ The EVDD input to the data driver 300 is reduced to the sensing range of the ADC 310 by the downscaler 320 and then supplied to the ADC 310 via the switch SW. The ADC 310 converts the downscaled EVDD level into sensing data and provides it to the timing controller 400.

The EVDD detection unit 410 incorporated in the timing controller 400 upsamples the sensing data of the EVDD supplied from the data driver 300 to the original EVDD level and then monitors the EVDD level to detect the transition period of the EVDD have.

FIG. 7 is a timing chart illustrating a real time sensing timing of an OLED display according to an exemplary embodiment of the present invention. Referring to FIG.

Referring to FIG. 7, each frame for displaying an image includes a writing period corresponding to the active period of the vertical synchronizing signal, and a blank period. The OLED display according to an exemplary embodiment senses the mobility of each sub-pixel while changing the position of the sub-pixel sensed for each blank period of each frame, and updates the mobility compensation value using the sensing result.

The timing controller 400 transmits the pixel data of the corresponding frame to the data driver 300 during the writing period of each frame and sequentially transmits the sensing data and the recovery data to the data driver 300 in the blank period. The recovery data is supplied to the corresponding subpixel in order to recover the driving state (the voltage state of the gate electrode and the source electrode of the driving transistor) of the subpixel supplied with the sensing data and operating in the sensing mode, 300 supplies the pixel data of the last horizontal line supplied to the previous frame (N-1) to the data driver 300 as recovery data.

The data driver 300 supplies the pixel data to the panel 100 in the lighting period of each frame so that pixel data is written to each subpixel SP line by line. The data driver 300 supplies sensing data to corresponding subpixels in a horizontal line in each frame in a blank period, drives the sensing data, and then senses the characteristics of the subpixels and supplies a sensing result to the timing controller 400 . The timing controller 400 updates the mobility compensation value of the memory 500 using the sensing result. The data driver 300 supplies the recovery data to the corresponding subpixels of the corresponding horizontal line to restore the state of the sensed subpixels to a display operation state similar to the unsensitized subpixels.

The timing controller 400 senses the mobility characteristics of subpixels of the Nth horizontal line in the blank period of the N frame through the data driver 300 and updates the mobility compensation value of the corresponding subpixels in the memory 500, The mobility characteristic of the subpixels of the (N + 1) -th line is sensed in the blank period of the (N + 1) -th frame to update the mobility compensation value of the corresponding subpixels in the memory 500, The mobility characteristic of the subpixels in the line is sensed to update the mobility compensation value of the corresponding subpixels in the memory 500.

The timing controller 400 can separate and detect the sub-pixels of the corresponding horizontal line in each blank period. For example, when the panel 100 has N horizontal lines, R sub-pixels are sensed in units of horizontal lines for every N blank frames, and W sub- It is possible to sense the pixels and then sense the B sub-pixels in the same way and then sense the G sub-pixels. Therefore, since the mobility characteristic for the subpixels of the entire panel 100 is sensed over the blank period of 4N frames, the mobility characteristic of each subpixel can be sensed with a sensing period of 4N frames.

As described above, in one embodiment, a control signal indicating a dynamic power control period is supplied from a host set, or a transition period in which the EVDD level changes can be detected by using an ADC incorporated in the data driver.

In one embodiment, the sensing operation is turned off during the detected EVDD transition period, or the sensed values obtained by the sensing operation progressed during the detected EVDD transition period are not applied to the compensation value, so that the transition period of the EVDD level is set to the sensing value and the compensation value It is possible to prevent the image quality defect such as the horizontal line by blocking the reflection.

In an embodiment, a gain according to the EVDD level is applied during the transition period of the detected EVDD level to adjust the compensation value, thereby reducing the compensation deviation due to the transition period of the EVDD level, thereby improving the image quality defect.

The foregoing description is merely illustrative of the present invention, and various modifications may be made by those skilled in the art without departing from the spirit of the present invention. Accordingly, the embodiments disclosed in the specification of the present invention are not intended to limit the present invention. It is intended that the scope of the invention be interpreted by the claims appended hereto, and that all techniques within the scope of equivalents thereof should be construed as being included within the scope of the present invention.

100: panel 200: gate driver
300: Data driver 400: Timing controller
500: memory 600: display module
700: Host set

Claims (7)

Panel,
A gate driver for driving a gate line of the panel,
A data driver for driving the data lines of the panel;
A host set for supplying a high potential driving voltage to the panel via the data driver and varying the high potential driving voltage according to a luminance analysis result of the input image,
And a timing controller for detecting a level transition period in which the level of the high potential driving voltage gradually changes and controlling a sensing operation for the panel during the level transition period. The method according to claim 1,
The host set
Providing the timing controller with timing information of the level transition period in which the high potential driving voltage is varied according to the peak luminance of the input image and the level of the high potential driving voltage is varied,
The timing controller
And detects the level transition period using timing information of the level transition period provided from the host set. The method according to claim 1,
The data driver
Downscaling and sensing the level of the high potential driving voltage using an analog-to-digital converter that senses the characteristics of each sub-pixel through the panel,
The timing controller
Wherein the data driver detects the level transition interval by up-scaling and monitoring the level of the high-potential driving voltage sensed by the data driver. The method according to claim 2 or 3,
The timing controller
During the level transition period of the high potential driving voltage
Turning off the motion sensing operation of each sub-pixel relative to the panel,
The mobile sensing value sensed during the level transition period is not applied to the compensation value,
And adjusting a compensation value calculated from the mobility sensing value by applying a gain according to the level of the high potential driving voltage. Varying the high-potential driving voltage according to the luminance analysis result of the input image,
Detecting a level transition period in which the level of the high potential driving voltage gradually changes;
And controlling a mobility sensing operation for a sub-pixel of the panel during a level transition period of the high potential driving voltage. The method of claim 5,
The level transition period of the high potential driving voltage is detected using the timing information supplied from the host set,
Sensing a level of the high potential driving voltage through an analog-to-digital converter built in a data driver for sensing characteristics of the sub-pixel, and monitoring and detecting the sensing result. The method of claim 5,
During the level transition period of the high potential driving voltage
Turning off the motion sensing operation of each sub-pixel relative to the panel,
The mobile sensing value sensed during the level transition period is not applied to the compensation value,
And adjusting a compensation value calculated from the mobility sensing value by applying a gain according to a level of the high potential driving voltage.

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