KR20180108513A - 역방향 캐시 테이블을 이용한 하드웨어 기반 맵 가속 - Google Patents

역방향 캐시 테이블을 이용한 하드웨어 기반 맵 가속 Download PDF

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KR20180108513A
KR20180108513A KR1020180034514A KR20180034514A KR20180108513A KR 20180108513 A KR20180108513 A KR 20180108513A KR 1020180034514 A KR1020180034514 A KR 1020180034514A KR 20180034514 A KR20180034514 A KR 20180034514A KR 20180108513 A KR20180108513 A KR 20180108513A
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cache
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Korean (ko)
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제프리 먼실
잭슨 엘리스
라이언 제이. 고쓰
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시게이트 테크놀로지 엘엘씨
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1009Address translation using page tables, e.g. page table structures
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • GPHYSICS
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    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/128Replacement control using replacement algorithms adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure
    • G06F12/0897Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/123Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1024Latency reduction
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21Employing a record carrier using a specific recording technology
    • G06F2212/214Solid state disk
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/22Employing cache memory using specific memory technology
    • G06F2212/222Non-volatile memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Computer Security & Cryptography (AREA)
KR1020180034514A 2017-03-24 2018-03-26 역방향 캐시 테이블을 이용한 하드웨어 기반 맵 가속 Ceased KR20180108513A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201762476178P 2017-03-24 2017-03-24
US62/476,178 2017-03-24
US15/605,442 2017-05-25
US15/605,442 US10126964B2 (en) 2017-03-24 2017-05-25 Hardware based map acceleration using forward and reverse cache tables

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KR20180108513A true KR20180108513A (ko) 2018-10-04

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US (1) US10126964B2 (enExample)
JP (1) JP7046669B2 (enExample)
KR (1) KR20180108513A (enExample)
CN (1) CN108628772A (enExample)
TW (1) TWI673608B (enExample)

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KR20200116375A (ko) * 2019-04-01 2020-10-12 에스케이하이닉스 주식회사 메모리 시스템, 메모리 컨트롤러 및 그 동작 방법
US11537515B2 (en) 2020-03-25 2022-12-27 SK Hynix Inc. Reordering a descriptor queue while searching the queue of descriptors corresponding to map segments

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US11138069B2 (en) 2018-06-11 2021-10-05 Seagate Technology, Llc Providing additional parity for non-standard sized parity data sets
US10896002B2 (en) 2018-06-29 2021-01-19 Seagate Technology Llc Reverse directory structure in a garbage collection unit (GCU)
KR102686749B1 (ko) * 2018-11-14 2024-07-22 삼성전자주식회사 맵 스케줄링을 수행하기 위한 스토리지 장치 및 그것을 포함하는 전자 장치
CN109684238A (zh) * 2018-12-19 2019-04-26 湖南国科微电子股份有限公司 一种固态硬盘映射关系的存储方法、读取方法及固态硬盘
CN111475429B (zh) * 2019-01-24 2023-08-29 爱思开海力士有限公司 存储器访问方法
CN112835820B (zh) * 2019-11-22 2025-09-30 北京忆芯科技有限公司 快速访问hmb的方法与存储设备
US11016889B1 (en) 2019-12-13 2021-05-25 Seagate Technology Llc Storage device with enhanced time to ready performance
CN111190835B (zh) * 2019-12-29 2022-06-10 北京浪潮数据技术有限公司 一种数据写入方法、装置、设备及介质
US11726921B2 (en) 2020-05-21 2023-08-15 Seagate Technology Llc Combined page footer for parallel metadata storage
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CN111966298B (zh) * 2020-08-24 2021-07-27 深圳三地一芯电子有限责任公司 一种基于Flash存储器的倒序编程实现方法及装置
US11392499B2 (en) 2020-09-18 2022-07-19 Kioxia Corporation Dynamic buffer caching of storage devices
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JP2022144314A (ja) * 2021-03-18 2022-10-03 キオクシア株式会社 メモリシステム及びストレージ装置
TWI771079B (zh) * 2021-06-24 2022-07-11 群聯電子股份有限公司 記憶體存取方法、記憶體儲存裝置及記憶體控制電路單元
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CN114415966B (zh) * 2022-01-25 2022-08-12 武汉麓谷科技有限公司 一种kv ssd存储引擎的构建方法
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Publication number Priority date Publication date Assignee Title
KR20200116375A (ko) * 2019-04-01 2020-10-12 에스케이하이닉스 주식회사 메모리 시스템, 메모리 컨트롤러 및 그 동작 방법
US11537515B2 (en) 2020-03-25 2022-12-27 SK Hynix Inc. Reordering a descriptor queue while searching the queue of descriptors corresponding to map segments

Also Published As

Publication number Publication date
CN108628772A (zh) 2018-10-09
US10126964B2 (en) 2018-11-13
JP7046669B2 (ja) 2022-04-04
TW201903614A (zh) 2019-01-16
JP2018163659A (ja) 2018-10-18
TWI673608B (zh) 2019-10-01
US20180275899A1 (en) 2018-09-27

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