KR20180092706A - Envelope detector circuit - Google Patents

Abstract

The present invention provides an envelope detection circuit capable of suppressing that an output signal is saturated. The envelope detection circuit comprises: a first square circuit outputting current corresponding to a square signal obtained by squaring an input signal; a variable attenuator attenuating magnitude of the input signal; a second square circuit outputting current corresponding to a square signal obtained by squaring the output signal of the variable attenuator; a current circuit connected to the first square circuit and the second square circuit, receiving the signals, and differentially supplying bias current to the first square circuit and the second square circuit according to each input signal; a differential input amplifier differentially receiving the output current of the first and second square circuits and amplifying to output the output current; and a signal eliminator receiving an output signal of the differential input amplifier and removing and outputting the carrier signal.

Description

[0001] ENVELOPE DETECTOR CIRCUIT [0002]

The present invention relates to an envelope detection circuit, and more particularly, to an envelope detection circuit of a simple structure capable of suppressing saturation of an output signal, operating in a wide band, and the like.

The envelope detection circuit is widely used in various fields. For example, envelope detection circuitry can be used to measure signal power in the radio frequency (RF) band, receivers in amplitude-shift keying (ASK) or on-off keying (OOK) based communication systems, Signal generation and so on.

The output signal of the envelope detection circuit used in these various fields is changed in proportion to the magnitude of the input signal, which is one of important performances required in the field to be used.

That is, when the output signal of the envelope detection circuit is saturated as in the case where the output signal of the envelope detection circuit is saturated by inputting a large signal, the size of the input envelope signal can not be measured properly. Accordingly, when the saturated output signal is used as a control signal for automatic control, the stability of the system controlled by the control signal is lowered.

Therefore, the maximum signal size of the output of the envelope detection circuit can be controlled according to the magnitude of the input signal, so that there is a demand for a function that can be used in an area where the output signal is not saturated.

An object of the present invention is to provide an envelope detection circuit which can control an output signal not to reach a saturation region, can perform a wideband operation, and is simple and complex.

According to an aspect of the present invention, there is provided an envelope detection circuit including a first square circuit for outputting a current corresponding to a squared signal obtained by squaring an input signal, a variable attenuator for attenuating the amplitude of the input signal, A second square circuit for outputting a current corresponding to a squared signal obtained by squaring the output signal of the first square circuit and the second square circuit; A differential amplifier for receiving the output currents of the first and second squaring circuits differentially and for amplifying and outputting the output currents of the differential amplifier; And a signal canceller for removing the carrier signal and outputting the carrier signal.

Also, the output size of the signal remover can be controlled according to the amount of attenuation of the variable attenuator controlled by the external control signal.

Also, the output size of the signal remover may be controlled according to the amount of attenuation of the variable attenuator fixed to a predetermined attenuation amount without the control signal of the controller.

The first square circuit receives the input signal, receives a bias current from the current circuit, and is connected to the (+) terminal of the differential input amplifier.

The variable attenuator may further include a first resistor connected to the positive input signal of the input signal and a control voltage for controlling the amount of attenuation of the first resistor, the positive output signal of the variable attenuator, (-) output signal of the second resistor, the variable attenuator, and a second resistor connected to the negative input signal of the control signal Vc And a variable attenuator second transistor connected to the variable attenuator.

The second square circuit receives the output signal of the variable attenuator, receives the bias current from the current circuit, and is connected to the negative terminal of the differential input amplifier.

The envelope detection circuit according to the present invention as described above includes a first square circuit for outputting a current corresponding to a squared signal obtained by squaring an input signal, a variable attenuator for attenuating and outputting the magnitude of the input signal, A second squaring circuit for outputting a current corresponding to the squared signal and a current circuit for supplying a bias current differentially to the first square circuit and the second squaring circuit according to input signals of the first square circuit and the second square circuit It is possible to control the maximum output size of the envelope detection circuit by controlling the attenuation amount of the variable attenuator, so that the effect of saturation of the output signal can be suppressed.

Further, since the envelope detection circuit according to the present invention can control the maximum output size of the envelope detection circuit by controlling the attenuation amount of the variable attenuator, the broadband operation can be performed more than the circuit composed of negative feedback.

Further, since the envelope detection circuit according to the present invention can control the maximum output size of the envelope detection circuit by controlling the attenuation amount of the variable attenuator, it is constituted by fewer number of blocks than the circuit composed of the local oscillator and the like, The occupied area is small and the power consumption can be lowered.

1 is a circuit diagram showing an envelope detection circuit using a diode.
2 is a circuit diagram showing an envelope detection circuit using an OP AMP.
3 is a circuit diagram showing a synchronous envelope detection circuit.
4 is a circuit diagram showing an envelope detection circuit according to the first embodiment.
5 is a circuit diagram showing the variable attenuator of FIG.
6 is a graph illustrating magnitude characteristics of a normalized input signal and an output signal according to a gain characteristic of the variable attenuator of FIG.
7 is a circuit diagram showing an envelope detection circuit according to the second embodiment.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing.

The terms first, second, A, B, etc. may be used to describe various elements, but the elements should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. And / or < / RTI > includes any combination of a plurality of related listed items or any of a plurality of related listed items.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises" or "having" and the like are used to specify that there is a feature, a number, a step, an operation, an element, a component or a combination thereof described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings.

First, the envelope detection circuit will be described before describing the embodiment.

1 is a circuit diagram showing an envelope detection circuit using a diode. As shown in Fig. 1, the envelope detection circuit using a diode includes a half-wave rectifier including a diode D and a low-pass filter including a resistor R and a capacitor C. [

The rectified signal from the half-wave rectifier includes an envelope signal and a carrier signal.

The low-pass filter filters the carrier signal and outputs only the envelope signal.

Since the envelope detection circuit using such a diode is composed only of a passive element, the output signal is not saturated.

However, since the envelope detection circuit using the diode generates a drop voltage while the diode D is conducting, the signal loss may be large to the output voltage. If the size of the input signal is small, the envelope detection circuit can perform the envelope detection function none.

2 is a circuit diagram showing an envelope detection circuit using an OP AMP. 2, an envelope detection circuit using an operational amplifier includes a half-wave rectifier including a diode D, a low-pass filter, and a compensator for compensating a drop voltage of the diode D do.

The rectified signal from the half-wave rectifier includes an envelope signal and a carrier signal.

The low-pass filter includes a third resistor (R ₃ ) and a capacitor (C), and filters the carrier signal to output only the envelope signal.

The compensator compensates the drop voltage of the diode D by a feedback loop composed of the first and second resistors R and R and the operational amplifier OP.

The envelope detection circuit using the OP AMP can compensate the drop voltage of the diode D only for the signal within the signal bandwidth of the OP AMP (A), and the signal of the frequency higher than the signal bandwidth of the OP AMP The above compensation is difficult.

3 is a circuit diagram showing a synchronous envelope detection circuit. As shown in FIG. 3, the synchronous envelope detection circuit includes a mixer M and a low-pass filter F.

The mixer M mixes and outputs an input signal such as an RF signal and an output signal of the local oscillator L. [ The output signal of the local oscillator L is synchronized with the carrier signal of the input signal. At this time, the output signal of the mixer M is the sum of the envelope signal of the input signal and the double frequency signal of the carrier signal.

The low-pass filter F filters the carrier signal and outputs only the envelope signal. That is, the low-pass filter F filters the carrier frequency doubling signal component from the output signal of the input mixer M and finally outputs only the envelope signal of the input signal. The signal waveform may be expressed as follows.

Input signal of mixer M =

The output signal of the local oscillator L =

The output signal of the mixer 310 =

은 저역-통과 필터(F)에 의해 필터링 되고,

성분만 출력되어 포락선 신호만을 검출할 수 있다.Here, among the output signals of the mixer 310,

Is filtered by a low-pass filter (F)

Only the envelope signal can be detected.

However, the synchronous envelope detection circuit is complicated in configuration circuit. Furthermore, in order to output a signal synchronized with the carrier signal of the input signal in the local oscillator L, an additional complicated circuit is required.

This makes it possible to control the output signal so as not to reach the saturation region, to perform a wide band operation, and to require an envelope detection circuit having a simple structure without complication.

First Embodiment

4 is a circuit diagram showing an envelope detection circuit according to the first embodiment. And Fig. 5 is a circuit diagram showing the variable attenuator of Fig. 5 (a) is a circuit diagram showing a variable attenuator including an NMOS, and Fig. 5 (b) is a circuit diagram showing a variable attenuator including a PMOS.

4, the envelope detection circuit according to the first embodiment includes a first square circuit 10, a variable attenuator 30, a second square circuit 50, a current circuit 70, a differential input amplifier 90, and a signal remover.

Further, although not shown, the envelope detection circuit according to the first embodiment may further include a controller for generating a control signal to the variable attenuator 30 and controlling the degree of attenuation to a desired level. Here, the controller may be a central processing unit.

The first square circuit 10 outputs a current corresponding to a square signal obtained by squaring the input signal. Here, the input signal may be a carrier modulated communication signal.

In addition, the transistors in the first square circuit 10 may be configured using first and second NMOS (NM1, NM2) elements.

The first NMOS NM1 has its gate connected to the positive input signal, its source connected to the current circuit 70 and its drain connected to the positive terminal of the differential input amplifier 90.

The second NMOS NM2 has a gate connected to the negative input signal, a source connected to the current circuit 70, and a drain connected to the (+) terminal of the differential input amplifier 90.

The variable attenuator 30 attenuates the magnitude of the input signal according to a control signal of the controller and outputs the attenuated magnitude.

The variable attenuator 30 may include first and second resistors 31 and 35 and first and second NMOSs 33 and 37 for the variable attenuator as shown in Fig. have.

The first resistor 31 is connected to the (+) input signal. The first NMOS 33 for variable attenuator has a drain connected to the positive output signal of the first resistor 31 and the variable attenuator 30 and a gate connected to a control signal for controlling the attenuation amount of the variable attenuator 30. [ And is operated in the triode region.

The second resistor 35 is connected to the negative input signal. The drain of the second NMOS 37 for the variable attenuator is connected to the negative output signal of the second resistor 35 and the variable attenuator 30 and the gate thereof is connected to the control voltage Vc.

At this time, in order that the first and second NMOSs 33 and 37 for the variable attenuator can operate in the triode region, the controller sets the control voltage Vc ), The output voltage of the variable attenuator 30 is determined by the following equation.

5 (b), the variable attenuator 30 includes first and second resistors 31-1 and 35-1 and a first and a second PMOS for the variable attenuator 33-1, 37-1).

The 1-1 resistor 31-1 is connected to the (+) input signal. The drain of the first PMOS 33-1 for the variable attenuator is connected to the (+) output signal of the 1-1 resistance 31-1 and the variable attenuator 30, and the gate is connected to the control voltage Vc And operates in the triode area.

The second -1-1 resistor 35-1 is connected to the negative input signal. The drain of the second PMOS 37-1 for the variable attenuator is connected to the negative output signal of the 2-1 resistor 35-1 and the variable attenuator 30 and the gate is connected to the control voltage Vc do.

At this time, the controller controls the first and second PMOSs 33-1 and 37-1 for the variable attenuator so that the first and second PMOSs 33-1 and 37-1 for the variable attenuator can operate in the triode region, It is possible to provide the control voltage Vc to each gate.

Here, the variable attenuator 30 may be fixed at a predetermined attenuation amount to attenuate the magnitude of the input signal without the control signal of the controller.

The second square circuit 50 outputs a current corresponding to a square signal obtained by squaring the output signal of the variable attenuator 30. [

Further, the transistors in the second square circuit 50 may be configured using third and fourth NMOS (NM3, NM4) elements.

Each of the third and fourth NMOSs NM3 and NM4 has a gate connected to the variable attenuator 30, a source connected to the current circuit 70, a drain connected to the negative terminal of the differential input amplifier 90, do.

The current circuit 70 is connected to the first square circuit 10 and the second square circuit 50 and is inputted to the first square circuit 10 and the second square circuit 50 in accordance with the respective input signals, As shown in FIG.

Here, although not shown, the current circuit 70 may be configured as a sink current circuit composed of NMOS devices.

The differential input amplifier 90 differentially receives the output currents of the first square circuit 10 and the second square circuit 50, amplifies and outputs the same. Here, the output of the differential input amplifier 90 may be a single-ended or a differential output.

The signal eliminator receives the output signal of the differential input amplifier 90 and removes the carrier signal and outputs the carrier signal.

Here, the signal canceller may include a capacitor 110 for removing the high frequency band residual carrier signal. Also, the capacitor 110 may use a separate capacitor, but a parasitic capacitor existing in a circuit for use in a commercial environment may be used.

The operation of the envelope detection circuit according to the first embodiment having such a configuration will be described as follows.

The envelope detection method of the envelope detection circuit according to the first embodiment is characterized in that a current corresponding to the square of the envelope signal of the input signal including the (+) input signal and the (-) input signal in the first square circuit 10 is input to the differential input amplifier (+) Terminal of the microcomputer 90.

The second square circuit 50 attenuates the magnitude of the input signal according to the control signal of the external controller in the variable attenuator 30 and outputs the resultant signal to the second square circuit 50. The second square circuit 50 then outputs the variable attenuator 30, And outputs a current corresponding to the square of the envelope signal of the output signal to the (-) terminal of the differential input amplifier 90.

The current circuit 70 also provides a bias current so that the first to fourth NMOSs NM1, NM2, NM3 and NM4 in the first square circuit 10 and the second square circuit 50 operate in the saturation region . Since the first to fourth NMOSs NM1, NM2, NM3, and NM4 operate in the saturation region, the output currents of the first square circuit 10 and the second square circuit 50 are equal to the square of the input signal voltage . Here, since the outputs of the first square circuit 10 and the second square circuit 50 are the square of the input signal, one is the square signal of the envelope signal and the other one is the double frequency signal of the carrier signal .

Subsequently, the differential input amplifier 90 differentially receives the output currents of the first square circuit 10 and the second square circuit 50, and outputs the same to the capacitor 110 as a signal remover.

At this time, due to the differential amplification characteristic of the differential input amplifier 90, a current reduced by the output current of the second square circuit 50 from the output current of the first square circuit 10 is output to the capacitor 110.

Accordingly, when the amount of attenuation is small through the variable attenuator 30, the magnitude of the output signal of the differential input amplifier 90 becomes large. On the other hand, when the amount of attenuation of the variable attenuator 30 is large, The size becomes smaller. By controlling the attenuation amount of the variable attenuator 30 through this operation, the output signal amplitude of the differential input amplifier 90 can be controlled and the size of the final output signal applied to the capacitor 110 can be controlled.

The capacitor 110 connected in parallel to the output terminal of the differential input amplifier 90 receives the output signal of the differential input amplifier 90 and removes the high frequency band residual carrier signal to output only the envelope related signal of the input signal.

The differential input amplifier 90 is formed from the current equations of the first to fourth NMOSs NM1, NM2, NM3 and NM4 (operating in the saturation region) in the first square circuit 10 and the second square circuit 50, The output current of the battery is derived from the following equation.

는 각 NMOS의 이동도(mobility)이고,

는 각 NMOS의 산화물 커패시턴스(oxide capacitance)이며, L은 각 NMOSFET의 길이(length)이고, W는 각 NMOS의 폭(width)이며,

는 각 NMOS의 게이트에 인가된 바이어스 전압이고,

는 각 NMOS의 소스의 전압이며,

는 각 NMOS의 문턱 전압이다.here,

Is the mobility of each NMOS,

Where L is the length of each NMOSFET, W is the width of each NMOS,

Is the bias voltage applied to the gate of each NMOS,

Is the voltage of the source of each NMOS,

Is the threshold voltage of each NMOS.

Therefore, the output currents of the first square circuit 10 and the second square circuit 50 are as follows.

Therefore, since the output differential currents of the first square circuit 10 and the second square circuit 50 are transferred to the output signal, the output current is as follows.

(alpha)라고 하고,

값에 따른 Vi1 변화에 따른 출력 전류

의 출력 크기 변화를 아래와 같이 표현할 수 있다. Finally, the amplitude gain of the variable attenuator 30

(alpha)

Output current according to Vi1 change according to value

Can be expressed as follows.

6 is a graph illustrating magnitude characteristics of a normalized input signal and an output signal according to a gain characteristic of the variable attenuator of FIG.

의 입력 신호의 크기의 제곱에 비례하여 출력되며, 최대 전류 크기는 가변 감쇄기(30)의 감쇄량에 의해서 제어된다.That is,

And the maximum current magnitude is controlled by the amount of attenuation of the variable attenuator 30.

에 따라서 출력 전류

의 최대 크기가 제어되고 있음을 확인할 수 있다.As shown in Fig. 6, the gain characteristic of the variable attenuator 30

The output current

Can be confirmed.

를 아래와 같이 정의할 경우, Input signal

Is defined as follows,

The final output current is as follows.

는 커패시터(110)에 의해서 반송파 2배 주파수 성분은 제거되어 오직 입력 신호의 포락선 제곱 성분만 최종적으로 남게 된다.The output current

The frequency doubler component of the carrier wave is removed by the capacitor 110 so that only the envelope squared component of the input signal is finally left.

Second Embodiment

7 is a circuit diagram showing an envelope detection circuit according to the second embodiment. Next, a second embodiment of the envelope detection circuit will be described with reference to Fig.

In the description of the second embodiment, description of the same configuration as the first embodiment will be omitted.

The envelope detection circuit according to the second embodiment includes a first square circuit 20, a variable attenuator 40, a second square circuit 60, a current circuit 80, a differential input amplifier 100, and a signal remover do.

Here, the configurations of the variable attenuator 40, the differential input amplifier 100, and the signal remover are substantially the same as those of the first embodiment.

The transistors in the first square circuit 20 are constituted by first and second PMOS transistors PM1 and PM2 and the transistors in the second square circuit 60 are constituted by the third and fourth PMOS transistors PM3 and PM4 ) Element and the current circuit 80 may be constituted by a current source circuit composed of a PMOS element and not shown so that the configuration and the configuration of the first embodiment using an NMOS element instead of PMOS can do.

The effect and advantage of the case where the transistor and the current circuit 80 in the first and second square circuits 20 and 60 in the second embodiment are composed of PMOS devices can be substantially the same as those in the first embodiment.

As described above, the envelope detection circuit according to the embodiment includes a first square circuit for outputting a current corresponding to a squared signal obtained by squaring an input signal, a variable attenuator for attenuating the amplitude of the input signal and outputting an output signal of the variable attenuator A second square circuit for outputting a current corresponding to one squared signal and a current circuit for supplying a bias current differentially to the first square circuit and the second square circuit in accordance with input signals of the first square circuit and the second square circuit, It is possible to control the maximum output size of the envelope detection circuit by controlling the attenuation amount of the variable attenuator.

In addition, since the envelope detection circuit according to the embodiment can control the maximum output size of the envelope detection circuit by controlling the attenuation amount of the variable attenuator, it is possible to suppress the saturation of the output signal even when a large input signal is applied .

Further, since the envelope detection circuit according to the embodiment can control the maximum output size of the envelope detection circuit by controlling the attenuation amount of the variable attenuator, the broadband operation can be made more than the circuit composed of negative feedback.

Further, since the envelope detection circuit according to the embodiment can control the maximum output size of the envelope detection circuit by controlling the attenuation amount of the variable attenuator, the structure is not complicated because it is constituted by a fewer number of blocks than the circuit constituted by the local oscillator When implemented as a chip, the occupied area may be small and the power consumption may be lower.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the present invention as defined by the following claims It can be understood that

10, 20: first square circuit 30, 40: variable attenuator
50, 60: second square circuit 70, 80: current circuit
90, 100: Differential input amplifier 110, 120: Capacitor

Claims (1)

A first square circuit for outputting a current corresponding to a square signal obtained by squaring an input signal;
A variable attenuator for attenuating the magnitude of the input signal and outputting the attenuated magnitude;
A second squaring circuit for outputting a current corresponding to a square signal obtained by squaring an output signal of the variable attenuator;
A current circuit which is connected to the first square circuit and the second square circuit and inputs the bias current differentially to the first square circuit and the second square circuit according to each input signal;
A differential input amplifier receiving the output currents of the first and second squaring circuits differentially and amplifying and outputting the output currents; And
A signal canceller for receiving the output signal of the differential input amplifier to remove the carrier signal and outputting the carrier signal;
And an envelope detection circuit.

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