KR20180058910A - Liquid crystal display panel - Google Patents

Abstract

According to an embodiment of the present invention, provided is a liquid crystal display panel comprising: a plurality of first and second common electrode patterns which display an image, are arranged on one surface of a first substrate, are arranged in a matrix on a display region, correspond to two or more pixel regions of a plurality of pixel regions, respectively, and alternate in a first direction; a shielding film and an auxiliary resistor pattern which are arranged on the other surface of the first substrate; a first light-shielding dummy pattern which is arranged on one surface of the first substrate, corresponds to a part of a boundary region, adjacent to each of the first common electrode patterns, and overlaps with the auxiliary resistor pattern; and a second light-shielding dummy pattern which is arranged on one surface of the first substrate, corresponds to a part of the boundary region, adjacent to each of the second common electrode patterns, overlaps with the auxiliary resistor pattern, and is alternately arranged in parallel with the first light-shielding dummy pattern in the first direction. In a process of irradiating laser for forming the auxiliary resistor pattern by the first and second light-shielding dummy patterns, the degree of exposure of insulating materials disposed in the liquid crystal display panel to the laser may be reduced, thereby preventing damage to the insulating materials by the laser.

Description

[0001] LIQUID CRYSTAL DISPLAY PANEL [0002]

The present invention relates to a liquid crystal display panel, and more particularly, to a liquid crystal display panel capable of providing a touch sensing function.

A flat display device is applied to various electronic devices such as a TV, a mobile phone, a notebook, and a tablet. To this end, research has been continued to develop a thinner, lighter, and lower power consumption display device.

Typical examples of the flat panel display include a liquid crystal display (LCD), a plasma display panel (PDP), a field emission display (FED), an electroluminescent display An electroluminescence display device (ELD), an electro-wetting display device (EWD), and an organic light emitting display device (OLED).

A typical flat panel display device includes a display panel including a pair of substrates bonded to each other and a polarizing material or a light emitting material disposed between the pair of substrates.

For example, a liquid crystal display device includes a liquid crystal display panel using a liquid crystal material as a polarizing material.

A liquid crystal display panel includes a pair of substrates bonded to each other and a liquid crystal layer disposed between a pair of substrates and made of a liquid crystal material that polarizes light.

The liquid crystal display panel generates a predetermined electric field between the pixel electrode and the common electrode of each of the plurality of pixel regions defined in the display region where the image is displayed. The angle at which the liquid crystal material of the liquid crystal layer is tilted by the electric field at this time is varied, so that the light transmittance of each pixel region is controlled. Thus, the liquid crystal display panel can display an image on the display area by adjusting the light transmittance of each of the plurality of pixel areas.

Such a liquid crystal display device is advantageous for realizing miniaturization, thinning, and low power consumption, and thus is used in various electronic devices such as a notebook computer, a monitor, an automation device, and a portable communication device.

Meanwhile, in order to improve user's convenience, the liquid crystal display device has been developed and commercialized with a built-in touch sensing function. The touch sensing function is a function for detecting the position of a human hand or a contact point of an object in the display area, and can be used as a means for intuitively inputting a user's command.

Examples of a method in which a liquid crystal display device incorporates a touch sensing function include an add-on method of attaching a separate touch panel for a touch sensing function to a liquid crystal display panel, And an in-cell method in which a component is used as a touch sensing sensor.

In the case of the add-on method, since a separate touch panel is included, the image output function and the touch sensing function can be independently driven without mutual influence, and touch is not performed on the liquid crystal display panel. However, since a separate touch panel is added, there is a problem that the weight of the display device is limited and the thickness of the display device is limited, and the light emitted from the liquid crystal display panel is somewhat lost by the touch panel.

On the other hand, in the case of the in-cell method, since it does not include a separate touch panel, it is advantageous in weight reduction and thinness as compared with the add-on method. However, there is a problem that the video output function and the touch sensing function must be operated in a time division manner, and a touch for inputting the user is directly performed on the liquid crystal display panel. In addition, there is a problem that the touch sensing failure can easily occur due to the static electricity flowing into the liquid crystal display panel.

When the touch sensing function is built in the in-cell method, the liquid crystal display panel may further include a shielding film for blocking or discharging static electricity flowing into the liquid crystal display panel, and an auxiliary resistance pattern for lowering the resistance of the shielding film.

However, the auxiliary resistance pattern is formed through a process of hardening the metal material by using a laser. At this time, if the organic and inorganic insulating materials disposed in the liquid crystal display panel are excessively exposed to the laser, foreign matter may be generated due to damage of the insulating material. Particularly, there is a problem that a tilting direction of a liquid crystal material is deformed due to a foreign substance, so that image defects such as light leakage and mura may occur.

The present invention provides a liquid crystal display panel capable of preventing an insulating material in a liquid crystal display panel from being damaged by a laser for forming an auxiliary resistance pattern and generating foreign matter.

The objects of the present invention are not limited to the above-mentioned objects, and other objects and advantages of the present invention which are not mentioned can be understood by the following description and more clearly understood by the embodiments of the present invention. It will also be readily apparent that the objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

One example of the present invention is a display device including a display area in which a plurality of pixel areas corresponding to a plurality of sub-pixels are displayed and an outer area of the display area and including a boundary area tangent to an edge of the display area, And a plurality of first and second substrates arranged in a matrix on the display region and corresponding to two or more pixel regions of the plurality of pixel regions and mutually alternating in the first direction, A second common electrode pattern, a shielding film disposed on the other surface of the first substrate and corresponding to at least the display region, an auxiliary resistance pattern disposed on the other surface of the first substrate and in contact with the shielding film, A plurality of first common electrode patterns disposed on one surface of the first substrate and corresponding to a portion of the boundary region adjacent to each of the plurality of first common electrode patterns, A first light-shielding dummy pattern overlapping the resistance pattern, and a second light-shielding dummy pattern disposed on one surface of the first substrate and corresponding to a portion of the boundary region adjacent to each of the plurality of second common electrode patterns, And a second light-shielding dummy pattern arranged alternately in parallel with the first light-shielding dummy pattern in one direction.

Wherein the non-display area further comprises a pad area corresponding to a pad part which is in contact with an edge of the first substrate and to which a circuit board for supplying a driving signal is connected, and the boundary area is disposed between the pad area and the display area , And the auxiliary resistance pattern may correspond to a remaining region of the non-display region except for the pad region.

The liquid crystal display panel includes a first connection line in a second direction connecting first common electrode patterns adjacent to each other in a second direction crossing the first direction among the plurality of first common electrode patterns, And a second connection line in a first direction that is isolated from the connection line and connects the second common electrode patterns adjacent in the first direction through the first common electrode pattern among the plurality of second common electrode patterns do. Here, the first common electrode patterns arranged in parallel in the second direction are interconnected with two or more first connection lines disposed at a boundary between two or more pixel regions corresponding to the first common electrode patterns, The two or more first connection lines corresponding to the first common electrode pattern adjacent to the first light-shielding dummy pattern are interconnected through the first light-shielding dummy pattern.

Alternatively, the liquid crystal display panel may include a plurality of third common electrode patterns disposed on both sides of each of the plurality of first common electrode patterns so as to be inserted between the first and second common electrode patterns, And a third connection line in a second direction connecting third common electrode patterns adjacent to each other in the second direction among the electrode patterns. In this case, the third connection lines disposed on both sides of the first common electrode pattern adjacent to the first light-shielding dummy pattern may be interconnected through the first light-shielding dummy pattern.

Alternatively, the non-display region may further include a pad region corresponding to a pad portion connected to a circuit board contacting the edge of the first substrate and supplying a driving signal. In this case, the liquid crystal display panel corresponds to the non-display region and includes a first routing line connecting the first connection line and the pad portion, a second routing line corresponding to the non-display region, A second routing line connected between the pad portions, and a third light-shielding dummy pattern disposed in a floating state between the first and second routing lines and corresponding to the boundary region, the third light- .

The liquid crystal display panel according to each embodiment of the present invention includes first and second light-shielding dummy patterns corresponding to a boundary region in contact with an edge of a display region.

Since the first and second light-shielding dummy patterns overlap the auxiliary resistance pattern, the degree of exposure of the insulating materials disposed in the liquid crystal display panel to the laser in the process of irradiating the laser for forming the auxiliary resistance pattern can be reduced.

This can prevent the insulating materials from being damaged by the laser and thereby causing foreign matter to be generated at the edges of the display area. In addition, deterioration in image quality due to foreign substances can be prevented.

1 is a view illustrating a liquid crystal display device according to an embodiment of the present invention.
Fig. 2 is a cross-sectional view of the liquid crystal display panel of Fig. 1. Fig.
FIG. 3 is a view showing the display area, the non-display area, the boundary area, the pad area and the auxiliary resistance pattern in FIG.
FIG. 4 is a plan view of the liquid crystal display panel of FIG. 1 according to the first embodiment of the present invention.
5 is a view showing a part of the display area of FIG.
6 is a diagram showing an example of a cross section of any one of the sub-pixels shown in FIG.
7 is a cross-sectional view taken along the line AA 'in FIG.
8 is a cross-sectional view taken along line BB 'of FIG.
Figs. 9A and 9B are diagrams illustrating defects that may occur when the second light-shielding dummy pattern of Fig. 4 is not included.
10 is a plan view of a liquid crystal display panel according to a second embodiment of the present invention.
11 is a plan view of a liquid crystal display panel according to a third embodiment of the present invention.

Hereinafter, a liquid crystal display panel according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, a liquid crystal display according to an embodiment of the present invention will be described with reference to FIGS. 1 to 3. FIG.

1 is a view illustrating a liquid crystal display device according to an embodiment of the present invention. Fig. 2 is a cross-sectional view of the liquid crystal display panel of Fig. 1. Fig. FIG. 3 is a view showing the display area, the non-display area, the boundary area, the pad area and the auxiliary resistance pattern in FIG.

1, gate lines GL1 to GLg in a first direction (left and right direction in FIG. 1) intersecting each other to define a plurality of pixel regions in a display region AA in which an image is displayed, The liquid crystal display panel 100 including the data lines DL1 to DLd in the horizontal direction (vertical direction in FIG. 1), and the gate lines GL1 to GLg during one vertical period for displaying one frame in sequence A data driver 300 for supplying a data signal to the data lines DL1 to DLd during one horizontal period in which gate signals are supplied to the gate lines GL1 to GLg, a gate driver 200, A timing controller 400 for controlling the data driver 300 and a touch sensing unit 500 for driving the touch sensing function of the liquid crystal display panel 100.

The timing controller 400 controls the operation timings of the gate driver 200 and the data driver 300 based on timing signals such as a data enable signal DE input from an external system and a dot clock CLK (GCS, DCS) for controlling the control signals (GCS, DCS). The timing controller 400 rearranges the input image data input from the external system and outputs the rearranged image data r, g, b to the data driver 300.

Here, the gate control signal GCS by the timing controller 400 may include a gate start pulse GSP, a gate shift clock GSC, a gate output enable signal GOE, and the like.

The data control signal DCS by the timing controller 400 includes a source start pulse SSP, a source shift clock signal SSC, a source output enable signal SOE, a polarity control signal POL, .

In addition, the timing controller 400 may further generate a touch control signal for controlling the operation timing of the touch sensing unit 500.

That is, the timing controller 400 may divide a plurality of video output periods and a plurality of touch sensing periods during one vertical period, and may supply the touch sensing unit 500 with a touch synchronous signal TSS corresponding to the touch sensing period have.

The touch sensing unit 500 may drive a plurality of transmission touch lines TL1 to TLk and a plurality of reception touch lines RL1 to RLs provided in the liquid crystal display panel 100. [

For example, the touch sensing unit 500 may sequentially drive the plurality of transmission touch lines TL1 to TLk. The touch sensing unit 500 drives each of the plurality of receiving touch lines RL1 to RLs while driving each of the transmitting touch lines TL1 to TLk. At this time, the receiving touch line RL1 having a voltage level different from the threshold value To RLs) can be detected. Thus, the touch sensing unit 500 can sense the point where the touch is generated, based on the transmitting touch lines TL1 to TLk being driven and the receiving touch lines RL1 to RLs having a voltage level different from the threshold value .

2, a liquid crystal display panel 100 according to an exemplary embodiment of the present invention includes a first substrate 110, a thin film transistor array arranged on one side of the first substrate 110, 1, a shielding film 120 disposed on the other surface of the substrate 110, an auxiliary resistance pattern SRPN disposed under the shielding film 120, a second substrate facing the first substrate 110, A sealing layer 140 for bonding the first and second substrates 110 and 130 to each other and a liquid crystal layer 150 disposed between the first and second substrates 110 and 130 bonded to each other .

The first substrate 110 includes a display area AA for displaying an image and a non-display area NA for surrounding the display area AA.

The display area AA includes a plurality of pixel areas corresponding to a plurality of sub-pixels.

The non-display area NA includes a BDA (Borer Area) contacting the edge of the display area AA and a pad area PADA contacting the edge of the first substrate 110. Here, the boundary region BDA is disposed between the display region AA and the pad region PADA, and is spaced from the pad region PADA.

The boundary region BDA may include a plurality of pixel regions defined in the display region AA and a plurality of dummy pixel regions continuous to each other. In this case, a dummy gate line (not shown) intersecting the data line may be disposed in the boundary region BDA, and a dummy gate line (not shown) corresponding to each dummy pixel region and disposed in a crossing region between the dummy gate line and the data line (Not shown). However, this is merely an example, and the boundary area BDA may be arbitrarily designated as an area corresponding to the width of one or more pixel areas.

The pad region PADA corresponds to a pad portion to which a circuit board (not shown) for supplying a driving signal for driving a thin film transistor array (TFT array) is connected.

1, a thin film transistor array (TFT array) includes gate lines (GL1 to GLg in FIG. 1) in a first direction (left and right directions in FIG. 1) Of the data lines DL1 to DLd. By the gate lines GL1 to GLg and the data lines DL1 to DLd mutually intersecting, the thin film transistor array (TFT array) is arranged in a matrix in the display area AA in which the image is displayed and corresponds to a plurality of sub pixels A plurality of pixel regions are defined.

The shielding film 120 is for shielding or discharging static electricity applied to the liquid crystal layer 150 side through the first substrate 110. This shielding film 120 is disposed on the other surface of the first substrate 110, and corresponds to at least the display area AA. That is, the shielding film 120 may correspond to the display area AA and the non-display area NA.

In addition, the shielding film 120 may be made of a transparent conductive material in order to minimize the loss of light emitted from the backlight unit (not shown) or the like disposed under the first substrate 110 to the liquid crystal display panel 100.

The auxiliary resistance pattern SRPN is for lowering the resistance of the shielding film 120. The auxiliary resistance pattern SRPN may be made of a reflective metal material having a lower resistance than the transparent conductive material of the shielding film 120. [ Thus, the auxiliary resistance pattern SRPN is arranged in the non-display area NA in order to prevent light loss in the display area.

Illustratively, as shown in Fig. 3, the auxiliary resistance pattern SRPN may be arranged in the form of a rim surrounding the edge of the display area AA. In particular, the auxiliary resistance pattern SRPN may be disposed in the remaining area of the non-display area NA except for the pad area PADA.

The auxiliary resistance pattern SRPN may be formed through a process of printing a metal material on a part of the non-display area NA and a process of hardening the metal material printed using the laser. At this time, the laser may be an ultraviolet (UV) wavelength band.

The formation of the auxiliary resistance pattern SRPN is performed after the process of forming the TFT array on one side of the first substrate 110. Accordingly, organic or inorganic insulating materials disposed to insulate each conductive layer on one surface of the first substrate 110 can be exposed to the laser while the laser is irradiated to cure the metallic material. Particularly, if the insulating material is exposed to an excessive amount of laser light in excess of the threshold, there is a problem that the damaged insulating material flows into the foreign substance into the liquid crystal layer 150, thereby deteriorating the display characteristics of the liquid crystal display panel 100.

Therefore, in each embodiment of the present invention, the auxiliary resistance pattern SRPN is overlapped with the non-display area NA, and a part of the signal lines are not uniformly arranged, By arranging the shade dummy pattern, the insulating material is prevented from being damaged by the laser in some areas.

First, a liquid crystal display panel according to a first embodiment of the present invention will be described with reference to FIGS. 4 to 8. FIG.

FIG. 4 is a plan view of the liquid crystal display panel of FIG. 1 according to the first embodiment of the present invention. 5 is a view showing a part of the display area of FIG. 6 is a diagram showing an example of a cross section of any one of the sub-pixels shown in FIG. 7 is a cross-sectional view taken along line A-A 'in Fig. 8 is a cross-sectional view taken along the line B-B 'in FIG.

4, the liquid crystal display panel 100 according to the first embodiment of the present invention includes a first substrate 110 including a display area AA and a non-display area NA, a display area AA A plurality of first and second common electrode patterns CE1 and CE2 arranged alternately in a first direction (the left-right direction in FIG. 4) and a plurality of boundary regions BDA of the non-display region NA A first shielding dummy pattern SDPN1 corresponding to a portion adjacent to each of the first common electrode patterns CE1 and a plurality of second common electrode patterns And a second light-shielding dummy pattern SDPN2 corresponding to a portion adjacent to each of the first light-shielding dummy patterns CE2 and arranged alternately in parallel with the first light-shielding dummy pattern SDPN1 in the first direction (left-right direction).

The liquid crystal display panel 100 includes first common electrode patterns (first common electrode patterns) adjacent to each other in a second direction (vertical direction in FIG. 4) of the first common electrode patterns CE1 crossing the first direction A first common line CNL1 in a second direction (vertical direction) for connecting the first common electrode pattern CE1 and a first common electrode pattern CE1 among the plurality of second common electrode patterns CE2, And a second connection line CNL2 in a first direction connecting the second common electrode patterns CE2 adjacent in one direction (left and right direction).

The liquid crystal display panel 100 includes a pad portion (not shown) to which an external circuit board corresponding to the pad region PADA of the non-display region NA is supplied and which supplies a driving signal for driving the TFT array The second routing line RL1 and the second connection line CNL2 connecting between the first connection line CNL1 and the pad portion PAD and the pad portion PAD, And may further include a line RL2. Here, the first and second routing lines RL1 and RL2 are disposed in the non-display area NA.

The plurality of first and second common electrode patterns CE1 and CE2 are arranged in a matrix in the display area AA and are spaced apart from each other. Each of the first and second common electrode patterns CE1 and CE2 corresponds to two or more pixel regions PA adjacent to each other in the first and second directions.

The plurality of first common electrode patterns CE1 are connected to the first common electrode pattern CE1 neighboring in the second direction through the first connection line CNL1 in the second direction.

The plurality of second common electrode patterns CE2 alternate with the plurality of first common electrode patterns CE1 in the first direction (left-right direction). That is, the longitudinal columns in which the first common electrode patterns CE1 are arranged and the longitudinal columns in which the second common electrode patterns CE2 are arranged alternate in the first direction.

The plurality of second common electrode patterns CE2 are connected to the second common electrode pattern CE2 neighboring in the first direction through the second connection line CNL2 in the first direction.

In addition, the number of the first connection lines CNL1 corresponding to the column in which the first common electrode patterns CE1 are arranged in the second direction may be one or more. That is, the first common electrode patterns CE1 arranged in parallel in the second direction are connected to two or more first connection lines CE1 arranged at the boundary between two or more pixel regions PA corresponding to the first common electrode patterns CE1, (CNL1).

Two or more first connection lines CNL1 corresponding to the first common electrode pattern CE1 adjacent to the first light-shielding dummy pattern SDPN1 are interconnected via the first light-shielding dummy pattern SDPN1.

Specifically, as shown in Fig. 5, the liquid crystal display panel 100 includes a plurality of unit pixels P, and each unit pixel P includes two or more sub-pixels corresponding to different colors, And pixels SP1, SP2, and SP3. Illustratively, two or more sub-pixels SP1, SP2 and SP3 corresponding to each unit pixel P are arranged in a first direction (right and left direction in FIG. 5), and red (R), green (G) Second, and third sub-pixels SP1, SP2, and SP3 corresponding to blue (B), respectively.

As described above, a plurality of pixel regions corresponding to the plurality of sub-pixels SP1, SP2, and SP3 are defined by gate lines GL and data lines DL that cross each other.

Each of the first and second common electrode patterns CE1 and CE2 may correspond to two or more unit pixels P which are adjacent to each other. 5, each of the first and second common electrode patterns CE1 and CE2 corresponds to two unit pixels P adjacent to each other in the second direction (up and down direction in FIG. 5). However, And the number of unit pixels P corresponding to each of the first and second common electrode patterns CE1 and CE2 is determined by touch sensitivity, the width of the liquid crystal display panel 100, and the burden of the touch driver (not shown) It is natural that it can be changed as much as necessary.

First common electrode patterns CE1 adjacent to each other in a second direction (vertical direction) of the plurality of first common electrode patterns CE1 are connected through a first connection line CNL1. The first connection line CNL1 may be arranged to extend in the second direction at a boundary between two or more pixel regions corresponding to the first common electrode patterns CE1. The first connection line CNL1 is superimposed on the data line DL.

At this time, as shown in FIG. 8, the first connection line CNL1 is disposed on the same layer as the first and second common electrode patterns CE1 and CE2. In order to prevent the first common electrode pattern CE1 from being connected to the second common electrode pattern CE1 adjacent to the first common electrode pattern CE1 in the first direction through the first connection line CNL1, And the second common electrode pattern CE2, the first connection line CNL1 is not disposed.

5, the second common electrode pattern CE2 of the plurality of second common electrode patterns CE2 adjacent to each other in the first direction (left-right direction) with the first common electrode pattern CE1 therebetween passes through the second common electrode pattern CE2, And is connected via a connection line CNL2. As mentioned above, the second connection line CNL2 is disposed on a different layer from the first connection line CNL1. That is, the second connection line CNL2 is separated from the first connection line CNL1, the first and second common electrode patterns CE1 and CE2 by a predetermined insulating film, And is connected to the electrode CE2.

The second connection lines CNL2 may be arranged to extend in a first direction at a boundary between two or more pixel regions corresponding to the second common electrode patterns CE2 arranged in parallel in the first direction. The second connection line CNL2 overlaps the gate line GL.

As described above, the first common electrode patterns CE1 connected in the second direction through the first connection line CNL1 and the second common electrode patterns CE1 connected in the first direction through the second connection line CNL2 CE2 are used as the receiving touch lines (RL1 to RLs in FIG. 1) and the transmitting touch lines (TL1 to TLk) during the touch sensing period.

That is, the plurality of first and second common electrode patterns CE1 and CE2 are maintained at a common voltage during the video output period and used as a common electrode for generating an electric field together with the pixel electrodes of the sub-pixels SP1, SP2 and SP3 do. The plurality of first and second common electrode patterns CE1 and CE2 are used as a plurality of receiving touch lines (RL1 to RLs in FIG. 1) and a plurality of transmitting touch lines (TL1 to TLk) during the touch sensing period.

In addition, each of the plurality of first and second common electrode patterns CE1 and CE2 may be made of a transparent conductive material so as to minimize a decrease in light transmittance of each pixel region. At this time, since the transparent conductive material is a material having a relatively high resistance, it is necessary to lower the resistance of the first and second common electrode patterns CE1 and CE2.

In order to lower the resistance of the first common electrode pattern CE1, the first connection pattern CNL1 connects the neighboring first connection lines CNL1 in an area within each first common electrode pattern CE1, And may further include an extension portion that overlaps the line GL.

The liquid crystal display panel 100 is superimposed on the gate line GL and the data line DL in the region within each second common electrode pattern CE2 in order to lower the resistance of the second common electrode pattern CE2 (SCNL) sub-connection line (SCNL).

As shown in Fig. 7, the auxiliary connection pattern SCNL may be disposed on the second common electrode pattern CE2.

On the other hand, the thin film transistor array (TFT array) includes a plurality of thin film transistors corresponding to the plurality of sub pixels SP1, SP2 and SP3 for independently driving the plurality of sub pixels SP1, SP2 and SP3.

6, a thin film transistor (TFT) corresponding to each sub pixel SP is disposed on one surface of the first substrate 110 and includes a channel region ACT1, source regions ACT2 and ACT2 on both sides thereof, An active layer ACT including a drain region ACT3 and a gate electrode GE and a gate electrode GE disposed on the gate insulating film 111 covering the active layer ACT and overlapping the channel region ACT1, A source electrode SE disposed on the covering source-drain insulating film 112 and connected to the source region ACT2 and a drain electrode DE disposed on the source-drain insulating film 112 and connected to the drain region ACT3, . ≪ / RTI >

5) may be disposed on the gate insulating film 111 together with the gate electrode GE and the data line DL may be connected to the source electrode SE and the drain electrode DE together with the source electrode SE and the drain electrode DE, -Drain insulating film 112, as shown in FIG.

The gate line GL, the data line DL, and the thin film transistor TFT are covered with the first interlayer insulating film 113.

Then, as shown in Fig. 7, the second connection line CNL2 is disposed on the first interlayer insulating film 113. Then, as shown in Fig.

The plurality of second common electrode patterns CE2 are disposed on the second interlayer insulating film 114 covering the second connection line CNL2 and connected to the second connection line CNL2 through the contact holes. As a result, the second common electrode patterns CE2 adjacent to each other in the first direction across the first common electrode pattern CE1 are interconnected via the second connection line CNL2.

As shown in FIG. 8, a plurality of first common electrode patterns CE1 are also disposed on the second interlayer insulating film 114. The first connection line CNL1 is disposed on the second interlayer insulating film 114 so as to be in contact with the first common electrode pattern CE1. Through the first connection line CNL1, the first common electrode patterns CE1 adjacent to each other in the second direction are interconnected.

The first and second common electrode patterns CE1 and CE2 and the first connection line CNL1 are covered with the third interlayer insulating film 115. [

Pixel electrodes PE corresponding to the sub-pixels SP1, SP2, and SP3 may be disposed on the third interlayer insulating film 115. [ 6, the pixel electrode PE is connected to the thin film transistor TFT through the contact hole passing through the first, second, and third interlayer insulating films 113, 114, and 115. In this case,

In addition, although not shown separately, the first and second light-shielding dummy patterns SDPN1 and SDPN2 of FIG. 4 may be disposed on the first interlayer insulating film 113 together with the second connection line CNL2. In this manner, the first and second light-shielding dummy patterns SDPN1 and SDPN2 are arranged on the different layers from the gate line GL, the data line DL, and the first and second common electrode patterns CE1 and CE2, respectively So that an easy connection failure can be prevented. However, the first embodiment of the present invention is not limited to this, and the first and second light-shielding dummy patterns SDPN1 and SDPN2 may be disposed on the gate insulating film 111 or the source-drain insulating film 112 Of course.

A black matrix BM and color filters R, G, and B may be disposed on the second substrate 130 facing the first substrate 110.

The black matrix BM corresponds to the outline of each pixel region.

The black matrix BM has a width wider than at least the first and second connection lines CNL1 and CNL2 and is arranged to cover at least the first and second connection lines CNL1 and CNL2.

The color filters CF (R), CF (G), and CF (B) correspond to the respective pixel regions. The first, second, and third sub-pixels SP1, SP2, and SP3 included in each unit pixel P are red (R), blue (G), and blue (B) , Green, and blue.

The liquid crystal layer 150 may be formed of a liquid crystal material injected between the first and second substrates 110 and 130, which are bonded together through a sealing layer 140 (FIG. 2).

The liquid crystal display panel 100 further includes alignment layers 181 and 182 disposed on the first and second substrates 110 and 130 for designating an initial tilt direction of the liquid crystal material of the liquid crystal layer 150 .

As described above, according to the first embodiment of the present invention, the first and second light-shielding dummy patterns SDPN1 and SDPN2 are disposed in the boundary region BDA of the non-display area NA and are arranged in the first direction Are alternately arranged in parallel with each other. The first and second light-shielding dummy patterns SDPN1 and SDPN2 are overlapped with the auxiliary resistance pattern SRPN disposed on the other surface of the first substrate 110. [ As a result, the degree to which the insulating materials of the boundary region BDA are exposed to the laser for forming the auxiliary resistance pattern SRPN can be reduced.

Specifically, during the step of irradiating the metal material with a laser to form the auxiliary resistance pattern SRPN, the light and heat by the laser are transmitted through the first substrate 110, And the metal patterns.

The insulating materials in the liquid crystal display panel 100 include a gate insulating film 111, a source-drain insulating film 112, and first, second, and third interlayer insulating films 113, 114, and 115 ). In addition, the insulating materials in the liquid crystal display panel 100 may include alignment films 181 and 182 for initially orienting the liquid crystal layer 150. [ The metal patterns disposed on one surface of the first substrate 110 include a gate line GL, a data line DL, first and second connection patterns CNL1 and CNL2, and the like. These metal patterns reflect or scatter light and heat by the laser, so that the influence of the laser on the insulating materials in the liquid crystal display panel 100 can be reduced.

Particularly, in the case where the metal patterns are arranged evenly, it is possible to prevent the laser from being concentrated in a specific region, so that the damage of the insulating material by the laser and the generation of foreign substances by the laser can be prevented. On the other hand, in the case where the metal patterns are arranged in a smaller area than other peripheral areas, the damage of the insulating material by the laser can be easily generated.

Figs. 9A and 9B are diagrams illustrating defects that may occur when the second light-shielding dummy pattern of Fig. 4 is not included.

As shown in FIG. 9A, the first connection line CNL1 extends in a second direction (up and down direction) parallel to the spacing direction between the pad area PADA and the display area AA. Therefore, the metal pattern extending to the first connection line CNL1 can be arranged in the boundary region BDA between the pad region PADA and the display region AA. That is, in the boundary region BDA, a metal pattern extending to the first connection line CNL1 and a first light-shielding dummy pattern SDPN1 for connecting them are disposed in a region adjacent to the first common electrode pattern CE1.

On the other hand, the second connection line CNL2 extends in a first direction (left-right direction) intersecting the spacing direction between the pad area PADA and the display area AA. Therefore, the metal pattern extending to the second connection line CNL2 can not be disposed in the boundary area BDA because it is disposed in another part corresponding to both sides of the second connection line CNL2 in the non-display area NA. That is, a relatively small metal pattern is arranged in a region of the boundary region BDA adjacent to the second common electrode pattern CE2, as compared with a region adjacent to the first common electrode pattern CE1.

As a result, the laser can be concentrated in the region of the boundary region BDA adjacent to the second common electrode pattern CE2, whereby the insulating material can be easily damaged and the foreign matter M can be generated.

Then, as shown in Fig. 9B, an image quality defect such as light leakage or mura may occur at the edge of the display area AA where the foreign matter M is generated.

4, the liquid crystal display panel 110 according to the first embodiment of the present invention includes a first and a second liquid crystal display panel 110 corresponding to the boundary region BDA between the pad region PADA and the display region AA, And a secondary light dummy pattern (SDPN1, SDPN2). The ratio of the metal pattern disposed in the region of the boundary region BDA adjacent to the second common electrode pattern CE2 and the ratio of the first common electrode pattern CE1 ) Can be made similar to each other. Thus, the laser can be prevented from concentrating in the region of the boundary region BDA adjacent to the second common electrode pattern CE2, so that the damage of the insulating material and the generation of foreign matter due to the concentration of the laser can be suppressed.

On the other hand, the liquid crystal display panel 100 of the first embodiment shown in FIG. 4 includes only the first and second common electrode patterns CE1 and CE2. Alternatively, the liquid crystal display panel may further include a third common electrode pattern inserted between the first and second common electrode patterns CE1 and CE2 to improve the sensitivity of the touch sensing.

10 is a plan view of a liquid crystal display panel according to a second embodiment of the present invention.

10, the liquid crystal display panel 100 'according to the second embodiment includes a plurality of third common electrode patterns CE3 disposed on both sides of each of the plurality of first common electrode patterns CE1, And a third connection line CNL3 in a second direction that connects third common electrode patterns CE3 adjacent to each other in a second direction (vertical direction) of the third common electrode patterns CE3 of the second common electrode patterns CE3.

In this case, the third connection lines CNL3 disposed on both sides of the first common electrode pattern CE1 adjacent to the first light-shielding dummy pattern SDPN1 may be interconnected through the first light-shielding dummy pattern SDPN1.

That is, according to the first embodiment, the first light-shielding dummy pattern SDPN1 is used for connecting two or more first connection lines CNL1 corresponding to the first common electrode pattern CE1 of each column.

Alternatively, according to the second embodiment, the first light-shielding dummy pattern SDPN1 corresponds to a portion adjacent to the first common electrode pattern CE1 and the third common electrode pattern CE3 disposed on both sides thereof, And to connect the third connection lines CNL3 connecting the third common electrode patterns CE3 arranged on both sides of the common electrode pattern CE1 in the second direction.

10, the liquid crystal display panel 100 'according to the second embodiment further includes a third common electrode pattern CE3 and a third connection line CNL3, and a point including a first light-shielding dummy pattern SDPN1 Is used for connecting the third connection line CNL3, it is the same as the first embodiment of FIG. 4, so that redundant description will be omitted below.

On the other hand, unlike the first and second embodiments, the liquid crystal display panel has the first and second light-shielding dummy patterns SDPN1 and SDPN2 adjacent to the first and second common electrode patterns CE1 and CE2, And may further include a dummy pattern SDPN3.

11 is a plan view of a liquid crystal display panel according to a third embodiment of the present invention.

11, the liquid crystal display panel 100 "according to the third embodiment includes a third light-shielding dummy pattern 100 " corresponding to the boundary region BDA and arranged in a floating state between each of the first and second routing lines, As shown in Fig. 11, except that the liquid crystal display panel 100 "according to the third embodiment further includes a third light-shielding dummy pattern SDPN3. The description of the duplicate description will be omitted.

As described above, the third light-shielding dummy pattern SDPN3 according to the third embodiment further increases the rate at which the metal pattern is disposed in the boundary region BDA, and the heat radiation path by the laser can be increased. As a result, the damage of the insulating material and the generation of foreign matter due to the concentration of the laser can be further suppressed.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Will be clear to those who have knowledge of.

100, 100 ', 100 ": liquid crystal display panel 110: first substrate
AA: display area NA: non-display area
BDA: Boundary area PADA: Pad area
120: shielding film SRPN: auxiliary resistance pattern
CE1, CE2, CE3: first, second and third common electrode patterns
CNL1, CNL2, CNL3: First, second and third connection lines
SDPN1, SDPN2, SDPN3: First, second and third light-shielding dummy patterns

Claims (10)

A display device comprising: a first substrate including a display region in which a plurality of pixel regions corresponding to a plurality of sub-pixels in which an image is displayed, and a non-display region that is a periphery of the display region and includes a boundary region in contact with an edge of the display region;
A plurality of first and second common electrode patterns arranged on one surface of the first substrate and arranged in a matrix in the display region and corresponding to two or more pixel regions of the plurality of pixel regions and mutually alternating in a first direction;
A shielding film disposed on the other surface of the first substrate and corresponding to at least the display region;
An auxiliary resistive pattern disposed on the other surface of the first substrate and corresponding to a portion of the non-display region in contact with the shielding film;
A first light-shielding dummy pattern disposed on one surface of the first substrate and corresponding to a portion of the boundary region adjacent to each of the plurality of first common electrode patterns and overlapping the auxiliary resistance pattern; And
A plurality of second common electrode patterns disposed on one surface of the first substrate and corresponding to a portion of the boundary region adjacent to each of the plurality of second common electrode patterns and overlapping the auxiliary resistance pattern, And a second light-shielding dummy pattern arranged alternately.
The method according to claim 1,
Wherein the non-display region further includes a pad region corresponding to a pad portion to which a circuit board for supplying a driving signal is connected, the pad region being in contact with an edge of the first substrate,
Wherein the boundary region is disposed between the pad region and the display region,
Wherein the auxiliary resistance pattern corresponds to a remaining region of the non-display region except for the pad region.
The method according to claim 1,
A first connection line in a second direction connecting first common electrode patterns adjacent to each other in a second direction crossing the first direction among the plurality of first common electrode patterns; And
A second connection line in a first direction that is insulated from the first connection line and connects second common electrode patterns adjacent in the first direction through the first common electrode pattern among the plurality of second common electrode patterns; And a liquid crystal display panel.
The method of claim 3,
The first common electrode patterns arranged in parallel in the second direction are interconnected with two or more first connection lines disposed at a boundary between two or more pixel regions corresponding to the first common electrode patterns,
The two or more first connection lines corresponding to the first common electrode pattern adjacent to the first light-shielding dummy pattern are interconnected through the first light-shielding dummy pattern.
5. The method of claim 4,
A plurality of third common electrode patterns disposed on both sides of each of the plurality of first common electrode patterns so as to be inserted between the first and second common electrode patterns; And
And a third connection line in a second direction connecting third common electrode patterns adjacent to each other in the second direction among the plurality of third common electrode patterns,
And the third connection lines disposed on both sides of the first common electrode pattern adjacent to the first light-shielding dummy pattern are interconnected through the first light-shielding dummy pattern.
The method of claim 3,
Wherein the non-display region further includes a pad region corresponding to a pad portion to which a circuit board for supplying a driving signal is connected, the pad region being in contact with an edge of the first substrate,
A first routing line corresponding to the non-display area, the first routing line connecting between each of the first connection lines and the pad portion;
A second routing line corresponding to the non-display area, the second routing line connecting between each of the second connection lines and the pad unit; And
And a third light-shielding dummy pattern corresponding to the boundary region and disposed in a floating state between each of the first and second routing lines, the third light-shielding dummy pattern overlapping the auxiliary resistance pattern.
The method of claim 3,
A gate line disposed on one side of the first substrate and in the first direction;
A data line arranged on the insulating film covering the gate line and in the second direction; And
Further comprising a plurality of thin film transistors disposed between a gate line and a data line crossing each other such that the plurality of pixel regions are defined and corresponding to the plurality of sub pixels,
The first connection line is superimposed on the data line,
And the second connection line overlaps the gate line.
8. The method of claim 7,
The second connection line is disposed on a first interlayer insulating film covering the gate line and the data line,
Wherein the first and second common electrode patterns are disposed on a second interlayer insulating film covering the second connection line,
And the first connection line is disposed on the second interlayer insulating film and contacts the first common electrode pattern.
9. The method of claim 8,
And the second connection line is connected to the second common electrode pattern through a contact hole passing through the second interlayer insulating film.
The method according to claim 1,
A second substrate facing one surface of the first substrate; And
And a liquid crystal layer disposed between the first and second substrates.

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