KR102627651B1 - Liquid crystal display panel - Google Patents

Abstract

One embodiment of the present invention displays an image, is disposed on one side of a first substrate, is arranged in a matrix in the display area, and each corresponds to two or more pixel areas of the plurality of pixel areas and alternates with each other in the first direction. and a second common electrode pattern, a shielding film and an auxiliary resistor pattern disposed on the other side of the first substrate, disposed on one side of the first substrate and corresponding to a portion of the boundary area adjacent to each of the plurality of first common electrode patterns. a first light-shielding dummy pattern overlapping the auxiliary resistance pattern, and a first light-shielding dummy pattern disposed on one surface of the first substrate, corresponding to a portion of the boundary area adjacent to each of the plurality of second common electrode patterns and overlapping the auxiliary resistance pattern, , providing a liquid crystal display panel including second light-shielding dummy patterns alternately arranged in parallel with the first light-shielding dummy pattern in the first direction. Due to these first and second light-shielding dummy patterns, the degree to which the insulating materials disposed in the liquid crystal display panel are exposed to the laser can be reduced during the process of irradiating the laser for forming the auxiliary resistance pattern, so that the insulation by the laser Damage to materials can be prevented.

Description

Liquid crystal display panel {LIQUID CRYSTAL DISPLAY PANEL}

The present invention relates to a liquid crystal display panel, and particularly to a liquid crystal display panel capable of providing a touch detection function.

Flat display devices are applied to various electronic devices such as TVs, mobile phones, laptops, and tablets. To this end, research is continuing to develop display devices that are thinner, lighter, and have lower power consumption.

Representative examples of flat panel displays include Liquid Crystal Display device (LCD), Plasma Display Panel device (PDP), Field Emission Display device (FED), and Electroluminescence display device. Examples include Luminescence Display device (ELD), Electro-Wetting Display device (EWD), and Organic Light Emitting Display device (OLED).

A typical flat panel display device includes a pair of opposing substrates bonded together and a display panel including a polarizing material or a light-emitting material disposed between the pair of substrates.

For example, a liquid crystal display device includes a liquid crystal display panel that uses a liquid crystal material as a polarizing material.

The liquid crystal display panel includes a pair of substrates bonded opposite each other and a liquid crystal layer disposed between the pair of substrates and made of a liquid crystal material that polarizes light.

The liquid crystal display panel generates a predetermined electric field between a common electrode and a pixel electrode in each of a plurality of pixel areas defined in a display area where an image is displayed. At this time, the angle at which the liquid crystal material of the liquid crystal layer is tilted is changed by the electric field, thereby adjusting the light transmittance of each pixel area. In this way, the liquid crystal display panel can display images in the display area by adjusting the light transmittance of each of the plurality of pixel areas.

Since these liquid crystal displays have the advantage of being miniaturized, thin, and low in power consumption, they are used in various electronic devices such as laptops, monitors, automation devices, and portable communication devices.

Meanwhile, in order to improve user convenience, liquid crystal displays are being developed and commercialized with a built-in touch detection function. The touch detection function is a function that detects the location of the contact point of a person's hand or an object in the display area, and can be used as a means of intuitively receiving user commands.

As an example, methods for a liquid crystal display device to have a built-in touch detection function include an add-on method of attaching a separate touch panel for the touch detection function to the liquid crystal display panel, and a part of the liquid crystal display panel. One example is the in-cell method, which uses components as touch sensors.

In the case of the add-on method, by including a separate touch panel, the image output function and the touch detection function can be operated independently without mutual influence, and there is an advantage that the touch is not applied to the liquid crystal display panel. However, as a separate touch panel is added, there is a limitation in reducing the weight and thickness of the display device, and there is a problem in that the light emitted from the liquid crystal display panel is somewhat lost by the touch panel, thereby deteriorating display characteristics.

On the other hand, the in-cell method does not include a separate touch panel, so it has the advantage of being lighter and thinner than the add-on method. However, there are problems in that the image output function and the touch detection function must be driven in a time-sharing manner, and that the touch for user input is directly applied to the liquid crystal display panel. In addition, there is a problem in that touch sensing defects can easily occur due to static electricity flowing into the liquid crystal display panel.

Accordingly, when a touch detection function is built in in-cell, the liquid crystal display panel may further include a shielding film to block or discharge static electricity flowing into the interior, and an auxiliary resistance pattern to lower the resistance of the shielding film.

However, the auxiliary resistance pattern is formed through the process of hardening the metal material using a laser. At this time, if the organic or inorganic insulating material disposed in the liquid crystal display panel is excessively exposed to the laser, foreign substances may be generated due to damage to the insulating material. In particular, there is a problem that image quality defects such as light leakage and mura may occur as the tilt direction of the liquid crystal material is deformed due to foreign substances.

The present invention is to provide a liquid crystal display panel that can prevent the insulating material in the liquid crystal display panel from being damaged by a laser for forming an auxiliary resistance pattern and thus generating foreign substances.

The objects of the present invention are not limited to the objects mentioned above, and other objects and advantages of the present invention that are not mentioned can be understood by the following description and will be more clearly understood by the examples of the present invention. Additionally, it will be readily apparent that the objects and advantages of the present invention can be realized by the means and combinations thereof indicated in the patent claims.

An example of the present invention includes a display area in which an image is displayed and a plurality of pixel areas corresponding to a plurality of sub-pixels are defined, and a non-display area including a border area outside the display area and in contact with an edge of the display area. A first substrate comprising: a plurality of first and second substrates disposed on one surface of the first substrate, arranged in a matrix in the display area, each corresponding to two or more pixel areas among the plurality of pixel areas, and alternating with each other in the first direction; 2 common electrode pattern, a shielding film disposed on the other side of the first substrate and corresponding to at least the display area, an auxiliary resistance pattern disposed on the other side of the first substrate, in contact with the shielding film and corresponding to a portion of the non-display area , a first light-shielding dummy pattern disposed on one side of the first substrate, corresponding to a portion of the boundary area adjacent to each of the plurality of first common electrode patterns, and overlapping the auxiliary resistance pattern, and on one side of the first substrate. A second light-shielding dummy is disposed, corresponds to a portion of the boundary area adjacent to each of the plurality of second common electrode patterns, overlaps the auxiliary resistance pattern, and is alternately arranged in parallel with the first light-shielding dummy pattern in the first direction. A liquid crystal display panel including a pattern is provided.

The non-display area further includes a pad area that contacts an edge of the first substrate and corresponds to a pad portion to which a circuit board that supplies a driving signal is connected, and the border area is disposed between the pad area and the display area, , the auxiliary resistance pattern may correspond to the remaining area of the non-display area excluding the pad area.

In addition, the liquid crystal display panel includes a first connection line in a second direction connecting adjacent first common electrode patterns in a second direction crossing the first direction among the plurality of first common electrode patterns, and the first connection line in the second direction. It is insulated from the connection line and further includes a second connection line in the first direction connecting adjacent second common electrode patterns in the first direction with the first common electrode pattern among the plurality of second common electrode patterns therebetween. do. Here, the first common electrode patterns arranged side by side in the second direction are connected to each other by two or more first connection lines disposed at the boundary between two or more pixel areas corresponding to each of the first common electrode patterns, The two or more first connection lines corresponding to the first common electrode pattern adjacent to the first light-shielding dummy pattern are connected to each other through the first light-shielding dummy pattern.

Alternatively, the liquid crystal display panel may include a plurality of third common electrode patterns disposed on both sides of each of the plurality of first common electrode patterns so as to be inserted between the first and second common electrode patterns, and the plurality of third common electrode patterns. Among the electrode patterns, a third connection line in the second direction may be further included to connect third common electrode patterns adjacent to each other in the second direction. In this case, third connection lines disposed on both sides of the first common electrode pattern adjacent to the first light-shielding dummy pattern may be connected to each other through the first light-shielding dummy pattern.

Alternatively, the non-display area may further include a pad area that contacts an edge of the first substrate and corresponds to a pad portion to which a circuit board that supplies a driving signal is connected. In this case, the liquid crystal display panel has a first routing line corresponding to the non-display area and connecting each of the first connection lines and the pad portion, a first routing line corresponding to the non-display area, and each of the second connection lines. a second routing line connecting the pad portions, and a third light-shielding dummy pattern corresponding to the boundary area, disposed in a floating state between each of the first and second routing lines, and overlapping the auxiliary resistance pattern. More may be included.

The liquid crystal display panel according to each embodiment of the present invention includes first and second light-shielding dummy patterns corresponding to boundary areas adjacent to the edges of the display area.

Since the first and second light-shielding dummy patterns overlap the auxiliary resistance pattern, the degree to which insulating materials disposed in the liquid crystal display panel are exposed to the laser can be reduced during the process of irradiating the laser for forming the auxiliary resistance pattern.

Accordingly, it is possible to prevent insulating materials from being damaged by the laser and causing foreign matter to occur at the edges of the display area. Additionally, it is possible to prevent image quality deterioration due to foreign substances.

1 is a diagram showing a liquid crystal display device according to an embodiment of the present invention.
FIG. 2 is a diagram showing a cross section of the liquid crystal display panel of FIG. 1.
FIG. 3 is a diagram showing the display area, non-display area, border area, pad area, and auxiliary resistance pattern of FIG. 2.
FIG. 4 is a plan view showing the liquid crystal display panel of FIG. 1 according to the first embodiment of the present invention.
FIG. 5 is a diagram showing a portion of the display area of FIG. 4.
FIG. 6 is a diagram illustrating an example of a cross section of one subpixel shown in FIG. 5 .
Figure 7 is a diagram showing a cross section taken along line AA' of Figure 5.
Figure 8 is a diagram showing a cross section taken along line BB' in Figure 5.
FIGS. 9A and 9B are diagrams illustrating defects that may occur when the second light-shielding dummy pattern of FIG. 4 is not included.
Figure 10 is a plan view of a liquid crystal display panel according to a second embodiment of the present invention.
Figure 11 is a plan view of a liquid crystal display panel according to a third embodiment of the present invention.

Hereinafter, a liquid crystal display panel according to an embodiment of the present invention will be described in detail with reference to the attached drawings.

First, with reference to FIGS. 1 to 3, a liquid crystal display device according to an embodiment of the present invention will be described.

1 is a diagram showing a liquid crystal display device according to an embodiment of the present invention. FIG. 2 is a diagram showing a cross section of the liquid crystal display panel of FIG. 1. FIG. 3 is a diagram showing the display area, non-display area, border area, pad area, and auxiliary resistance pattern of FIG. 2.

As shown in FIG. 1, gate lines GL1 to GLg in the first direction (left and right directions in FIG. 1) and the second direction intersect each other to define a plurality of pixel areas in the display area AA where an image is displayed. The liquid crystal display panel 100 includes data lines DL1 to DLd (in the vertical direction of FIG. 1), and sequentially supplies gate signals to the gate lines GL1 to GLg during one vertical period to display one frame. A gate driver 200, a data driver 300, and a gate driver 200 that supply data signals to the data lines DL1 to DLd during one horizontal period during which the gate signal is supplied to each gate line GL1 to GLg. and a timing controller 400 that controls the data driver 300, and a touch sensing unit 500 that drives the touch detection function of the liquid crystal display panel 100.

The timing controller 400 controls the operation timing of each of the gate driver 200 and the data driver 300 based on timing signals such as a data enable signal (Data Enable, DE) and a dot clock (CLK) input from an external system. Generates control signals (GCS, DCS) to control. The timing controller 400 rearranges input image data input from an external system and outputs the rearranged image data (r, g, b) to the data driver 300.

Here, the gate control signal (GCS) provided by the timing controller 400 may include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable signal (GOE).

In addition, the data control signal (DCS) by the timing controller 400 may include a source start pulse (SSP), a source shift clock signal (SSC), a source output enable signal (SOE), and a polarity control signal (POL). You can.

In addition, the timing controller 400 may further generate a touch control signal to control the operation timing of the touch sensing unit 500.

That is, the timing controller 400 can divide one vertical period into a plurality of image output periods and a plurality of touch detection periods and supply a touch synchronization signal (TSS) corresponding to the touch detection period to the touch sensing unit 500. there is.

The touch sensing unit 500 can drive a plurality of transmission touch lines (TL1 to TLk) and a plurality of reception touch lines (RL1 to RLs) provided in the liquid crystal display panel 100.

As an example, the touch sensing unit 500 may sequentially drive a plurality of transmission touch lines (TL1 to TLk). Additionally, the touch sensing unit 500 drives each of the plurality of receiving touch lines (RL1 to RLs) while driving each of the transmitting touch lines (TL1 to TLk), and at this time, the receiving touch line (RL1) has a voltage level different from the threshold. ~RLs) can be detected. As a result, the touch sensing unit 500 can sense the point where the touch occurred based on the transmitting touch lines (TL1 to TLk) being driven and the receiving touch lines (RL1 to RLs) having a voltage level different from the threshold. .

As shown in FIG. 2, the liquid crystal display panel 100 according to an embodiment of the present invention includes a first substrate 110, a thin film transistor array (TFT array) disposed on one surface of the first substrate 110, and a first substrate 110. 1 A shielding film 120 disposed on the other side of the substrate 110, a auxiliary resistance pattern (SRPN; Sub Resistance PatterN) disposed below the shielding film 120, and a second substrate opposing one side of the first substrate 110 ( 130), a sealing layer 140 bonded between the first and second substrates 110 and 130, and a liquid crystal layer 150 disposed between the bonded first and second substrates 110 and 130. .

The first substrate 110 includes a display area (AA; Active Area) where an image is displayed, and a non-display area (NA) outside the display area (AA).

The display area AA includes a plurality of pixel areas corresponding to a plurality of sub-pixels.

The non-display area (NA) includes a border area (BDA) in contact with the edge of the display area (AA) and a pad area (PADA) in contact with the edge of the first substrate 110 . Here, the border area BDA is disposed between the display area AA and the pad area PADA and is spaced apart from the pad area PADA.

The border area BDA may include a plurality of dummy pixel areas continuous with a plurality of pixel areas defined in the display area AA. In this case, a dummy gate line (not shown) crossing the data line may be placed in the boundary area (BDA), and a dummy thin film transistor corresponding to each dummy pixel area and disposed in the intersection area between the dummy gate line and the data line. (not shown) may be placed. However, this is only an example, and the border area BDA may be arbitrarily designated as an area corresponding to the width of one or more pixel areas.

The pad area (PADA) corresponds to a pad portion to which a circuit board (not shown) that supplies a driving signal for driving a thin film transistor array (TFT array) is connected.

Although not shown in detail in FIG. 2, referring to FIG. 1, the thin film transistor array (TFT array) has gate lines (GL1 to GLg in FIG. 1) in a first direction (left and right directions in FIG. 1) and a gate line in the second direction (GL1 to GLg in FIG. 1). It includes data lines (DL1 to DLd) in the vertical direction. By these intersecting gate lines (GL1 to GLg) and data lines (DL1 to DLd), the thin film transistor array (TFT array) is arranged in a matrix in the display area (AA) where the image is displayed and corresponds to a plurality of subpixels. Defines a plurality of pixel areas.

The shielding film 120 is used to shield or discharge static electricity applied to the liquid crystal layer 150 through the first substrate 110. This shielding film 120 is disposed on the other side of the first substrate 110 and corresponds to at least the display area AA. That is, the shielding film 120 may correspond to the display area (AA) and the non-display area (NA).

In addition, in order to minimize loss of light irradiated to the liquid crystal display panel 100 from a backlight unit (not shown) to be disposed under the first substrate 110, the shielding film 120 may be made of a transparent conductive material.

Additionally, the auxiliary resistance pattern (SRPN) is used to lower the resistance of the shielding film 120. This auxiliary resistance pattern (SRPN) may be made of a reflective metal material with lower resistance than the transparent conductive material of the shielding film 120. Accordingly, the auxiliary resistor pattern (SRPN) is disposed in the non-display area (NA) to prevent optical loss in the display area.

For example, as shown in FIG. 3, the auxiliary resistance pattern SRPN may be arranged in the form of a border surrounding the edge of the display area AA. In particular, the auxiliary resistance pattern (SRPN) may be placed in the remaining area of the non-display area (NA) excluding the pad area (PADA).

The auxiliary resistance pattern (SRPN) can be formed through a process of printing a metal material in a portion of the non-display area (NA) and hardening the printed metal material using a laser. At this time, the laser may be in the ultraviolet (UV) wavelength band.

This process of forming the auxiliary resistor pattern (SRPN) is performed after the process of forming a thin film transistor array (TFT array) on one side of the first substrate 110. Accordingly, while irradiating a laser to harden a metal material, organic or inorganic insulating materials disposed to insulate each conductive layer on one surface of the first substrate 110 may be exposed to the laser. In particular, when the insulating material is exposed to an excessive amount of laser beyond the critical level, the damaged insulating material flows into the liquid crystal layer 150 as a foreign matter, thereby deteriorating the display characteristics of the liquid crystal display panel 100.

Accordingly, each embodiment of the present invention blocks the laser or emits heat by the laser in some areas of the non-display area (NA) that overlap with the auxiliary resistance pattern (SRPN) and where signal wires are not uniformly arranged. By arranging the light-shielding dummy pattern, the insulating material is prevented from being damaged by the laser in some areas.

First, with reference to FIGS. 4 to 8, a liquid crystal display panel according to a first embodiment of the present invention will be described.

FIG. 4 is a plan view showing the liquid crystal display panel of FIG. 1 according to the first embodiment of the present invention. FIG. 5 is a diagram showing a portion of the display area of FIG. 4. FIG. 6 is a diagram illustrating an example of a cross section of one subpixel shown in FIG. 5 . FIG. 7 is a diagram showing a cross section taken along line A-A' of FIG. 5. FIG. 8 is a diagram showing a cross section taken along line B-B' of FIG. 5.

As shown in FIG. 4, the liquid crystal display panel 100 according to the first embodiment of the present invention includes a first substrate 110 including a display area (AA) and a non-display area (NA), and a display area (AA). ), a plurality of first and second common electrode patterns (CE1, CE2) arranged in a matrix and alternating with each other in the first direction (left and right directions in FIG. 4), and a plurality of border areas (BDA) of the non-display area (NA) A first shielding dummy pattern (SDPN1; Shielding Dummy PatterN 1) corresponding to a portion adjacent to each of the first common electrode patterns (CE1), and a plurality of second common electrode patterns in the border area (BDA) of the non-display area (NA) (CE2) further includes a second light-shielding dummy pattern (SDPN2) corresponding to a portion adjacent to each and alternately arranged in parallel with the first light-shielding dummy pattern (SDPN1) in the first direction (left and right directions).

In addition, the liquid crystal display panel 100 has first common electrode patterns ( A first connecting line (CNL1; ConNecting Line 1) in the second direction (vertical direction) connecting CE1), and a first common electrode pattern (CE1) among the plurality of second common electrode patterns (CE2) It further includes a second connection line (CNL2) in the first direction connecting adjacent second common electrode patterns (CE2) in one direction (left and right directions).

In addition, the liquid crystal display panel 100 corresponds to the pad area (PADA) of the non-display area (NA) and is connected to an external circuit board that supplies a driving signal for driving a thin film transistor array (TFT array). PAD), a first routing line (RL1) connecting each of the first connection lines (CNL1) and the pad section (PAD), and a second routing connecting between each of the second connection lines (CNL2) and the pad section (PAD) It may further include a line (RL2). Here, the first and second routing lines RL1 and RL2 are arranged in the non-display area NA.

The plurality of first and second common electrode patterns CE1 and CE2 are arranged in a matrix in the display area AA and are spaced apart from each other. Additionally, each of the plurality of first and second common electrode patterns CE1 and CE2 corresponds to two or more pixel areas PA adjacent to each other in the first and second directions.

The plurality of first common electrode patterns (CE1) are connected to adjacent first common electrode patterns (CE1) in the second direction through the first connection line (CNL1) in the second direction.

The plurality of second common electrode patterns (CE2) alternate with the plurality of first common electrode patterns (CE1) in the first direction (left and right directions). That is, the vertical rows in which the first common electrode pattern (CE1) is arranged and the vertical rows in which the second common electrode patterns (CE2) are arranged alternate in the first direction.

Additionally, the plurality of second common electrode patterns (CE2) are connected to adjacent second common electrode patterns (CE2) in the first direction through the second connection line (CNL2) in the first direction.

In addition, the number of first connection lines (CNL1) corresponding to the vertical rows in which the first common electrode patterns (CE1) are arranged in the second direction may be one or more. That is, the first common electrode patterns (CE1) arranged side by side in the second direction are two or more first connection lines arranged at the boundary between two or more pixel areas (PA) corresponding to each first common electrode pattern (CE1). They are interconnected with (CNL1).

In addition, two or more first connection lines (CNL1) corresponding to the first common electrode pattern (CE1) adjacent to the first light-shielding dummy pattern (SDPN1) are connected to each other through the first light-shielding dummy pattern (SDPN1).

Specifically, as shown in FIG. 5, the liquid crystal display panel 100 includes a plurality of unit pixels (P), and each unit pixel (P) has two or more sub pixels corresponding to different colors and arranged side by side. It may be composed of pixels (SP1, SP2, SP3). Exemplarily, two or more sub-pixels (SP1, SP2, SP3) corresponding to each unit pixel (P) are arranged side by side in the first direction (left and right directions of FIG. 5), and red (R) and green (G) and first, second, and third subpixels (SP1, SP2, SP3) corresponding to blue (B).

As mentioned above, a plurality of pixel areas corresponding to a plurality of subpixels (SP1, SP2, SP3) are defined by gate lines (GL) and data lines (DL) that intersect each other.

Each of the plurality of first and second common electrode patterns (CE1, CE2) may correspond to two or more unit pixels (P) adjacent to each other. In Figure 5, it is shown that each of the plurality of first and second common electrode patterns (CE1, CE2) corresponds to two unit pixels (P) adjacent to each other in the second direction (up and down direction in Figure 5), but this is only an example. In addition, the number of unit pixels (P) corresponding to each of the plurality of first and second common electrode patterns (CE1, CE2) depends on touch sensitivity, the width of the liquid crystal display panel 100, and the burden on the touch driver (not shown). It is natural that it can be changed at any time.

Among the plurality of first common electrode patterns (CE1), first common electrode patterns (CE1) adjacent to each other in the second direction (up and down direction) are connected through a first connection line (CNL1). The first connection line (CNL1) may be disposed in a form extending in the second direction at the boundary between two or more pixel areas corresponding to each first common electrode pattern (CE1). This first connection line (CNL1) overlaps the data line (DL).

At this time, as shown in FIG. 8, the first connection line (CNL1) is disposed on the same layer as the first and second common electrode patterns (CE1 and CE2). Accordingly, in order to prevent the first common electrode pattern (CE1) from being connected to the second common electrode pattern (CE1) adjacent in the first direction through the first connection line (CNL1), the first common electrode pattern (CE1) ) and the second common electrode pattern (CE2), the first connection line (CNL1) is not disposed at the boundary.

As shown in FIG. 5, among the plurality of second common electrode patterns (CE2), the second common electrode pattern (CE2) adjacent in the first direction (left and right directions) with the first common electrode pattern (CE1) in between is the second common electrode pattern (CE2). It is connected through the connection line (CNL2). As previously mentioned, the second connection line (CNL2) is disposed on a different layer from the first connection line (CNL1). That is, the second connection line (CNL2) is separated from the first connection line (CNL1) and the first and second common electrode patterns (CE1, CE2) by a predetermined insulating film, and is connected to the second common electrode through a contact hole penetrating the insulating film. It is connected to the electrode (CE2).

The second connection line CNL2 may be disposed extending in the first direction at the boundary between two or more pixel areas corresponding to the second common electrode patterns CE2 arranged in parallel in the first direction. This second connection line (CNL2) overlaps the gate line (GL).

In this way, the first common electrode patterns (CE1) connected in the second direction through the first connection line (CNL1) and the second common electrode patterns (CE1) connected in the first direction through the second connection line (CNL2) CE2) are used as receiving touch lines (RL1 to RLs in FIG. 1) and transmitting touch lines (TL1 to TLk) during the touch detection period.

That is, the plurality of first and second common electrode patterns (CE1, CE2) are maintained at a common voltage during the image output period and are used as a common electrode to generate an electric field together with the pixel electrode of each sub-pixel (SP1, SP2, SP3). do. Additionally, the plurality of first and second common electrode patterns (CE1, CE2) are used as a plurality of receiving touch lines (RL1 to RLs in FIG. 1) and a plurality of transmitting touch lines (TL1 to TLk) during the touch detection period.

In addition, each of the plurality of first and second common electrode patterns CE1 and CE2 may be made of a transparent conductive material to minimize a decrease in light transmittance of each pixel area. At this time, since the transparent conductive material is a material with relatively high resistance, it is necessary to lower the resistance of the plurality of first and second common electrode patterns (CE1 and CE2).

Accordingly, in order to lower the resistance of the first common electrode pattern (CE1), the first connection pattern (CNL1) connects the neighboring first connection line (CNL1) in the area within each first common electrode pattern (CE1) and connects the gate. It may be configured to further include an extension portion overlapping the line GL.

Additionally, in order to lower the resistance of the second common electrode pattern (CE2), the liquid crystal display panel (100) overlaps the gate line (GL) and the data line (DL) in the area within each second common electrode pattern (CE2). It may further include a auxiliary connection pattern (SCNL; Sub ConNecting Line) in the form of.

As shown in FIG. 7, the auxiliary connection pattern (SCNL) may be disposed on the second common electrode pattern (CE2).

Meanwhile, a thin film transistor array (TFT array) corresponds to a plurality of subpixels (SP1, SP2, and SP3) and includes a plurality of thin film transistors for independently driving the plurality of subpixels (SP1, SP2, and SP3).

As shown in FIG. 6, the thin film transistor (TFT) corresponding to each sub-pixel (SP) is disposed on one side of the first substrate 110 and includes a channel region (ACT1), a source region (ACT2) on both sides thereof, and An active layer (ACT) including a drain region (ACT3), a gate electrode (GE) disposed on the gate insulating film 111 covering the active layer (ACT) and overlapping the channel region (ACT1), and a gate electrode (GE) A source electrode (SE) disposed on the covering source-drain insulating film 112 and connected to the source area (ACT2), and a drain electrode (DE) disposed on the source-drain insulating film 112 and connected to the drain area (ACT3). may include.

Additionally, the gate line (GL in FIG. 5) may be disposed on the gate insulating film 111 together with the gate electrode (GE), and the data line (DL) may be placed on the source electrode (SE) and the drain electrode (DE). -Can be disposed on the drain insulating film 112.

These gate lines (GL), data lines (DL), and thin film transistors (TFT) are covered with the first interlayer insulating film 113.

And, as shown in FIG. 7, the second connection line CNL2 is disposed on the first interlayer insulating film 113.

A plurality of second common electrode patterns (CE2) are disposed on the second interlayer insulating film 114 covering the second connection line (CNL2), and are connected to the second connection line (CNL2) through a contact hole. Accordingly, the second common electrode patterns (CE2) adjacent in the first direction with the first common electrode pattern (CE1) in between are connected to each other through the second connection line (CNL2).

As shown in FIG. 8 , a plurality of first common electrode patterns CE1 are also disposed on the second interlayer insulating film 114 . And, the first connection line (CNL1) is disposed on the second interlayer insulating film 114 so as to be in contact with the first common electrode pattern (CE1). Through this first connection line (CNL1), first common electrode patterns (CE1) adjacent in the second direction are connected to each other.

The plurality of first and second common electrode patterns (CE1, CE2) and the first connection line (CNL1) are covered with the third interlayer insulating film 115.

A pixel electrode (PE) corresponding to each sub-pixel (SP1, SP2, SP3) may be disposed on the third interlayer insulating film 115. In this case, as shown in FIG. 6, the pixel electrode (PE) is connected to the thin film transistor (TFT) through a contact hole penetrating the first, second, and third interlayer insulating films 113, 114, and 115.

In addition, although not separately shown, the first and second light-shielding dummy patterns SDPN1 and SDPN2 of FIG. 4 may be disposed on the first interlayer insulating film 113 together with the second connection line CNL2. In this way, the first and second light blocking dummy patterns (SDPN1, SDPN2) will be disposed on a different layer from the gate line (GL), the data line (DL), and the first and second common electrode patterns (CE1, CE2), respectively. This allows easy connection failure to be prevented. However, the first embodiment of the present invention is not limited to this, and depending on the design, the first and second light-shielding dummy patterns (SDPN1, SDPN2) may be disposed on the gate insulating film 111 or the source-drain insulating film 112. It is natural that it exists.

Additionally, a black matrix BM and color filters R, G, and B may be disposed on the second substrate 130 opposite one side of the first substrate 110.

The black matrix (BM) corresponds to the outside of each pixel area.

The black matrix BM has a width that is at least wider than the first and second connection lines CNL1 and CNL2, and is arranged to cover at least the first and second connection lines CNL1 and CNL2.

Color filters (CF(R), CF(G), CF(B)) correspond to each pixel area. By these color filters (CF(R), CF(G), and CF(B)), the first, second, and third subpixels (SP1, SP2, and SP3) included in each unit pixel (P) are red. , can correspond to green and blue.

The liquid crystal layer 150 may be made of a liquid crystal material injected between the first and second substrates 110 and 130 bonded to each other through a sealing layer (140 in FIG. 2).

In addition, the liquid crystal display panel 100 is disposed on the first and second substrates 110 and 130, and may further include alignment films 181 and 182 for specifying the initial tilt direction of the liquid crystal material of the liquid crystal layer 150. You can.

As described above, according to the first embodiment of the present invention, the first and second light blocking dummy patterns SDPN1 and SDPN2 are disposed in the border area BDA of the non-display area NA and are oriented in the first direction (left and right directions). They are arranged alternately side by side. These first and second light-shielding dummy patterns SDPN1 and SDPN2 overlap with the auxiliary resistor pattern SRPN disposed on the other side of the first substrate 110. As a result, the degree to which the insulating materials in the boundary area (BDA) are exposed to the laser for forming the auxiliary resistance pattern (SRPN) can be reduced.

Specifically, during the process of irradiating a laser to a metal material to form an auxiliary resistance pattern (SRPN), the light and heat generated by the laser penetrate the first substrate 110 and form one surface of the first substrate 110. It flows into the insulating materials and metal patterns placed on the.

Here, the insulating materials in the liquid crystal display panel 100 include a gate insulating film 111, a source-drain insulating film 112, and first, second and third interlayer insulating films 113, 114, and 115 for insulating each conductive layer. ) includes. In addition, the insulating materials in the liquid crystal display panel 100 may include alignment films 181 and 182 for initially aligning the liquid crystal layer 150. Additionally, the metal patterns disposed on one side of the first substrate 110 include a gate line (GL), a data line (DL), and first and second connection patterns (CNL1, CNL2). These metal patterns reflect or disperse light and heat generated by the laser, thereby reducing the effect of the laser on the insulating materials in the liquid crystal display panel 100.

In particular, in the case of an area where the metal patterns are evenly arranged, the laser can be prevented from focusing on a specific area, and thus damage to the insulating material caused by the laser and the resulting foreign substances can be prevented. On the other hand, in an area where fewer metal patterns are arranged compared to other surrounding areas, damage to the insulating material by the laser can easily occur.

FIGS. 9A and 9B are diagrams illustrating defects that may occur when the second light-shielding dummy pattern of FIG. 4 is not included.

As shown in FIG. 9A, the first connection line CNL1 extends in a second direction (up and down) parallel to the separation direction between the pad area PADA and the display area AA. Therefore, the metal pattern connected to the first connection line CNL1 may be disposed in the boundary area BDA between the pad area PADA and the display area AA. That is, a metal pattern connected to the first connection line CNL1 and a first light-shielding dummy pattern SDPN1 for connecting them are disposed in an area adjacent to each first common electrode pattern CE1 in the boundary area BDA.

On the other hand, the second connection line CNL2 extends in the first direction (left and right directions) crossing the separation direction between the pad area PADA and the display area AA. Therefore, the metal pattern connected to the second connection line (CNL2) is placed in another part of the non-display area (NA) corresponding to both sides of the second connection line (CNL2), and therefore cannot be placed in the border area (BDA). That is, relatively fewer metal patterns are disposed in the area of the boundary area BDA adjacent to the second common electrode pattern CE2 than in the area adjacent to the first common electrode pattern CE1.

Accordingly, the laser may be focused on an area of the boundary area BDA adjacent to the second common electrode pattern CE2, and as a result, the insulating material may be easily damaged and foreign matter M may be generated.

And, as shown in FIG. 9B, image quality defects such as light leakage or mura may occur at the edge of the display area AA where the foreign matter M is generated.

However, as shown in FIG. 4, the liquid crystal display panel 110 according to the first embodiment of the present invention has first and second panels corresponding to the boundary area (BDA) between the pad area (PADA) and the display area (AA). 2 Includes shading dummy patterns (SDPN1, SDPN2). Due to these first and second light-shielding dummy patterns (SDPN1, SDPN2), the ratio of the metal pattern being disposed in the area adjacent to the second common electrode pattern (CE2) in the boundary area (BDA) and the ratio of the first common electrode pattern (CE1) ) The ratio of metal patterns arranged in areas adjacent to ) may become similar. Accordingly, the laser can be prevented from focusing on the area adjacent to the second common electrode pattern CE2 in the boundary area BDA, and thus damage to the insulating material and the generation of foreign substances due to the concentration of the laser can be suppressed.

Meanwhile, the liquid crystal display panel 100 of the first embodiment shown in FIG. 4 includes only first and second common electrode patterns (CE1 and CE2). Alternatively, the liquid crystal display panel may further include a third common electrode pattern inserted between the first and second common electrode patterns (CE1 and CE2) to improve the sensitivity of touch sensing.

Figure 10 is a plan view of a liquid crystal display panel according to a second embodiment of the present invention.

As shown in FIG. 10, the liquid crystal display panel 100' according to the second embodiment includes a plurality of third common electrode patterns (CE3) disposed on both sides of each of the plurality of first common electrode patterns (CE1). It further includes a third connection line (CNL3) in the second direction connecting the third common electrode patterns (CE3) adjacent to each other in the second direction (vertical direction) among the third common electrode patterns (CE3).

In this case, the third connection lines (CNL3) disposed on both sides of the first common electrode pattern (CE1) adjacent to the first light-shielding dummy pattern (SDPN1) may be connected to each other through the first light-shielding dummy pattern (SDPN1).

That is, according to the first embodiment, the first light-shielding dummy pattern SDPN1 is used to connect two or more first connection lines CNL1 corresponding to the first common electrode pattern CE1 in each vertical column.

In contrast, according to the second embodiment, the first light-shielding dummy pattern (SDPN1) corresponds to a portion adjacent to the first common electrode pattern (CE1) and the third common electrode pattern (CE3) disposed on both sides thereof, and It can be used to connect third connection lines (CNL3) connecting the third common electrode patterns (CE3) arranged side by side in the second direction on both sides of the common electrode pattern (CE1).

As shown in FIG. 10, the liquid crystal display panel 100' according to the second embodiment further includes a third common electrode pattern (CE3) and a third connection line (CNL3) and a first light-shielding dummy pattern (SDPN1). ) is the same as the first embodiment of FIG. 4 except that it is used to connect the third connection line (CNL3), so redundant description will be omitted below.

Meanwhile, unlike the first and second embodiments, the liquid crystal display panel has a third light-shielding panel separately from the first and second light-shielding dummy patterns (SDPN1, SDPN2) adjacent to the first and second common electrode patterns (CE1, CE2). A dummy pattern (SDPN3) may be further included.

Figure 11 is a plan view of a liquid crystal display panel according to a third embodiment of the present invention.

As shown in FIG. 11, the liquid crystal display panel 100" according to the third embodiment has a third light-shielding dummy pattern corresponding to the border area BDA and disposed in a floating state between each of the first and second routing lines. (SDPN3). As shown in FIG. 11, the liquid crystal display panel 100" according to the third embodiment is similar to that of FIG. 4, except that it further includes a third light-shielding dummy pattern (SDPN3). Since it is the same as the first embodiment, redundant description is omitted below.

In this way, by the third light-shielding dummy pattern SDPN3 according to the third embodiment, the ratio of metal patterns arranged in the border area BDA can be further increased, and the heat emission path by the laser can be increased. As a result, damage to the insulating material and generation of foreign substances due to the concentration of the laser can be further suppressed.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible without departing from the technical spirit of the present invention. It will be clear to those who have the knowledge of.

100, 100', 100": Liquid crystal display panel 110: First substrate
AA: Display area NA: Non-display area
BDA: Boundary area PADA: Pad area
120: Shielding SRPN: Auxiliary resistance pattern
CE1, CE2, CE3: first, second and third common electrode patterns
CNL1, CNL2, CNL3: 1st, 2nd and 3rd connection lines
SDPN1, SDPN2, SDPN3: 1st, 2nd and 3rd shading dummy patterns

Claims (10)

A first substrate including a display area where an image is displayed and a plurality of pixel areas corresponding to a plurality of sub-pixels are defined, and a non-display area including a border area outside the display area and in contact with an edge of the display area;
a plurality of first and second common electrode patterns disposed on one surface of the first substrate, arranged in a matrix in the display area, each corresponding to two or more pixel areas among the plurality of pixel areas, and alternating with each other in a first direction;
a shielding film disposed on the other side of the first substrate and corresponding to at least the display area;
an auxiliary resistance pattern disposed on the other side of the first substrate, in contact with the shielding film, and corresponding to a portion of the non-display area;
a first light-shielding dummy pattern disposed on one surface of the first substrate, corresponding to a portion of the boundary area adjacent to each of the plurality of first common electrode patterns, and overlapping the auxiliary resistance pattern; and
It is disposed on one surface of the first substrate, corresponds to a portion of the boundary area adjacent to each of the plurality of second common electrode patterns, overlaps the auxiliary resistance pattern, and is parallel to the first light-shielding dummy pattern in the first direction. A liquid crystal display panel including second light-shielding dummy patterns arranged alternately.
According to claim 1,
The non-display area further includes a pad area that contacts an edge of the first substrate and corresponds to a pad portion to which a circuit board that supplies a driving signal is connected,
The border area is disposed between the pad area and the display area,
The auxiliary resistance pattern is a liquid crystal display panel corresponding to the remaining area of the non-display area excluding the pad area.
According to claim 1,
a first connection line in a second direction connecting adjacent first common electrode patterns among the plurality of first common electrode patterns in a second direction crossing the first direction; and
A second connection line in the first direction that is insulated from the first connection line and connects adjacent second common electrode patterns in the first direction with the first common electrode pattern among the plurality of second common electrode patterns therebetween. A liquid crystal display panel further comprising:
According to claim 3,
The first common electrode patterns arranged side by side in the second direction are interconnected by two or more first connection lines disposed at boundaries between two or more pixel areas corresponding to each of the first common electrode patterns,
The liquid crystal display panel wherein the two or more first connection lines corresponding to the first common electrode pattern adjacent to the first light-shielding dummy pattern are interconnected through the first light-shielding dummy pattern.
According to claim 3,
a plurality of third common electrode patterns disposed on both sides of each of the plurality of first common electrode patterns to be inserted between the first and second common electrode patterns; and
It further includes a third connection line in a second direction connecting adjacent third common electrode patterns in the second direction among the plurality of third common electrode patterns,
A liquid crystal display panel wherein third connection lines disposed on both sides of the first common electrode pattern adjacent to the first light-shielding dummy pattern are interconnected through the first light-shielding dummy pattern.
According to claim 3,
The non-display area further includes a pad area that contacts an edge of the first substrate and corresponds to a pad portion to which a circuit board that supplies a driving signal is connected,
a first routing line corresponding to the non-display area and connecting each of the first connection lines and the pad portion;
a second routing line corresponding to the non-display area and connecting each of the second connection lines and the pad portion; and
The liquid crystal display panel further includes a third light-shielding dummy pattern corresponding to the boundary area, disposed in a floating state between each of the first and second routing lines, and overlapping the auxiliary resistor pattern.
According to claim 3,
a gate line disposed on one surface of the first substrate and oriented in the first direction;
a data line in the second direction and disposed on an insulating film covering the gate line; and
disposed between gate lines and data lines that intersect each other to define the plurality of pixel areas, and further comprising a plurality of thin film transistors corresponding to the plurality of sub-pixels,
The first connection line overlaps the data line,
The liquid crystal display panel wherein the second connection line overlaps the gate line.
According to claim 7,
The second connection line is disposed on the first interlayer insulating film covering the gate line and the data line,
The first and second common electrode patterns are disposed on a second interlayer insulating film covering the second connection line,
The liquid crystal display panel wherein the first connection line is disposed on the second interlayer insulating film and is in contact with the first common electrode pattern.
According to claim 8,
The second connection line is connected to the second common electrode pattern through a contact hole penetrating the second interlayer insulating film.
According to claim 1,
a second substrate facing one side of the first substrate; and
A liquid crystal display panel further comprising a liquid crystal layer disposed between the first and second substrates.

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