KR20180012385A - forming method of nanostructure pattern by vacuum deposition, manufacturing method of sensor device and sensor device thereby - Google Patents

Abstract

The present invention provides a nanostructure pattern forming method by vacuum deposition, a manufacturing method of a sensor device using the same, and a sensor device manufactured by the same. The manufacturing method of a sensor device using a vacuum deposition process comprises: a first step of forming a mask pattern layer exposing an area of an upper portion of a base material; a second step of setting a vacuum deposition condition satisfying a minimum critical radius of a nanostructure required for nanostructure growth on an upper portion of the mask pattern layer and the exposed area of the base material; a third step of growing a nanostructure on the upper portion of the mask pattern layer and the exposed area of the base material by a vacuum deposition process; and a fourth step of removing the mask pattern layer to form a nanostructure on the exposed area of the base material to form a nanostructure pattern on the upper portion of the base material. Accordingly, the present invention sets a vacuum deposition condition satisfying a minimum critical radius of a nanostructure required for nanostructure growth to use a vacuum deposition process to form a nanostructure pattern on an upper portion of a base material to simplify a process and easily form a nanostructure pattern having a uniform nanostructure distribution. A heat treatment process is not needed to form a nanostructure pattern on a flexible substrate such as a polymer substrate vulnerable to a high temperature. Deformation of a shape and a thickness of a nanostructure is minimized to provide a high quality device.

Description

[0001] The present invention relates to a method of forming a nanostructure pattern by vacuum deposition, a method of manufacturing a sensor element using the same,

The present invention relates to a method for forming a nanostructure pattern by using a vacuum deposition process, and more particularly, to a method of forming a nanostructure pattern by forming a vacuum deposition condition satisfying a minimum critical radius of a nanostructure necessary for growing a nanostructure, A method of manufacturing a sensor element using the same, and a sensor element manufactured thereby.

In recent years, studies on nanostructures and their fabrication methods have been actively pursued in accordance with the trend toward high integration and miniaturization of devices. In general, nanostructures exhibit different properties depending on the particle size, material, and shape.

Such nanostructures are utilized in various fields such as materials, electric and electronic fields as well as biotechnology, and are used in various fields such as display, sensor, laser, LED, solar cell, and capacitor by forming a specific pattern.

In a conventional method of forming a nanostructure, a chemical process (Korean Patent No. 10-1032791) in which a dispersion solvent containing nanoparticles is coated on a substrate and a solvent is removed through a sintering process (Korean Patent No. 10-1032791) It has been widely used because it can be mass-produced at a high cost.

However, this conventional chemical method has disadvantages in that uniform adsorption of nanoparticles on a large-sized substrate is not easy, and the size control of nanoparticles is not easy and the utilization thereof is low.

In addition, this method is not easy to form a pattern, has a high temperature and pressure in a sintering process, and has difficulty in a process. It is difficult to uniformly disperse nanoparticles in a solvent and to distribute the nanoparticles uniformly on a substrate , And does not contribute to improvement of efficiency using nanoparticles.

In particular, nanoparticles exhibit various properties depending on the size, shape, etc. of the pattern. In order to utilize these characteristics, it is very important to control the pattern using nanoparticles for each application field and to form a pattern having a uniform distribution of nanoparticles in a desired shape and size at appropriate positions.

Accordingly, a method of forming a nanopattern by various methods has been studied. In the past, a method including a photolithography process or a nanoimprint lithography process, a thin film deposition process, a patterning process, an etching process, And a technique for forming nanoparticles on the seed layer (Korean Patent Registration No. 1419531, Application No. 10-2015-0001430).

However, in the above method, since a mask (or a mask layer) or an imprint stamp corresponding to the size and density of the nanopattern must be fabricated, the process is complicated and the formation of a single type of nanopattern corresponding to the mask or imprint stamp pattern The control of the nano pattern is not easy and the process of depositing and removing the seed layer is required and the process is complicated.

Particularly, in the case of forming a sensor detection material used for a sensor element, a photoresist pattern is formed on a substrate, and a dispersion solvent containing nanoparticles by the chemical method described above is dropped on the substrate on which the photoresist pattern is formed However, it is difficult to uniformly form a nanostructure on the detection material formation region due to the agglomeration of nanoparticles as described above. Thus, a sensor device with high sensitivity There have been difficulties in making.

In addition, these processes must be accompanied by a heat treatment process at a high temperature of 500 ° C or more, such as forming a nanostructure by inducing de-wetting by a heat treatment process. Thus, the time required for the temperature increase The process takes a long time and the heat treatment is carried out at a temperature higher than 500 ° C, which makes it difficult to form a nanostructure on a flexible substrate such as a polymer substrate.

Further, diffusion and intermixing of the element material may occur due to the heat treatment process at a high temperature, or the shape and thickness of the nanostructure may be deformed, which may degrade the quality and characteristics of the device. do.

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above problems, and it is an object of the present invention to provide a method of forming a nanostructure pattern on a substrate using a vacuum deposition process by setting vacuum deposition conditions satisfying a minimum critical radius of a nano- A method of manufacturing a sensor element using the same, and a sensor element manufactured by the method.

According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a mask pattern layer exposing a part of an upper surface of a substrate; A third step of growing a nanostructure on the exposed region of the substrate and the mask pattern layer by a vacuum deposition process and a second step of forming a mask pattern layer on the mask pattern layer, And a fourth step of forming a nanostructure pattern on the substrate by forming a nanostructure on the exposed region of the substrate to form a nanostructure pattern on the substrate, and a method of forming the nanostructure pattern by vacuum deposition .

In order to achieve the above object, the present invention also provides a GaN-based buffer layer formed on a substrate, a GaN layer formed on the buffer layer, an Al _x Ga _{1 - x} N layer formed on the GaN layer, an InAlN layer and an InAlGaN layer Preparing a substrate including one layer selected from the group consisting of a source electrode and a drain electrode formed on the one layer and masking the source electrode and the drain electrode, (B) forming a mask pattern layer for exposing a region of the substrate, and forming a vacuum deposition condition that satisfies a minimum critical radius of the nanostructure necessary for growing the nanostructure on the exposed region of the substrate and the mask pattern layer (D) growing the nanostructure on the exposed region of the substrate and the mask pattern layer by a vacuum deposition process, and (d) And forming a nanostructure pattern on the substrate by forming a nanostructure on the exposed region of the substrate by using the nanostructure pattern formed by the vacuum deposition method. And a sensor element manufactured thereby.

The present invention relates to a method of forming a nanostructure pattern on a substrate using a vacuum deposition process by setting vacuum deposition conditions that satisfy a minimum critical radius of a nanostructure necessary for growing the nanostructure, There is no need to produce a mask or an imprint stamp of the substrate or a step of forming a seed layer, thereby simplifying the process.

In addition, it is possible to form various types of nanostructure patterns easily and easily according to vacuum deposition conditions, and basically, the nanostructures can be uniformly distributed on a substrate. In addition to the size and shape of the nanostructure pattern Position control can be easily performed, and the nanostructure pattern can be easily formed while having a uniform nanostructure distribution as a whole.

In addition, by setting special vacuum deposition conditions, a conventional heat treatment process is not required, and the process time for warming and lowering the temperature to a high temperature heat treatment temperature is drastically shortened, which is economical. It is expected that the formation of the nanostructure pattern is easy and the application fields thereof will be diversified.

Further, a heat treatment step at a high temperature is not required, problems such as diffusion and mixing of element materials can be prevented, and the shape and thickness deformation of the nanostructure can be minimized, thereby providing a high-quality device.

Particularly, in the case of forming the detection region used for the sensor element, the detection substance is formed in the nanostructure pattern on the detection substance formation region by the vacuum deposition process according to the specially set vacuum deposition condition, not by the conventional chemical method It is easy to form a uniform detection region and it is possible to provide a sensor element with high sensitivity.

1 and 2 are schematic views of a method of forming a nanostructure pattern by vacuum deposition according to the present invention.
FIGS. 3 and 4 are schematic views illustrating a method of manufacturing a sensor device using a nanostructure pattern by vacuum deposition according to the present invention. FIG.
FIG. 5 is a view showing a mechanism for setting a deposition rate and a deposition thickness range to satisfy a minimum critical radius of a nanostructure for growing a nanostructure according to the present invention. FIG.
FIG. 6 is a SEM (Scanning Electron Microscope) image of an Au nanostructure according to an Au deposition thickness control by an E-beam evaporator; FIG.
FIG. 7 - Diameter distribution of Au nanostructures during Au deposition of 0.75, 1.5 and 5 nm thickness by electron beam evaporator.
Figure 8 - SEM and optical microscope images and component analysis (EDX) of Au nanostructure and Au nanostructure patterns after 1.5 nm thick Au deposition on Si substrate and Polycarbonate (PC) substrate using electron beam evaporator Fig.
FIG. 9 is a graph showing the shape analysis (SEM and optical microscope image) and the component analysis (EDX) of Pt nanostructure and Pt nanostructure pattern after 1.5 nm thick Pt deposition on a Si substrate and a PC substrate using an electron beam evaporator .
FIG. 10 is a graph showing the shape analysis (SEM and optical microscope image) and the component analysis (EDX) of Pd nanostructure and Pd nanostructure pattern after 1.5 nm thick Pd deposition on Si substrate and PC substrate using electron beam evaporator .
11 - Pt and Pd composite nanostructures and Pt and Pd composite nano-structure patterns were formed on a Si substrate and a PC substrate by in-situ deposition of 1.5 nm thick Pt and 1.5 nm thick Pd continuously using an electron beam evaporator. (SEM & optical microscope image) and component analysis (EDX).
12 - TiO ₂ with a thickness of 1.5 nm was deposited on an Si substrate and a PC substrate using an electron beam evaporator, and then TiO ₂ (SEM and optical microscope image) and component analysis (EDX) of the nanostructure and TiO ₂ nanostructure pattern.
Fig. 13 shows the result of analyzing the shape (SEM and optical microscope image) and component analysis (EDX) of the ZnS nanostructure and ZnS nanostructure pattern after depositing ZnS on the Si substrate and PC substrate using electron beam evaporator Degree.
14 - MgF ₂ having a thickness of 1.5 nm was deposited on a Si substrate and a PC substrate using an electron beam evaporator, and then MgF ₂ (SEM and optical microscope image) and component analysis (EDX) of the nanostructure and MgF ₂ nanostructure pattern.
Fig. 15 - SEM and optical microscopy images of the InP nanostructure and InP nanostructure patterns and the component analysis (EDX) results after deposition of 15 nm of InP on a Si substrate using chemical vapor deposition Fig.
16 - SEM and optical microscope images (SEM and optical microscope image) and component analysis (EDX) results of Au nanostructure and Au nanostructure pattern after deposition of Au with 1.5 nm thickness on a Si substrate and a PC substrate by sputtering Diameter distribution of Au nanostructure.
Fig. 17 is a SEM image of an Au nanostructure pattern using nano / micro scale unevenness formed substrate. Fig.
18 shows an SEM image of an embodiment in which an Au nanostructure is applied to a sensor sensing material for application as a sensor sensing material.
FIG. 19 - Au films of 0.75 nm and 1.5 nm thickness were deposited on a PC substrate using an electron beam evaporator, and then surface plasmon resonance (SPR) was measured using an ultraviolet-visible spectrophotometer. Fig.
Figure 20 - Diagram showing surface plasmon resonance characterization data using an ultraviolet-visible spectrophotometer with 1 step process (black graph) and 2 step process (red color).

The present invention relates to a method for forming a nanostructure pattern by using a vacuum deposition process, and more particularly, to a method of forming a nanostructure pattern by forming a vacuum deposition condition satisfying a minimum critical radius of a nanostructure necessary for growing a nanostructure, To form a nanostructure pattern.

This makes it unnecessary to manufacture a mask or an imprint stamp or a seed layer for manufacturing a nanostructure pattern, simplifying the process, facilitating control of the nanostructure pattern for each application field according to vacuum deposition conditions, It is possible to form various types of nanostructure patterns easily and easily.

In addition, by forming the nanostructure pattern by a vacuum deposition process, basically, the nanostructure can be uniformly distributed on the substrate, and the size and shape of the nanostructure pattern as well as the position control can be easily controlled, It is easy to form a nanostructure pattern while having a distribution.

In addition, by setting the special vacuum deposition conditions, the conventional heat treatment process is not required, and the process time for heating and lowering the temperature to the high temperature heat treatment temperature is drastically shortened, and the nanostructure on the flexible substrate, It is expected that pattern formation will be easy and the application field will be diversified.

Further, it is unnecessary to carry out a heat treatment step at a high temperature, and problems such as diffusion and mixing of element materials can be prevented, and it is possible to provide a high-quality element by minimizing the shape and thickness deformation of the nanostructure.

Particularly, in the case of forming the detection region used for the sensor element, the detection substance is formed in the nanostructure pattern on the detection substance formation region by the vacuum deposition process according to the specially set vacuum deposition condition, not by the conventional chemical method It is easy to form a uniform detection region, and a sensor element with high sensitivity can be provided.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. FIGS. 1 and 2 are schematic views of a method of forming a nanostructure pattern by vacuum deposition according to the present invention, and FIGS. 3 and 4 are views showing a method of manufacturing a sensor element using a nanostructure pattern by vacuum deposition according to the present invention. Fig.

First, as shown in FIGS. 1 and 2, a method for forming a nanostructure pattern by vacuum deposition according to the present invention includes a first step of forming a mask pattern layer exposing a part of the upper surface of a substrate, A second step of setting a vacuum deposition condition that satisfies a minimum critical radius of the nanostructure necessary for growth of the nanostructure on the mask pattern layer and the exposed region of the substrate by the vacuum deposition process, A third step of growing a nanostructure on the pattern layer and a fourth step of removing the mask pattern layer and forming a nanostructure on the exposed region of the substrate to form a nanostructure pattern on the substrate .

The present invention relates to a method of forming a nanostructure pattern on a substrate. The nanostructure refers to a nanostructure having a size of several nanometers to several hundreds of nanometers and being free from the shape and size of a cylinder, a cone, a sphere, Is implemented in a predetermined pattern so as to be suitable for an application field, it is referred to as a nanostructure pattern in the present invention.

Such a nanostructure pattern may be formed in a single pattern on various types of substrates (substrate or thin film, transistor structure in a sensor element), or by repeating a single pattern or combining various patterns in accordance with application fields of devices And these patterns may be implemented regularly or irregularly. The nanostructure forming material for this purpose can be variously implemented as a single layer or a plurality of layers of homogeneous or heterogeneous materials.

As shown in FIG. 1, a method of forming a pattern of a nano structure by vacuum deposition according to the present invention is to form a mask pattern layer exposing a part of the upper part of the substrate. (Step 1)

As described above, the substrate may be of various types depending on the application of the nanostructure pattern, and may be a substrate, a thin film, a transistor structure in a sensor element, or the like.

Specifically, the substrate (the substrate in the transistor structure) may be formed of at least one selected from the group consisting of Si, GaAs, GaP, GaAsP, MgO, sapphire, quartz, and glass can be used.

In addition, depending on the field of application, the substrate may be formed of a material selected from the group consisting of polycarbonate (PC), polyethylene naphthalate (PEN), polynorbornene (PN), polyacrylate, polyvinyl alcohol , PVA), polyimide (PI), polyethylene terephthalate (PET), polyethersulfone (PES), polystyrene (PS), polypropylene (PP), polyethylene (PE), polyvinylchloride (PVC), polyamide (PA), polybutyleneterephthalate (PBT), polymethyl methacrylate (PMMA) and polydimethylsiloxane ) Can be used.

On this substrate, a mask layer made of a thermosetting resin or a photocurable resin, specifically, an imprint resin, a lithography resist, or the like may be formed, or a photosensitive film using DFR (Dry Film Resist) or the like, a SiO ₂ SiN _x and a Si ₃ N ₄ is formed and then patterned to form a mask pattern layer such that a part of the upper surface of the substrate is exposed.

On the other hand, as shown in FIG. 2, irregularities may be formed on the substrate of the first step, and a mask pattern layer may be formed to expose a part of the upper surface of the substrate on which the irregularities are formed.

The irregularities are formed by forming a nano- or micro-scale pattern on the substrate by a separate patterning and etching process, and then forming the mask pattern layer in a necessary area, thereby forming various types of nanostructure patterns .

Here, before forming the mask layer for forming the mask pattern layer, a polymer layer may be formed on the substrate, and a mask pattern layer may be formed on the polymer layer.

The polymer layer may be selectively formed depending on the kind of the substrate, the purpose of use, the kind of the mask layer formed on the substrate, or the like, and the coating property and the film property of the mask layer formed on the polymer layer And etching resistance in the dry etching process in the patterning process, contributing to the precise formation of the mask pattern layer.

The polymer layer is formed by dry-etching a part of the polymer layer using the mask pattern layer as a dry etching mask to expose a part of the lower substrate in a part of the polymer layer, As the structure is formed, it contributes to formation of a precise nanostructure pattern.

The polymer layer may be formed of a material selected from the group consisting of polyvinyl chloride (PVC), neoprene, polyvinyl alcohol (PVA), poly methyl methacrylate (PMMA), polybenzyl methacrylate (PBMA), polystyrene, spin on glass (SOG), polydimethylsiloxane , Polyvinyl formal (PVFM), parylene, polyester, epoxy, polyether, polyimide, and lift-off resist (LOR).

Then, after forming a mask pattern layer exposing a part of the substrate, a vacuum deposition condition that satisfies the minimum critical radius of the nanostructure for the growth of the nanostructure on the exposed region of the substrate and the mask pattern layer (Step 2)

That is, a vacuum deposition condition is set so as to satisfy the minimum critical radius for growing the nano structure as a nano structure without growing the nano structure, and then the exposed region of the substrate and the mask pattern layer To grow the nanostructure. (Step 3)

The vacuum deposition conditions are preferably set such that the deposition rate is in a range of 0.01 nm / second to 5 nm / second and a thickness of 30 nm or less.

This shows the mechanism for setting the deposition rate and the deposition thickness range to satisfy the minimum critical radius (r _crit in FIG. 5) of the nanostructure for nanostructure growth, as shown in FIG.

As shown in FIG. 5, when the radius of the nanostructure is r _crit or more, the nanostructure can be continuously grown so that it grows as a crystal nucleus and exists as a stable nanostructure. When the radius of the nanostructure is r _crit Or less, the thermodynamically stable state can not be maintained, so that the particles can not grow into nuclei, and the unstable particle state is maintained.

The vacuum deposition condition according to the present invention is that the deposition rate is in the range of 0.01 nm / sec to 5 nm / sec and the nanostructure is grown to a thickness of 30 nm or less. When the condition is that the radius of the nanostructure is r _crit or more Followed by a minimum radius condition that can grow into crystal nuclei.

In other words, when the deposition rate is out of the range, the crystal nuclei that can grow as a nanostructure can not be formed, and cotton growth occurs mainly through volume growth rather than volume growth. When the thickness of the nanostructure is thicker than that, Growth is made by thin film instead of structure.

By thus growing the nanostructure by the vacuum deposition process, it is possible to uniformly distribute the nanostructure on the substrate, and it is possible to easily control the position and the size of the nanostructure pattern as well as the pattern, do.

In addition, by growing the nanostructure by a vacuum deposition process, it is not necessary to manufacture a separate mask or imprint stamp or a seed layer forming process for manufacturing the nanostructure pattern, and the process is simple, and the nanostructure The pattern can be easily controlled and the formation of various types of nanostructure patterns can be easily and easily formed.

After the vacuum deposition conditions are set, the nanostructure is grown on the exposed region of the substrate and on the mask pattern layer by a vacuum deposition process under vacuum deposition conditions satisfying the minimum critical radius of the nanostructure.

That is, the nanostructure is grown while satisfying the minimum critical radius condition for nanostructure formation using the set vacuum deposition conditions.

The nanostructure may be first grown by a vacuum deposition process under a vacuum deposition condition satisfying a minimum critical radius of the nanostructure, plasma treatment or heat treatment may be performed on the primarily grown nanostructure, And secondarily growing the nanostructure at a relatively higher deposition rate than the deposition conditions.

In other words, a low-speed deposition rate is set so that a nanostructure having a minimum critical radius required for nanostructure formation in the first step is formed in order to form a uniform nanostructure by the 2 step method. And then the nuclei are crystallized through plasma treatment or heat treatment. In the second step, nanostructures are formed at a relatively higher deposition rate than the vacuum deposition conditions in the first step Thereby making it possible to form uniform nanostructures with excellent crystallinity in a short period of time as a whole.

In addition, after the nanostructure is first grown by a vacuum deposition process under a vacuum deposition condition that satisfies the minimum critical radius of the nanostructure, the nanostructure is grown at a deposition rate different from the deposition rate in the vacuum deposition condition, (1 + n) (where n is a natural number of 1, 2, 3, ..., and n is a natural number) of the same or different nanostructures.

That is, to control the crystallinity of the nanostructure by the (1 + n) step method and to realize the growth of the nanostructure having various composition profiles or crystal structures. In the first step, A low rate deposition rate is set to produce a nanostructure with the required minimum critical radius to induce uniform size nucleation and a different deposition rate, such as a higher deposition rate, a lower deposition rate, (1 + n) (n is 1, 2, 3,, and n are natural numbers) at the deposition rate alternately implemented.

Here, the nanostructures grown in each deposition step can be grown with different deposition rates in the same kind, and can be grown with different deposition rates in different kinds.

Thus, various composition profiles, crystal structures, surface states, and shapes according to the deposition rate can be realized while achieving uniform growth and crystallinity of the nanostructure, thereby adapting to various application fields.

In addition, after the first nano structure is grown, plasma processing or heat treatment may be selectively performed on the nano structure grown in the first nano structure before the next nano structure growth. This may further improve the crystallinity of the grown nano structure Thereby improving the characteristics of the device.

As described above, in the present invention, by setting special vacuum deposition conditions for growing the nanostructure, the conventional heat treatment process becomes unnecessary, and the process time for the temperature increase and the temperature decrease to the high temperature heat treatment temperature is drastically shortened. The present invention can be applied to a flexible substrate such as a polymer substrate.

Further, the heat treatment step at a high temperature is not necessary, problems such as diffusion and mixing of element materials can be prevented, and the shape and thickness deformation of the nanostructure can be minimized, thereby providing a high-quality device.

The nanostructure can be variously provided depending on the application field. In particular, in the case of a sensor element, various materials can be deposited according to a substance to be detected, and a metal, a metal oxide, a fluoride, a sulfide and a phosphide Or more by vacuum evaporation using the above-mentioned material to form the exposed region of the substrate and the mask pattern layer.

The growth of the nanostructure can be performed multiple times or different times of the same kind of material under the same deposition condition or different deposition conditions as required for the application field and the necessity.

The growth of the nanostructure can be accomplished by a vacuum deposition process according to a predetermined vacuum deposition condition and can be realized by at least one of an electron beam evaporator, a thermal evaporation evaporator, a sputtering process, and a chemical vapor deposition . However, the present invention is not limited to such a vacuum deposition process and a variety of known vacuum deposition processes or methods may be used as needed.

Here, the diameter of the nanostructure and the spacing of the nanostructures can be basically controlled according to the vacuum deposition conditions. In addition, after the growth of the nanostructure by the vacuum deposition process, a heat treatment process or a plasma treatment process is performed, The diameter of the structure and the spacing of the nanostructures can be controlled.

Then, after the nano structure is grown on the exposed region of the substrate and the mask pattern layer, the mask pattern layer is removed to form a nanostructure on the exposed region of the substrate, (Step 4)

That is, when the mask pattern layer is removed on the substrate, a nanostructure pattern having a pattern corresponding to the mask pattern layer on the substrate is formed.

The chemical solution to be used may be acetone, isopropyl alcohol, water (H ₂ O), KOH, NaOH, NH ₄ OH, H ₂ SO ₄ , HF, HCl, H ₃ PO ₄ , HNO ₃ , CH ₃ COOH, H ₂ O ₂ and BOE (Buffered Oxide Etchant), and uses dipping or sonication.

On the other hand, an additional mask pattern layer may be formed after removal of the mask pattern layer, depending on the application field and the purpose of use, and the nanostructure of the third step and / By additionally forming a homologous or heterogeneous nanostructure, a continuous or discontinuous nanostructure pattern can be additionally formed from the fourth-stage nanostructure pattern.

FIGS. 3 and 4 are schematic views illustrating a method of fabricating a sensor device using a nanostructure pattern by vacuum deposition, which includes a GaN buffer layer formed on a substrate, a GaN layer formed on the buffer layer, An Al _x Ga _{1 - x} N layer, an InAlN layer, and an InAlGaN layer, and a source electrode and a drain electrode formed on the one layer; (B) forming a mask pattern layer for masking the source electrode and the drain electrode and exposing a part of the upper surface of the substrate, (b) forming a mask pattern on the exposed region of the substrate and the growth of the nanostructure on the mask pattern layer (C) setting a vacuum deposition condition that satisfies a minimum critical radius of the nano-structure required for the substrate to be exposed, and (D) growing a nanostructure on the substrate, and (d) removing the mask pattern layer to form a nanostructure on the exposed region of the substrate to form a nanostructure pattern on the substrate .

The major structure (step (a)) of the above-described HEMT (High Electron Mobility Transistor) device is a well-known technique, which is a method of manufacturing a sensor having a high electron mobility transistor structure No. 10-2016-0036136), and a detailed description thereof will be omitted in the present invention.

Similar to the first embodiment, basically, a mask pattern layer is formed on a substrate, and a nanostructure pattern is formed by a vacuum deposition process. Therefore, the description of the substrate is omitted, (GaN) buffer layer formed on the substrate, a GaN layer formed on the buffer layer, an Al _x Ga _{1 - x} N layer formed on the GaN layer, an InAlN layer And an InAlGaN layer, and a source electrode and a drain electrode formed on the one kind of layer.

A mask pattern layer for exposing a part of the upper surface of the substrate is formed while masking the source electrode and the drain electrode on the substrate.

The x value of the Al _x Ga _{1 - x} N layer is 0 <x? 1, and a GaN cap layer having a thickness of 10 nm or less may be additionally formed on the one layer.

After the mask pattern is masked with the source and drain electrodes and a mask pattern layer is formed to expose a part of the upper surface of the substrate (after the step (b)), a part of the one layer is etched Regions can be formed.

The recessed region is a part of the exposed upper part of the substrate, that is, a part of the area between the source electrode and the drain electrode. By etching the recessed area, the area of the detection material forming area is widened to increase the sensor sensitivity.

The formation of the recessed region may be realized by dry or wet etching after masking an area other than the region where the recessed region is to be formed.

In this case, the nanostructure is grown by setting deposition conditions that satisfy the minimum critical radius condition for forming the above-described nanostructure on a part of the exposed top of the substrate, thereby forming a nanostructure pattern corresponding to the mask pattern layer Respectively.

A part of the exposed upper part of the substrate on which the nanostructure is grown becomes a part of a region between the source electrode and the drain electrode and a sensing material layer of the sensor element is formed on this area, The nanostructures are grown with the detection material for the nanostructure.

Here, the nanostructure for forming the detection material layer is formed by vacuum deposition using at least one of metal, metal oxide, fluoride, sulfide and phosphide, and reacts with a gas or biochemical substance to be detected, A material capable of changing the potential of the active layer is selected and used.

For example, Pd, Pt or Pd and Pt are used as the detection substance of hydrogen gas, ZnO nanowire is used as a detection substance of Co gas, InZnO is used as detection substance of oxygen gas, Ag / AgCl electrode, ZnO nanorod as a detection substance of clucose or lactic acid, and thioglycolic acid / Au as a detection substance of water temperature ion.

In addition to the above-exemplified detection substances, as shown in FIGS. 3 and 4, the nanostructure may be grown a plurality of times of a homogeneous or heterogeneous material, if necessary, depending on the substance or environment to be sensed After the removal of the mask pattern layer, an additional mask pattern layer is formed, and a nanostructure homogenous or different from the nanostructure of the step (D) is formed on the same region or another region where the nanostructure pattern on the substrate is formed In addition, a continuous or discontinuous nanostructure pattern may be additionally formed from the nanostructure pattern of step (e).

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

(B), (c) 5 nm, (d) 10 nm and (e) 20 nm at a deposition rate of 0.025 nm / sec using an electron beam evaporator at a deposition rate of 0.025 nm / The results of the SEM measurement of the surface after the deposition. The size of Au nanostructure was increased with increasing thickness of Au deposition, and thinning was observed when Au thickness was 20 nm or more. That is, when the Au thickness is 20 nm, it is confirmed that the size of the Au nanostructure can be controlled by controlling the thickness of the Au deposition.

FIG. 7 is a graph showing the relationship between the diameter of Au nanostructure and the size of Au nanowires when Au is deposited on a Si wafer at a deposition rate of 0.025 nm / sec using an electron beam evaporator at a thickness of 0.75 nm, (b) 1.5 nm, and (c) The distribution is shown. When the Au thicknesses were 0.75 nm, 1.5 nm, and 5 nm, respectively, the average diameters of the nanostructures were 4.6 nm, 8.3 nm, and 16.9 nm, respectively. It was confirmed that the diameter and diameter distribution of the Au nanostructure can be controlled by adjusting the Au thickness.

Si wafer and a 200 μm thick PC substrate were exposed to a photoresist in a rectangular area (10 μm by 75 μm and 20 μm by 80 μm), and then the thickness of Au was measured at an evaporation rate of 0.025 nm / sec using an electron beam evaporator After deposition at 1.5 nm, the pattern results of the nanostructures after dipping in acetone and ultrasonication for 10 minutes to remove the photoresist and N ₂ blowing are shown in FIGS. 8 (a) and (b). 8 (c) and (d)], it was confirmed that Au nanostructure formation and Au nanostructure pattern fabrication were possible on Si wafer and PC substrate.

Si wafer and a rectangular substrate area (10 탆 by 75 탆 and 20 탆 by 80 탆) on the top of a 200 탆 thick PC substrate were opened with a photoresist and then the thickness of Pt was measured with an electron beam evaporator at a deposition rate of 0.025 nm / After deposition at 1.5 nm, patterning of the nanostructure is shown in FIGS. 9 (a) and (b) after dipping in acetone to remove the photoresist and ultrasonication for 10 minutes and N ₂ blowing. 9 (c) and (d)), it was confirmed that the Pt nanostructure and the Pt nanostructure pattern can be fabricated on the Si wafer and the PC substrate.

Si wafer and a rectangular substrate area (10 탆 by 75 탆 and 20 탆 by 80 탆) on the top of a 200 탆 thick PC substrate was opened with a photoresist and then the thickness of Pd was measured at an evaporation rate of 0.025 nm / sec using an electron beam evaporator After deposition at 1.5 nm, patterning of the nanostructure is shown in FIGS. 10 (a) and (b) after dipping in acetone to remove the photoresist and ultrasonication for 10 minutes and N ₂ blowing. 10 (c) and (d)), it was confirmed that Pd nanostructure formation and Pd nanostructure pattern fabrication were possible on Si wafer and PC substrate.

Si wafer and a rectangular substrate area (10 μm by 75 μm and 20 μm by 80 μm) on the top of a 200 μm thick PC substrate were opened with a photoresist, and then an electron beam evaporator was used to deposit Pt and Pd at a deposition rate of 0.025 nm / And then patterned in acetone to remove the photoresist and subjected to ultrasonication for 10 minutes. After the N ₂ blowing, the pattern results of the composite nanostructure are shown in FIGS. 11 (a) and 11 (b) ). 11 (c) and (d)), it was confirmed that Pt and Pd composite nanostructures and Pt and Pd composite nanostructure patterns can be fabricated on Si wafer and PC substrate.

Si wafer and a rectangular substrate area (10 탆 by 75 탆 and 20 탆 by 80 탆) on the top of a 200 탆 thick PC substrate were opened with a photoresist and then the thickness of the TiO ₂ was measured with an electron beam evaporator at a deposition rate of 0.025 nm / 12 nm, and then patterned to 1.5 nm. Then, to remove the photoresist, dipping in acetone, ultrasonication for 10 minutes, and patterning of the nanostructure after N ₂ blowing are shown in FIGS. 12 (a) and 12 (b). In addition, EDX component analysis result of Fig. 12 (c), (d) ] for the manufacture of forming and TiO ₂ nanostructure pattern of the TiO ₂ nanostructure available Si wafer and the PC substrate was confirmed by.

Si wafer and a 200 μm thick PC substrate were exposed to a photoresist in a rectangular area (10 μm by 75 μm and 20 μm by 80 μm), and then the thickness of ZnS was measured at an evaporation rate of 0.025 nm / sec using an electron beam evaporator After deposition at 1.5 nm, patterning of the nanostructure is shown in FIGS. 13 (a) and 13 (b) after dipping in acetone to remove the photoresist and ultrasonication for 10 minutes and N ₂ blowing. 13 (c) and (d)), it was confirmed that ZnS nanostructure and ZnS nanostructure pattern can be formed on Si wafer and PC substrate.

Si wafer and a rectangular substrate area (10 탆 by 75 탆 and 20 탆 by 80 탆) on the top of a 200 탆 thick PC substrate were opened with a photoresist and then the thickness of MgF ₂ was measured at an evaporation rate of 0.025 nm / sec using an electron beam evaporator (Fig. 14 (a) and Fig. 14 (b) shows the results of patterning the nanostructures after N ₂ blowing, and dipping in acetone to remove the photoresist and ultrasonication for 10 minutes. In addition, EDX component analysis result of Fig. 14 (c), (d) ] for the production of formed and MgF ₂ nanostructure pattern of MgF ₂ nanostructures are possible in Si wafer and the PC substrate was confirmed by an.

A 50 nm thick SiO ₂ thin film was deposited on the top of a Si wafer by a chemical vapor deposition method. Only a rectangular region (10 μm by 75 μm and 20 μm by 80 μm) was opened with a photoresist and then subjected to a dry etching process, The Si surface was opened. Then, the InP was deposited to a thickness of 15 nm at a deposition rate of 5 nm / sec. To remove the SiO ₂ mask pattern layer, the substrate was dipped in HF for 5 minutes and rinsed on a deionized wafer. ) And (b). In addition, it was confirmed through the EDX component analysis (Fig. 15 (c)) that formation of an InP nano structure and pattern formation on a Si wafer were possible.

As shown in FIGS. 8, 12, 13, 14, and 15, it was confirmed that nanostructures having various components such as oxides, sulfides, fluorides, and phosphates as well as metals can be formed.

(10 μm by 75 μm and 20 μm by 80 μm) were exposed to photoresist at the top of a Si wafer and a 200 μm thick PC substrate, and then the thickness of Au was adjusted to 1.5 at a deposition rate of 0.25 nm / sec using sputtering nm, the pattern results of the nanostructure after the N ₂ blowing are shown in FIGS. 16 (a) and 16 (b) after dipping in acetone to remove the photoresist and ultrasonication for 10 minutes. 16 (c) and (d)), it was confirmed that Au nanostructure formation and Au nanostructure pattern fabrication were possible on Si wafer and PC substrate. The average diameter of the Au nanostructure was 16.2 nm (Fig. 16 (e)). From these results, it was possible to form Au nanostructures having a nanostructure similar to that of the electron beam evaporator. Further, when the results of FIGS. 7 (b) and 16 (e) When the deposition rate was increased from 0.025 nm / sec (average diameter 8.3 nm) to 0.25 nm / sec (average diameter 16.2 nm), the average diameter of the Au nanostructures increased. From these results, it was confirmed that the deposition rate is a factor in controlling the size of the Au nanostructure.

A pattern of 50 nm line, 500 nm line and 1 탆 line was formed on the upper side of the Si wafer by electron beam lithography and photolithography, and then the lower Si substrate was etched using electron beam lithography and photolithography resist pattern And a Si structure having a 50 nm line, a 500 nm line, and a 1 탆 line pattern (concavo-convex) having a height of 200 nm was fabricated using an etching mask for dry etching.

Then, 950 PMMA A5 (Micro Chem Co., USA) was spin-coated on the top of 50 nm line, 500 nm line and 1 μm line (nano or micro) Si structure at 2000 rpm and baked at 170 ° C. for 300 seconds to form a PMMA layer (PFPE) resin was dropped onto a silicon master stamp (Si Stamp having a hole diameter of 300 nm), and a PET (polyethylene-terephthalate) substrate was squeezed. Then, ultraviolet rays were irradiated for 3 minutes to form a pillar lt; RTI ID = 0.0 &gt; PFPE &lt; / RTI &gt; After the imprint resin was spin-coated on the top of the PMMA layer with NIP-SC28LV400 (Chem Optics, Korea), the pillar-patterned PFPE stamps were pressed, irradiated with ultraviolet rays for 2 minutes, and PFPE stamps were relieved, An imprint pattern having a hole diameter was formed on top of a Si structure having a 50 nm line, a 500 nm line and a 1 탆 line pattern. Thereafter, the imprint residual film was descumped and the PMMA layer under the 300 nm Hole was etched to expose the surface of the Si structure having 50 nm line, 500 nm line and 1 탆 line pattern located under the hole of 300 nm diameter. a).

Au was deposited to a thickness of 1.5 nm at an evaporation rate of 0.025 nm / sec using an electron beam evaporator on top of the fabricated Hole-shaped imprinted pattern and on top of a Si structure having nano / micro concave and convex openings formed inside the hole. 17 (b). As shown in FIG. 17 (b), it was confirmed that Au nanostructure was formed inside the hole.

17 (c). The result of N ₂ blowing is shown in Fig. 17 (c). Au nanostructures are formed on the top of a 50 nm line, a 500 nm line and a 1 μm line (nano or micro) It was confirmed that the pattern was patterned in a hole region having a diameter of 300 nm. From this result, it was confirmed that a nanostructure can be formed on a nano or microscale pattern (concavity and convexity).

In order to apply the technique of the present invention to a sensor detection material of a nanostructure, a 2 nm thick GaN layer [GaN cap layer] / a 20 nm thick AlGaN layer / a 2 um thick GaN buffer layer / sapphire substrate was photolithographically used for Isolation And the resist pattern was subjected to 500 nm dry etching (Isolation process [Fig. 18 (a)] using a dry etching mask. After that, only the source and drain regions of the source and drain regions were opened by photolithography for the ohmic contact, and then Ti / Al / Ni / Au (20 nm / 100 nm / 25 nm / 50 nm) 18 (b) and 18 (c)). In order to form the pad metal electrode, only the pad metal region was photolithographically patterned using photolithography to form a source electrode and a drain electrode After opening, Ti / Au (30 nm / 270 nm) was deposited using an electron beam evaporator and then the photoresist was removed to form a pad metal electrode (FIG. 18 (d)). Thereafter, only a rectangular region (20 μm by 70 μm), which is a sensor detection material region, was opened with a photoresist and then Au was deposited to a thickness of 1.5 nm at a deposition rate of 0.025 nm / sec using an electron beam evaporator. The results of the removal are shown in Fig. By this method, it was confirmed that the Au nanostructure can be uniformly formed in the entire area of the sensor detection material (20 μm by 70 μm, FIG. 18 (e)).

FIG. 19 is a graph showing the relationship between the surface plasmon resonance and the surface plasmon resonance of the surface plasmon resonance spectroscopy (hereinafter, referred to as &quot; surface plasmon resonance &quot;) using an electron beam evaporator, The results of the characteristics analysis. The maximum resonance absorption peak positions were 574 nm and 626 nm when Au of 0.75 nm thickness (average diameter of nanostructure: 4.6 nm) and 1.5 nm thickness (average diameter of nanostructure: 8.3 nm) were deposited, respectively. It can be confirmed that Au nanostructure can be formed on the PC substrate through ultraviolet-visible spectrophotometer measurement. It can be confirmed that the position of the maximum resonance absorption peak shifts to a short wavelength (blue shift) as the average diameter of the nanostructure decreases there was.

It is confirmed that Au nanostructure can be formed on a PC substrate at room temperature without heat treatment through this embodiment, and it is confirmed that it can be applied to an SRP sensor using an Au nanostructure capable of absorbing a specific wavelength.

Then, nucleation was induced by depositing on a PC substrate at an evaporation rate of 0.025 nm / sec for 30 seconds using an electron beam evaporator, and plasma nuclei (RF power: 100 W, pressure 5 mTorr and Ar 50 sccm for 30 seconds). Thereafter, the film was further deposited for 10 seconds at a deposition rate of 0.075 nm / sec using an electron beam evaporator.

FIG. 20 shows the data of the surface plasmon resonance characteristic analysis using an ultraviolet-visible light spectrophotometer based on the 1 step process (black graph) and the 2 step process (red graph).

It can be seen that the maximum absorption peak wavelength value is shifted to a shorter wavelength in the Au nanostructure by the 2 step method compared to the 1 step method, and the value of the full width at half maximum (FWHM) of the Au nanostructure by the 2 step method is 1 step The results are shown in Fig. That is, it can be seen that the diameter of the Au nanostructure by the 2 step method is smaller than that of the maximum absorption peak wavelength shifted to a shorter wavelength. From the point that the half width value of the peak is small, the size of the Au nanostructure It was confirmed that the distribution was narrower (Narrow). It can be confirmed from the present embodiment that a uniform nanostructure can be formed by the 2 step method.

In addition, through the 2 step method, the first step induces nucleation at a low deposition rate to induce the nucleation of the nucleus by external energy, and then the second step is faster than the first step to form the entire Au nanostructure It can be confirmed that there is an advantage that the time can be shortened.

Claims (28)

A first step of forming a mask pattern layer exposing a part of the upper surface of the substrate;
A second step of setting a vacuum deposition condition that satisfies a minimum critical radius of the nanostructure necessary for growing the nanostructure on the exposed region of the substrate and the mask pattern layer;
A third step of growing the nanostructure on the exposed region of the substrate and the mask pattern layer by a vacuum deposition process; And
And a fourth step of removing the mask pattern layer to form a nanostructure on the substrate so as to form a nanostructure on the exposed region of the substrate to form a nanostructure pattern on the substrate. Way. 2. The method according to claim 1,
Wherein the nanostructure is grown by a vacuum deposition process under a vacuum deposition condition satisfying a minimum critical radius of the nanostructure of the second stage. 2. The method according to claim 1,
A first step of growing a nanostructure by a vacuum deposition process under a vacuum deposition condition satisfying a minimum critical radius of the nanostructure of the second step,
The first grown nanostructure is subjected to a plasma treatment or a heat treatment,
Wherein the nanostructure is grown at a relatively higher deposition rate than the vacuum deposition conditions. 2. The method according to claim 1,
A first step of growing a nanostructure by a vacuum deposition process under a vacuum deposition condition satisfying a minimum critical radius of the nanostructure of the second step,
(1 + n) (where n is 1, 2, 3, ..., n) of the nanostructure and the homologous or heterogeneous nanostructure in the primary growth at a deposition rate different from the deposition rate in the vacuum deposition condition, Wherein the nanostructured material is continuously grown at a temperature higher than the melting point of the nanostructure. 5. The method according to claim 4, wherein after growing the first-order nanostructure,
Wherein the nanostructure grown in the previous step is selectively subjected to a plasma treatment or a heat treatment prior to the next step of growing the nanostructure. The method according to claim 1, wherein the vacuum deposition conditions in the second step include:
Wherein the deposition rate is set in a range of 0.01 nm / second to 5 nm / second and a thickness of 30 nm or less. The method for forming a nano structure pattern by vacuum evaporation according to claim 1, wherein the substrate of the first step is provided with concave and convex portions, and a mask pattern layer is formed to expose a part of the upper surface of the substrate on which the concavities and convexities are formed . The substrate according to claim 1,
And an inorganic material substrate made of one of silicon (Si), gallium arsenide (GaAs), gallium phosphorus (GaP), gallium arsenide (GaAsP), boron nitride (BN), SiC, GaN, ZnO, MgO, sapphire, quartz, ,
Or polycarbonate (PC), polyethylene naphthalate (PEN), polynorbornene (PN), polyacrylate, polyvinyl alcohol (PVA), polyimide (PI), polyethylene terephthalate (PET), polyethersulfone (PES), polystyrene (PS), polypropylene (PP), polyethylene (PE) polymer substrate of any one of polyvinylchloride (PVC), polyamide (PA), polybutylene tererephthalate (PBT), polymethyl methacrylate (PMMA), and polydimethylsiloxane Wherein the nanostructure pattern is formed by vacuum deposition. 2. The method according to claim 1,
A polymer layer is formed on the substrate, a mask pattern layer is formed on the polymer layer,
Wherein the polymer layer
Polyvinyl Chloride (PVC), Neoprene, PVA (Polyvinyl Alcohol), PMMA (Poly Methyl Meta Acrylate), PBMA (Poly Benzyl Meta Acrylate), PolyStylene, SOG (Spin On Glass), PDMS (Polydimethylsiloxane) , Parylene, polyester, epoxy, polyether, polyimide, and lift-off resist (LOR). 2. The nanostructure according to claim 1,
A method of forming a pattern of a nanostructure by vacuum vapor deposition, characterized in that vacuum deposition is performed using at least one of a metal, a metal oxide, a fluoride, a sulfide, and a phosphide. The method according to claim 1, wherein the growth of the nanostructure of the third step comprises:
A method of forming a pattern of a nanostructure by vacuum vapor deposition, characterized in that the same material or different materials are vapor-deposited a plurality of times. 2. The method of claim 1, wherein after growing the nanostructure of the third step,
Wherein a heat treatment process or a plasma treatment process is further implemented. &Lt; RTI ID = 0.0 &gt; 18. &lt; / RTI &gt; The method as claimed in claim 1,
After the removal of the mask pattern layer, an additional mask pattern layer is formed,
The nanostructure of the third step may be additionally formed with the same or different types of nanostructures as the nanostructure of the third step on the same region or another region where the nanostructure pattern on the substrate is formed, Wherein a structure pattern is additionally formed on the surface of the nanostructure. A GaN buffer layer formed on the substrate, a GaN layer formed on the buffer layer, an Al _x Ga _{1 - x} N layer formed on the GaN layer, an InAlN layer and an InAlGaN layer, (A) preparing a substrate comprising a source electrode and a drain electrode formed on a layer of species;
(B) forming a mask pattern layer for masking the source electrode and the drain electrode and exposing a part of the upper portion of the substrate;
(C) setting a vacuum deposition condition that satisfies a minimum critical radius of the nanostructure necessary for growth of the nanostructure on the exposed region of the substrate and on the mask pattern layer;
(D) growing a nanostructure on the exposed region of the substrate and the mask pattern layer by a vacuum deposition process; And
And removing the mask pattern layer to form a nanostructure on the exposed region of the substrate to form a nanostructure pattern on the substrate. [7] The nanostructure pattern formed by vacuum deposition according to claim 1, A method of manufacturing a sensor element using the method. 15. The method of claim 14, wherein step (d)
Wherein the nanostructure is grown by a vacuum deposition process under a vacuum deposition condition satisfying the minimum critical radius of the nanostructure of the step (c). 15. The method of claim 14, wherein step (d)
After the nanostructure is first grown by a vacuum deposition process under vacuum deposition conditions satisfying the minimum critical radius of the nanostructure of step (c)
The first grown nanostructure is subjected to a plasma treatment or a heat treatment,
Wherein the nanostructure is grown at a relatively higher deposition rate than the vacuum deposition condition. 15. The method of claim 14, wherein step (d)
After the nanostructure is first grown by a vacuum deposition process under vacuum deposition conditions satisfying the minimum critical radius of the nanostructure of step (c)
(1 + n) (where n is 1, 2, 3, ..., n) of the nanostructure and the homologous or heterogeneous nanostructure in the primary growth at a deposition rate different from the deposition rate in the vacuum deposition condition, Wherein the nanostructured material is continuously grown at a temperature higher than the melting point of the nanostructure. 18. The method according to claim 17, wherein after the first-order nanostructure is grown,
Wherein the nanostructure grown in the previous step is selectively subjected to a plasma treatment or a heat treatment prior to the next step of growing the nanostructure. 15. The method of claim 14, wherein the vacuum deposition conditions in step (c)
Wherein the deposition rate is set to a thickness of 30 nm or less at a range of 0.01 nm / sec to 5 nm / sec. The method of fabricating a sensor device using a nanostructure pattern by vacuum deposition. 15. The method of claim 14,
And an inorganic material substrate made of one of silicon (Si), gallium arsenide (GaAs), gallium phosphorus (GaP), gallium arsenide (GaAsP), boron nitride (BN), SiC, GaN, ZnO, MgO, sapphire, quartz, The method of manufacturing a sensor device using a nanostructure pattern by vacuum deposition. 15. The method according to claim 14, wherein a GaN cap layer having a thickness of 10 nm or less is additionally formed on the one kind of layers. 15. The method of claim 14, wherein step (b)
Forming a polymer layer on the substrate, forming a mask pattern layer on the polymer layer,
Wherein the polymer layer
Polyvinyl Chloride (PVC), Neoprene, PVA (Polyvinyl Alcohol), PMMA (Poly Methyl Meta Acrylate), PBMA (Poly Benzyl Meta Acrylate), PolyStylene, SOG (Spin On Glass), PDMS (Polydimethylsiloxane) Wherein the nano-structured pattern is formed of any one of parylene, polyester, epoxy, polyether, polyimide, and lift-off resist (LOR). 15. The nanostructure of claim 14,
A method for fabricating a sensor element using a nanostructure pattern by vacuum deposition, characterized in that vacuum deposition is performed using at least one of a metal, a metal oxide, a fluoride, a sulfide, and a phosphide. 15. The method of claim 14, wherein the growth of the nanostructure of step (d)
A method of manufacturing a sensor element using a nanostructure pattern by vacuum evaporation, characterized in that a plurality of times of vapor deposition is performed using the same or different materials. 15. The method according to claim 14, wherein after the step (b)
And forming a recessed region in which a part of the one kind of layer is etched. The method of manufacturing a sensor element using a nanostructure pattern by vacuum deposition. 15. The method according to claim 14, wherein after growing the nanostructure of step (d)
Wherein a thermal treatment process or a plasma treatment process is additionally performed on the nano-structured pattern. 15. The method of claim 14, wherein the step (e)
After the removal of the mask pattern layer, an additional mask pattern layer is formed,
The nanostructure of step (d) may be formed by additionally forming a nanostructure homogenous or different from the nanostructure of step (d) on the same area or another area where the nanostructure pattern on the substrate is formed, Wherein a discontinuous nanostructure pattern is additionally formed on the surface of the nanostructure. A sensor element produced by the manufacturing method of any one of claims 14 to 27.

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