KR20170129342A - Wafer Level Chip Scale Light Emitting Diode Package and Method of Manufacturing the Same - Google Patents

Abstract

The present invention relates to a light-emitting diode (LED) package. The present invention provides an LED package which is manufactured in a wafer unit while continuously maintaining the original wafer shape without a process performed for one separated LED chip for high productivity, cost reduction, and slimness. The LED package of the present invention is turned up and down before being separately detached from a temporary bonding layer (700), and comprises: an epitaxial layer (104); first and second electrode layers (201/202); an insulating layer (203); a first bin fluorescent layer or a second bin fluorescent layer (502) formed by printing on LED chips of each bin; and first and second pad layers (302/303) which may include a seed layer (300) to be electrically connected to the first and second electrode layers (201/202). The LED package further comprises a solder mask layer (600).

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a wafer level chip scale light emitting diode package,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode (LED) package, and more particularly, to an LED package having a chip scale package (CSP) structure manufactured on a wafer-by-wafer basis and a manufacturing method thereof.

Conventional LED packaging process is a process of assembling individual LED chips and their raw materials by supplying raw materials such as gold wire, chip bonding material and package substrate, Because LED package is produced in chip unit, productivity is low and process cost is high.

Recently, wafer level package (WLP) technology has been applied. However, WLP is manufactured by cutting LED chip formed on a growth substrate, transferring individual LED chip one by one to a separate package substrate / wafer and bonding by wire bonding or flip chip The existing packaging technology such as bonding and molding is applied as it is. WLP still can not have high productivity because individual LED chips are processed one by one, high cost package substrate is applied, and the process is complicated due to the complicated process.

Conventional LED packaging technology including WLP is to manufacture one LED package by manufacturing one LED chip separated and separated from some or all processes. However, the wafer-level CSP packaging technology (hereafter referred to as a wafer level chip scale LED package (WLCSP LED)) is a wafer-level CSP packaging technology in which wafer chips of several thousands to several tens of thousands of LED chips LED package. Ultimately, WLCSP LEDs can be highly productive because they produce wafers with thousands to tens of thousands of LED packages.

In addition, the LED package, which is similar in size to the LED chip size, is called a chip scale LED package (hereinafter referred to as CSP LED). The CSP LED can be light-weighted and shortened, thereby lowering the cost by reducing the use of raw materials. However, the LED package of the conventional CSP structure can not have high productivity as compared with the WLCSP LED package produced on a wafer-by-wafer basis, while maintaining the original wafer shape because the LED chips are processed one by one.

As a result, if the WLCSP LED package can be produced on a wafer-by-wafer basis while maintaining the original wafer shape in the previous process, it can have various advantages such as remarkable productivity enhancement, process simplification, light weight shortening and cost reduction.

In order to realize the WLCSP LED having various advantages described above, it is necessary to form a phosphor layer on the LED chips arranged in a very densely arranged form in the original wafer form. However, conventional LED packaging techniques have several inherent problems to be described below. The phosphor layer and the phosphor means a mixture of a polymer or a similar material and a phosphor powder unless otherwise described in the present invention.

Stencil Printing, an example of a method of forming a phosphor layer, is disclosed in European Patent EP 1198016 A2. The present invention is not related to a WLCSP LED package that is produced on a wafer-by-wafer basis while maintaining the original wafer shape, but the individual LED chips that have been cut are bonded to the package substrate one by one and then a phosphor layer is formed by stencil printing.

Stencil printing is more productive than other phosphor layer forming methods because it can form phosphor layers at the same time on many LED chips. However, when forming a phosphor layer by conventional stencil printing to implement a WLCSP LED package, there are various problems to be described below. FIGS. 1 and 2 illustrate the process of forming a phosphor layer by conventional stencil printing to realize a WLCSP LED package and the problems thereof.

1A shows a top view after contacting the wafer 20 by aligning the bending stencil 40 according to the position of the bending LED chips 10 disposed on the wafer 20. As shown in Fig. The meaning of binning will be explained below, since it means that binning has not been applied. In addition, although the number of LED chips arranged on the wafer is not shown in the drawings of the present invention, actually, several thousands to several ten thousand or more LED chips may be formed on the wafer depending on the size of the LED chip and the wafer.

The stencil shown in the drawings of the present invention is only shown at the portion where the phosphor layer is to be formed and is not shown outside the portion where the phosphor layer is to be formed.

1B is an enlarged plan view of a portion arranged in a 3x3 direction in FIG. 1A. The bending stencil 40 is aligned with the bending LED chips 10, and portions through which the phosphor layers are to be formed are exposed through the openings 41. FIG. 1C shows a cross-sectional view of the bending stencil 40 including the openings 41 before aligning and contacting the wafer. 1D is a cross-sectional view after forming the phosphor layer. The bending stencil 40 is brought into contact with the wafer 20 and then the phosphor is printed by squeegee through the openings 41 to form the bending LED chips 10 and the periphery thereof The bubbling phosphor layers 500 are formed.

Next, as shown in FIG. 1E, the bending stencil 40 is separated from the wafer. In the process of separating the bending stencil 40 as shown in FIG. 1E, since the liquid phosphors adhere to the lower surfaces and the sidewalls of the bending stencil 40, a phosphor layer having a desired shape and a flat and uniform thickness is formed It becomes difficult. Further, since the liquid phosphors may flow to adjacent LED chips when the baining stencil 40 is separated, it is difficult to form a phosphor layer having a desired shape and flat and uniform thickness. These problems can be even more lethal because LED packages with CSP structure, including WLCSP LEDs, must form a phosphor layer with a size similar to the LED chip size. If the desired shape and flat and uniform thickness of the phosphor layer are not formed, the LED package may have optical quality problems.

Further, when the stencil is separated, the liquid-state fluorescent material flows to the adjacent LED chips, so that the interval between the LED chips must be made wider. The spacing between the LED chips directly affects the LED chip / package integration (the number of LED chips or packages formed on the wafer), which is an important factor in the productivity of WLCSP LEDs. Thus, if the distance between the LED chips is wider, the productivity of the LED chip or the package is reduced because the integration degree is reduced.

In addition, there are problems to be described below when the stencil printing is applied to a WLCSP LED that applies binning.

As is well known, LED chips formed on a growth substrate can not have uniform optical performance, so they are classified and grouped according to a predetermined optical performance range. This grouping is called binning and each group is called bin. The vined LED chips are fabricated into a desired LED package by forming a phosphor layer on the LED chip under conditions suitable for the optical performance range of each bin. As a result, a phosphor layer having different conditions must be formed for each LED chip of each bin. The LED chips formed on the growth substrate have a large optical performance deviation, so that the yield of the LED chips can be significantly lowered unless binning is applied.

2A, the LED chips arranged on the wafer 20 are classified according to a predetermined optical performance range. 2a shows a top view of a wafer 20 that includes empty 1 LED chips 11 and empty 2 LED chips 12 by classifying the LED chips into two bins for a given optical performance range.

It is assumed that the position of the binned LED chips is mapped to wafer as shown in FIG. 2A. Thus, Figure 2a shows a wafer map of the binned LED chips.

Depending on the management criteria of the LED chip / package manufacturer and the quality of the epi layer formed on the growth substrate, there may be more than two beans on the wafer. However, in order to facilitate understanding and explanation of the present invention, the present invention will be described in the case of two bins.

A process of forming a phosphor layer having different conditions for each LED chip of each bin in a conventional stencil printing process and the problems thereof will be described with reference to FIGS. 2B to 4F in order to realize a WLCSP LED employing binning.

WIPO Publication No. WO2015160091 A1 discloses an invention for a WLCSP LED whose problem is to form a phosphor layer having different conditions for each LED chip in each wafer in a wafer state.

The invention of WIPO Publication No. WO2015160091 A1 is to solve the problem of forming a phosphor layer having different conditions for each LED chip of each bin. Therefore, the case of not applying the binning is not specified, and screen printing is performed under the same conditions It is specified that it is difficult to form phosphor layers of various different conditions in one wafer by screen printing because of the method of forming phosphor layers. The term is different, but screen printing and stencil printing are the same principles.

WIPO Publication No. WO2015160091A1 is an invention of forming phosphor layers by dispensing to solve the difficulty of forming various phosphor layers in a screen printed screen. Therefore, according to the invention of WIPO Publication No. WO2015160091 A1, a dam is formed between the LED chips arranged on the wafer and the dam prevents the fluorescent material from flowing to the adjacent LED chips, so that the fluorescent material layer May be formed on the LED chips by dispensing them.

However, the process of stencil printing the phosphor layers having different conditions for each LED chip in a wafer by combining the invention of European Patent Application EP 1198016 A2 related to stencil printing and the invention of WIPO Publication WO2015160091 A1 is shown in FIG. 2B - The problem will be described in detail with reference to FIG. 4F.

Referring to FIG. 2B and FIG. 2C (a dotted line enlarged view in FIG. 2B) and FIG. 2D (a cross-sectional view of three LED chips in the center in FIG. 2C), a dam 44 is formed between LED chips, . After forming the dam 44, all of the empty 1 / bin 2 LED chips 11/12 are exposed. Therefore, selective masking is required to form a phosphor layer having different conditions for each LED chip by the stencil printing.

Referring to FIGS. 3A and 3B (a dotted line enlarged view in FIG. 3A) and FIG. 3C (a cross-sectional view of three LED chips in the center in FIG. 3B), a phosphor layer An empty stencil 42 in which openings 41 are formed only in portions corresponding to the empty LED chips 11 to align the LED chips with the empty stencil 42 and contacts the dam 44 formed on the wafer 20 , And then the phosphor is printed by squeezing as shown in FIG. 3D, so that a blank 1 phosphor layer 501 having a condition suitable for the blank 1 LED chip 11 is formed only on the empty LED chips 11.

The blank 1 stencil 42 can form an empty 1-phosphor layer 501 only on empty 1 LED chips 11 because it masks all of the empty 2 LED chips 12 among all the exposed LED chips.

Next, the blank 1 stencil 42 is separated and the empty 1-phosphor layers 501 are cured. The blank 1 stencil 42 and the empty 1-phosphor layer 501 are bonded to each other so that the blank 1 stencil 42 is bonded to the wafer 1 The process can no longer be carried out because it can not be separated.

In addition, when the empty 1-phosphor layers 501 are formed higher than the height of the dam 44, the empty two-stencil described below is placed on the empty 1-phosphor layers 501 without being contacted with the dam 44 formed on the wafer Therefore, it is impossible to form a blank 2 phosphor layer to be described below.

3E and 3F (a dotted line enlarged view in FIG. 3E) and FIG. 3G (a cross-sectional view of three LED chips in the center in FIG. 3F) and FIG. 3H after the blank 1 phosphor layers 501 are cured A blank 2 stencil 43 in which openings 41 are formed only in a portion corresponding to empty 2 LED chips 12 with respect to empty 2 is used to form empty 2-phosphor layers 12 only on empty 2 LED chips 12 in the above- (502). The empty 1-phosphor layers 501 formed on the empty 1-LED chips 11 can be formed only on the empty 2-LED chips 12 because the empty 2-phosphor layers 502 are masked by the empty 2-stencil 43 .

In order to facilitate understanding and explanation of FIG. 3, a hollow 1 / hollow 2 phosphor layer 501/502 formed in a flat and uniform thickness is shown in FIGS. 3d, 3g and 3h, There are the following problems as in.

The phosphor stuck to the lower surface of the stencil and the side wall in the process of separating the stencil of each bin, thereby making it difficult to form a flat and uniform thickness phosphor layer. Referring to FIG. 4A, the empty 1-phosphor layer 501 can be formed while completely filling the opening 41 of the empty stencil 42 and the opening 41. In the process of separating the blank 1 stencil 42, the phosphors adhere to the bottom and sidewalls of the empty stencil 42 as shown in FIG. 4B, making it difficult to form a flat and uniform phosphor layer. Since the empty one-phosphor layer 501 may be formed higher than the height of the dam 44, the empty stencil may not contact the dam 44 and may be placed on the empty one-phosphor layer 501, May not be formed.

The stencil printing operation conditions are adjusted so as not to form the empty one-phosphor layers 501 higher than the height of the dam 44 to completely fill the lower portion of the opening 41 in consideration of the volume of the opening 41 as shown in FIG. Phosphor layers 501 may be formed in a state where the phosphor layers 501 are not formed. When the empty stencil 42 is separated in a state where the lower portion of the opening 41 is not completely filled, the luminescent fluorescent material flows out to the uncharged portion, so that the empty 1-phosphor layers 501 can be formed. Also in this case, in the process of separating the blank 1 stencil 42, the phosphor stuck to the bottom and side walls of the empty stencil 42 as shown in FIG. 4D, and it is difficult to form a flat and uniform phosphor layer.

After the stencil is separated from the wafer, the phosphor layer adheres to the bottom surface of the stencil and the sidewall, and the separated fluorescent material flows out to fill the dam 44, so that the shape of the fluorescent layer is determined by the flow of the liquidphosphor. Thus, the central portion may be bulged or concaved as shown in FIG. 4E depending on the characteristics of the fluorescent material (such as viscosity, surface tension, or sagging), or may be formed in a shape in which the central portion and the edge portion are bulged as shown in FIG.

In conventional stencil printing, since the stencil must be separated from the wafer before the phosphor layer is cured, the phosphor layer can not be formed in such a manner that the phosphor is formed to have a flat and uniform thickness at a specific height and is hardened while maintaining its shape.

If the phosphor layer is formed much wider than the LED chip size, the phosphor layer of uneven thickness of the stencil printing may not be a big problem. However, if the phosphor layer is formed much wider than the LED chip size, it can not have a CSP structure and becomes an LED package which is much larger than the LED chip size.

Since the LED package of the CSP structure including the WLCSP LED is almost similar in size to the LED chip, the phosphor layer should be formed to have a size substantially similar to that of the LED chip, and the phosphor layer having a non- It may have a large influence on the light quality. In a LED package of a CSP structure including a small LED chip, if the LED chip size is reduced, the unevenness of the phosphor layer may be relatively lethal relative to the LED chip size, which may be more lethal.

As a result, conventional high-productivity stencil printing can not be applied to WLCSP LEDs due to various problems described above that arise in the process of separating the stencil after printing the phosphor. In addition, stencil printing has a more fatal problem to be described below when binning is applied.

If a blank phosphor layer 501 is formed on all the LED chips without forming a phosphor layer having different conditions for each of the LED chips of each bin, only the blank LED chips 11 can have a desired specification, (12) can not have the desired specifications, the LED chip yield can be significantly lowered.

As described above, even if the stencil printing has a non-uniform thickness of the phosphor layer, it is theoretically possible to form a phosphor layer having different conditions for each of the LED chips. However, practically applying the stencil printing to the WLCSP LED has the following problems.

Stencil printing is applied when continuous production of the same product is performed by printing the same position, size and shape using the same stencil as a high-priced tool. In other words, by using many expensive stencils several times and continuing to produce many identical products in one stencil, the cost of expensive stencil tools can be offset.

Due to the optical performance variation of the LED chips formed on the wafer, different wafers are used for each wafer, so that different stencils must be used for each wafer and the same stencil can not be applied to other wafers. As a result, stencil printing to implement a WLCSP LED that applies binning requires expensive stencils to be used as consumables that must be used after an empty number of expensive stencils per wafer. Thus, stencil printing with high productivity can not be applied to WLCSP LEDs that are used for binning due to economical problems, because the stencil tool cost may be higher than the cost of producing WLCSP LED package.

In summary, it is difficult to form a phosphor layer having a desired shape and flat and uniform thickness, which are the problems of the stencil printing described above, the point where the LED chip / package integration degree can be reduced, High-productivity stencil printing can not be applied to WLCSP LEDs produced on a wafer-by-wafer basis, while still maintaining the original wafer shape.

A method of forming a phosphor layer having different conditions for each LED chip of each bin by dispensing will be described below. 2B, 2C and 2D, in a state in which all the vined LED chips are exposed and a dam 44 is formed between the LED chips, The phosphor layers are coated one by one on each empty LED chip 11 to form empty phosphor layers 501. The green phosphor layer is coated on the phosphor layers of two empty LED chips, (502). Since the dam 44 serves to prevent the liquid phosphors from flowing to the adjacent LED chips when the phosphor layer is formed by the dispensing, the phosphor layer is formed separately for each LED chip by dispensing, and the phosphor layer is independently formed for each LED chip .

When dispensing is applied as in WIPO Publication No. WO2015160091 A1, a WLCSP LED can be realized by forming a phosphor layer having different conditions for each LED chip of each bin. Moreover, unlike stencil printing, dispensing does not require expensive jigs. However, dispensing is significantly less productive than stencil printing.

Stencil printing is highly productive because it forms a phosphor layer on all the LED chips of each bin by printing one time on the front side of the stencil. However, productivity is low because dispensing is a technique of coating a phosphor layer one by one with LED chips. In the case of a small LED chip, tens of thousands of LED chips may be formed on a 4-inch wafer. In this case, a wafer having a phosphor layer formed can be produced by dispensing tens of thousands of times. On the other hand, stencil printing can produce one wafer in which a phosphor layer is formed only by printing twice when the number of bins is two.

The present invention is to provide a WLCSP LED package that is manufactured on a wafer-by-wafer basis while maintaining the original wafer shape without advancing the individual LED chips separated one by one while solving the above-described conventional problems.

The present invention is to provide a WLCSP LED manufactured by a method of forming a phosphor layer all at once on all the LED chips disposed on a wafer while solving the problems of the stencil printing described above.

In addition, when binning is applied, a method of forming a phosphor layer on every LED chip of each bin arranged on a wafer at once, while solving the problems of the stencil printing described above, is applied to improve the productivity of the WLCSP LED package to which dispensing is applied And to provide a WLCSP LED package that can be further enhanced.

According to an aspect of the present invention, there is provided an LED package including a growth substrate, an epitaxial layer formed on the growth substrate including a 1-type epitaxial layer, an active layer, and a 2-type epitaxial layer, A first electrode layer and a second electrode layer formed so as to be electrically connected to the first epi-layer and the second epi layer, the epi layer, the insulating layer formed on the growth substrate including the first electrode layer and the second electrode layer, And a first pad layer and a second pad layer formed to be electrically connected to the first electrode layer and the second electrode layer, wherein the printing mask is formed between the LED chips, And the LED chip is singulated and is manufactured while maintaining the original wafer shape without a process of progressing the separated LED chips one by one.

The LED package according to another embodiment of the present invention includes a transparent substrate made of a transparent material, an epitaxial layer formed on the growth substrate including a 1-type epitaxial layer, an active layer, and a 2-type epitaxial layer, A first electrode layer and a second electrode layer formed so as to be electrically connected to the second type epitaxial layer, the epi layer, the insulating layer formed on the growth substrate including the first electrode layer and the second electrode layer, The growth substrate is processed to form a printing mask between the LED chips and a phosphor layer formed by printing and a first pad layer and a second pad layer formed to be electrically connected to the first and second electrode layers, The LED chip is singulated and the original wafer shape is maintained without the separate process of the LED chips being separated. It shall be.

According to another embodiment of the present invention, there is provided an LED package including an epitaxial layer formed by including a 1-type epitaxial layer, an active layer, and a 2-type epitaxial layer on a growth substrate, the 1-type epitaxial layer and the 2-type epitaxial layer An insulating layer formed on a growth substrate including a first electrode layer and a second electrode layer formed to be electrically connected, an epi layer, a first electrode layer, and a second electrode layer; removing the growth substrate and forming a printed mask substrate on the wafer; And a first pad layer and a second pad layer formed so as to be electrically connected to the first electrode layer and the second electrode layer, And the LED chip is singulated and the original wafer shape is maintained without the process of progressing the separated LED chips one by one.

In the LED package, the growth substrate is removed, a wafer is bonded to a printing mask substrate with a bonding layer, a printing mask substrate and a bonding layer are processed to form a printing mask between LED chips, and a phosphor layer And a control unit. Alternatively, the growth substrate is removed, a wafer and a printed mask substrate are bonded to each other with a bonding layer, and a printing mask substrate is processed to form a printing mask between the LED chips. The bonding layer remaining on the LED chip and the bonding And a phosphor layer formed on the phosphor layer. In addition, the above growth substrate is removed, a printing mask substrate including a metal foil layer is formed on the wafer, a metal foil layer and a printing mask substrate are processed to form a printing mask between the LED chips, Layer. ≪ / RTI >

According to another embodiment of the present invention, there is provided an LED package including a transparent substrate, a first substrate, a first substrate, an active layer, and an epitaxial layer formed on the substrate, An insulating layer formed on a growth substrate including a first electrode layer and a second electrode layer formed to be electrically connected to the epi layer and the 2-type epi layer, the epi layer, the first electrode layer, and the second electrode layer, Forming a printed mask substrate on the wafer by forming grooves between the LED chips and filling the grooves, forming a printing mask between the LED chips, forming a phosphor layer formed by printing, and electrically connecting the first and second electrode layers to each other electrically A first pad layer and a second pad layer formed so as to be connected to the LED package while being separated from the singulated LED package while removing the printing mask, As the original shape retaining wafer is characterized in that the manufacturing.

The LED package includes a phosphor layer formed on a wafer by forming a printing mask substrate including a metal foil layer on the wafer, forming a printing mask between the LED chips by processing the metal foil layer and the printing mask substrate, .

Each of the LED packages according to the above-described embodiments may include a phosphor layer formed by repeating the phosphor layer formation as many as the empty number for forming the print mask and printing the blank.

Each LED package of the present invention may further include a transparent thin film layer.

Each of the LED packages described above may further include a solder mask layer.

The LED package provided in the present invention is an LED package or a wafer having several thousand to several ten thousand or more LED packages in which all the processes are continued until the individual LED packages are packaged without separate LED chips or packages, It is possible to have a high productivity and to simplify the process and lower the manufacturing cost.

The LED package provided in the present invention can be thinned and shortened as an LED package having a CSP structure, thereby reducing the cost of raw materials by reducing the amount of raw materials used.

Since the present invention does not employ a separate package substrate or wafer, the process can be further simplified, productivity can be increased, and the cost associated with a separate package substrate or wafer can be reduced. In addition, a pad layer of a material having excellent thermal conductivity can be formed directly on the LED chip, thereby improving the heat emission performance.

Since the phosphor layer is formed on the LED chips using the printing mask formed on the wafer without using the expensive stencil tooling hole, the cost of the high tooling of the stencil does not occur. In addition, since a phosphor layer having different conditions is formed for each LED chip using a printing mask formed on a wafer without using an expensive stencil tool, an LED package can be manufactured without costly problems due to expensive stencil tooling holes.

A phosphor layer is formed in a flat and uniform thickness by printing a phosphor with a thickness of a height of a printing mask and a phosphor layer is formed in a state in which a printing mask is formed with a flat and uniform thickness, The phosphor layer having a uniform shape and a flat and uniform thickness can be formed. Further, the phosphor does not flow to the adjacent LED chips, thereby reducing the degree of integration of the LED chip or package.

In addition, since the print mask supports the LED packages until singulation, the LED package can be manufactured with high productivity while maintaining the original wafer shape without falling apart during the process.

The present invention applies a method of forming a phosphor layer on every LED chip of each bin arranged on a wafer at one time instead of forming a phosphor layer for each LED chip like dispensing, Lt; / RTI > In addition, since the present invention forms a phosphor layer on all the LED chips arranged in a wafer at once, when binning is not applied, it can have high productivity in forming a phosphor layer.

FIGS. 1, 2, 3 and 4 illustrate a conventional technique for forming a phosphor layer by stencil printing to realize a WLCSP LED package, and a plan view and a cross-sectional view illustrating problems thereof.
FIGS. 5 to 10 are cross-sectional views illustrating a manufacturing process of a LED package in which a printing mask is formed on a wafer by processing a growth substrate according to embodiments of the present invention, and a binning is not applied or a binning is applied.
11 and 12 are cross-sectional views illustrating a process of fabricating an LED package including a transparent thin film layer according to a modified embodiment of the present invention.
FIGS. 13 to 15 are cross-sectional views from a process of manufacturing a LED package to a phosphor layer forming process by forming a printed mask substrate on a wafer according to still another modified embodiment of the present invention.

Preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following terms are defined in consideration of the functions of the present invention, and they are to be construed to mean concepts that are consistent with the technical idea of the present invention and interpretations that are commonly or commonly understood in the technical field. In the following description, well-known functions or constructions are not described in detail to avoid obscuring the subject matter of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. It should be understood that the pattern, position, shape, shape, length, thickness, and the like of each component shown in the accompanying drawings should be understood as an example for illustrating the embodiment of the present invention, .

In addition, the numerical values set forth in the description of the present invention are not intended to limit the present invention to the numerical values because they may be typical values according to specific conditions rather than absolute values that can not be changed. In order to facilitate the description of the present invention will be.

1 ", " 2 ", and " 1 " or " 2 " do not mean that they should correspond to each other in the names given for the purpose of facilitating the description of the present invention, and these terms are not intended to limit the present invention.

In the present invention, the LED chip and the LED package may be used in combination for convenience of explanation and understanding of the present invention. Since the present invention is an invention in which an LED package is formed while forming an LED chip, it may be difficult to accurately distinguish the LED chip and the package. Therefore, the LED chip and the package may be used without discriminating in an accurate sense. It does not.

The term " layer "used in the present invention may be a single layer of a material, a layer formed of a substance or compound in which various materials are mixed, a layer in which various materials are formed in multiple layers, The present invention is not intended to be limited and is for ease of description.

The description of a layer or element in the sense of "forming / depositing / printing / coating / bonding" may include elements, layers or other layers or components between the elements and layers, Other elements or layers may be included in part. Accordingly, the present invention is not intended to be limited by these descriptions, but is for the purpose of facilitating the description.

In the present invention, the term "after" may mean immediately following, or may be after several processes have proceeded. Also, the term "before" may mean the immediate preceding, or it may refer to the preceding, preceding, and further preceding. Accordingly, these terms are not intended to limit the present invention but to facilitate the description.

In the present invention, the growth substrate is a wafer. In the process of forming the LED chip and the package, the growth substrate, which is a wafer, is processed or eliminated. However, since the present invention is an invention to form an LED chip and an LED package while still maintaining the original wafer shape of the growth substrate, the present invention may be described using the term wafer even after the growth substrate is processed or removed , An LED chip or an entire array of LED chips or packages arranged in the thousands to tens of thousands depending on the growth substrate size may be called a wafer while the original wafer shape is maintained. In addition, the term wafer may be used to refer to the entire LED chip or LED packages including all the components formed while the original wafer shape is maintained in a state of progressing to a certain process.

The fact that the original wafer shape is retained in the present invention means that the location and arrangement of the LED chips or packages arranged in the original wafer form of the growth substrate is not changed during the process and that the LED chips or packages arranged in the original wafer form of the growth substrate It is not transferred to a separate substrate or wafer or the like.

The present invention provides an LED package manufactured with high productivity by producing wafers having thousands to tens of thousands of LED chips or packages depending on sizes of LED chips or growth substrates.

The present invention is described in the context of cross sections of three LED chips or packages among thousands to tens of thousands of LED chips or packages formed while maintaining the original wafer shape of the growth substrate.

FIG. 9B shows one embodiment of the present invention. In FIG. 9B, three LED packages are shown in which the LED packages are singulated and then turned upside down before being separated from the temporary bonding layer 700. The LED packages include an epitaxial layer 104, a first / second electrode layer 201/202 and an insulating layer 203, an empty 1-phosphor layer 501 formed by printing on each LED chip, or an empty 2-phosphor layer 502 And a first / second pad layer 302/303, which may include a seed layer 300 to electrically connect to the first / second electrode layer 201/202. The LED packages may further include a solder mask layer 600.

5A is a cross-sectional view showing three LED chips, and includes an epi layer 104, a first electrode layer 201, a second electrode layer 202, and an insulating layer 203 grown on a growth substrate 100.

The epi layers include an active layer 102 located between a 1-type epi layer 101, a 2-type epi layer 103 and a 1-type and 2-type epi layer 101/103. However, other buffer layers, undoped-GaN layers, electron blocking layers, etc. may be disposed above or below. Here, the term " epi layer " may be used in a sense including all of these epi layers, but is not limited thereto. The epi layer can be formed by a known technique.

The epi layer is patterned by etching for electrical connection to partially expose the 1-type epi layer 101 located under the active layer 102 and to electrically connect the 1-type / 2-type epi layer 101/103 An electrically conductive material is deposited on the epi layer and patterned to form the first / second electrode layer 201/202, and then the insulating layer 203 is formed. The two electrode layers 201/202 and the insulating layer 203 can be formed by a known technique. The first electrode layer 201 may be formed and the first electrode layer 202 may be formed after the first-type epi layer 201 is exposed.

For example, the first and second electrode layers 201 and 202 may be formed of a layer of Ni, Au, ITO, Ti, Al, Ag, or the like. However, it is not limited to these materials.

The two electrode layers 201/202 serve to reflect light generated in the active layer 102 to improve light extraction performance as well as to provide electrical connection with the type 1/2 type epilayers 101/103, .

After forming the two electrode layers 201/202, an insulating layer 203 is formed and patterned to expose a portion of the two electrode layers 201/202. A part of the two electrode layers 201/202 exposed in the pattern of the insulating layer 203 and the pad layer to be described below are electrically connected. For example, the insulating layer 203 may be formed of silicon oxide, silicon nitride, a polymer resin, or the like. Thereafter, the epi layer 104 and the insulating layer 203 between the LED chips are etched to form LED chips by mesa patterning. The insulating layer 203 may be formed after the mesa pattern is formed. However, if the mesa pattern is not formed, the epi layer between the LED chips may be etched or cut in the singulation process, which will be described below.

5B is a cross-sectional view showing all of the epi layers including the type 1/2 type epi layer 101/103 and the active layer 102 as one epi layer 104 and showing them more briefly. It is to be understood that the drawings shown here are schematic and that if the layers are shown together, there is a possibility of confusing the gist of the present invention, the entirety of the epilayer 104 will be described with reference to FIG.

The formation of the epi layer 104, the two electrode layers 201/202, and the insulating layer 203 may be performed by a well-known technique, and the process steps may be various. Therefore, the above description should be understood as an example to describe the embodiment of the present invention in more detail, but the present invention is not limited thereto.

A solder pad layer 301 is formed on the seed layer 300 as shown in FIG. 5D, in which an electrically conductive seed layer 300 is formed as shown in FIG. 5C and the solder pad layer 301 is formed on the seed layer 300 as shown in FIG. .

Here, the seed layer 300 and the solder pad layer 301 are for electrical connection with the first / second electrode layer 201/202. The seed layer 300 and the solder pad layer 301 may be formed through plating or vacuum deposition, or may be formed by combining them.

The seed layer 300 is a component necessary for forming the solder pad layer 301 by electroplating, and the seed layer 300 serves as a layer to which current is applied in the electroplating.

The seed layer 300 may not be needed if the solder pad layer 301 is not formed by electrolytic plating. Thus, the pad layer 304 may be used to include the seed layer 300, or only the solder pad layer 301 if the seed layer is not applied. The necessity of the seed layer may be determined according to the method of forming the solder pad layer.

The description of the embodiments including the seed layer in the present invention is not intended to limit the present invention to the seed layer because it is intended to provide a more detailed explanation of the present invention.

If the pad layer 304 is formed of a material having a high thermal conductivity, the heat dissipation performance of the LED package can be improved. Therefore, it is preferable to apply the pad layer 304 including copper having high thermal conductivity. In addition, the present invention may have excellent heat emission performance because the pad layer 304 having excellent thermal conductivity is directly formed on the LED chip.

In the process of fabricating the LED package of the present invention, the epitaxial layer 104 is grown on the growth substrate 100, the pad layer 304, the printed mask substrate to be described below, or the phosphor layer to be described below, The process must be carried out while maintaining a structure capable of supporting the substrate. Otherwise, a few micrometers thick epilayers 104 may be damaged during the process because part of the epi layer 104 is not supported during the manufacturing process and is floating in the air. The growth substrate 100 is formed before the pad layer 304 is formed and the growth substrate 100 and the pad layer 304 are formed after the formation of the pad layer 304. After the growth substrate 100 is processed or removed, The layer 304 is patterned so that the printing mask substrate and the pad layer 304 are formed after the printing mask substrate is formed as described below and the pad layer 304 is formed after the printing mask is formed as described below, The phosphor layer and the pad layer 304 are supported later, and the phosphor layer supports the entire surface of the epi layer 104 after the pattern of the pad layer 304 to be described below.

In addition, the LED chip and the package must be separately separated during the manufacturing process, so that the WLCSP LED can be implemented while maintaining the original wafer shape. The growth substrate 100 catches the LED chips before the formation of the pad layer 304 and the growth substrate 100 and the pad layer 304 after the formation of the pad layer 304, The pad layer 304 catches the LED chips after fabrication or removal of the growth substrate 100 to be described below and the printing mask substrate and the pad layer 304 are formed after the formation of the printing mask substrate to be described below After forming the phosphor layer to be described below, a printing mask (described below), a phosphor layer and a pad layer 304 catch the LED chips, and after the pattern of the pad layer 304 to be described below The print mask catches the LED packages including the phosphor layer.

Therefore, according to the present invention, as described above, it is possible to maintain the structure supporting the entire surface of the epilayer until the LED packages / packages are separately separated and not separated during the process, While maintaining the wafer shape of the LED package.

In addition, the present invention provides an LED package manufactured by forming a phosphor layer on an LED chip by a method of solving various problems of stencil printing described above, which is more productive than dispensing.

The term stencil printing used in the present invention means forming a certain layer through printing, and may include printing techniques used in other terms including screen printing and the like. Thus, the term " stencil " or " stencil printing "

Although described below using the term " printing " in the process of forming a phosphor layer, which will be described below, it has features different from conventional printing including stencil printing. Nevertheless, the present invention is described using the term printing because there is no appropriate term.

In conventional printing, a tool hole called a stencil or a screen serving as a mask is separately manufactured and applied. In the present invention, the term stencil refers to a tool that is separately manufactured and serves as a mask when printed.

However, since the present invention forms a phosphor layer by printing without such tool holes, the cost of the expensive tool hole is not required, and the cost can be reduced.

As described above, in the conventional stencil printing, since the stencil must be separated from the wafer after printing, it is difficult to have a desired shape and a flat and uniform thickness of the phosphor layer. However, since the present invention does not apply a separate stencil, there is no process of separating the stencil, thereby solving the problems caused by the stencil separation.

In the embodiments of the present invention, a component that functions as a mask when printing is referred to as a print mask.

Although the original growth substrate serves as a substrate for the formation of the epi layer, in the embodiments of FIGS. 6 to 12, the growth substrate may serve as a mask in addition to the original growth substrate, Thereby forming a mask. As a result, in the present invention, a growth substrate is processed to form a phosphor layer without a stencil, thereby changing to a printing mask which is a component that acts as a mask when a growth substrate is printed.

13, 14 and 15, there is provided an LED package manufactured by removing a growth substrate, forming a separate printed mask substrate on a wafer by lamination / bonding, etc., and then forming a printing mask.

Since the present invention does not require a stencil, the conventional problems caused by applying the stencil tool can be fundamentally solved.

FIG. 6 shows a process of forming a phosphor layer in the case of not applying the binning, and the subsequent drawings are embodiments of the present invention in the case of applying the binning.

Referring to FIG. 6A, an etching mask layer (not shown) is formed on a growth substrate 100 by a well-known technique, and a portion to be etched of the growth substrate 100 is exposed by patterning. A vivid printing mask 400 is formed between the LED chips 10. 6A shows a cross-sectional view after forming the vivid printing mask 400 and removing the etching mask layer. However, it is also possible to form the phosphor layer to be described below and remove the etching mask layer after curing.

The etching mask layer can be formed of various materials such as a photosensitive material, metal (Ni, Au, Ti), silicon oxide, or silicon nitride, and an etching mask layer can be formed and removed by a well- have.

The growth substrate 100 may be polished to a thickness equal to the thickness of the phosphor layer described below before the etching mask layer is formed on the growth substrate 100 to form a phosphor layer having a desired thickness. However, it is also possible to form a printing mask without polishing and to form a phosphor layer with a height of the original growth substrate 100 thickness.

Polishing of the growth substrate 100 may proceed at any point between the formation of the epi layer and the formation of the etching mask layer for the formation of the printing mask.

Silicon, sapphire, silicon carbide, or the like is applied to the growth substrate 100. Silicon is a relatively well-etched material, so it is easy to form a print mask by dry, wet etching, or a combination of these methods.

However, since sapphire is a material difficult to wet-etch, it is preferable to form a printing mask by dry etching using a chlorine-based gas (BCl ₃ / Cl _2, etc.). When the sapphire growth substrate 100 is dry-etched using a chlorine-based gas, it is preferable to apply metals such as Ni and Cr as a material to be used as an etching mask layer. This is because the etching rate of the metal etching mask layer such as Ni or Cr is slower than the etching mask layers of other materials. The etching mask layer of a metal such as Ni or Cr can be formed by plating, vacuum deposition or a combination thereof.

6A, when the sapphire is applied to the growth substrate 100, the entire surface of the growth substrate 100 may be dry-etched to the depth of the entire thickness of the growth substrate 100 to form the vivid printing mask 400. However, Since the epi layer 104 located can be etched into the chlorine-based gas, the dry etch depth management of the sapphire should be very strict.

As shown in FIG. 6A, the entire depth of the growth substrate 100 is etched to the depth of the sapphire growth substrate 100 to etch the sapphire substrate 100 in a state of a thickness of several tens of micrometers or less, as shown in FIG. 6B, Ning printing mask 400 may be formed. Because sapphire is a transparent material, there are no major problems with light emission, even though sapphire with a thickness of a few tens of microns remains on the LED chip.

However, since the growth substrate of the silicon substrate is not transparent, the entire depth of the silicon substrate must be etched to a depth of the silicon layer to form a vivid printing mask 400 as shown in FIG. 6A.

6C is a cross-sectional view of the vibing LED chip 10 after the formation of the vividing phosphor layer 500. The vibing LED 400 may be formed by printing a phosphor with a vibing printing mask 400 formed between the vividing LED chips 10 in a state of FIG. 10 and the vicinities thereof, and then curing them.

The phosphor layer is formed by advancing while pushing the phosphor while the squeeze is in close contact with the printing mask, so that the phosphor layer having a flat and uniform thickness with the height of the printing mask can be formed.

When a soft squeeze is applied, it is preferable to apply a metal squeeze because the phosphor layer may be printed in a recessed shape. In addition, it is preferable to apply vacuum printing because bubbles may be generated in the phosphor layer during the printing process.

In the present invention, since the fluorescent substance is cured in a state in which the printing mask supports the fluorescent substance layers formed by printing flat at the height of the printing mask, the fluorescent substance layer having a uniform shape and flat and uniform thickness can be formed, LED chip prevents the phosphor from flowing. In the present invention, the spacing between the wider LED chips is required due to the flow of the fluorescent material through the adjacent LED chips, so that there is no effect of decreasing the degree of integration of the LED chip or package.

Thus, the printing mask serves not only as a mask for printing but also as a frame for holding the shape of the phosphor layer.

The baining phosphor layer 500 may be formed and the etching mask layer for forming the printing mask after curing may be removed.

FIG. 7 shows a process of forming a phosphor layer in the case of applying binning, and the present invention will be described by taking as an example a case where there are two bins. However, in practice, there may be three or more beans. Since the phosphor layer formation for each phosphor repeats the same process, the present invention will be described in the case where there are two bins for facilitating the description of the present invention.

Referring to FIG. 7A, the growth substrate 100 is etched in the same manner as in FIG. 6A to form a blank print mask 401. The growth substrate 100 is etched to expose only the empty LED chips 11 and their periphery so that the blank 1 phosphor layers described below are formed only on portions corresponding to the empty LED chips 11, Thereby forming printing masks 501.

FIG. 7B shows a cross-sectional view after forming the blank 1 phosphor layer 501 only on the blank 1 LED chips 11. The phosphor is printed by squeezing in the same manner as in FIG. 6C to form the empty 1-phosphor layers 501 only on the empty LED chips 11 and the periphery thereof, and harden.

7C and 7D, blank 2 printing masks 402 corresponding to empty 2 LED chips 12 are formed in the manner described above to expose empty 2 LED chips 12 and their surroundings, empty 2 A phosphor layer 502 is formed and cured in the empty 2 LED chips 12 and their surroundings. The blank 1 phosphor layer 501 formed first serves as a printing mask of the empty 2 phosphor layer when forming the empty 2 phosphor layers 502. If there are three bins, repeat the process of Figs. 7c and 7d one more time. As a result, the process of forming the printing mask and the phosphor layer can be repeated as many times as necessary to form each phosphor layer of each bin suitable for each bin LED chip.

In the case where the sapphire growth substrate 100 is applied, the growth substrate 100 may be etched in the same manner as in FIG. 6B to form each bin printing mask.

In order to form a printing mask for each blank, the process of patterning the etching mask layer by an empty number and etching the growth substrate must be repeated. Therefore, when patterning the etching mask layer through a photolithography process, a photolithography (maskless photolithography) technique not using a photomask should be applied. Otherwise, an expensive photomask tool is required for each wafer, which is not applicable to other wafers because the wafer map is different for each wafer.

Therefore, in the case of applying binning, it is theoretically possible, but the photolithography using the photomask is not economical due to the expensive cost of the photomask tool necessary for each wafer, so that the photomask is applied to pattern the etching mask layer Photographic processes can not be applied.

In the case where binning is not applied, since the same photomask can be continuously applied to a large number of wafers, the cost of the tool is canceled and there is no problem in economical efficiency. However, when binning is applied, The etch mask layer is patterned through the process technology, so that there is no problem in economy. Alternatively, an etching mask layer for forming a printing mask may be patterned by a laser processing method without applying a photolithography process.

In the present invention, the photolithography process is not limited to the photosensitive material coating, exposure and development, but may include all processes for patterning the etching mask layer.

Instead of removing the etching mask layer before forming the phosphor layer, it is also possible to form the phosphor layer with the etching mask layer on the printing mask and remove the etching mask layer after curing.

Referring to FIG. 8A, a solder pad layer 301 and a seed layer 300 are patterned by etching to form a first pad layer 302 and a second pad layer 303 in each LED package. When the solder pad layer 301 and the seed layer 300 are patterned by photolithography and etching, the first / second electrode layer 201/202 short-circuited by the solder pad layer 301 and the seed layer 300 It is electrically disconnected. After the formation of the first / second pad layer 302/303, the phosphor layer supports the entire surface of the epi layer 104.

In the case where the seed layer is not applied, the first / second pad layers 302/303 may be formed by patterning only the solder pad 301 layer described above. Although the present invention is described with reference to the drawings in the presence of a seed layer to facilitate the description of the present invention, the first / second pad layer 302/303 may not include a seed layer.

The width of the etched portions of the solder pad layer 301 and the seed layer 300 between the LED chips may be made larger than the width of the printing mask so that a portion of the hollow 1 / hollow 2 phosphor layer 501/502 is exposed, The etching width may be made smaller than the printing mask width. The etch width may depend on the singulation method described below.

When the first / second pad layer 302/303 is formed, the structural formation of the LED package including the phosphor layer and the electrically disconnected first / second electrode layer 201/202 is almost completed. Thus, after the first / second pad layer 302/303 is formed, the term LED package is used rather than the term LED chip to describe the present invention.

The first / second pad layers 302/303 may be soldered to the pads on the LED module PCB to fabricate the LED module. Thus, the first / second pad layer 302/303 may include a surface treatment layer (not shown) to be soldered. As the surface treatment layer forming method, Ni / Au plating, Hot Air Solder Leveling (HASL), Organic Solder Preservative (OSP), Ni / Pd / Au plating and the like can be applied. However, it is not limited to these surface treatments. In the present invention, the first or second pad layer may be used in a sense including such a surface treatment layer, but is not limited thereto.

The surface treatment layer is formed by the methods described above after forming the first / second pad layer 302/303 or after the formation of the solder mask layer to be described below.

A printing mask formed between the LED chips prevents the LED packages including the phosphor layer from falling apart by catching the LED packages after patterning the solder pad layer 301 and the seed layer 300. So, until the singulation described below, the print mask will keep the original wafer shape. As a result, the printing mask may have a role related to the phosphor printing, a frame for holding the shape of the phosphor layer, or a LED package including a phosphor layer and a phosphor layer after the solder pad layer 301 and the seed layer 300 pattern It also acts.

As shown in FIG. 8B, the solder mask layer 600 may be formed between the first / second pad layers 302/303. The solder mask layer 600 may be formed by a method such as printing or lamination of a photosensitive material, a polymer resin, ink, or the like. In the case of applying a photosensitive material, the solder mask layer 600 may be patterned by applying a photolithography process.

The solder mask layer 600 serves to prevent short-circuiting of the solder when the LED package is soldered to the LED module PCB. If there is a solder mask layer, it is easier to prevent short-circuiting of the solder, but the absence of the solder mask layer does not necessarily lead to short-circuiting of the solder. Therefore, the solder mask layer is not necessarily formed.

Referring to FIG. 9A, a temporary bonding layer 700 is bonded to a wafer on which LED packages are formed, as a preparation step for singulating the LED package. The temporary bonding layer 700 may be formed of a UV Release Tape or a Thermal Release Tape having a property of easily detaching the LED packages after singulation. A well-known Tape Lamination method can be applied to bond the temporary bonding layer 700 to the wafer.

The temporary bonding layer 700 may be bonded to a surface wafer on which a phosphor layer is formed before forming the first / second pad layers 302/303. Then, the first / second pad layer 302/303 may be formed with the temporary bonding layer 700 thereon, and singulation may proceed.

The temporary bonding layer 700 serves to hold the LED packages in a wafer form and hold the LED packages separately after the singulation, which will be described below. If there is no temporary bonding layer 700, the single LED packages can not be held after the singulation, and the individual LED packages must be handled one by one.

The temporary bonding layer 700 is singulated to hold individual LED packages separated until the individual LED packages are packed one by one while being detached from the temporary bonding layer 700.

As a result, the LED packages provided in the present invention can have high productivity because the LED packages are manufactured while producing the wafers in which the original wafer shape of the growth substrate is maintained in all processes until individual LED packages are packed one by one.

9B shows a cross-sectional view after the LED packages are singulated. The LED packages can be singulated by etching. Singulation may also be performed by a laser cutting method or a cutting method (hereinafter referred to as blade dicing) which will be described below.

When etching is applied for singulation, the first / second pad layers 302/303 may serve as an etching mask layer. Thus, LED packages can be singulated by dry etching with a suitable gas according to the material of the growth substrate and phosphor layer, wet etching with a chemical agent, or a combination thereof.

For example, when a silicon substrate and a phosphor of a silicon polymer are applied, a fluorine-based gas (CF ₄ or SF ₆ ) may be used for dry etching. Silicon wet etching chemicals are very diverse, and wet etching can be done using isotropic etching chemicals such as hydrofluoric acid / nitric acid / acetic acid compounds. Such dry etching and wet etching may be combined. However, in the case of a sapphire growth substrate in which wet etching is difficult, dry etching may be performed using a chlorine-based gas. Alternatively, only a portion where the fluorescent material layer of the polymer material is exposed through the first / second pad layer 302/303 may be etched with a fluorine gas to perform singulation.

When selecting a suitable gas or chemical for etching, the etching characteristics of the first / second pad layer 302/303 should be considered. It is preferable to apply a gas or a chemical that hardly etches the first / second pad layer 302/303.

Alternatively, a metal such as Ni or Au may be plated to further form an etching mask layer (not shown) in the first / second pad layers 302/303. Thus, in the present invention, the first / second pad layer 301/303 may further include an etching mask layer for singulation, or may be formed for a singulation formed in the first / second pad layer 302/303 The etch mask layer may be removed after singulation.

In the case of performing singulation by wet etching, the width at which the solder pad layer 301 and the seed layer 300 are etched between the LED chips may be made smaller than the print mask width. In the case of dry etching other than wet etching and singulation with laser cutting and blade dicing as described below, the width to be etched must be larger than the print mask width.

9A, the temporary bonding layer may be bonded to the first / second pad layer 302/303, an etching mask layer may be formed on the phosphor layers and the printing masks, patterned, and singulated by etching.

When the temporary bonding layer is bonded to the first / second pad layer 302/303 to perform singulation, the etched width of the solder pad layer 301 and the seed layer 300 between the LED chips affects the singulation The width to be etched may be smaller or larger than the print mask width.

In the case of singulation by laser processing, the phosphor layer may melt due to high laser energy and may be aggregated or discolored. This may require further processing of the desmear process to remove discolored parts that may melt or coalesce. Desmear can also be performed by a dry method using a plasma, a wet method using a chemical agent, or a combination thereof.

In the case of applying laser processing, the temporary bonding layer may be bonded to the first / second pad layers 302/303 unlike FIG. 9A. It is not intended to limit the present invention to the surface to which the temporary bonding layer is bonded.

When the blade dicing is applied, the fluorescent material of the soft polymer may stick to the blade during cutting, and it may be difficult to cut due to severe deformation. Therefore, a polymer material having a high degree of hardness and strength sufficient for blade dicing must be applied. Therefore, it is preferable to apply an epoxy phosphor suitable for blade dicing, rather than a phosphor of a silicone polymer, when blade dicing is applied.

As noted above, if the LED chips are not mesa patterned, the epilayer between the LED packages may be etched or cut together during the singulation process.

The above singulation methods may be applied in combination. A suitable singulation method can be chosen considering factors such as LED package size, wafer size, number of cutting lines, cutting depth or type of material to be cut.

10 shows a cross-sectional view of an LED package including vacant 2 LED chips removed from the temporary bonding layer 700 among the singulated LED packages. The direction in which light is emitted through the phosphor layer is upward. Since the printing mask is removed during the singulation process, the printing mask is not a component remaining in the final LED package. However, in order to solve the conventional problems in the present invention, .

11 and 12 show a modified embodiment of forming a transparent thin film layer between the phosphor layer and the LED chip. If the refractive index of the transparent thin film layer has a value between the refractive index of the epi-layer and the refractive index of the fluorescent layer, the light emission performance may be improved.

In this case, it is possible to provide an LED package manufactured without applying the above-described binning, but this modified embodiment will be described in the case of applying the binning.

Referring to FIGS. 11A, 11B, and 11C, a blank 1 transparent thin film layer 801 is formed in the state of FIG. 7A, and blank 1 phosphor layers 501 are formed and cured on the blank transparent thin film layer 801 by the above- The exposed portion of the hollow transparent thin film layer 801 is removed by etching.

The transparent thin film layer may be formed of atomic layer deposition (ATM), chemical vapor deposition or the like such as Aluminum Oxide, Aluminum Nitride, Hafnium Oxide and Titanium Oxide. The transparent thin film layer may be formed in one layer or in multiple layers.

Referring to Figs. 11D, 11E and 11F, a blank 2 printing mask 403 is formed by the above-described method, and then an empty two transparent thin film layer 802 is formed, and then, on the empty two transparent thin film layer 802, After forming and curing the empty two-phosphor layers 502, the exposed portions of the vacancies 2 transparent thin film layer 802 are removed by etching.

A blank 1 transparent thin film layer 801 may be applied as an etching mask to form an empty two-printing mask 402 after the empty 1-phosphor layer 501 is cured. The empty transparent thin film layer 801 may be applied as an etching mask to form an empty two-printed mask 402 and the empty transparent thin film layer 802 may be formed without removing the exposed hollow transparent thin film layer 801 have. Alternatively, the blank 1 transparent thin film layer 801 may be applied as an etching mask to form an empty two-printed mask 402, and the exposed blank 1 transparent thin film layer 801 may be removed and an empty two transparent thin film layer 802 may be formed .

12A, a seed layer 300 and a solder pad layer 301 are patterned and a solder mask layer 600 are formed by the above-described method, and a temporary bonding layer 700 is bonded to a wafer for singulation . Here, the solder mask layer may also be omitted.

The exposed portion of the hollow 1 / hollow 2 transparent thin film layer 801/802 on the sidewall of the phosphor layer when the empty two-printed mask 402 is etched for singulation may remain almost unetched as shown in FIG. 12B. Depending on the material of the applied transparent thin film layer, the transparent thin film layer may hardly be etched by the etching gas of the empty two-printing mask 402 or the wet etching agent. Aluminum oxide or nitrides, for example, are rarely etched in dry etching with fluorine-based gases, and rarely etched in silicon wet etching chemicals.

Thus, the blank 2 printing mask 402 may be etched to leave the transparent thin film layer on the sidewall of the phosphor layer, or the empty two-printed mask 402 may be etched to remove the transparent thin film layer exposed on the sidewall of the phosphor by etching Singulation can also be done. Except for this case, the LED packages are singulated with the transparent thin film layer removed together as described above.

Since the transparent thin film layer is optically transparent, even if a transparent thin film layer is left on the side wall of the phosphor layer, it is not a big problem. In addition, since the transparent thin film layer may also serve to protect the phosphor layer, reliability may be improved.

FIG. 13 shows another modified embodiment, which provides an LED package manufactured by removing the growth substrate 100 in the state of FIG. 5D and bonding the printed mask substrate to a wafer, which will be described below.

13A is a cross-sectional view of a growth substrate, in which a growth substrate is removed by a known technique such as etching or laser lift off. FIG. 13B shows a cross-sectional view after forming the bonding layer 901 on the wafer by the wafer bonding technique and bonding the printed mask substrate 900. The bonding layer 901 may be formed on the printing mask substrate 900.

The bonding layer 901 may be formed by spin coating or spray coating using an optically transparent BCB (benzocyclobutene), polyimide, epoxy, or the like, or may be formed on a wafer of a silicon or GaAs or a substrate of a polymer material (epoxy, polyimide, Or the like can be applied to form a printed mask substrate 900 by bonding to a wafer.

A transparent thin film layer may be formed on the wafer by the above-described method before forming the bonding layer.

When a wafer such as silicon or GaAs is used, a printing mask can be formed by the above-described method. In the case of applying a polymer material, it is preferable to form a printing mask by applying a laser processing method. Since the polymer material can be processed even at a relatively low laser energy, the printing mask substrate of the polymer material can be laser-processed to form a printing mask without damaging the LED chip.

The printing mask substrate 900 is etched as shown in FIG. 13C to form a blank printing mask 401. When a printing mask is formed by etching, the bonding layer 901 may be left in the vicinity of the LED chip as shown in FIG. 13C, or the bonding layer 901 may be removed by etching as shown in FIG. 13D. In the case of forming a blank printing mask 401 by applying laser processing, the bonding material layer 901 of a polymer material is also processed and removed as shown in FIG. 13D.

13E, an empty 1-phosphor layer 501, an empty 2-printed mask 402 and an empty 2-phosphor layer 502 are formed by the above-described method. 13E shows a case where the bonding layer 901 is not removed, but an empty 1 / hollow 2 phosphor layer 501/502 may be formed with the bonding layer 901 removed therefrom.

After the phosphor layer formation is completed, LED packages are manufactured by applying the above-described methods.

14 showing another modified embodiment provides an LED package manufactured by forming a printed mask substrate in a different manner in the state of FIG. 13A. In this case, a polymer material is used as the material of the printed mask substrate. However, it has different characteristics from the polymer material applied in Fig.

In the embodiment of FIG. 13, the polymer substrate of the polymer material is a fully cured sheet, but in the embodiment of FIG. 14, a semi-cured polymer sheet, a polymer film, or a liquid polymer is applied.

When a semi-cured polymer sheet (RCC-Resin Coated Copper or Pre-Preg, etc.) is applied, a printing mask substrate 900 bonded to the wafer as shown in FIG. 14A by a vacuum high- A metal foil layer 902 is formed. In a vacuum high temperature press lamination technique, several wafers are pressed in a state in which a plurality of wafers are paired at once to bond and harden the semi-hardened polymer sheet at high temperature. A metal foil layer 902 is needed to prevent the wafers from sticking together by the polymer sheet during the bonding process of the semi-cured polymer sheet.

In the case of applying a polymer film, a printed mask substrate can be formed on a wafer by a film lamination method. In this case, the metal foil layer is not required, and only the printed mask substrate is bonded to the wafer.

When a liquid polymer is applied, a printing mask substrate without a metal foil layer can be formed on a wafer by a spin coating method.

A transparent thin film layer may be formed on the wafer by the method described above before forming the printed mask substrate.

14B, the metal foil layer 902 is patterned by a maskless photolithography process and an etching process so that only the portion where the metal foil layer 902 is removed is laser-processed to form an empty one-print mask 401 as shown in FIG. 14C do. Referring to FIG. 14D, a blank 1 phosphor layer 501, a blank 2 printing mask 402, and an empty 2 phosphor layer 502 are formed by the above-described methods. The remaining metal foil layer 902 may be removed by etching and the remaining metal foil layer 902 may be removed when forming the first / second pad layer, or alternatively, It may be removed during the singulation process.

Since the polymer material is processed at a relatively low laser energy, the metal foil layer 902 can not be processed in the laser energy of the polymer material print mask substrate 900. Thus, the metal foil layer 902 can serve as a laser mask, and there is no problem even if a part of the laser beam is irradiated on the metal foil layer 902 to laser-process the printed mask substrate 900. As a result, in the case of applying the metal foil layer, it is not necessary to strictly control the size and position of the laser beam, so laser processing is easier.

Laser processing is a method of processing the parts to be processed one by one, not etching the entire wafer like an etching process. However, the polymer material is easy to laser process, and when a laser device having a galvanometer scan function is used May have very high productivity.

When a polymer film or a liquid polymer is applied, since a printed mask substrate is formed without a metal foil layer, a polymer film or a liquid polymer is directly processed with a laser without a laser mask of a metal foil layer to form a printing mask.

After the phosphor layer formation is completed, LED packages are manufactured by applying the above-described methods.

Fig. 15 shows another embodiment of forming a printing mask substrate without removing the growth substrate. In the state of FIG. 5D, grooves are formed between LED chips as shown in FIG. 15A by etching or blade dicing the growth substrate 100. The grown substrate 100 is etched or blade-diced to a depth deeper than the thickness of the growth substrate 100 due to process variations, thereby forming grooves between the LED chips. In this case, since light is emitted through the growth substrate 100, transparent sapphire should be applied to the growth substrate 100.

A printed mask substrate 900 and a metal foil layer 902 are formed as shown in FIG. 15B. The printing mask substrate 900 must be formed while filling the grooves formed between the LED chips by processing the growth substrate 100. Here, a semi-cured polymer sheet or a polymer film can be applied to the printed mask substrate 900. In the case of the polymer sheet, in the case of applying the polymer film, the printed mask substrate 900 should be formed by the vacuum film lamination method in order to fill the grooves between the LED chips. In the case of applying a polymer film, only a printed mask substrate is formed without a metal foil layer.

A transparent thin film layer may be formed by the method described above before forming the printed mask substrate. In this case, a transparent thin film layer having a refractive index between the refractive index of the growth substrate 100 and the refractive index of the fluorescent layer is preferable.

Referring to Figs. 15C and 15D, a blank 1 printing mask 401, a blank 1 phosphor layer 501, a blank 2 printing mask 402 and a blank 2 phosphor layer 502 are formed in the above-described manner.

The remaining metal foil layer 902 may be removed by etching and the remaining metal foil layer 902 may be removed when forming the first / second pad layer, or alternatively, It may be removed during the singulation process.

In the embodiment of FIG. 15, the phosphor layer must include the side walls of the growth substrate 100 to completely coat the entire LED chip. Otherwise, some light may be emitted without passing through the phosphor layer, resulting in poor light quality.

After the phosphor layer formation is completed, LED packages are manufactured by applying the above-described methods.

In the laser processing method for forming the printing mask, the polymer of the printing mask substrate may be melted or aggregated due to laser energy, resulting in discoloration. This may require further processing of the desmear process to remove discolored parts that may melt or coalesce. Desmear can also be performed by a dry method using a plasma, a wet method using a chemical agent, or a combination thereof.

In the embodiments of Figs. 13, 14 and 15, LED packages may also be fabricated by further including a transparent thin film layer in the manner described in the embodiment of Figs. 11 and 12. Fig.

In the embodiments of Figs. 13, 14, and 15, the LED package manufactured without applying the binning in the above-described manner may also be provided.

The greatest effect of the wafer level chip scale LED package of the present invention is that it is possible to maintain the original wafer shape in all the processes until the individual LED packages are packaged one by one without separate process of individual LED chips or packages, It is possible to have a very high productivity because LED packages are manufactured by producing wafers having more than two LED chips or packages.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Accordingly, it is intended that the present invention cover the modifications and applications of this invention provided they come within the scope of the appended claims and their equivalents.

10 Vivid LED chip 11 Blank 1 LED chip 12 Blank 2 LED chip
20 wafer 40 bending stencil 41 opening
42 empty 1 stencil 43 empty 2 stencil 44 dam
100 Growth substrate 101 Type 1 Epi layer 102 Active layer
103 2 type epi layer 104 epi layer 201 first electrode layer
202 Second electrode layer 203 Insulating layer 300 Seed layer
301 solder pad layer 302 first pad layer 303 second pad layer
304 Pad Layers 400 Vivid Printing Mask 401 Blank 1 Print Mask
402 blank 2 printing mask 500 vivid phosphor layer 501 blank 1 phosphor layer
502 empty 2 phosphor layer 600 solder mask layer 700 temporary bonding layer
801 Bin 1 Transparent thin film layer 802 Bin 2 Transparent thin film layer 900 Printed mask substrate
901 bonding layer 902 metal foil layer

Claims (15)

An epitaxial layer formed on the growth substrate including a 1-type epitaxial layer, an active layer and a 2-type epitaxial layer;
A first electrode layer and a second electrode layer patterned to form the epi-layer and electrically connected to the 1-type epi-layer and the 2-type epi-layer;
An insulating layer formed on the growth substrate including the epi layer, the first electrode layer, and the second electrode layer;
A phosphor layer formed by printing the growth substrate to form a printing mask between the LED chips; And
A first pad layer electrically connected to the first electrode layer and a second electrode layer, and a second pad layer electrically connected to the first electrode layer and the second electrode layer, wherein the LED package is singulated while removing the printing mask, Characterized in that the LED package is manufactured while maintaining the original wafer shape without any process A transparent substrate;
An epi layer formed on the growth substrate including the 1-type epitaxial layer, the active layer, and the 2-type epitaxial layer;
A first electrode layer and a second electrode layer patterned to form the epi-layer and electrically connected to the 1-type epi-layer and the 2-type epi-layer;
An insulating layer formed on the growth substrate including the epi layer, the first electrode layer, and the second electrode layer;
A phosphor layer formed by printing, forming a printing mask between the LED chips by processing the growth substrate while leaving a part of the growth substrate on the LED chip; And
A first pad layer electrically connected to the first electrode layer and a second electrode layer, and a second pad layer electrically connected to the first electrode layer and the second electrode layer, wherein the LED package is singulated while removing the printing mask, Characterized in that the LED package is manufactured while maintaining the original wafer shape without any process An epitaxial layer formed on the growth substrate including a 1-type epitaxial layer, an active layer and a 2-type epitaxial layer;
A first electrode layer and a second electrode layer patterned to form the epi-layer and electrically connected to the 1-type epi-layer and the 2-type epi-layer;
An insulating layer formed on the growth substrate including the epi layer, the first electrode layer, and the second electrode layer;
A phosphor layer formed by printing, removing the growth substrate, forming a printing mask substrate on a wafer and forming a printing mask between the LED chips, and printing; And
A first pad layer electrically connected to the first electrode layer and a second electrode layer, and a second pad layer electrically connected to the first electrode layer and the second electrode layer, wherein the LED package is singulated while removing the printing mask, Characterized in that the LED package is manufactured while maintaining the original wafer shape without any process The method of manufacturing a semiconductor device according to claim 3, wherein the growth substrate is removed, a wafer is bonded to a printing mask substrate with a bonding layer, a printing mask substrate and a bonding layer are processed to form a printing mask between LED chips, LED package The method of manufacturing a semiconductor device according to claim 3, wherein the growth substrate is removed, a wafer and a printed mask substrate are bonded to each other with a bonding layer, a printed mask substrate is processed to form a printing mask between LED chips, And a phosphor layer formed on the bonding layer. The method of manufacturing a light emitting diode according to claim 3, wherein the growth substrate is removed, a metal foil layer is formed on the wafer to form a printing mask substrate, a metal foil layer and a printing mask substrate are processed to form a printing mask between the LED chips, Wherein the LED package A transparent substrate;
An epi layer formed on the growth substrate including the 1-type epitaxial layer, the active layer, and the 2-type epitaxial layer;
A first electrode layer and a second electrode layer patterned to form the epi-layer and electrically connected to the 1-type epi-layer and the 2-type epi-layer;
An insulating layer formed on the growth substrate including the epi layer, the first electrode layer, and the second electrode layer;
A phosphor layer formed by printing, forming a printing mask between the LED chips by forming a groove between the LED chips by processing the growth substrate, forming a printing mask substrate on the wafer while filling the groove, And
A first pad layer electrically connected to the first electrode layer and a second electrode layer, and a second pad layer electrically connected to the first electrode layer and the second electrode layer, wherein the LED package is singulated while removing the printing mask, Characterized in that the LED package is manufactured while maintaining the original wafer shape without any process The LED according to claim 7, comprising a metal foil layer on the wafer to form a printing mask substrate, and a metal foil layer and a printing mask substrate are processed to form a printing mask between the LED chips and a phosphor layer formed by printing package A phosphor according to any one of claims 1, 2, 3, 4, 5, 6, 7, or 8, LED package The LED package according to any one of claims 1, 2, 3, 4, 5, 6, 7 or 8, further comprising a transparent thin film layer The LED package according to claim 9, further comprising a transparent thin film layer The LED package according to any one of claims 1, 2, 3, 4, 5, 6, 7, or 8, further comprising a solder mask layer 10. The LED package according to claim 9, further comprising a solder mask layer The LED package according to claim 10, further comprising a solder mask layer The LED package according to claim 11, further comprising a solder mask layer

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