KR20170118509A - Display device - Google Patents

Abstract

The present invention can prevent a burnt phenomenon in which a gate flexible film on which a gate drive circuit is mounted due to an excessive current is burnt in a high picture quality large area display device, .
The present invention includes a printed circuit board on which a power supply unit is disposed, a substrate connected to the printed circuit board, and a plurality of gate lines arranged in a first direction on the substrate. The gate driving circuit is connected to the plurality of gate lines at the other side of the substrate and the first gate flexible films respectively connected to the plurality of gate lines at one side of the substrate, And a first power supply wiring line for supplying a drive voltage from the power supply unit to the gate drive circuits of the second gate flexible films through the gate drive circuits of the first gate flexible films do.

Description

Display device {DISPLAY DEVICE}

The present invention relates to a display device.

2. Description of the Related Art [0002] As an information-oriented society develops, there have been various demands for a display device for displaying images. Recently, a liquid crystal display (LCD), a plasma display panel (PDP) Various display devices such as an OLED (Organic Light Emitting Diode) are being utilized.

The display device includes a display panel, a gate driver, and a data driver. The display panel includes a plurality of pixels formed at intersections of the data lines, the gate lines, the data lines and the gate lines, and supplied with the data voltages of the data lines when the gate signals are supplied to the gate lines. The pixels emit light at a predetermined brightness according to the data voltages. The gate driver supplies gate signals to the gate lines. The gate driver may include a plurality of gate drivers for supplying gate voltages to the gate lines. The gate drive circuit may be formed in the form of a chip.

In recent years, a large-area display device has been widely used as a product, and a large-area display device is realized with a high image quality of UHD (Ultra High Definition) or more. A high definition large area display device having a UHD resolution has twice the number of gate lines compared to a display device having an FHD resolution and thus the number of gate drive circuits also doubles. Therefore, in the case of a high-definition large-area display device having a UHD resolution, an excessive current may flow in the power supply wiring to supply power to the gate drive circuits. In this case, a burnt in which the gate flexible film on which the gate drive circuit is mounted may be burned may occur. UHD refers to a resolution of 3840 x 2160, and FHD refers to a resolution of 1920 x 1080.

SUMMARY OF THE INVENTION It is a general object of the present invention to provide a display device for preventing an overcurrent from flowing to a gate driving pad in a high picture quality large area display device.

According to an aspect of the present invention, there is provided a display device including a printed circuit board on which a power supply unit is disposed, a substrate connected to the printed circuit board, and a plurality of gate lines arranged in a first direction on the substrate. The gate driving circuit is connected to the plurality of gate lines at the other side of the substrate and the first gate flexible films respectively connected to the plurality of gate lines at one side of the substrate, And a first power supply wiring line for supplying a drive voltage from the power supply unit to the gate drive circuits of the second gate flexible films through the gate drive circuits of the first gate flexible films A display device is provided.

The display device according to an exemplary embodiment of the present invention includes a plurality of gate driver circuits for supplying a driving voltage supplied from a power supply portion to both gate driver portions disposed on both sides of the first substrate by LOG wiring, It is possible to prevent an excessive current from flowing in the power supply wiring to supply power.

In the display device according to an example of the present invention, since the driving voltage flows in both directions via the driving circuit connection wiring by the first power supply wiring and the second power supply wiring, the current density increases on one side or the amount of current The concentration phenomenon can be prevented.

The display device according to an exemplary embodiment of the present invention can prevent a burnt phenomenon in which the gate flexible film on which the gate drive circuit is mounted is burnt by excessive current.

The display device according to an example of the present invention can improve the image quality and prevent the reliability from deteriorating.

The effects obtained in the present invention are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art from the following description .

1 is a perspective view illustrating a display device according to an exemplary embodiment of the present invention.
FIG. 2 is a plan view showing a display region and a non-display region, a gate driver, a data driver, a power supply, and a timing controller of the first substrate of FIG.
3 is a cross-sectional view of a pixel in the case where a display device according to an exemplary embodiment of the present invention is implemented as an organic light emitting display device.
4 is a cross-sectional view of a pixel when a display device according to an exemplary embodiment of the present invention is implemented as a liquid crystal display device.
5 is a plan view showing a power supply wiring of a display device according to an exemplary embodiment of the present invention.

The meaning of the terms described herein should be understood as follows.

The word " first, "" second," and the like, used to distinguish one element from another, are to be understood to include plural representations unless the context clearly dictates otherwise. The scope of the right should not be limited by these terms. It should be understood that the terms "comprises" or "having" does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof. It should be understood that the term "at least one" includes all possible combinations from one or more related items. For example, the meaning of "at least one of the first item, the second item and the third item" means not only the first item, the second item or the third item, but also the second item and the second item among the first item, Means any combination of items that can be presented from more than one. The term "on" means not only when a configuration is formed directly on top of another configuration, but also when a third configuration is interposed between these configurations.

Hereinafter, preferred embodiments of the display device according to the present invention will be described in detail with reference to the accompanying drawings. In the drawings, like reference numerals are used to denote like elements throughout the drawings, even if they are shown on different drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

FIG. 1 is a perspective view illustrating a display device according to an exemplary embodiment of the present invention. FIG. 2 is a plan view illustrating a display region and a non-display region, a gate driver, a data driver, a power supply, and a timing controller of the first substrate of FIG.

1 and 2, a display device according to an exemplary embodiment of the present invention includes a display panel 10, a gate driver 20, a data driver 30, a source printed circuit board 40, a control printed circuit board 50, a power supply unit 60, a timing control unit 70, and a flexible circuit board 80.

The display panel 10 includes a first substrate 11 and a second substrate 12. Since the size of the first substrate 11 is larger than that of the second substrate 12, a part of the first substrate 11 can be exposed without being covered by the second substrate 12. Thus, films such as the source flexible films 31 are provided on a portion of the first substrate 11 that is not covered by the second substrate 12 and is exposed.

A plurality of gate lines G1 to Gn arranged in a first direction on the first substrate 11 and a plurality of data lines arranged in a second direction intersecting the first direction, The display area DA including the pixels P arranged in the intersections of the data lines D1 to Dm and m is a positive integer of 2 or more and the data lines D1 to Dm and the gate lines G1 to Gn, Is formed. The display panel 10 may be divided into a display area DA and a non-display area NDA. The display area DA is an area where pixels P are provided to display an image. The non-display area NDA is an area provided in the periphery of the display area DA, and is an area in which no image is displayed.

Each of the pixels P may be connected to any one of the data lines D1 to Dm and the gate lines G1 to Gn. Accordingly, each of the pixels P receives the data voltage of the data line when the gate signal is supplied to the gate line, and emits light at a predetermined brightness according to the supplied data voltage.

On the second substrate 12 of the display panel 10, a color filter array including a black matrix, a color filter, and the like may be formed. An upper polarizer is attached to the second substrate 12 of the display panel 10. When the multi-view display device is implemented as a liquid crystal display device, a lower polarizer is attached to the first substrate 11, and the light transmission axis of the upper polarizer and the light transmission axis of the lower polarizer are orthogonal. An alignment film for setting a pre-tilt angle of liquid crystal is formed on the first substrate 11 and the second substrate 12. A spacer for maintaining a cell gap of the liquid crystal cell is formed between the first substrate 11 and the second substrate 12 of the display panel 10.

The gate driver 20 supplies gate signals to the gate lines G1 to Gn according to a gate control signal input from the timing controller 70. [ Specifically, the gate driver 20 receives the gate control signal GCS, generates gate signals according to the gate control signal GCS, and supplies the gate signals to the gate lines G1 to Gn.

The gate driving unit 20 may include a plurality of gate driving circuits 25 and the gate driving circuits 25 may be mounted on the gate flexible films 21 and 22. Each of the gate flexible films 21 and 22 may be a tape carrier package or a chip on film. The gate flexible films 21 and 22 may be attached to the non-display area NDA of the display panel 10 by a TAB (tape automated bonding) method using an anisotropic conductive film, The gate driving circuits 25 may be connected to the gate lines G1 to Gn. The gate flexible films 21 and 22 are connected to a plurality of gate lines G1 to Gn at one side of the first substrate 11 and are connected to a first gate The flexible films 21 and the second gate flexible films 22 connected to the plurality of gate lines G1 to Gn at the other side of the first substrate 11 and the gate drive circuits 25 are mounted respectively ).

The data driver 30 is connected to the data lines D1 to Dm. The data driver 30 receives the digital video data DATA and the data control signal DCS from the timing controller 70 and converts the digital video data DATA to analog data voltages VDD according to the data control signal DCS. . The data driver 30 supplies analog data voltages to the data lines D1 to Dm. The data driver 30 may include at least one source driving circuit 35.

The source driving circuit 35 may be fabricated as a driving chip. The source driving circuit 35 may be mounted on the source flexible films 31, respectively. Each of the source flexible films 31 may be embodied as a tape carrier package or a chip-on film and may be bent or bent. Each of the source flexible films 31 can be attached to the non-display area of the display panel 10 in a TAB manner using an anisotropic conductive film, whereby the source drive circuits 35 are connected to the data lines D1 to Dm .

Each of the source driving circuits 35 may be directly connected to the data lines D1 to Dm on the first substrate 11 by a chip on glass (COG) method or a chip on plastic (COP) method.

In addition, the source flexible films 31 may be attached on a source printed circuit board 40. The source printed circuit boards 40 may be flexible printed circuit boards that can be bent or bent. The source printed circuit boards 40 may be provided in one or more than one.

The control printed circuit board 50 may be connected to the source printed circuit board 40 by a flexible circuit board 80 such as a flexible flat cable (FFC) or a flexible printed circuit (FPC).

The power supply unit 60 inputs a gate high voltage VGH and a gate low voltage VGL to the gate driver 20 and the timing controller 70. The gate low voltage VGL may be a voltage of 0 V or less, and the gate high voltage VGH may be a voltage of 15 V or more. In this case, the power supply unit 60 of the display device according to an exemplary embodiment of the present invention is configured such that the driving voltage supplied from the power supply unit 60 is supplied to the gate driver (not shown) disposed on both sides of the first substrate 11, (Not shown).

The timing controller 70 receives video data DATA and timing signals TS from an external system board (not shown). The timing signals may include a vertical sync signal, a horizontal sync signal, a data enable signal, and a dot clock.

The timing controller 70 generates a start signal for controlling the operation timing of the gate driver 20 based on the timing signals TS and driving timing information stored in a memory such as an electrically erasable programmable read-only memory (EEPROM) VST), an on-clock signal (on_CLK), and an off-clock signal (off_CLK), and generates a data control signal DCS for controlling the operation timing of the data driver 20. The timing controller 70 supplies the video data DATA and the data control signal DCS to the data driver 20.

The display device according to the present invention is supplied with driving voltages supplied from the power supply unit 60 to both the gate driver 20 disposed on both sides of the first substrate 11 by the LOG wiring described later . Therefore, the display device according to an exemplary embodiment of the present invention can prevent an excessive current from flowing to the power supply wiring to supply power to the gate driving circuits 25 for realizing a high picture quality large area display device. Therefore, the display device according to an exemplary embodiment of the present invention can prevent a burnt phenomenon in which the gate flexible film 25 on which the gate drive circuit 25 is mounted is burnt by an excessive current, And the reliability can be prevented from deteriorating.

3 is a cross-sectional view of a pixel in the case where a display device according to an exemplary embodiment of the present invention is implemented as an organic light emitting display device.

3, a pixel of a display device according to an exemplary embodiment of the present invention includes a first substrate 11, a buffer layer 110, a thin film transistor T, a passivation layer 170, a first planarization layer 180, The organic light emitting layer 230, the cathode electrode 240, the encapsulation layer 250, the black matrix 270, the color filter 280, and the second planarization layer 200, the first anode 210, the bank 220, , And a second substrate (12).

Although glass is mainly used for the first substrate 11, transparent plastic such as polyimide which can be bent or rolled can be used. When the polyimide is used as a material for the first substrate 11, a polyimide excellent in heat resistance that can withstand high temperatures can be used, considering that a high temperature deposition process is performed on the first substrate 11 .

The buffer layer 110 is disposed on the first substrate 11. The buffer layer 110 prevents external moisture or moisture from penetrating into the organic light emitting display. At this time, the buffer layer 110 may be formed of silicon oxide or silicon nitride.

The thin film transistor T is disposed on the buffer layer 110. The thin film transistor T includes an active layer 120, a gate insulating layer 130, a gate electrode 140, an interlayer insulating layer 150, a source electrode 160a, and a drain electrode 160b.

The active layer 120 is disposed on the buffer layer 110 so as to overlap with the gate electrode 140.

The gate insulating layer 130 is disposed on the active layer 120. The gate insulating layer 130 insulates the active layer 120 from the gate electrode 140. At this time, the gate insulating layer 130 may be formed of an inorganic insulating material such as a silicon oxide film (SiOx), a silicon nitride film (SiNX), or a multilayer thereof, but is not limited thereto.

The gate electrode 140 is disposed on the gate insulating layer 130. At this time, the gate electrode 140 is arranged to overlap with the active layer 120 with the gate insulating layer 130 therebetween. The gate electrode 140 may be formed of any one selected from the group consisting of Mo, Al, Cr, Au, Ti, Ni, Ne, Or an alloy thereof. However, the present invention is not limited thereto.

The interlayer insulating layer 150 is disposed on the gate electrode 140. The interlayer insulating layer 150 may be formed of the same inorganic insulating material as the gate insulating layer 130, for example, a silicon oxide film (SiOx), a silicon nitride film (SiNX), or a multilayer film thereof. However, It is not.

The source electrode 160a and the drain electrode 160b are spaced apart from each other on the interlayer insulating layer 150. [ At this time, each of the source electrode 160a and the drain electrode 160b is connected to the active layer 120 through a contact hole formed in the interlayer insulating layer 150. The source electrode 160a and the drain electrode 160b may be formed of at least one selected from the group consisting of Mo, Al, Cr, Au, Ti, Ni, (Cu), or an alloy thereof, and may be composed of a single layer of the metal or alloy or multiple layers of two or more layers, but is not limited thereto.

The thin film transistor T configured as described above may be formed on each of the pixel regions on the first substrate 11. Further, the structure of the thin film transistor T is not limited to the above-described example, and can be variously modified to a known structure that can be easily practiced by those skilled in the art.

The passivation layer 170 is entirely disposed on the interlayer insulating layer 150, the source electrode 160a, and the drain electrode 160b. The protective layer 170 may be made of an inorganic insulating material such as silicon oxide or silicon nitride. However, the protective layer 170 may be formed of an organic insulating material such as photo acryl or benzocyclobutene (BCB) It is possible.

The first planarization layer 180 is disposed on the passivation layer 170 and the second planarization layer 200 is disposed on the first planarization layer 180. The first planarization layer 180 may planarize the upper portion of the passivation layer 170 and the second planarization layer 200 may planarize the upper portion of the first planarization layer 180. The first and second planarization layers 180 and 200 may be formed of, for example, an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, A polyimide resin or the like.

The first anode 210 is disposed on the second planarization layer 200. The first anode electrode 210 is connected to the drain electrode 160b exposed through the contact hole.

The bank 220 is disposed on the second planarization layer 200. At this time, the bank 220 may be overlapped with one side and the other side of the first anode electrode 210. The bank 220 may define a region of the pixel P. The bank 220 may be formed of an organic film such as a polyimide resin, an acryl resin, or a benzocyclobutene (BCB).

The organic light emitting layer 230 is disposed on the first anode electrode 210. The organic light emitting layer 230 may be formed by a combination of a hole injecting layer, a hole transporting layer, an emitting layer, an electron transporting layer, and an electron injecting layer But it is not limited thereto and can be changed into various structures known in the art.

The cathode electrode 240 is disposed on the organic light emitting layer 230. At this time, the cathode electrode 240 may extend from the organic light emitting layer 230 and may also be disposed on the bank 200. The cathode electrode 240 is formed of a transparent conductive metal in the OLED display of the upper emission type. Since the transparent conductive metal has a high resistance, it is electrically connected to the second auxiliary electrode 190 through a second anode 215, which will be described later, to lower the resistance.

The encapsulation layer 250 is disposed entirely on the cathode electrode 240. The sealing layer 250 prevents penetration of water or the like that may flow from the outside, thereby preventing deterioration of the organic light emitting layer 230. At this time, the sealing layer 250 may be made of a metal such as copper (Cu) and aluminum (Al) or an alloy thereof, but not necessarily, various materials known in the art may be used.

The black matrix 270 is disposed between the sealing layer 250 and the second substrate 12. The black matrix 270 is disposed on the side of the color filter 280 so as not to overlap with the organic light emitting layer 230 to prevent light from leaking into the non-display area.

The color filter 280 is disposed between the sealing layer 250 and the second substrate 12. The color filter 280 is disposed on the organic light emitting layer 230 to change the color of light emitted from the organic light emitting layer 230. At this time, the color filter 280 may be composed of a red color filter, a green color filter, and a blue color filter.

4 is a cross-sectional view of a pixel when a display device according to an exemplary embodiment of the present invention is implemented as a liquid crystal display device.

4, a pixel of a display device according to an exemplary embodiment of the present invention includes a first substrate 11, a first substrate 11, a black matrix 270, and a column spacer 185 A first alignment layer 161 formed on the second substrate 12 facing the column spacer 185 and a second alignment layer 161 formed on the second substrate 12. The column spacer 185 is formed on the second substrate 12, And a liquid crystal layer 155 between the first alignment layer 161 and the second alignment layer 162. The liquid crystal layer 155 may be a liquid crystal layer.

First, a pixel P is formed on each of the intersections of gate lines (not shown) and data lines (not shown) on the first substrate 11. The pixel P includes a thin film transistor T, a common electrode 135, and a pixel electrode 125.

A first protective layer 105 and a planarization layer 115 are formed on the first and second electrodes to cover the thin film transistor T. A first contact hole for exposing a second electrode of the thin film transistor T is formed in the first protective film 105 and the planarization film 115,

The common electrode 135 is formed on the planarization layer 115. A common voltage Vcom is applied to the common electrode 135 to drive the liquid crystal. A second protective layer 145 is formed on the common electrode 135 to cover the common electrode 135.

The pixel electrode 125 is formed on the second protective layer 145 covering the common electrode 135. At this time, the pixel electrode 125 is connected to the second electrode of the TFT.

The second substrate 12 includes a black matrix 270 and a color filter 280. The second substrate 12 may include a column spacer 185 for maintaining a cell gap between the second substrate 12 and the first substrate 11.

A first alignment layer 161 and a second alignment layer 162 are formed on the first substrate 11 and the second substrate 12 to align the liquid crystals 151 provided in the liquid crystal layer 155.

A liquid crystal layer 155 is provided between the first alignment layer 161 and the second alignment layer 162. For example, the liquid crystal layer 155 may be formed by dropping a liquid crystal 151 on a first substrate 11 including a first alignment layer 161. In the liquid crystal display panel, when a voltage is applied to the liquid crystal 151 among the various properties of the liquid crystal 151 provided in the liquid crystal layer 155, an image is displayed using the property that the arrangement of molecules is changed.

5 is a plan view showing a power supply wiring of a display device according to an exemplary embodiment of the present invention.

Referring to FIG. 5, a display device according to an exemplary embodiment of the present invention includes a first power supply line and a second power supply line. In Fig. 5, the first power supply wiring is indicated by a dotted line and the second power supply wiring is indicated by a thick solid line.

The first power supply wiring connects the driving voltage from the power supply unit 60 to the gate driving circuit of the second gate flexible films 22 through the gate driving circuits 25 of the first gate flexible films 21. [ (25). The first power supply line includes a first PCB wiring PCB1, a first driving circuit connection wiring COF1, a second driving circuit connection wiring COF2, a first LOG wiring LOG1, a second LOG wiring LOG2, a third LOG wiring LOG3, and a fourth LOG wiring LOG4.

The first PCB wiring PCB1 connects the driving voltage from the power supply unit 60 to the control printed circuit board 50, the first flexible printed circuit board 81, the first source printed circuit board 41, The first gate flexible films 21 and the source flexible films adjacent to the first gate flexible films 21 are supplied to the fourth LOG wiring LOG4.

The first driving circuit connection wiring (COF1) is disposed on the first gate flexible films (21). The first driving circuit connection wiring COF1 connects the gate driving circuits 25 disposed on the first gate flexible films 21. [ At this time, the first driving circuit connection line COF1 adjacent to the data driver 30 among the first driving circuit connection lines COF1 is connected to the fourth LOG line LOG4.

The second driving circuit connection wiring COF2 is disposed on the second gate flexible films 22. The second driving circuit connection wiring COF2 connects the gate driving circuits 25 disposed on the second gate flexible films 22. [ At this time, the second drive circuit connection line COF2 adjacent to the data driver 30 among the second drive circuit connection lines COF2 is not connected to the eighth LOG line LOG8.

The first LOG wiring line LOG1 is disposed on the first substrate 11 and connects the first driving circuit connection wiring lines COF1.

The second LOG line LOG2 is disposed on the first substrate 11 and connects the second driving circuit connection lines COF2.

The third LOG wiring line LOG3 is disposed on the first substrate 11 and connects the first driving circuit connection wiring lines COF1 and the second driving circuit connection wiring lines COF2. At this time, the third LOG wiring LOG3 may be disposed at the outermost side of the other side facing the one side of the first substrate 11 on which the data driver 30 is disposed. Since the third LOG wiring line LOG3 is disposed at the outermost portion of the first substrate 11, the display area DA can be ensured to be wide. The third LOG wiring LOG3 connects the first driving circuit connection wiring lines COF1 and the second driving circuit connection wiring lines COF2 so that the driving voltage supplied from the power supply unit 60 1 can be supplied to both sides of the gate driver 20 disposed on both sides of the substrate 11.

The fourth LOG wiring LOG4 is disposed on the first substrate 11 and connects the first PCB wiring PCB1 and the adjacent first driving circuit connection wiring COF1.

The display device according to an exemplary embodiment of the present invention is configured such that the driving voltage supplied from the power supply unit 60 to both gate drive units 20 disposed on both sides of the first substrate 11 by the third LOG wiring LOG3 It is possible to prevent an excessive current from flowing to the power supply wiring for supplying power to the gate drive circuits 25 for realizing a high picture quality large area display device. Therefore, the display device according to an exemplary embodiment of the present invention can prevent a burnt phenomenon in which the gate flexible film 25 on which the gate drive circuit 25 is mounted is burnt by an excessive current, And the reliability can be prevented from deteriorating.

The second power supply wiring connects the driving voltage from the power supply unit 60 to the gate drive circuit of the first gate flexible films 21 through the gate drive circuits 25 of the second gate flexible films 22. [ (25). The second power supply wiring may include a second PCB wiring PCB2, a third driving circuit connection wiring COF3, a fourth driving circuit connection wiring COF4, a fifth LOG wiring LOG5, a sixth LOG wiring LOG6, seventh LOG wiring LOG7, and eighth LOG wiring LOG8.

The second PCB wiring PCB2 connects the driving voltage from the power supply unit 60 to the control printed circuit board 50, the second flexible printed circuit board 82, the second source printed circuit board 42, (LOG8) through the second soft gate insulating film (22) and the source flexible film adjacent to the second gate flexible films (22).

And the third drive circuit connection wiring COF3 is disposed on the second gate flexible films 22. [ The third driving circuit connection wiring COF1 connects the gate driving circuits 25 disposed on the second gate flexible films 22. [ At this time, the third driving circuit connection line COF3 adjacent to the data driver 30 among the third driving circuit connection lines COF3 is connected to the eighth LOG line LOG8.

The fourth driving circuit connection wiring COF4 is disposed on the first gate flexible films 21. [ The fourth driving circuit connection wiring COF4 connects the gate driving circuits 25 disposed on the first gate flexible films 21. [ At this time, the fourth drive circuit connection line COF4 adjacent to the data driver 30 among the fourth drive circuit connection lines COF4 is not connected to the fourth LOG line LOG4.

The fifth LOG wiring line LOG5 is disposed on the first substrate 11 and connects the third driving circuit connection wiring lines COF3.

The sixth LOG wiring line LOG6 is disposed on the first substrate 11 and connects the fourth driving circuit connection wiring lines COF4.

The seventh LOG wiring line LOG7 is disposed on the first substrate 11 and connects the third driving circuit connection wiring lines COF3 and the fourth driving circuit connection wiring lines COF4. At this time, the seventh LOG wiring line LOG7 may be disposed on the outermost side of the other side facing the one side of the first substrate 11 on which the data driver 30 is disposed. The seventh LOG wiring line LOG7 is disposed at the outermost portion of the first substrate 11, so that the display region DA can be ensured widely. The seventh LOG wiring line LOG7 connects the third driving circuit connection lines COF3 and the fourth driving circuit connection lines COF4 so that the driving voltage supplied from the power supply unit 60 1 can be supplied to both sides of the gate driver 20 disposed on both sides of the substrate 11.

The eighth LOG wiring line LOG8 is disposed on the first substrate 11 and connects the second PCB wiring PCB2 and the adjacent third driving circuit connection wiring COF3.

The display device according to an exemplary embodiment of the present invention includes the gate driver 20 disposed on both sides of the first substrate 11 by the seventh LOG wiring line LOG7, It is possible to prevent an excessive current from flowing to the power supply wiring for supplying power to the gate drive circuits 25 for realizing a high picture quality large area display device. Particularly, in the display device according to an embodiment of the present invention, since the driving voltage flows in both directions through the driving circuit connection wiring by the first power supply wiring and the second power supply wiring, the current density increases on one side, It is possible to prevent the phenomenon that the amount of current is concentrated. Therefore, the display device according to an exemplary embodiment of the present invention can prevent a burnt phenomenon in which the gate flexible film 25 on which the gate drive circuit 25 is mounted is burnt by an excessive current, And the reliability can be prevented from deteriorating.

Although the embodiments of the present invention have been described in detail with reference to the accompanying drawings, it is to be understood that the present invention is not limited to those embodiments and various changes and modifications may be made without departing from the scope of the present invention. . Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, it should be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of protection of the present invention should be construed according to the claims, and all technical ideas within the scope of equivalents should be interpreted as being included in the scope of the present invention.

10: display panel 20: gate driver
30: Data driver 40: Source printed circuit board
50: control printed circuit board 60: power supply
70: timing control unit 80: flexible circuit board

Claims (10)

A printed circuit board on which a power supply part is disposed;
A substrate connected to the printed circuit board;
A plurality of gate lines arranged in a first direction on the substrate;
First gate flexible films connected to the plurality of gate lines at one side of the substrate and each having gate driving circuits mounted thereon;
Second gate flexible films connected to the plurality of gate lines at the other side of the substrate and each having the gate driving circuit mounted thereon; And
And a first power supply wiring for supplying a drive voltage from the power supply unit to gate drive circuits of the second gate flexible films via gate drive circuits of the first gate flexible films. The method according to claim 1,
Wherein the first power supply wiring comprises:
A first driving circuit connection wiring disposed on the first gate flexible films;
A first LOG wiring disposed on the substrate and connecting the first driving circuit connection wirings;
A second driving circuit connection wiring disposed on the second gate flexible films; And
And second LOG wirings disposed on the substrate and connecting the second driving circuit connection wirings. 3. The method of claim 2,
Wherein the first power supply wiring comprises:
And a third LOG wiring disposed on the substrate and connecting the first driving circuit connection wirings and the second driving circuit connection wirings. The method of claim 3,
A plurality of data lines arranged on the substrate in a second direction intersecting with the first direction; And
Further comprising source flexible films attached to the substrate and connected to the data lines. 5. The method of claim 4,
Wherein the first power supply wiring comprises:
A first PCB wiring disposed on the printed circuit board and the source flexible film; And
And a fourth LOG wiring connecting the first PCB wiring and the adjacent first drive circuit connection wiring. 6. The method of claim 5,
Further comprising a second power supply wiring which is spaced apart from the first power supply wiring and supplies a drive voltage from the power supply part to the gate drive circuits of the first gate flexible films via gate drive circuits of the second gate flexible films / RTI > The method according to claim 6,
The second power supply wiring line
A third driving circuit connection wiring disposed on the second gate flexible films;
A fifth LOG wiring disposed on the substrate and connecting the third driving circuit connection wirings;
A fourth driving circuit connection wiring disposed on the first gate flexible films;
A sixth LOG wiring disposed on the substrate and connecting the fourth driving circuit connection wirings; And
And a seventh LOG wiring disposed on the substrate and connecting the third driving circuit connection wirings to the fourth driving circuit connection wirings. 8. The method of claim 7,
The second power supply wiring line
A second PCB wiring disposed on the printed circuit board and the source flexible film; And
And an eighth LOG wiring connecting the second PCB wiring and a third driving circuit connection wiring adjacent thereto. 8. The method of claim 7,
And the third LOG wiring and the seventh LOG wiring are disposed at the outermost portion of the substrate. 9. The method of claim 8,
The second driving circuit connection wiring adjacent to the source flexible film is not connected to the eighth LOG wiring, and the fourth driving circuit connection wiring adjacent to the source flexible film is connected to the fourth LOG wiring, Device.

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