KR20170111109A - Synchronize method for output of fixed cycle operation plc system - Google Patents

Abstract

The present invention relates to an output synchronization method of a fixed period operation PLC system, and more particularly, to an output synchronization method of a fixed period operation PLC system having the same input / output refresh time in all modules. To this end, the present invention synchronizes a fixed cycle time and a current time of a plurality of other modules with a CPU module, and confirms that all the other modules receive data as a result of a user program operation of the CPU module. Then, it waits for a certain time and outputs the data received by all other modules. Accordingly, the present invention can simultaneously output the data output from the CPU module by the other module in accordance with the fixed cycle time set by the user, thereby precisely controlling the output and reducing the load of the CPU module. In addition, since the number of data transmitted from the CPU module is further increased to one, the output time of the other module is matched, so that the existing PLC system can be used without modification.

Description

TECHNICAL FIELD [0001] The present invention relates to a synchronous output method for a PLC system,

The present invention relates to an output synchronization method of a fixed period operation PLC system, and more particularly, to an output synchronization method of a fixed period operation PLC system having the same input / output refresh time in all modules.

A programmable logic controller (PLC) is a device that integrates functions of existing relays, timers, counters, etc. in a controlled manner using a microprocessor. These PLCs are a core product that collectively manages various control devices from small scale plants to large plants according to the purpose of use by organizing system with various function modules gathered.

A PLC is a CPU module that controls and monitors this system. The functions of the CPU module can be classified into three types: module control, user program operation, and system diagnosis function. In particular, the user program operation consists of a combination of various functions created by the user. Based on the operation result of these function combinations, the CPU transfers or fetches the data to the module. Here, the user program operation method is operated by several methods. The regular operation method, the fixed cycle operation method, and the general scan operation method are typical operating methods.

FIG. 1 is a flowchart of one scan in a fixed period operation method of a PLC system according to the related art. FIG. 2 is a flowchart illustrating a method of operating a fixed period operation of a PLC system according to the related art, And FIG.

The fixed period operation method of the PLC system according to the related art is characterized in that one scan (one cycle) is performed in the initialization processing step S1, the input image area refresh step S2, the program operation processing step S3, An output image area refresh step S4, and an end processing step S5. In the PLC system, when user program operation is completed, output refresh is performed to transfer the processed result value to the actual module. Therefore, the start time of the output refresh is determined by the user program operation end time. That is, the output from the actual other module is executed after the program operation is terminated and after the output refresh to the other module. However, the user program may have a different computation time for each scan, and accordingly, there is a problem that the output timing in the actual other module, that is, the output refresh timing may be different every scan.

Referring to FIG. 2, the PLC system according to the related art performs a step S2 of transmitting output data to the other module n when the program operation ends (S1). When the module n outputs the received data (S3), it is confirmed that the module n is the last other module (S4). At this time, if the corresponding module is not the last other module, the module number is incremented (S5), and the output data is transmitted to module n + 1. However, if module n is the last other module, it performs termination processing (S6). That is, when the user program operation is finished, the CPU sequentially executes the output refresh from the 0th module, and the received other module outputs the data directly. The output refresh repeats the output refresh by the number of other modules installed in the PLC system, and finishes the scan end process when the last guitar module is completed. Since the CPU module performs the output refresh sequentially in order of the other modules and the other module outputs the received output data immediately, the other modules that have completed the output first when all the other modules have completed the output, The output time error occurs in the other modules that have completed the operation. Also, as the number of other modules increases, the output time error of the first other module and the last other module becomes larger.

SUMMARY OF THE INVENTION An object of the present invention is to provide an output synchronization method of a fixed period operation PLC system having an output refresh time at every scan.

And to provide an output synchronization method of a fixed period operation PLC system having the same output refresh time in all modules.

The objects of the present invention are not limited to the above-mentioned objects, and other objects and advantages of the present invention which are not mentioned can be understood by the following description and more clearly understood by the embodiments of the present invention. It will also be readily apparent that the objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

According to another aspect of the present invention, there is provided an output synchronizing method of a fixed period operation PLC system for outputting data, which is a result of a CPU module operating a user program, to a plurality of other modules for each scan, And outputting the output data simultaneously according to a fixed cycle time set by the user. The present invention also provides a method of synchronizing an output of a fixed period operation PLC system.

The step of transmitting the output data to the plurality of other modules by the CPU module may include the steps of: executing the user program set by the user by the CPU module; and, when the execution of the user program is completed, And outputting the output data as a result of executing the user program.

The step of simultaneously outputting the output data according to the fixed cycle time set by the user by the plurality of other modules comprises the steps of: checking whether each of the plurality of other modules has completed data reception by the other module including itself; When the plurality of other modules have completed receiving data, the plurality of other modules may transmit the fixed time period set by the user and the previous output time, which is the time when the other module outputs data in the scan performed before the current scan, Waiting for data output until a value is reached, and outputting data after waiting for a fixed period of time set by the user by the plurality of other modules. That is, according to the present invention, when a plurality of other modules complete data reception, they wait for a predetermined time and output data at the same time. Of course, if it is confirmed that a plurality of other modules have completed data reception without waiting for a predetermined time, many other modules may output data immediately.

Checking whether each of the plurality of other modules completes data reception by the other module including itself; and before the CPU module transmits the plurality of other module fixed cycle time and the current time to the fixed cycle time And synchronizing with the current time.

The method of claim 1, further comprising: waiting for data output during a fixed period of time set by a user when the plurality of other modules have finished receiving data, And updating the data output time after waiting for a fixed period of time set by the user by the plurality of other modules.

The present invention can simultaneously output the data output from the CPU module by the other module in accordance with the fixed cycle time set by the user so as to precisely control the output and reduce the load of the CPU module.

In addition, since the present invention is a method in which the number of data transmitted from the CPU module is further increased, and the output time of the other module is matched, the conventional PLC system can be used without modification.

1 is a flowchart of a scan in a fixed cycle operation method of a PLC system according to the related art.
2 is a flowchart showing data transmission to other modules and output processes of other modules after completion of user program operation in a fixed cycle operation method of a PLC system according to the related art.
FIGS. 3 and 4 are block diagrams of a fixed period operation PLC system in which outputs are synchronized according to the present invention. FIG.
5 is a conceptual diagram illustrating a refresh structure between a CPU and a module of a fixed periodic operation PLC system in which outputs are synchronized according to the present invention.
6 is a conceptual diagram showing a RI RAM structure of a fixed period operation PLC system in which outputs are synchronized according to the present invention.
7 and 8 are flowcharts of an output synchronization method of a fixed period operation PLC system according to the present invention.

The above and other objects, features, and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings, which are not intended to limit the scope of the present invention. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to denote the same or similar elements.

FIGS. 3 and 4 are block diagrams of a fixed period operation PLC system in which outputs are synchronized according to the present invention.

The fixed period operation PLC system in which the output according to the present invention is synchronized includes a power module 200, a CPU module 300, and other modules 400 as shown in FIG. The other module 400 may include one or more communication modules 410 and an input / output (I / O) module 420. The power module 200, the CPU module 300, Are connected to each other through the base 100. [ The other module 400 may include a communication module 410 and an input / output module 420, but the present invention is not limited thereto. The other module 400 may include a communication module 410, And an input / output module 420, as shown in FIG.

The power module 200 generates electric power and supplies the generated electric power to the CPU module 300 and the other modules 400. In addition, the power module 200 may have different capacities depending on the type. Of course, in the present invention, the power module 200 may be omitted, and in this case, power may be supplied from the outside.

The CPU module 300 receives power from the power module 200 and operates as shown in FIG. 4. The CPU module 300 includes a calculation function required for operation of the PLC system, a control function for the other module 400, and user data And a memory unit 330 for storing various data necessary for the operation of the input / output unit 320 and the PLC system.

FIG. 5 is a conceptual diagram illustrating a refresh structure between a CPU and a module of a fixed periodic operation PLC system synchronized with the present invention, FIG. 6 is a conceptual diagram illustrating a RI RAM structure of a fixed periodic operation PLC system synchronized with the output of the present invention, to be.

The CPU 310 executes the operating system for internal processing based on the execution result of the user program for operating the user program, which is a program created by the user.

The input / output unit 320 outputs the calculation result of the CPU 310 to the other module 400 or receives data from the other module 400 or the like.

The memory unit 330 stores various data necessary for the operation of the PLC system. For example, a user program, an operating system, and a firmware binary may be recorded. 5, the memory unit 330 includes an RI (Refresh Information) RAM and an RD (Refresh Data) RAM. The RI RAM includes a slot number and address, a read / write , A reference address, and a data size. Therefore, when the refresh is executed, the data stored in the RI RAM is analyzed and the data is transmitted to each module. The data stored in the RD RAM reads data in the refresh map of each module according to the reading / writing or stores the data in the corresponding area. The CPU module 300 includes a fixed cycle time setting unit 331, an input / output refresh unit 332, and a user program executing unit 331.

The fixed cycle time setting unit 331 sets the fixed cycle time of the PLC system in the fixed cycle time zone set by the user. Here, the fixed cycle time set by the user is set in the form of the parameter of the fixed cycle time using the PLC program creation tool. The set fixed cycle time is also transmitted when the user downloads the program to the PLC. The PLC analyzes the transmitted parameters and starts the fixed cycle operation and executes the ladder program. Here, the fixed cycle time setting should be set longer than the current scan time. Accordingly, when the user program operation created by the user is completed, the CPU module 300 sequentially transmits the output data to the communication module and the input / output module, which will be described later. When the transmission to the last module is completed, the control authority of the actual module output is held by the other module 400, i.e., the communication module and the input / output module, to which the data is transmitted. .

The input / output refresh unit 332 performs input / output refresh by outputting to the input / output module or fetching data from the input / output unit according to the result of execution of the user program. To this end, the input / output refresh unit may include an input refresh unit for fetching data input as a result of executing the user program and transmitting the input data to the CPU, and an output refresh unit for outputting the operation result processed by the CPU.

The user program executing section 333 allows the CPU to execute a program created by the user. Here, when the user program executing unit executes the user program, the operating system loads the content into the memory and processes the contents. In addition, the execution time of the user program may be different each time the user program executing unit executes.

The communication module 410 receives the data output from the input / output unit 320 of the CPU module 300 and outputs the output according to the received data. The communication module includes an MCU 411 corresponding to the CPU of the CPU module 300 described above, an input / output unit 412 for outputting data according to the received data, and a memory unit 413 for storing the received data and the like . The communication module 410 includes a time synchronization unit 413a, a fixed period waiting unit 413b, an output refresh unit 413c, and a previous output time update unit 413d. Here, the time synchronization unit 413a, the fixed cycle standby unit 413b, the output refresh unit 413c and the previous output time update unit 413d may be included in the MCU 411 or the memory unit 413, As shown in FIG.

The time synchronization unit 413a synchronizes the current time and the fixed cycle time set by the user according to the time of the CPU 310. [ Here, the time synchronization unit 413a may perform time synchronization using GPS, IEEE 1588, or the like. This is performed in all the modules, such as the input / output module 420, which will be described later, so that the time of all the modules including the CPU module 300 is synchronized.

The fixed period waiting unit 413b confirms that data is received from the CPU module 300 up to the last one of the other modules 400, in this embodiment, the input / output module 420, And performs a fixed cycle wait for a fixed cycle time set by the user to wait for output refresh.

The output refresh unit 413c performs an output refresh after waiting for a fixed period and outputs the output data through the input / output unit 412. [

The previous output time update unit 413d updates the output refresh time of the current scan to the previous output time to be used in the next scan.

The input / output module 420 receives the data output from the input / output unit 320 of the CPU module 300 and outputs the output according to the received data. The input / output module 420 also includes an MCU 421 corresponding to the CPU of the CPU module 300, an input / output unit 422 for outputting data according to the received data, And a memory unit 423 for storing the data. The memory unit 423 includes a time synchronization unit 423a, a fixed cycle standby unit 423b, an output refresh unit 423c, and a previous output time update unit 423d.

As described above, according to the present invention, other modules simultaneously output data output from the CPU module according to a fixed cycle time set by the user, thereby enabling precise output control and reducing the load of the CPU module. In addition, since the present invention is a method in which the number of data transmitted from the CPU module is further increased, and the output time of the other module is matched, the conventional PLC system can be used without modification.

Hereinafter, an output synchronization method of the fixed period operation PLC system according to the present invention will be described with reference to the drawings. In the following description, redundant description of the synchronized fixed period operation PLC system according to the present invention is omitted or briefly described.

FIGS. 7 and 8 are flowcharts of an output synchronization method of the fixed period operation PLC system according to the present invention.

As shown in FIG. 7, the output synchronization method of the fixed period operation PLC system according to the present invention includes a step S1 of transmitting output data, a step S2 of outputting data by the other module according to the set fixed cycle time, .

In step S1 of transmitting output data to the other module, the CPU module transmits output data to the other module. This includes a step S1-1 in which the user program operation is terminated, a step S1-2 in which output data is transmitted to the other module, and a step S1-3 in which it is determined whether it is the last module.

In step S1-1 in which the user program operation is terminated, the user program operation is terminated when the operation of the user program set by the user is completed in the CPU module.

In step S1-2 of transmitting the output data to the other module, when the user program operation is completed in the step S1-1 in which the user program operation is terminated, the CPU module transmits the other module, for example, the communication module and the input / And transmits the output data that is the result of the user program operation to the operation module.

Step S1-3 of determining whether it is the last module determines whether the other module to which the output data is transmitted in the step S1-2 of transmitting the output data to the other module is the last other module. If the module is not the last other module, the module number is increased and the output data is transmitted to the next module. If the module is the last other module, the other module outputs data according to the fixed cycle time described later (S2). That is, when the data transmission to the last other module is completed, the control of the actual module output means that the other module is not the CPU module.

If the output data is transmitted to all the other modules in step S2, the other modules output data according to the fixed cycle time set by the user. As shown in FIG. 8, the step S2 of outputting the data by the other module according to the fixed cycle time set for this purpose includes a fixed cycle time and current time synchronization step S1, a step S2 , Waiting for a fixed period of time (S3), updating the previous output time (S4), and sending the output of other modules (S5).

The fixed cycle time and current time synchronization step (S1) synchronizes the fixed cycle time and the current time of all other modules according to the fixed cycle time and the current time of the CPU module. The fixed cycle time and current time synchronization step S1 includes a step S1-1 of determining whether the fixed cycle time and the current time are synchronized and a step S1-2 of requesting and synchronizing the fixed cycle time and the current time .

The step S1-1 of determining whether the fixed cycle time and the current time are synchronized determines whether the fixed cycle time and the current time of the other module are the same as the fixed cycle time and the current time of the CPU module. Here, if the fixed cycle time and the current time of the other module are different from the fixed cycle time and the current time of the CPU module, a step (S1-2) of requesting and synchronizing a fixed cycle and a current time to be described later is performed. Of course, if the fixed cycle time and the current time of the CPU module and the other modules are the same, step (S1-2) of requesting and synchronizing the fixed cycle time and the current time to be described later is omitted.

The step (S1-2) of requesting and synchronizing the fixed cycle time and the current time is a step in which the CPU module requests the fixed cycle time and the current time and sets the fixed cycle time and the current time of the other module to the fixed cycle time and the current time Synchronize. It can use GPS, IEEE1588, etc. as described above. In addition, until the step S1-2 of requesting and synchronizing the fixed cycle time and the current time, the CPU module is performed as a main body, and a step to be described later is performed by each other module as a subject.

In step S2 of confirming completion of data reception, the other module confirms whether data reception from the CPU module to the last other module is completed. That is, step S2 of confirming completion of data reception is performed individually in all other modules.

The step S3 of waiting for the fixed cycle time waits for the other module not to output data during the fixed cycle time set by the user. That is, the current time of the other module waits until it is equal to or more than the fixed cycle time set by the user and the previous output time of the scan performed before the current scan. Of course, if it is confirmed that a plurality of other modules have completed the data reception without waiting for a predetermined time, all other modules have received data, so that many other modules may output data immediately.

The step S4 of updating the previous output time updates the previous output time so that the data output time of the current scan is the previous output time in the next scan.

The step S5 of sending the output of the other module performs the step S4 of updating the previous output time. All other modules export the data output at the same time. Here, the step S4 of updating the previous output time may be performed simultaneously with or after the step S5 of outputting the other module.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, But the present invention is not limited thereto.

Claims (5)

A method for synchronizing an output of a fixed period operation PLC system in which data resulting from an operation of a CPU module is output to one or more other modules for each scan,
The CPU module sending output data to a plurality of other modules,
And outputting the output data at the same time according to a predetermined fixed cycle time.
The method according to claim 1,
Wherein the step of the CPU module transmitting output data to a plurality of other modules comprises:
Executing the user program received from the user by the CPU module;
And transmitting the output data, which is a result of the user program execution, to the plurality of other modules when the execution of the user program is terminated.
3. The method of claim 2,
Wherein the plurality of other modules simultaneously outputting the output data according to a predetermined fixed cycle time comprises:
Confirming that each of the plurality of other modules has completed data reception by another module including itself,
When the plurality of other modules have completed receiving data, the plurality of other modules may include a predetermined fixed cycle time plus a previous output time that is a time at which the other modules output data in the scan performed before the current scan, Waiting for data output until a value is reached,
And outputting data after the plurality of other modules wait for the preset fixed cycle time.
The method of claim 3,
Confirming that each of the plurality of other modules has completed receiving data from another module including itself,
Further comprising synchronizing the plurality of other module fixed cycle time and current time with the fixed cycle time and the current time of the CPU module by the CPU module.
5. The method of claim 4,
Waiting for data output for a fixed period of time set by a user when the plurality of other modules have finished receiving data,
Further comprising the step of updating the previous output time of the plurality of other modules with the output time of the data after waiting for the fixed cycle time set by the user by the plurality of other modules, Way.

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