KR20170106621A - Display apparatus and method of manufacturing the same - Google Patents

Abstract

Disclosed is a display apparatus which can reduce process costs. According to an embodiment of the present invention, the display apparatus comprises: a substrate divided into a display area displaying an image by having a display element, and a non-display area around the display area, wherein the non-display area includes a bending area bent around a bending shaft; an encapsulation layer arranged on the display area; a touch electrode arranged on the encapsulation layer; a touch wire connected to the touch electrode, and extended to the non-display area; and a fan-out wire connected to a signal wire applying an electric signal to the display area, and at least partially arranged in the bending area. The fan-out wire is composed of the same material with the touch wire.

Description

DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME [0002]

Embodiments of the present invention relate to a display device and a method of manufacturing the same.

The display device is a device for visually displaying data. Such a display device includes a substrate partitioned into a display area and a non-display area. In the display region, a gate line and a data line are mutually insulated, and the gate line and the data line intersect to define a plurality of pixel regions in the display region. The display region is provided with a thin film transistor corresponding to each of the pixel regions and a pixel electrode electrically connected to the thin film transistor. In the non-display area, a pad portion and a fan-out portion are disposed. Here, the fan-out portion is a portion provided with wirings for transmitting a signal from the driver IC mounted on the pad portion by connecting the pad portion and the display region.

By bending at least a part of such a display device, visibility at various angles can be improved or the area of the non-display area can be reduced. A method of minimizing defects and reducing the process cost in the process of manufacturing the bending display device is being sought.

Embodiments of the present invention are intended to provide a display device capable of ensuring a long life of a display device, minimizing the occurrence of defects such as disconnection during a manufacturing process, and reducing a process cost, and a manufacturing method thereof.

The problems to be solved by the present invention are not limited to the above-mentioned problems, and other matters not mentioned can be clearly understood by those skilled in the art from the description of the present invention.

In one embodiment of the present invention,

A substrate provided with a display element and partitioned into a display area where an image is displayed and a non-display area around the display area, the non-display area including a bending area bent around a bending axis;

An encapsulation layer disposed on the display area;

A touch electrode disposed on the sealing layer;

A touch wiring connected to the touch electrode and extending to the non-display area; And

A fan-out wiring connected to a signal wiring for applying an electrical signal to the display area, the fan-out wiring being disposed at least partially in the bending area;

And the fan-out wiring is made of the same material as the touch wiring.

In one embodiment, the signal wiring is connected to the fan-out wiring through a via hole, and the via hole may be disposed outside the bending area.

In one embodiment, the fan-out wiring may be formed of the same material as the signal wiring, and the specific resistance of the fan-out wiring may be different from the specific resistance of the signal wiring.

In one embodiment, the fan-out wiring may be formed of the same material as the signal wiring, and the thickness of the fan-out wiring may be different from the thickness of the signal wiring.

In one embodiment, the fanout wiring may be formed of the same material as the signal wiring, and the grain size of the fanout wiring may be different from the grain size of the signal wiring.

In one embodiment, the fan-out wiring may be formed of a material different from the signal wiring.

In one embodiment, an organic layer disposed in at least a portion between the fan-out wiring and the substrate in the bending region may be further included.

In one embodiment, the thin film transistor is disposed in the display region; And a planarization layer covering the thin film transistor and containing an organic material, wherein the organic material layer may include the same material as the planarization layer.

In one embodiment, the display element includes a pixel electrode, a counter electrode facing the pixel electrode, and an intermediate layer interposed between the pixel electrode and the counter electrode,

The display region may further include a pixel defining layer having an opening exposing a center portion of the pixel electrode and defining a pixel region, and the organic layer may include the same material as the pixel defining layer.

In one embodiment, the sealing layer includes an organic sealing layer, and the organic layer may include the same material as the organic sealing layer.

In one embodiment, the organic light emitting display further includes a touch buffer layer disposed between the sealing layer and the touch electrode and including an organic material, and the organic material layer may include the same material as the touch buffer layer.

In one embodiment, the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, and the first touch conductive layer and the second touch conductive layer are electrically The touch wiring may be formed of the same material as the second touch conductive layer, and the organic material layer may include the same material as the first insulating layer.

In one embodiment, the fan-out wiring may have a structure in which a first layer including the same material as the first touch conductive layer and a second layer including the same material as the second touch conductive layer are stacked .

In one embodiment, the organic layer may have an uneven surface on at least a part of the upper surface.

In one embodiment, the protruding surface of the uneven surface extends in the bending axis direction, and the fan-out wiring may extend while intersecting the protruding surface.

In one embodiment, an inorganic insulating layer is disposed between the substrate and the fan-out wiring, and the inorganic insulating layer may have an opening or a groove corresponding to the bending region.

In one embodiment, it may further comprise an organic layer disposed on at least a part of the opening or the groove.

In one embodiment, the organic layer covers the inner surface of the opening and may extend to a portion of the upper surface of the inorganic insulating layer.

In one embodiment, the touch electrode may be formed of the same material as the touch wiring.

In one embodiment, the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, and the first touch conductive layer and the second touch conductive layer are electrically And the touch wiring may be formed of the same material as the first touch conductive layer or the second touch conductive layer.

In one embodiment, the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, and the first touch conductive layer and the second touch conductive layer are electrically The touch wiring may be formed of a first layer including the same material as the first touch conductive layer and a second layer including the same material as the second touch conductive layer.

In one embodiment, the fan-out wiring may have a structure in which a first layer including the same material as the first touch conductive layer and a second layer including the same material as the second touch conductive layer are stacked .

In one embodiment, the thin film transistor includes a source electrode, a drain electrode, and a gate electrode, the thin film transistor being disposed in the display region or the non-display region. And an additional conductive layer disposed at least partially in the bending region, wherein the additional conductive layer may be provided in the same layer as the source electrode, the drain electrode, or the gate electrode.

In one embodiment, the additional conductive layer may be spaced apart from the fanout wiring.

In one embodiment, the additional conductive layer may be at least partially overlapped with the lower portion of the fan-out wiring to be electrically connected to the additional conductive layer.

In one embodiment, an insulating layer may be interposed between the additional conductive layer and the fan-out wiring.

In one embodiment, the additional conductive layer and the fan-out wiring may be electrically connected through a via hole provided on the insulating layer.

In one embodiment, the via hole may not be disposed in the bending region.

In one embodiment, the first thin film transistor includes a first semiconductor layer, a first source electrode, a first drain electrode, and a first gate electrode, the first thin film transistor being disposed in the display region or the non-display region, A second thin film transistor including a second source electrode, a second drain electrode, and a second gate electrode; And a second additional conductive layer formed of the same material as the second gate electrode, the first additional conductive layer being formed of the same material as the first gate electrode, The gate electrode is disposed in a different layer, and at least one of the first additional conductive layer and the second additional conductive layer may be disposed at least partially in the bending region.

In one embodiment, the first additional conductive layer in the bending region may be disposed at least partially overlapping the second additional conductive layer.

In one embodiment, an insulating layer may be interposed between the first additional conductive layer and the second additional conductive layer in the bending region.

In one embodiment, at least one of the first additional conductive layer and the second additional conductive layer may be disposed under the fan-out wiring and electrically connected thereto.

In one embodiment, the insulating layer may be disposed on at least one of the fan-out wiring and the first additional conductive layer, and between the fan-out wiring and the second additional conductive layer.

In one embodiment, the device may further include a banding protection layer disposed on the fanout wiring in the bending region.

In one embodiment, the bending protection layer may cover at least a portion of the display area.

In an exemplary embodiment, a cover layer covering the touch electrode and protecting the touch electrode may be further included.

In one embodiment, the cover layer may extend from the top of the touch electrode to the bending region to cover at least a portion of the fanout wire.

According to an embodiment of the present invention, there is further provided a protective film disposed on a lower surface of the substrate, and the protective film may include an opening or a groove overlapping at least a part of the bending region.

In one embodiment, the touch wiring extends along one side of the sealing layer in the direction of the bending region, and one side of the sealing layer may have a step shape.

In another embodiment of the present invention,

A substrate provided with a display element and partitioned into a display area where an image is displayed and a non-display area around the display area, the non-display area including a bending area bent around a bending axis;

An encapsulation layer disposed on the display area;

A touch electrode disposed on the sealing layer;

A touch wiring connected to the touch electrode and extending to the non-display area;

A signal wiring disposed between the bending region and the display region for applying an electrical signal;

A terminal disposed on one side of the non-display area; And

And a fan-out wiring disposed at least partially in the bending region, one side of which is connected to the signal wiring via a via-hole and the other side of which is connected to the terminal,

And the fan-out wiring is made of the same material as the touch wiring.

The display device may further include a thin film transistor disposed in the display region or the non-display region, the thin film transistor including a source electrode, a drain electrode, and a gate electrode. The thin film transistor includes a source electrode, a drain electrode, And may be connected to the fan-out wiring via a via-hole.

According to another embodiment of the present invention, in the method of manufacturing the display device,

And the fan-out wiring is formed simultaneously with the touch wiring.

In one embodiment, the display device may further include an organic layer disposed between the substrate and the fan-out wiring in the bending region.

In one embodiment, the display device may further include a thin film transistor disposed in the display region, and a planarization layer covering the thin film transistor and including an organic material, wherein the organic material layer is formed simultaneously with the same material as the planarization layer can do.

In one embodiment, the display device is an organic light emitting device including a pixel electrode, an opposite electrode facing the pixel electrode, and an intermediate layer including an organic light emitting layer interposed between the pixel electrode and the counter electrode, And a pixel defining layer having an opening exposing a center portion of the pixel electrode. The organic layer may be formed of the same material as the pixel defining layer.

In one embodiment, the touch wiring may be formed of the same material as the touch electrode at the same time.

In one embodiment, the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, and the first touch conductive layer and the second touch conductive layer And the touch wiring may be formed of the same material as the first touch conductive layer at the same time.

In one embodiment, the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, and the first touch conductive layer and the second touch conductive layer And the touch wiring can be formed simultaneously with the same material as the second touch conductive layer.

Other aspects, features and advantages of the present invention will become apparent from the following detailed description of the invention, claims and drawings.

According to the embodiments of the present invention as described above, it is possible to realize a display device capable of ensuring a long life of a display device, minimizing the occurrence of defects such as disconnection during a manufacturing process, . Of course, the scope of the present invention is not limited by these effects.

1 is a perspective view schematically showing a part of a display device according to an embodiment of the present invention.
2A is a perspective view schematically showing a part of a display device according to an embodiment of the present invention.
2B is a plan view schematically showing a part of a display device according to an embodiment of the present invention.
2C is a cross-sectional view schematically showing a part of the display device of FIG. 2A.
3A is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
3B is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4A is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4B is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4C is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4D is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4E is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4F is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4G is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4H is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
4I is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5A is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5B is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5C is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5D is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5E is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5F is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5G is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5H is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5I is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention.
5J is a plan view schematically showing a part of a display device according to another embodiment of the present invention.
5K is a plan view schematically showing a part of a display device according to another embodiment of the present invention.
6A is a cross-sectional view schematically showing a part of a display device according to embodiments of the present invention.
6B is a cross-sectional view schematically showing a part of a display device according to the embodiments of the present invention.
7A to 7I are sectional views sequentially illustrating a method of manufacturing a display device according to embodiments of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention is capable of various modifications and various embodiments, and specific embodiments are illustrated in the drawings and described in detail in the detailed description. It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to be illustrative, Can be implemented.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, wherein like reference numerals refer to like or corresponding components throughout the drawings, and a duplicate description thereof will be omitted .

In the following embodiments, when various components such as layers, films, regions, plates, and the like are referred to as being " on " other components, . For example, the size and thickness of each component shown in the figures are arbitrarily shown for convenience of description, and therefore, the present invention is not limited thereto. It is not limited.

In the following embodiments, the x-axis, the y-axis, and the z-axis are not limited to three axes on the orthogonal coordinate system, and can be interpreted in a broad sense including the three axes. For example, the x-axis, y-axis, and z-axis may be orthogonal to each other, but may refer to different directions that are not orthogonal to each other.

If certain embodiments are otherwise feasible, the particular process sequence may be performed differently from the sequence described. For example, two processes that are described in succession may be performed substantially concurrently, and may be performed in the reverse order of the order described.

The display device is an apparatus for displaying an image, and includes a liquid crystal display, an electrophoretic display, an organic light emitting display, an inorganic light emitting display, A field emission display, a surface-conduction electron-emitter display, a plasma display, a cathode ray tube (Cathode Ray) display, or the like.

Hereinafter, a display device according to an embodiment of the present invention will be described with reference to an organic light emitting display device, but the display device of the present invention is not limited thereto, and various types of display devices can be used.

FIG. 2B is a plan view schematically showing the display device of FIG. 2A, FIG. 2C is a plan view of the display device of FIG. 2A, FIG. 2C is a plan view of the display device of FIG. Sectional view schematically showing a part thereof. 1, a part of the substrate 100, which is a part of the display device, is bended, so that a part of the display device has a bent shape like the substrate 100. FIG. However, for convenience of illustration, the display device is shown in a state in which the display device is not bent. For the sake of convenience, the display device is not bent in cross-sectional views, plan views, and the like of the embodiments to be described later.

As shown in FIGS. 1 to 2C, the substrate 100 of the display device according to the present embodiment includes a display area DA in which an image is displayed and a non-display area in the periphery of the display area DA, Area, and the non-display area includes a bending area BA bending around a bending axis BAX. The bending area BA may refer to a region having a radius of curvature after bending.

The bending region BA extends in the first direction (+ y direction) and the bending region BA extends in the second direction (+ x direction) intersecting the first direction with the first region 1A and the second region And is located between the regions 2A. The substrate 100 is bent around a bending axis BAX extending in a first direction (+ y direction) as shown in FIG. Such a substrate 100 may comprise a variety of materials having flexible or ben-double characteristics, such as polyethersulphone (PES), polyacrylate (PAR), polyetherimide (PEI) (PEN), polyethyleneterephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC) PC) or a cellulose acetate propionate (CAP).

2, the first area 1A may include, in addition to the display area DA, a non-display area DA surrounding the display area DA, Partly. The second area 2A also includes a non-display area.

A plurality of pixels are arranged in the display area DA of the substrate 100 to display an image. The display region DA may be provided with elements such as a display element 300, a thin film transistor (TFT), and a capacitor (Cst).

2A to 2C, a pulse signal such as a gate line for transferring a gate signal, a data line for transferring a data signal, and the like, a signal for transferring a direct current signal such as a driving power source line and a common power source line, And a pixel is formed by electrical coupling of the gate line, the data line, the thin film transistor connected to the driving power line, the capacitor, the display element, etc., and an image can be displayed. The pixel can emit light at a luminance corresponding to the driving current through the display element corresponding to the data signal according to the driving power and the common power supplied to the pixel. The signal wirings may be connected to a driving circuit unit (not shown) connected to the terminal unit 20 through the fan-out wirings 720a. That is, the fan-out wiring 720a can transmit a pulse signal such as a gate signal and a data signal, and a direct current such as a power source. The pixels may be configured in a complex manner, and the plurality of pixels may be arranged in various forms such as a stripe arrangement, a penta array, and the like.

The terminal portion 20, the fan-out wiring 720a, the additional conductive layer 215d, and the touch wiring 720 may be disposed in the non-display region. Although not shown, a common power supply line, a driving power supply line, a gate driving unit, a data driving unit, and the like may be further disposed in the non-display area.

The terminal portion 20 is disposed at one end of the non-display region and may include a signal terminal 21 and a touch terminal 22. [ The terminal portion 20 is exposed without being covered by the insulating layer and can be electrically connected to a drive circuit portion (not shown) such as a flexible printed circuit board or a driver IC. The control unit may provide a data signal, a gate signal, a driving voltage ELVDD, a common voltage ELVSS, and the like. The controller may provide a signal to the touch screen layer 700 through the touch wiring 720 or receive a signal sensed by the touch screen layer 700.

The fan-out wiring 720a is disposed in a non-display area and is connected to a signal line for applying an electrical signal to the thin film transistor 210 or the display device 300 disposed in the display area DA. The signal wiring may correspond to various wirings arranged inside the display area DA, such as a gate line, a data line, a driving power line, and a common power line, as described above. The fan-out wiring 720a may be disposed at least partially in the bending area BA. In some embodiments, the fanout wiring 720a may extend from the first area 1A to a portion of the bending area BA, or may extend across the bending area BA to the second area 2A have. In other words, the fan-out wiring 720a can extend to cross the bending axis BAX. For example, the fan-out wiring 720a can be diagonally extended at a predetermined angle with respect to the bending axis BAX, and various modifications are possible. In addition, the fan-out wiring 720a may have various shapes such as a curved shape and a zigzag shape instead of a straight shape. The fan-out wiring 720a is connected to the signal terminal 21 of the terminal unit 20 and can transmit an electrical signal to the display area DA.

The non-display region may further include an additional conductive layer 215d. The additional conductive layer 215d may be connected to the thin film transistor 210 or the signal line for applying an electrical signal to the display element 300 disposed in the display area DA like the fanout wiring 720a. The additional conductive layer 215d may be formed of a material different from that of the fan-out wiring 720a. For example, the additional conductive layer 215d may be formed of the same material as a gate line, data, or the like, which is a signal line in the display area DA. The additional conductive layer 215d may be disposed on a different layer from the fan-out wiring 720a, and may be horizontally spaced apart as shown in FIG. 2b. However, it is not limited thereto. The additional conductive layer 215d may be disposed at least partially overlapped with the fan-out wiring 720a. For example, the additional conductive layer 215d may be electrically connected to the fan-out wiring 720a under the fan-out wiring 720a to apply an electrical signal to the display area DA. Embodiments related to the arrangement of the additional additional conductive layer 215d and the fan-out wiring 720a will be described later.

The display device according to the present embodiment may have a signal wiring 213b connected to the fan-out wiring 720a in addition to the fan-out wiring 720a. This signal wiring 213b is disposed in the first area 1A or the second area 2A so as to be located in a layer different from the layer in which the fanout wiring 720a is located and can be electrically connected to the fanout wiring 720a have.

The signal wiring 213b may be electrically connected to a thin film transistor or the like in the display area DA so that the fan out wiring 720a is electrically connected to the thin film transistor or the like in the display area DA through the signal wiring 213b . The signal line 213b may be electrically connected to the components located outside the display area DA and may be electrically connected to the display area DA outside the display area DA, And at least a part thereof may be located in the display area DA.

The display area DA can be sealed by the sealing layer 400. The sealing layer 400 may cover the display device 300 and the like disposed in the display area DA to protect the display device 300 from moisture or oxygen from the outside. The sealing layer 400 may cover the display area DA and partially extend to the outside of the display area DA.

On the sealing layer 400, a touch screen layer 700 including a plurality of touch electrodes 710 for a touch screen function is provided. The touch electrode 710 is connected to a touch wiring 720 for transmitting a signal sensed by the touch electrode 710. The touch wiring 720 is connected to the sealing layer 400 from above the sealing layer 400, Display area along one side of the non-display area. The touch wiring 720 may be connected to the touch screen layer 700 and may extend from the top of the sealing layer 400 and be disposed at least partially in the bending area BA. The touch wiring 720 may be connected to the touch terminal 22.

 2C illustrates that the organic light emitting device is located in the display area DA as the display device 300. The reason that the organic light emitting device is electrically connected to the thin film transistor 210 is that the pixel electrode 310 is formed in a thin film And may be understood to be electrically connected to the transistor 210. Of course, a thin film transistor (not shown) may also be disposed in the peripheral region outside the display region DA of the substrate 100 as needed. The thin film transistor located in this peripheral region may be a part of a circuit portion for controlling an electrical signal applied in the display region DA, for example.

The thin film transistor 210 may include a semiconductor layer 211 including an amorphous silicon, a polycrystalline silicon, an oxide semiconductor or an organic semiconductor material, a gate electrode 213, a source electrode 215a and a drain electrode 215b.

The gate electrode 231 may be connected to a gate wiring (not shown) for applying an on / off signal to the thin film transistor 210, and may be formed of a low resistance metal material. For example, the gate electrode 231 may be a single film or a multilayer film made of a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti)

The source electrode 215a and the drain electrode 215b may be a single film or a multilayer film made of a conductive material having a good conductivity and may be connected to a source region and a drain region of the semiconductor layer 211, respectively. For example, the source electrode 215a and the drain electrode 215b may be a single film or a multilayer film made of a conductive material including aluminum (Al), copper (Cu), and / or titanium (Ti)

Although the thin film transistor 210 according to the embodiment is a top gate type in which the gate electrode 231 is disposed on the semiconductor layer 211, the present invention is not limited thereto. The thin film transistor 210 may be a bottom gate type in which the gate electrode 231 is disposed under the semiconductor layer 211.

A gate insulating film 120 including an inorganic material such as silicon oxide, silicon nitride and / or silicon oxynitride is formed on the semiconductor layer 211 and the gate electrode 213 in order to ensure the insulating property between the semiconductor layer 211 and the gate electrode 213. [ The gate electrode 213 may be interposed. An interlayer insulating layer 130 including an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride may be disposed on the gate electrode 213. A source electrode 215a and a drain electrode 215b may be formed on the gate electrode 213, May be disposed on such an interlayer insulating film 130. [ The insulating film containing an inorganic material may be formed through CVD or ALD (atomic layer deposition). This also applies to the following embodiments and modifications thereof.

A buffer layer 110 including an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride may be interposed between the thin film transistor 210 and the substrate 100 having such a structure. The buffer layer 110 may serve to increase the smoothness of the upper surface of the substrate 100 or to prevent or minimize impurities from the substrate 100 from penetrating into the semiconductor layer 211 of the thin film transistor 210 . The buffer layer 110 may have a single-layer structure or a multi-layer structure.

A planarization layer 140 may be disposed on the thin film transistor 210. For example, as shown in FIG. 2C, when the organic light emitting diode is disposed on the thin film transistor 210, the planarization layer 140 may substantially flatten the upper portion of the protective film covering the thin film transistor 210. The planarization layer 140 may be formed of an organic material such as polyimide, acrylic, benzocyclobutene (BCB), or hexamethyldisiloxane (HMDSO). Although the planarization layer 140 is shown as a single layer in FIG. 2C, the planarization layer 140 may be multilayered and various modifications are possible.

An organic light emitting device having a pixel electrode 310, an opposing electrode 330 and an intermediate layer 320 interposed therebetween and including a light emitting layer is formed on the planarization layer 140 in the display region DA of the substrate 100, Can be located. The pixel electrode 310 is electrically connected to the thin film transistor 210 through contact with any one of the source electrode 215a and the drain electrode 215b through an opening formed in the planarization layer 140 or the like as shown in FIG. .

The pixel defining layer 150 may be disposed on the planarization layer 140. The pixel defining layer 150 serves to define a pixel by having an opening corresponding to each of the sub-pixels, that is, at least a central portion of the pixel electrode 310 is exposed. 2C, the pixel defining layer 150 is formed by increasing the distance between the edge of the pixel electrode 310 and the counter electrode 330 above the pixel electrode 310, It is possible to prevent the occurrence of an arc or the like at the edge of the substrate. The pixel defining layer 150 may be formed of an organic material such as polyimide, acrylic, benzocyclobutene (BCB), or hexamethyldisiloxane (HMDSO).

The intermediate layer 320 of the organic light emitting device may include a low molecular weight or a high molecular weight material. (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL) : Electron Injection Layer) may be laminated in a single or a composite structure, and may have a structure of copper phthalocyanine (CuPc), N, N-di (naphthalen-1-yl) -N, N-diphenyl-benzidine (NPB), tris-8-hydroxyquinoline aluminum (Alq3), and the like, As well as various organic materials. These layers may be formed by a method of vacuum deposition.

When the intermediate layer 320 includes a polymer material, it may have a structure including a hole transport layer (HTL) and a light emitting layer (EML). In this case, the hole transport layer may include PEDOT, and the light emitting layer may include a polymer material such as poly-phenylenevinylene (PPV) and polyfluorene. The intermediate layer 320 may be formed by a screen printing method, an inkjet printing method, a laser induced thermal imaging (LITI) method, or the like.

Of course, the intermediate layer 320 is not necessarily limited to this, and may have various structures. The intermediate layer 320 may include a layer that is integrated over the plurality of pixel electrodes 310 and may include a patterned layer corresponding to each of the plurality of pixel electrodes 310.

The counter electrode 330 is disposed on the display area DA, and may be disposed to cover the display area DA as shown in FIG. That is, the counter electrode 330 may be integrally formed with a plurality of organic light emitting elements to correspond to the plurality of pixel electrodes 310.

Since the organic light emitting device can be easily damaged by moisture or oxygen from the outside, the sealing layer 400 covers and protects the organic light emitting device. The sealing layer 400 may cover the pixel region DA and extend to the outside of the pixel region DA. The encapsulation layer 400 may include a first inorganic encapsulation layer 410, an organic encapsulation layer 420, and a second inorganic encapsulation layer 430 as shown in FIG. 2C.

The first inorganic sealing layer 410 covers the counter electrode 330 and may include silicon oxide, silicon nitride, and / or silicon oxynitride. Of course, other layers such as a capping layer may be interposed between the first inorganic encapsulating layer 410 and the counter electrode 330 as necessary. Since the first inorganic encapsulating layer 410 is formed along the underlying structure, the top surface of the first inorganic encapsulating layer 410 is not flat as shown in FIG. 2C. The organic sealing layer 420 covers the first inorganic sealing layer 410. Unlike the first inorganic sealing layer 410, the organic sealing layer 420 may have a substantially flat upper surface. Specifically, the top surface of the organic encapsulant layer 420 may be substantially flat at a portion corresponding to the display area DA. The organic sealing layer 420 may include one or more materials selected from the group consisting of polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, and hexamethyldisiloxane. have. The second inorganic encapsulation layer 430 covers the organic encapsulation layer 420 and may include silicon oxide, silicon nitride, and / or silicon oxynitride. The second inorganic encapsulation layer 430 contacts the first inorganic encapsulation layer 410 at the position of the second encapsulation layer 410 located outside the display area DA to prevent the organic encapsulation layer 420 from being exposed to the outside.

The sealing layer 400 includes a first inorganic encapsulating layer 410, an organic encapsulating layer 420 and a second inorganic encapsulating layer 430. The encapsulating layer 400 may be cracked It is possible to prevent such a crack from being connected between the first inorganic encapsulation layer 410 and the organic encapsulation layer 420 or between the organic encapsulation layer 420 and the second inorganic encapsulation layer 430. [ It is possible to prevent or minimize the formation of a path through which water, oxygen or the like from the outside penetrates into the display area DA.

A touch screen layer 700 including a touch electrode 710 is disposed on the sealing layer 400 and a cover layer 730 for protecting the touch screen layer 700 may be disposed on the touch screen layer 700 have.

The touch screen layer 700 may be formed by a capacitive method such that a change in mutual capacitance formed between the touch electrodes 710 of the touch screen layer 700 during the touch of the cover layer 730 occurs , And by detecting this, it is possible to judge whether or not the corresponding portion is in contact. Alternatively, the touch screen layer 700 may determine whether or not it is in contact with the touch electrode 710 and the counter electrode 330 in various ways such as determining whether the capacitance is changed between the touch electrode 710 and the counter electrode 330, .

The touch electrode 710 is connected to a touch wiring 720 for transmitting a signal sensed by the touch electrode 710. The touch wiring 720 is connected to the sealing layer 400 from above the sealing layer 400, Display area along one side of the non-display area. The touch wiring 720 may be connected to the touch screen layer 700 and may extend from the top of the sealing layer 400 and be disposed at least partially in the bending area BA. In some embodiments, the touch wiring 720 may be disposed across the bending area BA. The touch wiring 720 extends from one side of the sealing layer 400 to one side of the sealing layer 400 where one side of the sealing layer 400 may be curved. The curvature may be formed by forming a step between the planarization layer 140 and the pixel defining layer 150 as shown in FIG. 2C. Due to the bending, the touch wiring 720 can extend from the upper portion of the sealing layer 400 to the secret rod region with a gentle slope.

The touch electrode 710 and the touch wiring 720 may be a single film or a multilayer film made of a conductive material having a good conductivity. For example, the touch electrode 710 and the touch wiring 720 may be a single film or a multilayer film made of a conductive material including aluminum (Al), copper (Cu), and / or titanium (Ti) The touch electrode 710 may include the same material as the touch wiring 720.

The cover layer 730 has flexibility and is made of a material such as polymethyl methacrylate, polydimethylsiloxane, polyimide, acrylate, polyethylene terephthalate, Polyethylene naphthalate, or the like. The cover layer 730 may be disposed on the touch screen layer 700 to protect the touch screen layer 700.

A touch buffer layer 610 may be provided between the sealing layer 400 and the touch screen layer 700. The touch buffer layer 610 may prevent damage to the sealing layer 400 and interfere with an interference signal that may be generated when the touch screen layer 700 is driven. The touch buffer layer 610 may contain an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, titanium oxide or titanium nitride, or an organic material such as polyimide, polyester, And may be formed of a plurality of stacked materials among the exemplified materials.

Since the touch buffer layer 610 is directly formed on the sealing layer 400 by deposition or the like and the touch screen layer 700 is also formed directly on the touch buffer layer 610, . Therefore, the thickness of the display device can be reduced.

The non-display area includes the bending area BA, and the non-display area is provided with the fan-out wiring 720a crossing the bending area BA. The fan-out wiring 720a is electrically connected to the signal wiring 213b, 213c, 215c for applying an electrical signal to the thin film transistor 210 or the display element 300 disposed in the display area DA. The fact that the fan-out wiring 720a and the signal wiring 213b, 213c and 215c are electrically connected in this specification means that the fan-out wiring 720a is directly connected to the first signal wiring 213b through the contact hole as shown in FIG. But also indirectly connected to the second signal line 213c or the third signal line 215c via the first signal line 213b.

The first signal line 213b may be electrically connected to the second signal line 213c or the third signal line 215c in the display area DA. In some embodiments, the second signal line 213c or the third signal line 215c may be a gate line that applies a signal to the gate electrode 213. [ In some embodiments, the second signal line 213c or the third signal line 215c may be a data line that applies a signal to the source electrode 215a or the drain electrode 215b. In some embodiments, the first signal line 213b may be connected to the second signal line 213c via a via hole.

In some embodiments, the first signal line 213b and the second signal line 213c may be formed of the same material as the gate electrode 213. The third signal line 215c may be formed of the same material as the source electrode 215a and the drain electrode 215b.

The fan-out wiring 720a is made of the same material as the touch wiring 720. [ The fan-out wiring 720a can be formed simultaneously under the same process conditions as the touch wiring 720. [ In some embodiments, the fan-out wiring 720a and the touch wiring 720 may comprise aluminum (Al). In some embodiments, the fan-out wiring 720a and the touch wiring 720 may be comprised of Ti / Al / Ti.

In some embodiments, the fan-out wiring 720a is formed of the same material as the touch wiring 720, while the fan-out wiring 720a is formed of the signal wirings 213b, 213c, and 215c, the source electrode 215a, Electrodes 215b may be formed of different materials.

In some embodiments, the fanout wire 720a may comprise the same material as the material contained in the signal wires 213b, 213c, 215c, the source electrode 215a, or the drain electrode 215b.

The fan-out wiring 720a and the touch wiring 720 can be formed through a low-temperature film forming process at about 90 degrees or less. This may be for protecting the display device 300 and the like that have already been formed. On the other hand, the signal lines 213b, 213c and 215c, the source electrode 215a and the drain electrode 215b are formed before forming the display element 300 or the sealing layer 400, And may be formed through a high-temperature film forming process at about 150 degrees.

Accordingly, even when the fan-out wiring 720a is formed of the same material as the signal wirings 213b, 213c, and 215c, the source electrode 215a, and the drain electrode 215b, Can be different. For example, in the case of using the same material, the specific resistance value of the fan-out wiring 720a may have a value which is about 25% higher than the specific resistance value of the signal wirings 213b, 213c and 215c. In this case, the grain size of the fan-out wiring 720a may be smaller than the grain size of the signal wirings 213b, 213c, and 215c.

In some embodiments, the thickness of the fan-out wiring 720a and the signal wiring 213b, 213c, 215c may be different from each other. For example, the thickness of the fan-out wiring 720a may be smaller than the thickness of the third signal wiring 215c formed of the same material as the source electrode 215a and the drain electrode 215b. In some embodiments, the thickness of the fanout wire 720a may be about 50% of the thickness of the third signal wire 215c.

An organic layer 160 is provided at least in part between the fan-out wiring 720a and the substrate 100 in the bending area BA. The organic material layer 160 may prevent a crack from being generated in the fan-out wiring 720a disposed on the bending area BA when the display device is bent. The organic material layer 160 absorbs the tensile stress generated by the bending of the substrate 100 and the like, thereby effectively minimizing the concentration of tensile stress on the fan-out wiring 720a.

The organic material layer 160 may be formed simultaneously with the planarization layer 140, the pixel defining layer 150, the organic encapsulation layer 420 of the encapsulation layer 400, or the same material as the touch buffer layer 610. That is, the organic material layer 160 may be formed simultaneously in the mask process for forming the planarization layer 140, the pixel defining layer 150, the organic encapsulation layer 420 of the encapsulation layer 400, or the touch buffer layer 610 , And a separate mask process for forming the organic material layer 160 can be reduced. The buffer layer 110, the gate insulating layer 120, or the interlayer insulating layer 130 may include an organic material. In this case, the organic layer 160 may include the buffer layer 110, the gate insulating layer 120, (130).

If the fan-out wiring 720a is formed simultaneously with the signal wirings 213b, 213c and 215c and the source electrode 215a or the drain electrode 215b, a separate mask must be used to form the organic material layer 160 do. In the embodiments of the present invention, the fan-out wiring 720a is formed at the same time as the touch wiring 720, so that the organic material layer 160 is formed simultaneously with the layer including the organic material disposed in the display area DA, There is a reduction effect.

On the other hand, the buffer layer 110 including the inorganic material, the gate insulating film 120, and the interlayer insulating film 130 may collectively be referred to as an inorganic insulating layer. Such an inorganic insulating layer may have an opening corresponding to the bending area BA as shown in Fig. 2C. That is, each of the buffer layer 110, the gate insulating layer 120, and the interlayer insulating layer 130 may have openings 110a, 120a, and 130a corresponding to the bending areas BA. This opening corresponds to the bending area BA, it can be understood that the opening overlaps with the bending area BA. At this time, the area of the opening may be wider than the area of the bending area BA. 2C, the width OW of the opening is shown to be wider than the width of the bending area BA. Here, the area of the opening may be defined as the area of the opening of the narrowest area among the openings 110a, 120a, and 130a of the buffer layer 110, the gate insulating film 120, and the interlayer insulating film 130, The area of the opening 110a is defined by the area of the opening 110a of the housing 110a.

The display device according to the present embodiment includes an organic layer 160 filling at least a part of the opening of the inorganic insulating layer. In FIG. 2C, the organic material layer 160 fills all openings. The fan-out wiring 720a extends from the first region 1A to the second region 2A via the bending region BA and is located on the organic layer 160. [ Of course, where the organic material layer 160 is not present, the fan-out wiring 720a may be located on the inorganic insulating layer such as the interlayer insulating film 130 or the like.

Since the hardness of the inorganic insulating layer is higher than that of the organic layer 160, the probability of cracking of the inorganic insulating layer in the bending area BA is very high. When cracks are generated in the inorganic insulating layer, . Of course, the propagation of the crack can be blocked by the organic material layer 160. However, as the opening is formed in the inorganic insulating layer, the probability of cracking in the inorganic insulating layer can be further lowered. Accordingly, concentration of tensile stress on the fan-out wiring 720a can be minimized.

On the other hand, it can be considered that the organic layer 160 covers the inner surface of the opening of the inorganic insulating layer as shown in FIG. 2C. In order to form various wirings of the display device, various wirings may be formed by forming a conductive material layer on the entire surface of the substrate 100 and then patterning the conductive material layer. The organic material layer 160 covers the inner surface of the opening 110a of the buffer layer 110 or the inner surface of the opening 120a of the gate insulating film 120 or the inner surface of the opening 130a of the interlayer insulating film 130 The conductive material may be deposited on the inner surface of the opening 110a of the buffer layer 110 or the inner surface of the opening 120a of the gate insulating film 120 or the opening of the interlayer insulating film 130, But may remain in the corresponding portion without being removed from the inner surface of the recess 130a. If so, the remaining conductive material may cause a short between the other conductive layers. Therefore, when forming the organic material layer 160, it is preferable that the organic material layer 160 covers the inner surface of the opening of the inorganic insulating layer. 2C, the organic layer 160 has a uniform thickness. However, the organic layer 160 may have a different thickness depending on the position, so that the inner surface of the opening 110a of the buffer layer 110 and the opening of the gate insulating layer 120 The inclination of the curvature of the upper surface of the organic layer 160 at the inner side of the opening 130a of the interlayer insulating film 130 and the inner side of the opening 130a of the interlayer insulating film 130 can be made gentle.

The display device according to the present embodiment may further include a protective film 170 for protecting the substrate 100. This protective film 170 is a lower protective film for protecting the lower surface of the substrate 100, and may have an opening 170OP as shown in Fig. 2C. The opening 170OP corresponds to the bending area BA, and the area of the opening 170OP can be made wider than the area of the bending area BA. In Fig. 2C, the width of the opening 170OP is shown to be wider than the width of the bending area BA.

The protective film 170 serves to protect the lower surface of the substrate 100, and may have its own rigidity. Accordingly, when the flexibility of the protective film 170 is low, peeling may occur between the protective film 170 and the substrate 100 as the substrate 100 is bent. Therefore, by causing the protective film 170 to have the opening 170OP corresponding to the bending area BA as shown in Fig. 2C, it is possible to effectively prevent such peeling from occurring. To this end, it is preferable that the area of the opening portion 170OP of the protective film 170 is larger than the area of the bending region BA as described above. In FIG. 2C, the protective film 170 is removed from the bending area BA. However, the present invention is not limited thereto. The protective film 170 is not entirely removed from the bending area BA but is formed to be thinner than the first area 1A or the second area 2A.

Meanwhile, a bending protection layer (BPL) 600 may be positioned outside the display area DA. That is, the bending protection layer 600 may be positioned on the fan-out wiring 720a corresponding to at least the bending area BA.

When a laminate is bent, a stress neutral plane exists in the laminate. If the bending protection layer 600 is not present, excessive tensile stress or the like may be applied to the fan-out wiring 720a in the bending area BA due to bending of the substrate 100 or the like. This is because the position of the fan-out wiring 720a may not correspond to the stress neutral plane. However, by controlling the thickness, modulus and the like of the bending protection layer 600, it is possible to suppress the stress-neutral plane of the laminate including the substrate 100, the fan-out wiring 720a, the bending protection layer 600, Can be adjusted. Therefore, by placing the stress neutral plane through the bending protection layer 600 in the vicinity of the fan-out wiring 720a, the tensile stress applied to the fan-out wiring 720a can be minimized.

2C, the upper surface of the bending protection layer 600 in the display area DA direction (-x direction) is shown as coinciding with the upper surface of the cover layer 730 (+ z direction). However, It is not. The end in the display area DA direction (-x direction) of the bending protection layer 600 may cover a part of the upper surface of the edge of the cover layer 730. [ Or the end of the bending protection layer 600 in the display area DA direction (-x direction) may not be in contact with the cover layer 730 and the bending protection layer 600 may extend to the upper portion of the display area DA And the touch electrode 710 may be covered.

The bending protection layer 600 may be formed by applying a liquid or paste material and curing the material. In this case, the volume of the bending protection layer 600 may be reduced during the curing process. At this time, when the portion of the bending protection layer 600 in the direction of the display area DA (-x direction) is in contact with the cover layer 730, the position of the corresponding portion of the bending protection layer 600 is fixed, A volume reduction occurs in the remainder of the layer 600. As a result, the thickness of the portion of the bending protection layer 600 in the display area DA direction (-x direction) can be made thicker than the thickness of the other portions of the bending protection layer 600.

The bending protection layer 600 can expose the terminal 21 (see Fig. 2B) of the second region 2A. In the second region 2A, the terminal 21 may be for connection with a control unit such as various electronic elements or a printed circuit board.

3A is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention. Referring to FIG. 3A, the cover layer 730 may extend from the top of the touch screen layer 700 to the non-display area to cover the fan-out wiring 720a. Accordingly, the cover layer 730 can protect the fan-out wiring 720a at the same time as the touch screen layer 700. [ As shown in FIG. 3A, the cover layer 730 may be integrally extended from the display area DA to at least the bending area BA. In this case, the cover layer 730 may function as a bending protection layer 600 (see FIG. 2C). That is, the cover layer 730 can adjust the position of the stress neutral plane in the bending area BA. By placing the stress neutral plane through the cover layer 730 in the vicinity of the fan-out wiring 720a, the tensile stress applied to the fan-out wiring 720a can be minimized.

3B is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention. Referring to FIG. 3B, the cover layer 730 may extend from the top of the touch screen layer 700 to the non-display area to cover the fan-out wiring 720a. That is, the cover layer 730 may be integrally extended from the display area DA to at least the bending area BA. Further, a bending protection layer 600 may be further provided on the cover layer 730 in the non-display area. The bending protection layer 600 may be introduced to minimize the tensile stress applied to the fan-out wiring 720a by placing the stress-neutral plane in the vicinity of the fan-out wiring 720a, as described above.

In the drawings of the embodiments to be described later, the cover layer 730 is shown extending to the bending area BA, but the embodiments of the present invention are not limited thereto. As described above, the bending protection layer 600 may be disposed in the bending area BA instead of the cover layer 730, and the cover layer 730 and the bending protection layer 600 may be disposed at the same time, Various variants are possible such as water.

4A is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention. 4A, the touch electrode 710 includes a first touch conductive layer 711, a first insulating layer 712, a second touch conductive layer 713, and a second insulating layer 714 sequentially stacked, The first touch conductive layer 711 and the second touch conductive layer 713 may be electrically connected to each other. In some embodiments, the first insulation layer 712 includes a via hole exposing the top surface of the first touch conductive layer 711, and the first touch conductive layer 711 and the second touch conductive layer 711 may be electrically connected via the via hole, Layer 713 may be connected.

The use of the first touch conductive layer 711 and the second touch conductive layer 713 reduces the resistance of the touch electrode 710 and improves the response speed of the touch screen layer 700.

In some embodiments, the fan-out wiring 720a and the touch wiring 720 may be formed of the same material as the first touch conductive layer 711 or the second touch conductive layer 713. [ In some embodiments, the fan-out wiring 720a and the touch wiring 720 are formed of the same material as the first and second touch conductive layers 713, which are made of the same material as the first touch conductive layer 711, And the second layer may be stacked.

The first touch conductive layer 711 and the second touch conductive layer 713 may be a single film or a multilayer film made of a conductive material having a good conductivity. For example, the first touch conductive layer 711 and the second touch conductive layer 713 may be a single film made of a conductive material including aluminum (Al), copper (Cu), and / or titanium (Ti) Layer film. In some embodiments, the first touch conductive layer 711 and the second touch conductive layer 713 may each have a laminated structure of Ti / Al / Ti.

The first insulating layer 712 may be formed of an inorganic material or an organic material. The inorganic material may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, Cerium oxide or silicon oxynitride. The organic material may be at least one of an acrylic resin, a methacrylic resin, a polyisoprene, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin and a perylene resin.

The second insulating layer 714 may be formed of an organic material. The second insulating layer 714 may include at least one of an acrylic resin, a methacrylic resin, a polyisoprene, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, and a perylene resin.

In this case, the organic material layer 160 may be formed of the same material as the first insulating layer 712 or the second insulating layer 714 at the same time.

The organic material layer 160 is formed on the planarization layer 140, the pixel defining layer 150, the organic encapsulation layer 420 of the encapsulation layer 400, the touch buffer layer 610, the first insulation layer 712, And the insulating layer 714 can be formed simultaneously with the same material. However, the present invention is not limited thereto. The organic layer 160 is formed on the planarization layer 140, the pixel defining layer 150, the organic encapsulation layer 420 of the encapsulation layer 400, the touch buffer layer 610, the first insulation layer 712, Layer 714 may be formed separately from the process of forming the layer 714. [

The buffer layer 110, the gate insulating layer 120, and / or the interlayer insulating layer 130 may be formed of an organic material. In this case, the organic layer 160 may include a buffer layer 110, And may be formed of the same material as the interlayer insulating film 130.

4B and 4C are cross-sectional views schematically showing a part of a display device according to another embodiment of the present invention. The display device according to the present embodiment is different from the display device according to the above-described embodiment in that it further includes an additional conductive layer 215d below the fan-out wiring 720a. As described above, if the fan-out wiring 720a is formed simultaneously with the same material as the touch wiring 720, the additional conductive layer 215d is formed simultaneously with the same material as the source electrode 215a or the drain electrode 215b . This additional conductive layer 215d may be located under the fan-out wiring 720a at least in the bending area BA so as to be electrically connected to the fan-out wiring 720a.

In the display device according to this embodiment, since the fan-out wiring 720a and the additional conductive layer 215d exist in the bending area BA, the conductive layer in the bending area BA has a multilayer structure . Therefore, even if a defect occurs in the fan-out wiring 720a due to a crack or the like in the bending area BA, the electrical signal can be transferred to the display area DA without any problem by the additional conductive layer 215d. It goes without saying that even if the additional conductive layer 215d is defective due to cracks or the like, the electric signal can be transmitted to the display area DA without difficulty by the fan-out wiring 720a.

4B, the fan-out wiring 720a and the touch wiring 720 may be formed of the same material as that of the first touch conductive layer 711, or may be formed of the second touch conductive layer 713 And may be made of the same material.

4D is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention. The display device according to this embodiment is different from the display device according to the above-described embodiment with reference to FIG. 4B in that the fan-out wiring 720a is formed on the first layer including the same material as the first touch conductive layer 711 And a second layer 723a made of the same material as the first touch conductive layer 721a and the second touch conductive layer 713 are stacked.

In this embodiment, the touch wiring 720 also includes a first wiring layer 721 formed of the same material as the first touch conductive layer 711 and a second wiring layer 720 formed of the same material as the second touch conductive layer 713, (723) may be stacked.

In the display device according to this embodiment, since the conductive layer has a multilayer structure in the bending area BA, even if a crack occurs in one conductive layer, the electric signal is transmitted to the display area DA without any problem .

4E is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention. Referring to FIG. 4E, an additional conductive layer 215d is disposed under the fan-out wiring 720a. The additional conductive layer 215d may be one in which the signal wiring 213b extends through the bending area BA. That is, the additional conductive layer 215d may be formed of the same material as the gate electrode 213. [ In this embodiment, the additional conductive layer 215d is in direct contact with the fan-out wiring 720a in the bending area BA to form a multi-layer structure.

In the display device according to this embodiment, since the fan-out wiring 720a and the additional conductive layer 215d exist in the bending area BA, the conductive layer in the bending area BA has a multilayer structure . Therefore, even if a defect occurs in the fan-out wiring 720a due to a crack or the like in the bending area BA, the electrical signal can be transferred to the display area DA without any problem by the additional conductive layer 215d. It goes without saying that even if the additional conductive layer 215d is defective due to cracks or the like, the electric signal can be transmitted to the display area DA without difficulty by the fan-out wiring 720a.

As described above, the fan-out wiring 720a may be formed of the same material as the first touch conductive layer 711 or the second touch conductive layer 713. [ In addition, the fan-out wiring 720a has a structure in which a first layer including the same material as the first touch conductive layer 711 and a second layer including the same material as the second touch conductive layer 713 are stacked .

4F and 4G are cross-sectional views schematically showing a part of a display device according to another embodiment of the present invention.

Referring to FIG. 4F, the display device according to the present embodiment includes an additional conductive layer 215d under the fanout wiring 720a in the bending area BA, and the fanout wiring 720a and the additional conductive layer 215d The insulating layer 180 is formed on the insulating layer 180.

The fanout wiring 720a may be formed simultaneously with the same material as the touch wiring 720 and the additional conductive layer 215d may be formed of the source electrode 215a, the drain electrode 215b, or the gate electrode 213 may be formed simultaneously with the same material. The additional conductive layer 215d may be connected through a via hole provided in the insulating layer 180 to be electrically connected to the fan-out wiring 720a. The via hole may be formed in the first region 1A and / 2A.

The additional conductive layer 215d and the fan-out wiring 720a can be arranged all over the bending area BA, or can be arranged overlapping only in a partial area, as in the above-described embodiments.

The insulating layer 180 may be formed of an organic material or an inorganic material. The insulating layer 180 may be formed of the same material as the planarization layer 140, the pixel defining layer 150, the inorganic encapsulation layers 410 and 430 of the encapsulation layer 400, the organic encapsulation layer 420 and the touch buffer layer 610 Can be formed at the same time.

Referring to FIG. 4G, the additional conductive layer 215d in the bending area BA may exist only in a part of the bending area BA. For example, the additional conductive layer 215d may be present at both ends of the bending area BA and be in contact with the fan-out wiring 720a. Alternatively, the additional conductive layer 215d may exist only at one end of the bending area BA, and various modifications are possible.

Referring to FIG. 4H, the fan-out wiring 720a in the bending area BA may exist only in a part of the bending area BA. For example, the fan-out wiring 720a may exist at both ends of the bending area BA and be in contact with the additional conductive layer 215d. Alternatively, the fan-out wiring 720a may exist only at one end of the bending area BA, and various modifications are possible.

4I is a cross-sectional view schematically showing a part of a display device according to another embodiment of the present invention. The display device according to the present embodiment includes a thin film transistor 210 'in addition to the thin film transistor 210 in the display area DA. The thin film transistor 210 'includes a semiconductor layer 211', a source electrode 215a ', a drain electrode 215b', and a gate electrode 213 '. At this time, the semiconductor layer 211 'may include the same material as the semiconductor layer 211 and may be located on the same layer, and the source electrode 215a' and the drain electrode 215b 'may also be connected to the source electrode 215a and the drain electrode 215b and may be located on the same layer. However, the gate electrode 213 'may be located in a different layer from the gate electrode 213. The fact that the gate electrode 213 'and the gate electrode 213 are located in different layers may mean that the gate electrode 213' and the gate electrode 213 are not formed at the same time but are formed by different process steps .

The source electrode 215a, the drain electrode 215b, the source electrode 215a ', and the drain electrode 215b' are formed on the gate insulating layer 120 ' On the interlayer insulating film 130 covering the interlayer insulating film. The gate electrode 213 is located on the gate insulating film 120. The gate insulating film 120 'covers the gate electrode 213 and the gate electrode 213' is located on the gate insulating film 120 ' have.

In some embodiments, an electrode of a capacitor (not shown) disposed on the same layer as the wiring and / or the gate electrode 213 'disposed on the same layer as the gate electrode 213' may be further disposed . In this case, the thin film transistor 210 'may be omitted, and various modifications are possible.

In this embodiment, the display device may further include a first additional conductive layer 215d 'and / or a second additional conductive layer 215d' 'in the bending area BA. The first additional conductive layer 215d 'may be disposed in the same layer as the gate electrode 213 and the second additional conductive layer 215d' 'may be formed of the same material as the gate electrode 213' As shown in FIG.

The first additional conductive layer 215d 'and / or the second additional conductive layer 215d' 'may extend under the bending area BA and be disposed below the fanout wiring 720a in the bending area BA have. In Fig. 4I, the first additional conductive layer 215d ', the second additional conductive layer 215d' ', and the fan-out wiring 720a are sequentially stacked in the bending area BA to form a multilayer structure. Accordingly, even if a defect occurs in the fan-out wiring 720a due to a crack or the like in the bending area BA, the first additional conductive layer 215d 'and / or the second additional conductive layer 215d' The electric signal can be transmitted to the display area DA without any problem. Or even if a defect occurs due to cracks or the like in the first additional conductive layer 215d 'and / or the second additional conductive layer 215d' ', the electric signal can be outputted by the fan-out wiring 720a without any problem in the display area DA ) Of course.

However, the embodiment of the present invention is not limited to this. For example, the first additional conductive layer 215d ', the second additional conductive layer 215d' ', and / or the fanout wiring 720a are all disposed over the bending area BA, as in the embodiments described above , They can be arranged overlapping only in some areas.

In some embodiments, some regions of the bending region BA are formed by overlapping the first additional conductive layer 215d 'and the fanout wiring 720a, and a portion of the second additional conductive layer 215d' The fan-out wirings 720a can be superimposed. Alternatively, in some bending areas BA, only the first additional conductive layer 215d 'and / or the second additional conductive layer 215d' 'may be disposed without overlapping the fan-out wiring 720a, It is possible.

An insulating layer 180 (see FIG. 4H) may be disposed between the respective layers of the first additional conductive layer 215d ', the second additional conductive layer 215d' ', and the fan-out wiring 720a. 5A to 5I are sectional views showing a part of a display device according to another embodiment of the present invention. Specifically, a cross-sectional view schematically showing the vicinity of the bending area BA.

Referring to FIG. 5A, the height h1 of at least a part of the organic material layer 160 disposed in the opening of the inorganic insulating layer may be higher than the height h2 of the inorganic insulating layer. As shown in FIG. 5A, the organic layer 160 may be formed such that the height of the center portion of the opening is higher than both ends of the opening. The organic material layer 160 may cover the inner surface of the opening to prevent a short between the conductive material that may remain on the inner surface of the opening and the fan-out wiring 720a.

Referring to FIG. 5B, the height h1 of the organic material layer 160 disposed at the opening of the inorganic insulating layer may have a level substantially equal to the height h2 of the inorganic insulating layer. Even in this case, the organic material layer 160 can cover the inner side surface of the opening, thereby preventing the conductive material, which may remain on the inner surface of the opening, from being short-circuited with the fan-out wiring 720a. The height h1 of the organic material layer 160 can be variously changed in consideration of tensile stress due to bending.

Referring to FIG. 5C, at least a part of the upper surface (in the + z direction) of the organic material layer 160 disposed in the opening of the inorganic insulating layer may have an uneven surface. As a result, the surface area of the upper surface of the organic material layer 160 and the surface area of the upper and lower surfaces of the fan-out wiring 720a in the opening become wider. The large surface area on the top surface of the organic material layer 160 and on the top and bottom surfaces of the fan-out wiring 720a indicates that there is a large margin for deforming the shape of the substrate 100 in order to reduce tensile stress due to bending of the substrate 100 .

The bottom surface of the fan-out wiring 720a may have a shape corresponding to the uneven surface 160a of the organic material layer 160 because the fan-out wiring 720a is located on the organic material layer 160. [

The uneven surface 160a of the upper surface of the organic material layer 160 (in the + z direction) can be formed by various methods. For example, when a photosensitive material is used to form the organic material layer 160 and various amounts of the organic material layer 160 whose top surface is in a substantially flat state are produced by using a slit mask or a halftone mask, The portion can be etched (removed) relatively more than the other portion. Here, the more etched portions can be understood as the concave portions on the upper surface of the organic material layer 160. Of course, the method used in manufacturing the display device according to the present embodiment is not limited to such a method. For example, the organic layer 160 having a substantially flat top surface may be formed, and only a specific portion may be removed by a dry etching method or the like.

Referring to FIG. 5D, the organic layer 160 covers the inner surface of the opening, and may extend to a part of the upper surface of the inorganic insulating layer. In some embodiments, the organic layer 160 may not be disposed on at least a portion of the central portion of the opening. It is possible to prevent the organic material layer 160 from covering the inner side surface of the opening and shorting the conductive material that may remain on the inner side surface of the opening and the fan-out wiring 720a. In this embodiment, since the inorganic insulating layer does not exist in the banding region BA, the probability that a crack is transmitted to the fan-out wiring 720a can be reduced.

Referring to FIG. 5E, the inorganic insulating layer may form a groove without forming an opening exposing the substrate 100 in the bending area BA. In other words, the inorganic insulating layer may have a structure in which only a part of the buffer layer 110, the gate insulating film 120, and the interlayer insulating film 130 in the bending area BA is removed. For example, the buffer layer 110 may be continuous across the first region 1A, the bending region BA, and the second region 2A. The gate insulating film 120 may have an opening 120a corresponding to the bending region BA and the interlayer insulating film 130 may have an opening 130a corresponding to the bending region BA. Accordingly, it can be understood that the inorganic insulating layer including the buffer layer 110, the gate insulating film 120, and the interlayer insulating film 130 has a groove corresponding to the bending region BA. Of course, the inorganic insulating layer may also include a variety of different types of grooves. A part of the upper surface of the buffer layer 110 in the (+ z direction) may be removed, or the lower surface of the gate insulating layer 120 may remain without being removed (-z direction).

In the display device according to this embodiment, the organic layer 160 may fill at least a part of the groove. The formation of grooves in the inorganic insulating layer may mean lowering the probability of occurrence of cracks in the inorganic insulating layer, which means that the probability of crack propagation to the fan-out wiring 720a can be lowered. Of course, it is possible to block the propagation of cracks by the organic material layer 160. However, as the grooves are formed in the inorganic insulating layer, the probability of occurrence of cracks in the inorganic insulating layer can be further reduced. Accordingly, concentration of tensile stress on the fan-out wiring 720a can be minimized.

Referring to FIG. 5F, the inorganic insulating layer does not form an opening or a groove in the bending area BA, and the organic layer 160 may be disposed on the inorganic insulating layer. That is, the inorganic insulating layer may not form an opening in the bending region. The organic material layer 160 absorbs the tensile stress received by the inorganic insulating layer and can minimize the tensile stress transmitted to the fan-out wiring 720a. The height of the organic material layer 160 is variable.

Referring to FIG. 5G, the inorganic insulating layer does not form an opening or a groove in the bending region, and the organic layer 160 may be disposed on the inorganic insulating layer. At least a part of the upper surface (in the + z direction) of the organic material layer 160 may have an uneven surface. As a result, the surface area of the upper surface of the organic material layer 160 and the surface area of the upper and lower surfaces of the fan-out wiring 720a in the opening become wider. The reason why the surface area is large on the top surface of the organic material layer 160 and on the top surface and the bottom surface of the first conductive layer 215c is that the shape of the substrate 100 can be deformed in order to reduce tensile stress due to bending of the substrate 100, .

Referring to FIG. 5H, the buffer film 110, the gate insulating film 120, or the interlayer insulating film 130 may have an uneven surface in the bending area BA. 5H, the interlayer insulating film 130 has the uneven surface 130a, but the present invention is not limited thereto. For example, at least one of the buffer film 110, the gate insulating film 120, the interlayer insulating film 130, or an insulating film existing in the bending region BA may have an uneven surface.

5H, the organic material layer 160 and the fan-out wiring 720a located on the interlayer insulating film 130 may have an irregular surface 130a, and the upper surface and / Or the lower surface may have a shape corresponding to the uneven surface 130a of the interlayer insulating film 130. In some embodiments, the organic layer 160 may be omitted. Even if the organic material layer 160 is omitted, the amount of tensile stress can be minimized as the fan-out wiring 720a has a concavo-convex shape. As described above, in the manufacturing process, The tensile stress can be applied to the fan-out wiring 720a by bending the fan-out wiring 720a and the upper surface and / or the lower surface of the fan-out wiring 720a have a shape corresponding to the uneven surface 130a, The amount of tensile stress applied to the electrodes 720a and 720a can be minimized.

Referring to FIG. 5I, a display device according to an embodiment of the present invention includes an inorganic layer 160 'instead of the organic layer 160 disposed between the fan-out wiring 720a and the substrate 100 in the bending area BA . When the inorganic layer 160 'is applied, the inorganic layer 160' includes a first inorganic encapsulating layer 410, a second inorganic encapsulating layer 430, a touch buffer layer 610, a first insulating layer 712, Or the second insulating layer 714. The second insulating layer 714 may be made of the same material. Of course, if the planarization layer 140 or the pixel defining layer 150 is formed of an inorganic material, the inorganic layer 160 'may be formed of the same material as the planarization layer 140 or the pixel defining layer 150.

At least a portion of the upper surface (in the + z direction) of the inorganic layer 160 'may have an uneven surface 160'a. Accordingly, the surface area of the upper surface of the inorganic layer 160 'and the surface area of the upper and lower surfaces of the fan-out wiring 720a in the opening become wider. The large surface area on the upper surface of the inorganic layer 160 'and the upper and lower surfaces of the fan-out wiring 720a means that there is a margin to deform the shape of the substrate 100 in order to reduce tensile stress due to bending of the substrate 100 It means that there is more.

In the embodiments described so far, the uneven surface 160a may be formed by extending the projecting surface in a predetermined direction. In some embodiments, the fan-out wiring 720a extends in the second direction (+ x direction), the protruding surface of the uneven surface 160a extends in the first direction (+ y direction) And the projecting surfaces of the uneven surface 160a may intersect with each other. The crossing angle may be 90 degrees as shown in Fig. 5J which is a plan view conceptually showing a part of the display device according to an embodiment of the present invention, or may be an angle other than 90 degrees as shown in Fig. 5k. 5J and 5K, reference numeral GD denotes a direction in which the protruding surface of the uneven surface 160a of the upper surface of the organic material layer 160 extends. In FIG. 5J, the direction in which the protruding surface of the uneven surface 160a of the upper surface of the organic material layer 160 is extended is inclined with respect to the second direction (+ x direction) in comparison with FIG. 5K. However, It is not. The direction in which the uneven surface 160a of the upper surface of the organic material layer 160 extends is the first direction (+ y direction), and the extending direction of the fan-out wiring 720a is the second direction + x direction) of the first direction (e.g., a direction forming an angle of 45 degrees with respect to the second direction (+ x direction)) with respect to the second direction (+ x direction) When a plurality of fan-out wirings 720a are present, part of the plurality of fan-out wirings 720a may have a different angle with respect to the second direction (+ x direction) in the second direction (+ x direction) May be different from the angles formed with respect to each other.

6A and 6B are cross-sectional views schematically showing a part of a display device according to embodiments of the present invention. Specifically, a cross-sectional view schematically showing the vicinity of the end of the fan-out wiring 720a.

Referring to FIG. 6A, a driving circuit unit 800 may be mounted on an end of the fan-out wiring 720a. The driving circuit unit 800 is electrically connected to the signal lines 213b, 213c, and 215c through the fan-out wiring 720a to provide a driving signal to the display area DA. The driving signal means various signals for driving a display device such as a driving voltage, a gate signal, and a data signal.

Referring to FIG. 6B, the fan-out wiring 720a may be connected to the lower fan-out wiring 213d in the second area 2A. The lower fan-out wiring 213d may be disposed on the gate insulating layer 120 and may be formed of the same material as the gate electrode 213. Referring to FIG. The fan-out wiring 720a may be connected to the lower fan-out wiring 213d through a contact hole. An upper fan-out wiring 215d may be additionally disposed at an end of the lower fan-out wiring 213d. The upper fan-out wiring 215d may be formed of the same material as the source electrode 215a or the drain screw 215b, or may be formed of the same material as the fan-out wiring 720a.

Here, the lower fan-out wiring 213d or the upper fan-out wiring 215e can be omitted, and various modifications are possible.

The driving circuit unit 800 may be mounted on the end of the upper fan-out wiring 215e or the lower fan-out wiring 213d. The driving circuit unit 800 is electrically connected to the signal lines 213b, 213c and 215c through the upper fan-out wiring 215e or the lower fan-out wiring 213d and the fan-out wiring 720a, Thereby providing a driving signal. The driving signal means various signals for driving a display device such as a driving voltage, a gate signal, and a data signal.

7A to 7I are sectional views sequentially illustrating a method of manufacturing a display device according to embodiments of the present invention. In this example, the manufacturing process of the display device disclosed in Fig. 2C is illustrated.

Referring to FIG. 7A, a buffer layer 111 and a semiconductor material layer may be sequentially formed on a substrate 100, and then a semiconductor material layer may be patterned to form a semiconductor layer 211.

The substrate 100 may include a variety of materials having flexible or Ben-Double properties, such as polyethersulphone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene (PEN), polyethyleneterephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC) Or a polymer resin such as cellulose acetate propionate (CAP).

First, a buffer layer 111 and a semiconductor material are deposited on the entire surface of the substrate 100. The buffer layer 111 may comprise an inorganic material such as silicon oxide, silicon nitride and / or silicon oxynitride. The semiconductor material layer may be formed of a semiconductor including amorphous silicon, crystalline silicon, or an organic semiconductor material or the like. The buffer layer 111 and the semiconductor material layer may be deposited by various deposition methods.

Thereafter, a photoresist pattern is formed on the semiconductor material layer using a mask, and then the semiconductor material layer 211 is formed by patterning the semiconductor material layer.

Referring to FIG. 7B, a gate insulating layer 120 is formed on the entire surface of the substrate 100 to cover the semiconductor layer 211, and then a first conductive material layer is deposited on the gate insulating layer 120. A photoresist pattern is formed on the first conductive material layer using a mask and then the first conductive material layer is patterned to form the gate electrode 213, the first signal wiring 213b, and the second signal wiring 213c . The gate electrode 213 may be formed to overlap with the semiconductor layer 211.

The gate insulating layer 120 may include an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride, and may be deposited by various deposition methods.

The first conductive material layer may be formed of a low resistance metal material. For example, the first conductive material layer may include molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti) The first conductive material layer may be a single film or a multilayer film.

The first conductive material layer may be deposited by various deposition methods, and the first conductive material layer may be deposited at a high temperature of about 90 degrees or more, for example, about 150 degrees to improve conductivity and lower the resistivity value .

After forming the gate electrode 213, the first signal wiring 213b and the second signal wiring 213c, the gate electrode 213, the first signal wiring 213b, and the second signal wiring 213c An interlayer insulating film 130 is formed. The interlayer insulating film 130 may include an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride, and may be deposited by various deposition methods.

Thereafter, a photoresist pattern is formed on the interlayer insulating film 130 using a mask and then the interlayer insulating film 130 and the gate insulating film 120 are simultaneously etched to form contact holes C1 The contact hole C3 for exposing the first signal wiring 213b and the opening 130a of the interlayer insulating film 130 in the non-display region and the opening 120a of the gate insulating film 120 can be formed have. The opening 130a of the interlayer insulating film 130 and the opening 120a of the gate insulating film 120 may not be formed in some cases.

7C, an opening 110a of the buffer layer 110 is formed in the opening 130a of the interlayer insulating film 130 and the opening 120a of the gate insulating film 120. Then, as shown in FIG. The opening 110a of the buffer layer 110 may be performed by a mask different from the opening 130a of the interlayer insulating layer 130 and the opening 120a of the gate insulating layer 120. [ When the opening 110a of the buffer layer 110 is formed simultaneously with the opening 130a of the interlayer insulating film 130 and the opening 120a of the gate insulating film 120, It is because.

Referring to FIG. 7D, a second conductive material layer is deposited on the interlayer insulating layer 130, a photoresist pattern is formed on the second conductive material layer using a mask, and then the second conductive material is patterned, The electrode 215a, the drain electrode 215b, and the third signal line 215c can be formed. The source electrode 215a and the drain electrode 215b may be connected to the source region and the drain region of the semiconductor layer 211 through the contact holes C1 and C2 exposing the semiconductor layer 211, respectively. According to one embodiment, the source region and the drain region may be formed by doping.

The second conductive material layer may be formed of a low resistance metal material. For example, the second layer of conductive material may comprise aluminum (Al), copper (Cu), and / or titanium (Ti). The second conductive material layer may be a single film or a multilayer film.

The second conductive material layer may be deposited by various deposition methods and the second conductive material layer may be deposited at a high temperature of about 90 degrees or more, for example, about 150 degrees, to improve conductivity and lower the resistivity value .

Thereafter, the first organic material is formed on the entire surface of the substrate 100 through coating or vapor deposition, and then the planarization layer 140 and the organic material layer 160 are simultaneously formed through a mask process. By forming the planarization layer 140 and the organic material layer 160 at the same time, a separate mask process for forming the organic material layer 160 can be reduced.

The first organic material may be an organic material such as polyimide, acryl, BCB (benzocyclobutene), or HMDSO (hexamethyldisiloxane). The first organic material may be a photosensitive organic material. Accordingly, the planarization layer 140 and the organic material layer 160 can be formed by partially exposing, developing, and curing using a mask. The heights of the planarization layer 140 and the organic material layer 160 may be different from each other. This is because by using a slit mask or a halftone mask, the amount of exposure can be changed so that a specific portion can be removed relatively more than other portions. The planarization layer 140 may include an opening OP1 exposing the source electrode 215a or the drain electrode 215b.

The organic material layer 160 may be formed simultaneously with the pixel defining layer 150 or the organic sealing layer 420 of the sealing layer 400 without being formed simultaneously with the planarization layer 140.

Referring to FIG. 7E, a third conductive material is deposited on the planarization layer 140, a photoresist pattern is formed on the third conductive material layer using a mask, and then the third conductive material is etched, (310). The pixel electrode 310 fills the opening OP1 of the planarization layer 140 and is connected to the source electrode 215a or the drain electrode 215b.

The third conductive material may be at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In ₂ O ₃ ) And may be at least one or more transparent conductive oxides selected from the group consisting of indium gallium oxide (IGO) and aluminum zinc oxide (AZO). In addition to the transparent conductive oxide, silver (Ag), magnesium ), A metal reflective film such as aluminum (Al), platinum (Pt), lead (Pd), gold (Au), nickel (Ni), niobium (Nd), iridium (Ir) have.

Next, a second organic material covering the pixel electrode 310 is formed on the entire surface of the substrate 100. The second organic material may be an organic material such as polyimide, acryl, BCB (Benzocyclobutene), or HMDSO (hexamethyldisiloxane). The second organic material may be a photosensitive organic material. Accordingly, the pixel defining layer 150 exposing the central portion of the pixel electrode 310 can be formed by partially exposing, developing, and curing using a mask.

At the edge located outside the display area DA, the pixel defining layer 150 may form a step with the planarization layer 140. Accordingly, the edge region outside the display area DA can be gradually formed in a stepped shape by the organic substances.

As described above, the organic material layer 160 may be formed simultaneously in the process of forming the pixel defining layer 150.

7F, an intermediate layer 320 of the organic light emitting device is formed on a region where the pixel electrode 310 is not covered by the pixel defining layer 150, and an opposite electrode 330 The display device 300 can be formed. The counter electrode 330 may extend to an upper portion of the pixel defining layer 150.

The intermediate layer 320 may include a low molecular weight or a high molecular weight material. (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL) : Electron Injection Layer) may be laminated in a single or a composite structure, and may have a structure of copper phthalocyanine (CuPc), N, N-di (naphthalen-1-yl) -N, N-diphenyl-benzidine (NPB), tris-8-hydroxyquinoline aluminum (Alq3), and the like, As well as various organic materials. These layers may be formed by a method of vacuum deposition.

When the intermediate layer 320 includes a polymer material, it may have a structure including a hole transport layer (HTL) and a light emitting layer (EML). In this case, the hole transport layer may include PEDOT, and the light emitting layer may include a polymer material such as poly-phenylenevinylene (PPV) and polyfluorene. The intermediate layer 320 may be formed by a screen printing method, an inkjet printing method, a laser induced thermal imaging (LITI) method, or the like.

The counter electrode 330 may be formed of various conductive materials. For example, the counter electrode 330 may be formed of a transparent conductive metal oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3; indium oxide, indium gallium oxide (IGO), aluminum zinc oxide (AZO), and the like. In still another embodiment, the counter electrode 330 may be formed of a thin film including at least one material selected from Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, The counter electrode 330 may be formed as a single layer or a multilayer. In the case of the bottom emission type, the counter electrode 330 may be a reflective electrode, and in the case of a top emission type, the counter electrode 330 may be a transparent or semi-transparent electrode.

The counter electrode 330 may be formed using various deposition methods such as a sputtering process, a vacuum deposition process, a chemical vapor deposition process, a pulsed laser deposition process, a printing process, and an atomic layer deposition process.

Then, a sealing layer 400 for sealing the display area is formed. The encapsulant layer 400 may include at least one organic encapsulant layer 420 and at least one inorganic encapsulant layer 410, 420. The sealing layer 400 is formed to cover the display area, and the first inorganic encapsulating layer 410, the organic encapsulating layer 420, and the second inorganic encapsulating layer 420 are sequentially formed. The second inorganic encapsulation layer 430 may contact the first inorganic encapsulation layer 410 at the magnetic field position outside the display area DA to prevent the organic encapsulation layer 420 from being exposed to the outside.

The first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 420 may include silicon oxide, silicon nitride, and / or silicon oxynitride. The first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 420 may be deposited by various deposition methods such as chemical vapor deposition (CVD), atomic layer deposition (ALD), and sputtering.

The organic sealing layer 420 may include one or more materials selected from the group consisting of polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, and hexamethyldisiloxane . The second inorganic encapsulation layer 430 covers the organic encapsulation layer 420 and may include silicon oxide, silicon nitride, and / or silicon oxynitride. The organic sealing layer 420 may be applied or deposited by flash evaporation, inkjet printing, slot die coating, or the like.

Referring to FIG. 7G, a touch buffer layer 610 is formed on the sealing layer 400, and then a touch electrode 710, a touch wiring 720, and a fan-out wiring 720a are formed at the same time.

The touch buffer layer 610 is formed on the sealing layer 400 and may include silicon oxide, silicon nitride, and / or silicon oxynitride. The touch buffer layer 610 may be deposited by various deposition methods such as chemical vapor deposition (CVD), atomic layer deposition (ALD), and sputtering.

Next, a fourth conductive material layer is formed on the entire surface of the substrate 100. The fourth conductive material layer may be formed of a low resistance metal material. For example, the fourth conductive material layer may include aluminum (Al), copper (Cu), and / or titanium (Ti). The fourth conductive material layer may be a single film or a multilayer film.

The fourth conductive material layer may be deposited by various deposition methods, and the fourth conductive material layer may be deposited at a low temperature at which the display device 300 is not damaged to damage the display device 300, Can be minimized. For example, the fourth layer of conductive material may be deposited by thermal evaporation deposition at a temperature of about 90 degrees or less.

The fourth conductive material layer may be formed of a different material or a different thickness from the first conductive material layer or the second conductive material layer. For example, the thickness of the fourth conductive material layer may be less than the thickness of the second conductive material layer, and may be about 50% of the thickness of the second conductive material layer.

Alternatively, the fourth conductive material layer may be deposited with the same material and structure as the second conductive material layer, but the deposition conditions are different, and finally the deposited material may exhibit different characteristics.

The second conductive material layer may have a large grain size by depositing at a high temperature of about 90 degrees or more, for example, about 150 degrees, and may have a low specific resistance value.

On the other hand, the fourth conductive material layer is deposited at a low temperature of 90 degrees or less such that the grain size of the fourth conductive material layer can be small compared to the grain size of the second conductive material layer, and can have a high specific resistance value. For example, the resistivity value of the fourth conductive material layer may have a value which is about 25% higher than the resistivity value of the second conductive material layer.

The fanout wiring 720a, the touch wiring 720, and the touch electrode 710 are simultaneously formed by patterning the fourth conductive material after the photoresist pattern is formed on the fourth conductive material layer using a mask .

The touch electrode 710 may have the structure of the first touch conductive layer 711, the first insulating layer 712, the second touch conductive layer 713, and the second insulating layer 714 . In this case, the fan-out wiring 720a and the touch wiring 720 may be formed simultaneously with the first touch conductive layer 711 or the second touch conductive layer 713. [ In some embodiments, the fan-out wiring 720a and the touch wiring 720 have the same structure as the structure in which the first touch conductive layer 711 and the second touch conductive layer 713 are laminated, Touch conductive layer 711 and the second layer may be formed simultaneously with the second touch conductive layer 713. [

By forming the fan-out wiring 720a at the same time as the touch wiring 720, the organic material layer 160 can be formed simultaneously with the layer including the organic material disposed in the display area DA, thereby reducing the masking process.

Referring to FIG. 7H, a cover layer 730 is formed on the entire surface of the substrate 100. The cover layer 730 has flexibility and is made of a material such as polymethyl methacrylate, polydimethylsiloxane, polyimide, acrylate, polyethylene terephthalate, Polyethylene naphthalate, or the like.

Referring to FIG. 7I, a bending protection layer 600 is formed in the bending area BA. The bending protection layer 600 may be formed by applying a liquid or paste material and curing the material.

Then, it is bent with respect to the bending axis BAX of the bending area BA so that the display device has a shape substantially as shown in Fig.

As described above, in the embodiments of the present invention, when bending the display device by the organic layer 160 disposed between the fan-out wiring 720a and the substrate 100, the fan-out wiring 720a is disconnected Can be minimized. Further, embodiments of the present invention can reduce the mask process steps by simultaneously forming the organic layer 160 with a layer containing an organic material disposed in the display area DA.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art . Therefore, the true scope of the present invention should be determined by the technical idea of the appended claims.

1A: first region 2A: second region
BA: Bending area BAX: Bending axis
100: substrate 110: buffer layer
120: Gate insulating film 130: Interlayer insulating film
110a, 120a, 130a: opening 140: planarization layer
150: pixel defining layer 160: organic layer
160a: uneven surface
210: thin film transistor 211: semiconductor layer
213: gate electrodes 213b, 213c, 215c: signal wiring
215a: source electrode 215b: drain electrode
300: display element
310: pixel electrode 320: middle layer
330: opposing electrode
400: sealing layer
700: touch screen layer
710: touch electrode
720: Touch wiring
720a: Fan-out wiring

Claims (48)

A substrate provided with a display element and partitioned into a display area where an image is displayed and a non-display area around the display area, the non-display area including a bending area bent around a bending axis;
An encapsulation layer disposed on the display area;
A touch electrode disposed on the sealing layer;
A touch wiring connected to the touch electrode and extending to the non-display area; And
A fan-out wiring connected to a signal wiring for applying an electrical signal to the display area, the fan-out wiring being disposed at least partially in the bending area; / RTI >
Wherein the fan-out wiring is formed of the same material as the touch wiring. The method according to claim 1,
Wherein the signal wiring is connected to the fan-out wiring via a via hole, and the via hole is disposed outside the bending area. The method according to claim 1,
Wherein the fan-out wiring is formed of the same material as the signal wiring, and the specific resistance of the fan-out wiring has a different value from the specific resistance of the signal wiring. The method according to claim 1,
Wherein the fan-out wiring is formed of the same material as the signal wiring, and the thickness of the fan-out wiring has a different value from the thickness of the signal wiring. The method according to claim 1,
Wherein the fan-out wiring is formed of the same material as the signal wiring, and the grain size of the fan-out wiring has a different value from the grain size of the signal wiring. The method according to claim 1,
And the fan-out wiring is formed of a material different from the signal wiring. The method according to claim 1,
And an organic layer disposed on at least a part between the fan-out wiring and the substrate in the bending area. 8. The method of claim 7,
A thin film transistor disposed in the display region; And
And a planarization layer covering the thin film transistor and containing an organic material,
Wherein the organic material layer comprises the same material as the planarization layer. 8. The method of claim 7,
Wherein the display element includes a pixel electrode, a counter electrode facing the pixel electrode, and an intermediate layer interposed between the pixel electrode and the counter electrode,
And a pixel defining layer having an opening exposing a center portion of the pixel electrode and defining a pixel region,
Wherein the organic layer comprises the same material as the pixel defining layer. 8. The method of claim 7,
The encapsulation layer comprises an organic encapsulation layer,
Wherein the organic material layer comprises the same material as the organic sealing layer. 8. The method of claim 7,
And a touch buffer layer disposed between the sealing layer and the touch electrode and containing an organic material,
Wherein the organic material layer comprises the same material as the touch buffer layer. 8. The method of claim 7,
Wherein the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, the first touch conductive layer and the second touch conductive layer are electrically connected,
Wherein the touch wiring is formed of the same material as the second touch conductive layer,
Wherein the organic layer includes the same material as the first insulating layer. 13. The method of claim 12,
Wherein the fan-out wiring has a structure in which a first layer including the same material as the first touch conductive layer and a second layer including the same material as the second touch conductive layer are stacked. 8. The method of claim 7,
Wherein the organic material layer has an uneven surface on at least a part of the upper surface. 15. The method of claim 14,
The projecting surface of the uneven surface extends in the bending axis direction,
And the fan-out wiring extends while intersecting the projecting surface. The method according to claim 1,
And an inorganic insulating layer disposed between the substrate and the fan-out wiring,
Wherein the inorganic insulating layer has an opening or a groove corresponding to the bending region. 17. The method of claim 16,
And an organic layer disposed on at least a part of the opening or the groove. 18. The method of claim 17,
Wherein the organic material layer covers the inner surface of the opening and extends to a part of the upper surface of the inorganic insulating layer. The method according to claim 1,
Wherein the touch electrode is formed of the same material as the touch wiring. The method according to claim 1,
Wherein the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, the first touch conductive layer and the second touch conductive layer are electrically connected,
Wherein the touch wiring is formed of the same material as the first touch conductive layer or the second touch conductive layer. The method according to claim 1,
Wherein the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, the first touch conductive layer and the second touch conductive layer are electrically connected,
Wherein the touch wiring is stacked as a first layer including the same material as the first touch conductive layer and a second layer including the same material as the second touch conductive layer. 22. The method of claim 21,
Wherein the fan-out wiring has a structure in which a first layer including the same material as the first touch conductive layer and a second layer including the same material as the second touch conductive layer are stacked. The method according to claim 1,
A thin film transistor arranged in the display region or the non-display region and including a source electrode, a drain electrode and a gate electrode; And
And an additional conductive layer disposed at least partially in the bending region,
Wherein the additional conductive layer is provided on the same layer with the same material as the source electrode, the drain electrode or the gate electrode. 24. The method of claim 23,
And the additional conductive layer is disposed apart from the fan-out wiring. 24. The method of claim 23,
Wherein the additional conductive layer is at least partially overlapped with the lower portion of the fan-out wiring, and is electrically connected to the additional conductive layer. 25. The method of claim 24 or 25,
And an insulating layer is interposed between the additional conductive layer and the fan-out wiring. 27. The method of claim 26,
And the additional conductive layer and the fan-out wiring are electrically connected through a via hole provided on the insulating layer. 28. The method of claim 27,
Wherein the via hole is not disposed in the bending region. The method according to claim 1,
A first thin film transistor arranged in the display region or the non-display region and including a first semiconductor layer, a first source electrode, a first drain electrode, and a first gate electrode; A second thin film transistor including a second drain electrode and a second gate electrode; And
A first additional conductive layer formed of the same material as the first gate electrode and a second additional conductive layer formed of the same material as the second gate electrode,
Wherein the first gate electrode and the second gate electrode are disposed in different layers,
Wherein at least one of the first additional conductive layer and the second additional conductive layer is disposed at least partially in the bending region. 30. The method of claim 29,
Wherein the first additional conductive layer in the bending region is disposed at least partially overlapping the second additional conductive layer. 31. The method of claim 30,
And an insulating layer is interposed between the first additional conductive layer and the second additional conductive layer in the bending region. 30. The method of claim 29,
And at least one of the first additional conductive layer and the second additional conductive layer is disposed under the fan-out wiring and electrically connected thereto. 33. The method of claim 32,
Wherein at least one of the fan-out wiring and the first additional conductive layer and between the fan-out wiring and the second additional conductive layer is provided with an insulating layer. The method according to claim 1,
And a banding protection layer disposed on the fan-out wiring in the bending region. 35. The method of claim 34,
Wherein the bending protection layer covers at least a part of the display area. The method according to claim 1,
And a cover layer covering the touch electrode to protect the touch electrode. 35. The method of claim 34,
And the cover layer extends from the upper portion of the touch electrode to the bending region to cover at least a portion of the fan-out wiring. The method according to claim 1,
And a protective film disposed on a lower surface of the substrate,
Wherein the protective film comprises an opening or a groove that at least partially overlaps the bending region. The method according to claim 1,
Wherein the touch wiring extends along one side of the sealing layer in the direction of the bending area,
Wherein one side of the sealing layer is provided with a step shape. A substrate provided with a display element and partitioned into a display area where an image is displayed and a non-display area around the display area, the non-display area including a bending area bent around a bending axis;
An encapsulation layer disposed on the display area;
A touch electrode disposed on the sealing layer;
A touch wiring connected to the touch electrode and extending to the non-display area;
A signal wiring disposed between the bending region and the display region for applying an electrical signal;
A terminal disposed on one side of the non-display area; And
And a fan-out wiring disposed at least partially in the bending region, one side of which is connected to the signal wiring via a via-hole and the other side of which is connected to the terminal,
Wherein the fan-out wiring is formed of the same material as the touch wiring. 41. The method of claim 40,
And a thin film transistor disposed in the display region or the non-display region and including a source electrode, a drain electrode, and a gate electrode,
The terminal may be formed of the same material as the source electrode, the drain electrode, or the gate electrode,
And the fan-out wiring is connected through the via hole. A manufacturing method of a display device according to claim 1,
Wherein the fan-out wiring is formed simultaneously with the touch wiring. 43. The method of claim 42,
Wherein the display device further comprises an organic layer disposed between the substrate and the fan-out wiring in the bending area. 44. The method of claim 43,
The display device may further include a thin film transistor disposed in the display region and a planarization layer covering the thin film transistor and including an organic material,
Wherein the organic material layer is simultaneously formed of the same material as the planarizing layer. 44. The method of claim 43,
Wherein the display element includes an intermediate layer including a pixel electrode, an opposite electrode facing the pixel electrode, and an organic light emitting layer interposed between the pixel electrode and the counter electrode,
Wherein the display region further includes a pixel defining layer having an opening exposing a center portion of the pixel electrode and defining a pixel region,
Wherein the organic compound layer is formed of the same material as the pixel defining layer. 43. The method of claim 42,
Wherein the touch wiring is simultaneously formed of the same material as the touch electrode. 43. The method of claim 42,
Wherein the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, the first touch conductive layer and the second touch conductive layer are electrically connected,
Wherein the touch wiring is simultaneously formed of the same material as the first touch conductive layer. 43. The method of claim 42,
Wherein the touch electrode includes a first touch conductive layer, a first insulating layer, a second touch conductive layer, and a second insulating layer sequentially stacked, the first touch conductive layer and the second touch conductive layer are electrically connected,
And the touch wiring is simultaneously formed of the same material as the second touch conductive layer.

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