KR20170080211A - Display device and method for inspecting pad align of the same - Google Patents

Abstract

An embodiment of the present invention relates to a display device capable of checking an alignment error between pads of a flexible film and pads of a non-display area, and a method of inspecting pad alignment thereof.
A display device according to an embodiment of the present invention includes a display panel, a source drive IC, and a flexible film. A display panel of a display device according to an embodiment of the present invention includes a plurality of panel pads connected to data lines and a plurality of panel dummy pads adjacent to the panel pads. The flexible film of the display device according to the embodiment of the present invention includes a plurality of film pads connected to the panel pads and connected to the source drive IC, and a plurality of film dummy pads adjacent to the film pads.
The embodiment of the present invention can arrange the panel dummy pads at intervals different from the interval between the panel pads and arrange the film dummy pads at intervals different from the interval between the film pads. The panel dummy pad and the film dummy pad may be connected to each other when a misalignment of a predetermined ratio or more with respect to the width of the panel pads occurs. The embodiment of the present invention can determine whether or not a misalignment of a predetermined ratio or more with respect to the width of the panel pads has occurred by using the alignment error information output from the panel dummy pads. Accordingly, the embodiment of the present invention can automatically check the alignment error between the pads of the flexible film and the pads of the non-display area.

Description

TECHNICAL FIELD [0001] The present invention relates to a display device and a method of inspecting the display device.

An embodiment of the present invention relates to a display apparatus and a method of checking the alignment of the pads.

2. Description of the Related Art As an information society has developed, demands for a display device for displaying an image have been increasing in various forms. In recent years, a liquid crystal display, a plasma display panel, light emitting display devices) are being utilized.

The display device includes a display panel and a source drive IC. The display panel includes a display area for displaying an image and a non-display area for not displaying an image. The display region includes a plurality of pixels formed at intersections of the data lines, the gate lines, the data lines and the gate lines, and supplied with the data voltages of the data lines when the gate signals are supplied to the gate lines. The pixels emit light at a predetermined brightness according to the data voltages. The non-display area may include pads connected to the data lines.

The source drive IC can be manufactured as a drive chip. In this case, the source drive IC can be mounted on the flexible film. The flexible film can be implemented as a chip on film (COF). The flexible film is formed with pads that can be electrically connected, and can be electrically connected to the pads in the non-display area.

Therefore, when there is an error in the alignment between the pads of the flexible film and the pads of the non-display area, there arises a problem that the data voltages of the source drive IC are not properly supplied to the data lines of the display panel. Even if there is an error in the alignment between the pads of the flexible film and the pads of the non-display area, it is difficult to check the alignment error. Accordingly, there is a need for a method of checking the alignment error to check whether the source drive IC properly supplies the data voltages.

An embodiment of the present invention is to provide a display device capable of checking an alignment error between pads of a flexible film and pads of a non-display area, and a method of inspecting the alignment of the pads.

A display device according to an embodiment of the present invention includes a display panel, a source drive IC, and a flexible film. A display panel of a display device according to an embodiment of the present invention includes a plurality of panel pads connected to data lines and a plurality of panel dummy pads adjacent to the panel pads. The flexible film of the display device according to the embodiment of the present invention includes a plurality of film pads connected to the panel pads and connected to the source drive IC, and a plurality of film dummy pads adjacent to the film pads. The panel dummy pads of the display device according to the embodiment of the present invention are arranged at intervals different from the interval between the panel pads and the film dummy pads are arranged at intervals different from the interval between the film pads.

The pad alignment inspection method according to an embodiment of the present invention includes the steps of applying an input signal to a first panel dummy pad, applying output signals to film dummy pads, and outputting alignment error signals in the film dummy pads .

The embodiment of the present invention can arrange the panel dummy pads at intervals different from the interval between the panel pads and arrange the film dummy pads at intervals different from the interval between the film pads. The panel dummy pad and the film dummy pad may be connected to each other when a misalignment of a predetermined ratio or more with respect to the width of the panel pads occurs. The embodiment of the present invention can determine whether or not a misalignment of a predetermined ratio or more with respect to the width of the panel pads has occurred by using the alignment error information output from the panel dummy pads. Accordingly, the embodiment of the present invention can check the alignment error between the pads of the flexible film and the pads of the non-display area.

1 is a perspective view showing a display panel, a circuit board, a source drive IC, a timing control circuit, and a flexible film of a display device according to an embodiment of the present invention.
2 is a plan view showing the lower substrate of the display device according to the first embodiment of the present invention in detail;
3 is a plan view showing in detail a flexible film of a display device according to a first embodiment of the present invention.
4 is a cross-sectional view illustrating a combination of a panel pad and a film pad of a display device according to an embodiment of the present invention.
5 is a front view showing an alignment relationship of panel pads, panel dummy pads, film pads, and film dummy pads of a display device according to the first embodiment of the present invention.
6 is a plan view showing the lower substrate of the display device in detail according to the second embodiment of the present invention.
7 is a plan view showing in detail a flexible film of a display device according to a second embodiment of the present invention.
8 is a front view showing an alignment relationship of panel pads, panel dummy pads, film pads, and film dummy pads of a display device according to a second embodiment of the present invention.
9 is a block diagram illustrating panel dummy pads, film dummy pads, and source drive ICs of a display device according to an embodiment of the present invention.
10 is a block diagram showing details of a source drive IC of a display device according to an embodiment of the present invention.
11 is a flowchart of a pad alignment inspection method according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited thereto. Like reference numerals refer to like elements throughout the specification. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail.

Where the terms "comprises," "having," "consisting of," and the like are used in this specification, other portions may be added as long as "only" is not used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is not used, one or more other portions may be located between the two portions.

In the case of a description of a temporal relationship, for example, if the temporal relationship is described by 'after', 'after', 'after', 'before', etc., May not be continuous unless they are not used.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

The terms "X-axis direction "," Y-axis direction ", and "Z-axis direction" should not be construed solely by the geometric relationship in which the relationship between them is vertical, It may mean having directionality.

It should be understood that the term "at least one" includes all possible combinations from one or more related items. For example, the meaning of "at least one of the first item, the second item and the third item" means not only the first item, the second item or the third item, but also the second item and the second item among the first item, May refer to any combination of items that may be presented from more than one.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other, partially or wholly, technically various interlocking and driving, and that the embodiments may be practiced independently of each other, It is possible.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1, a display device according to an embodiment of the present invention includes a display panel 100, a circuit board 200, a source drive integrated circuit (IC) 300, a timing control circuit 400, and a flexible film 500. The display device may be a liquid crystal display, a plasma display panel, an organic light emitting display device, or an electrophoretic display device.

The display panel 100 includes a lower substrate 110 and an upper substrate 120. The lower substrate 110 serves as a supporting substrate. The lower substrate 110 may include a display region and a non-display region, and a detailed description thereof will be given later with reference to FIG. The upper substrate 120 serves as an encapsulating substrate.

The circuit board 200 may be attached to the flexible films 40. The circuit board 200 may be implemented with a plurality of circuits implemented with driving chips. For example, the timing control circuit 400 may be mounted on the circuit board 200. The circuit board 200 may be a printed circuit board or a flexible printed circuit board.

The source drive IC 300 receives the digital video data and the source control signal from the timing control circuit 400. The source driver IC 300 converts the digital video data into analog data voltages according to the source control signal and supplies them to the data lines. The source drive IC 300 may be mounted on the flexible film 500 when it is fabricated from a driving chip.

The timing control circuit 400 receives digital video data and a timing signal from an external system board (not shown). The timing control unit 400 generates a gate control signal for controlling the operation timing of the gate driving unit (not shown) and a source control signal for controlling the source drive ICs 300 based on the timing signal. The timing controller 400 supplies a gate control signal to a gate driver (not shown), and supplies a source control signal to the source driver ICs 300.

The flexible film 500 can connect the circuit board 200 and the display panel 100. The flexible film 500 includes wirings for connecting the display panel 100 and the circuit board 200 and wirings for connecting the display panel 100 and the source drive IC 300. The flexible film 500 is attached on the pads using an anisotropic conducting film, whereby the pads and the wirings of the flexible film 500 can be connected. The flexible film 500 can mount the source drive IC 300.

Hereinafter, a display device according to a first embodiment of the present invention will be described with reference to FIGS. 2 to 5. FIG.

2 and 3, the lower substrate 110 is divided into a display area DA and a non-display area NDA. The display area DA is an area for displaying an image using pixels and the non-display area NDA is an area for not displaying an image.

Gate lines and data lines are formed in the display area DA. Pixels may be formed in the intersecting regions of the gate lines and the data lines. The pixels can display an image.

In the non-display area NDA, the panel pads P1 and the panel dummy pads DP1 are formed.

The flexible film 500 includes a source drive IC 300, film pads P2, and film dummy pads DP2.

The panel pads P1 are connected to the data lines. The panel pads P1 receive the data voltages from the source driver IC 300 and supply the data voltages to the data lines. The panel pads P1 may be connected to the film pads P2 provided on the flexible film 500. [

The panel dummy pads DP1 may be disposed on one side of the panel pads P1 adjacent to the panel pads P1. The panel dummy pads DP1 are not connected to the data lines. 2, three panel dummy pads DP1 are disposed on one side of the panel pads P1 adjacent to the plurality of panel pads P1. However, the present invention is not limited thereto, And can have a small number of panel dummy pads DP1.

The source driver IC 300 supplies data voltages to the film pads P2 through wirings formed inside the flexible film 500. [ The source drive IC 300 may be mounted on the flexible film 500 using a chip on film (COF) method.

The film pads P2 are supplied with data voltages from the source drive IC 300 through the wirings formed inside the flexible film 500. [ The film pads P2 are connected to the panel pads P1 and supply data voltages to the panel pads P1.

The film dummy pads DP2 may be disposed on one side of the film pads P2, adjacent to the film pads P2. The film dummy pads DP2 are connected to the source drive IC 300 via the wirings formed inside the flexible film 500. [ However, the film dummy pads DP2 do not receive data voltages from the source drive IC 300. [ In FIG. 3, three film dummy pads DP2 are disposed on one side of the film pads P2 adjacent to the plurality of film pads P2. However, the present invention is not limited thereto. And may have a small number of film dummy pads DP2.

4, the panel pads P1 on the display panel 100 and the film pads P2 on the flexible film 500 are connected using an anisotropic conductive film (ACF) The anisotropic conductive film 600 includes a conductive material. In FIG. 4, only one of the panel pads P1 and the film pads P2 is shown for convenience.

When the flexible film 500 is connected to the display panel 100, the panel pads P1 and the film pads P2 are connected to each other, and preferably, in each region where the flexible film 500 is connected, The number of pads P1 is equal to the number of film pads P2. In addition, preferably, the number of the panel dummy pads DP1 and the number of the film dummy pads DP2 are equal in each region where the flexible film 500 is connected.

Hereinafter, the panel pads P1-1 to P1-n, the film pads P2-1 to P2-n, the panel dummy pads DP1-1 to DP1-3, The alignment relationship of the pads DP-1 to DP-3 will be described.

n (n is a positive integer) number of panel pads P1-1 to P1-n are connected to n film pads P2-1 to P2-n. Each of the panel pads P1-1 to P1-n is connected to the data lines DL1 to DLn. The width W of each of the panel pads P1-1 to P1-n is the same. Further, the distance W1 between the respective panel pads P1-1 to P1-n is the same.

The n film pads P2-1 to P2-n are connected to the n panel pads P1-1 to P1-n. Each of the film pads P2-1 to P2-n is connected to the source drive IC 300. [ The width W of each of the film pads P2-1 to P2-n is the same. In addition, the distance W1 between the film pads P2-1 to P2-n is the same.

The panel dummy pads DP1-1 to DP1-3 are disposed adjacent to the panel pads P1-1 to P1-n. Although FIG. 5 illustrates the case where there are three panel dummy pads DP1-1 through DP1-3, the present invention is not limited thereto, and it is possible to have fewer or greater number of panel dummy pads.

The first panel dummy pad DP1-1 may be connected to the second panel dummy pad DP1-2 through the first panel line PL1. In addition, the first panel dummy pad DP1-1 may be connected to the third panel dummy pad DP1-3 through the second panel line PL2.

The panel dummy pads DP1-1 to DP1-3 may be disposed at intervals different from the interval W1 between the panel pads P1-1 to P1-n. The interval between the first panel dummy pad DP1-1 and the second panel dummy pad DP1-2 is set to be equal to the interval between the first panel pad interval PW1, the second panel dummy pad DP1-2, The interval between the third panel dummy pad DP1-3 and the first panel pad P1-1 is the third panel pad interval PW3, .

The film dummy pads DP-1 to DP-3 are disposed adjacent to the film pads P2-1 to P2-n. Although FIG. 5 illustrates the case where there are three film dummy pads DP-1 to DP-3, the present invention is not limited thereto and may have fewer or more film dummy pads. The film dummy pads DP-1 to DP-3 may be connected to the source drive IC 300 via wiring.

The source drive IC 300 may generate an input signal SIG_IN for checking an alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n. The source drive IC 300 does not generate a separate input signal SIG_IN and outputs a signal generated by the source drive IC 300 such as a data enable signal for supplying data voltages to the input signal SIG_IN, . Accordingly, alignment errors between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n can be checked without designing a separate internal circuit.

The film dummy pads DP-1 to DP-3 may be arranged at intervals different from the interval W1 between the film pads P2-1 to P2-n. The interval between the first film dummy pad DP-1 and the second film dummy pad DP-2 is set to be equal to the interval between the first film pad interval FW1, the second film dummy pad DP- The interval between the third film dummy pad DP-3 and the third film dummy pad DP-3 is the second film pad interval FW2, the interval between the third film dummy pad DP- .

The first panel pad interval PW1 may be smaller than the first film pad interval FW1. The second panel dummy pad DP1-2 and the second film dummy pad DP-2 are not connected at an alignment error of 2/3 or less of the width W of the panel pads P1-1 to P1-n Do not. The second panel dummy pad DP1-2 and the second film dummy pad DP-2 may be separated from each other when an alignment error of 2/3 or more of the width W of the panel pads P1-1 to P1- Can be connected. Thus, it is possible to determine whether or not an alignment error of 2/3 or more of the width W of the panel pads P1-1 to P1-n has occurred.

And the second panel pad interval PW2 may be smaller than the second film pad interval FW2. The third panel dummy pad DP1-3 and the third film dummy pad DP-3 are not connected at an alignment error of 1/3 or less of the width W of the panel pads P1-1 to P1-n Do not. The third panel dummy pad DP1-3 and the third film dummy pad DP-3 are not aligned with each other when an alignment error of 1/3 or more of the width W of the panel pads P1-1 to P1- Can be connected. Thus, it is possible to determine whether or not an alignment error of 1/3 or more of the width W of the panel pads P1-1 to P1-n has occurred.

The width WL of the first panel dummy pad DP1-1 may be larger than the width W of the panel pads P1-1 to P1-n. If the width WL of the first panel dummy pad DP1-1 is made not less than 1 time and not more than 3 times the width W of the panel pads P1-1 to P1-n, even if alignment error occurs, The panel dummy pad DP1-1 can always be connected to the first film dummy pad DP-1. Accordingly, even if an alignment error occurs, the input signal SIG_IN for always checking the alignment error can be applied to the first panel dummy pad DP1-1.

The width W of the second and third panel dummy pads DP1-2 and DP1-3 may be equal to the width W of the panel pads P1-1 to P1-n.

The center axis of the first film dummy pad DP-1 is arranged to coincide with the center axis of the first panel dummy pad DP1-1. Thus, even if an alignment error occurs, the first film dummy pad DP-1 can always be connected to the first panel dummy pad DP1-1.

The width W of the film dummy pads DP-1 to DP-3 may be equal to the width W of the film pads P2-1 to P2-n.

The display device according to the first embodiment of the present invention is configured to connect the panel dummy pads DP1-1 to DP1-3 and the film dummy pads DP-1 to DP-3 to the panel pads P1-1 to P1- n and the film pads P2-1 to P2-n. Accordingly, the display device according to the first embodiment of the present invention can be configured such that the panel dummy pads DP1-1 to DP1-3 and the film dummy pads DP-1 to DP-3 are not additionally disposed, The alignment error between the pads P1-1 to P1-n and the film pads P2-1 to P2-n can be checked.

Hereinafter, a display device according to a second embodiment of the present invention will be described with reference to FIGS. 6 to 8. FIG.

6 and 7, the lower substrate 110 includes a display area DA, a non-display area NDA, panel pads P1, and panel dummy pads DP1, and the flexible film 500 Includes a source drive IC 300, film pads P2, and film dummy pads DP2. Description of the display area DA, the non-display area NDA, the panel pads P1, the source drive IC 300, and the film pads P2 of the display device according to the second embodiment of the present invention Is the same as that of the display device according to the first embodiment of the present invention, and thus a detailed description thereof will be omitted.

The panel dummy pads DP1 may be disposed on both sides of the panel pads P1 adjacent to the panel pads P1. The panel dummy pads DP1 are not connected to the data lines. In the example shown in FIG. 6, three panel dummy pads DP1 are formed on both sides of the panel pads P1 adjacent to the plurality of panel pads P1. However, the present invention is not limited thereto, And can have a small number of panel dummy pads DP1.

Film dummy pads DP2 may be disposed on both sides of the film pads P2, adjacent to the film pads P2. The film dummy pads DP2 do not receive the data voltages from the source drive IC 300. [ In FIG. 7, three film dummy pads DP2 are disposed on both sides of the film pads P2 adjacent to the plurality of film pads P2. However, the present invention is not limited thereto. And may have a small number of film dummy pads DP2.

Hereinafter, the panel pads P1-1 to P1-n, the film pads P2-1 to P2-n, and the panel dummy pads (not shown) of the display device according to the second embodiment of the present invention DP1-1 to DP1-3, and the film dummy pads DP-1 to DP-3 will be described. The alignment relations of the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n of the display device according to the second embodiment of the present invention are the same as those of the first embodiment And therefore, a detailed description thereof will be omitted.

The panel dummy pads DP1 may be arranged symmetrically on both sides of the panel pads P1 adjacent to the panel pads P1.

The first panel dummy pad DP1-1 may be connected to the second panel dummy pad DP1-2 through the first panel line PL1. In addition, the first panel dummy pad DP1-1 may be connected to the third panel dummy pad DP1-3 through the second panel line PL2.

The panel dummy pads DP1-1 to DP1-3 may be disposed at intervals different from the interval W1 between the panel pads P1-1 to P1-n. The interval between the first panel dummy pad DP1-1 and the second panel dummy pad DP1-2 is set to be equal to the interval between the first panel pad interval PW1, the second panel dummy pad DP1-2, The interval between the third panel dummy pad DP1-3 and the first panel pad P1-1 is the third panel pad interval PW3, .

The film dummy pads DP2 may be arranged symmetrically on both sides of the film pads P2, adjacent to the film pads P2.

The film dummy pads DP-1 to DP-3 may be arranged at intervals different from the interval W1 between the film pads P2-1 to P2-n. The interval between the first film dummy pad DP-1 and the second film dummy pad DP-2 is set to be equal to the interval between the first film pad interval FW1, the second film dummy pad DP- The interval between the third film dummy pad DP-3 and the third film dummy pad DP-3 is the second film pad interval FW2, the interval between the third film dummy pad DP- .

The first panel pad interval PW1 may be smaller than the first film pad interval FW1. The second panel dummy pad DP1-2 and the second film dummy pad DP-2 are not connected at an alignment error of 2/3 or less of the width W of the panel pads P1-1 to P1-n Do not. The second panel dummy pad DP1-2 and the second film dummy pad DP-2 may be separated from each other when an alignment error of 2/3 or more of the width W of the panel pads P1-1 to P1- Can be connected. Thus, it is possible to determine whether or not an alignment error of 2/3 or more of the width W of the panel pads P1-1 to P1-n has occurred.

And the second panel pad interval PW2 may be smaller than the second film pad interval FW2. The third panel dummy pad DP1-3 and the third film dummy pad DP-3 are not connected at an alignment error of 1/3 or less of the width W of the panel pads P1-1 to P1-n Do not. The third panel dummy pad DP1-3 and the third film dummy pad DP-3 are not aligned with each other when an alignment error of 1/3 or more of the width W of the panel pads P1-1 to P1- Can be connected. Thus, it is possible to determine whether or not an alignment error of 1/3 or more of the width W of the panel pads P1-1 to P1-n has occurred.

The display device according to the second embodiment of the present invention has panel dummy pads DP1-1 to DP1-3 and film dummy pads DP-1 to DP-3 arranged symmetrically on both sides. Accordingly, it is possible to sense the misalignment between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n in any direction.

Hereinafter, the signal application relationship of the source drive IC 300, the panel dummy pads DP1-1 to DP1-3, and the film dummy pads DP-1 to DP-3 will be described with reference to Fig. 9 .

The source drive IC 300 may generate the input signal SIGJIN. The source drive IC 300 can apply the input signal SIG_IN to the first film dummy pad DP-1. The first film dummy pad DP-1 can apply the input signal SIG_IN to the first panel dummy pad DP1-1. Even if an alignment error occurs, the first film dummy pad DP-1 is connected to the first panel dummy pad DP1-1. Accordingly, even if an alignment error occurs, the input signal SIG_IN can be always applied to the first panel dummy pad DP1-1.

The first panel dummy pad DP1-1 connects the input signal SIG_IN to the second and third panel dummy pads DP1-2 and DP1-3 through the first and second panel lines PL1 and PL2, As shown in FIG. The second panel dummy pad DP1-2 can generate the first output signal SIG_OUT1 using the input signal SIG_IN. The third panel dummy pad DP1-3 can generate the second output signal SIG_OUT2 using the input signal SIG_IN.

The second panel dummy pad DP1-2 and the second film dummy pad DP-2 can not be aligned with each other when an alignment error of 2/3 or more of the width W of the panel pads P1-1 to P1- Can be connected. When the second panel dummy pad DP1-2 and the second film dummy pad DP-2 are connected, the second film dummy pad DP-2 can receive the first output signal SIG_OUT1. The second film dummy pad DP-2 may output the first alignment error signal MA1 using the first output signal SIG_OUT1. Accordingly, it can be determined whether or not the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n.

The third panel dummy pad DP1-3 and the third film dummy pad DP-3 are not aligned with each other when an alignment error of 1/3 or more of the width W of the panel pads P1-1 to P1- Can be connected. When the third panel dummy pad DP1-3 and the third film dummy pad DP-3 are connected, the third film dummy pad DP-3 can receive the second output signal SIG_OUT2. The third film dummy pad DP-3 can output the second alignment error signal MA2 using the second output signal SIG_OUT2. Accordingly, it can be determined whether the alignment error is 1/3 or more of the width W of the panel pads P1-1 to P1-n.

The source drive IC 300 receives the first and second alignment error signals MA1 and MA2 output from the second and third film dummy pads DP-2 and DP-3.

Hereinafter, the internal structure of the source drive IC 300 of the display device according to the embodiment of the present invention will be described with reference to FIG.

The source drive IC 300 includes an alignment error information generation unit 310, a bit conversion unit 320, a voltage generation unit 330, and an AND gate 340.

The alignment error information generation unit 310 receives the first and second alignment error signals MA1 and MA2 output from the second and third film dummy pads DP-2 and DP-3. The alignment error information generation unit 310 generates alignment error information MA using the first and second alignment error signals MA1 and MA2.

The bit conversion unit 320 receives the alignment error information MA generated from the alignment error information generation unit 320. The bit conversion unit 320 generates the register bit RB using the alignment error information MA. The register bit RB is digital data obtained by converting the first alignment error information into an upper bit and the second alignment error information into lower bits.

For example, the register bit (RB) may be composed of two bits. If the alignment error is 1/3 or less of the width W of the panel pads P1-1 to P1-n, the value of the register bit RB may be '00'. When the alignment error is 1/3 to 2/3 of the width W of the panel pads P1-1 to P1-n, the value of the register bit RB may be '01'. If the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n, the value of the register bit RB may be '11'.

The voltage generation unit 330 receives the register bit RB from the bit conversion unit 320. The voltage generator 330 generates a data enable (DE) signal, which is a signal for determining whether to supply the data voltage to the data line. The voltage generator 330 inverts the register bit RB to generate the inverted register bit RB_INV.

For example, the inversion register bit (RB_INV) may be composed of two bits. If the alignment error is 1/3 or less of the width W of the panel pads P1-1 to P1-n, the value of the inversion register bit RB_INV may be '11'. If the alignment error is 1/3 to 2/3 of the width W of the panel pads P1-1 to P1-n, the value of the inversion register bit RB_INV may be '10'. If the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n, the value of the inversion register bit RB_INV may be '00'.

The AND gate 340 receives the inverted register bit RB_INV and the data enable (DE) signal from the voltage generator 330. The AND gate 340 outputs '1' only when the input signal is all '1'. The AND gate 340 generates the data voltages DS only when the inverted register bit RB_INV and the data enable (DE) signal are both '1'.

When the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n, the first and second alignment error signals MA1 and MA2 are applied. In this case, the value of the inversion register bit RB_INV may be '00'. Even if a data enable (DE) signal is applied, if the value of the inversion register bit RB_INV is '00', the AND gate 340 does not generate the data voltages DS. The data voltages DS can be cut off when the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n. Accordingly, when the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n, the data voltages DS can be cut off to reduce the power consumption. In addition, the circuit can be protected by blocking the data voltages DS when a short circuit or a short circuit occurs due to the alignment error.

Hereinafter, a method of inspecting a pad alignment of a display device according to an embodiment of the present invention will be described with reference to FIG.

First, the input signal SIG_IN is applied to the first panel dummy pad DP1-1. And generates an input signal SIG_IN at the source drive IC 300. [ The source drive IC 300 applies the generated input signal SIG_IN to the first film dummy pad DP-1. The first panel dummy pad DP1-1 is connected to the first film dummy pad DP-1 and can receive the input signal SIG_IN. (S101 in Fig. 8)

Second, the output signals SIG_OUT1 and SIG_OUT_2 are applied to the film dummy pads DP-2 and DP-3. The first panel dummy pad DP1-1 can apply the input signal SIG_IN to the second and third panel dummy pads DP1-2 and DP1-3. The second panel dummy pad DP1-2 can generate the first output signal SIG_OUT1 using the input signal SIG_IN. The third panel dummy pad DP1-3 can generate the second output signal SIG_OUT2 using the input signal SIG_IN.

When the alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n is 2/3 or more of the width W of the panel pad P1, The pads DP1-2 can be connected to the second film dummy pad DP-2. The second panel dummy pad DP1-2 can apply the first output signal SIG_OUT1 to the second film dummy pad DP-2. Thus, whether or not the alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n is 2/3 or more of the width W of the panel pad P1 It can be judged.

When the alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n is 1/3 or more of the width W of the panel pad P1, The pads DP1-3 can be connected to the third film dummy pad DP-3. The third panel dummy pad DP1-3 can apply the second output signal SIG_OUT2 to the third film dummy pad DP-3. Accordingly, whether the alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n is 1/3 or more of the width W of the panel pad P1 It can be judged. (S102 in Fig. 8)

Third, alignment error signals MA1 and MA2 are output from the film dummy pads DP-2 and DP-3. The second film dummy pad DP-2 may output the first alignment error signal MA1 using the applied first output signal SIG_OUT1. The third film dummy pad DP-3 may output the second alignment error signal MA2 using the applied second output signal SIG_OUT2. (S103 in Fig. 8)

Fourth, alignment error signals MA1 and MA2 are used to generate alignment error information MA. The alignment error information generating unit 310 in the source drive IC 300 may generate the alignment error information MA using the alignment error signals MA1 and MA2. (S104 in Fig. 8)

Fifth, the alignment error information MA is converted into register bit (RB) information. The bit converter 320 in the source drive IC 300 may convert the alignment error information MA to a register bit RB. The register bit RB is digital data obtained by converting the first alignment error information into an upper bit and the second alignment error information into lower bits.

For example, the register bit (RB) may be composed of two bits. If the alignment error is 1/3 or less of the width W of the panel pads P1-1 to P1-n, the value of the register bit RB may be '00'. When the alignment error is 1/3 to 2/3 of the width W of the panel pads P1-1 to P1-n, the value of the register bit RB may be '01'. If the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n, the value of the register bit RB may be '11'. (S105 in Fig. 8)

Sixth, the data voltages are cut off when the register bit (RB) information is not zero. When the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n, the first and second alignment error signals MA1 and MA2 are applied. In this case, the value of the inversion register bit RB_INV may be '00'. Even if a data enable (DE) signal is applied, if the value of the inversion register bit RB_INV is '00', the AND gate 340 does not generate the data voltages.

The data voltages DS can be cut off when the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n. Accordingly, when the alignment error is 2/3 or more of the width W of the panel pads P1-1 to P1-n, the data voltages can be cut off to reduce the power consumption. In addition, the circuit can be protected by blocking the data voltages DS when a short circuit or a short circuit occurs due to the alignment error. (S106 in Fig. 8)

The embodiment of the present invention can arrange the panel dummy pads at intervals different from the interval between the panel pads and arrange the film dummy pads at intervals different from the interval between the film pads. The panel dummy pad and the film dummy pad may be connected to each other when a misalignment of a predetermined ratio or more with respect to the width of the panel pads occurs. The embodiment of the present invention can determine whether or not a misalignment of a predetermined ratio or more with respect to the width of the panel pads has occurred by using the alignment error information output from the panel dummy pads. Accordingly, the embodiment of the present invention can check the alignment error between the pads of the flexible film and the pads of the non-display area.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

100: display panel 110: lower substrate
120: upper substrate 200: circuit board
300: Source drive IC 310: Alignment error information generating section
320: bit conversion unit 330: voltage generation unit
340: AND gate 400: timing control circuit
500: flexible film 600: anisotropic conductive film
DL1 to DLn: Data lines DP1-1 to DP1-3: Panel dummy pads
DP-1 to DP-3: Film dummy pads P1-1 to P1-n:
P2-1 to P2-n: Film pads PL1, PL2: First and second panel lines

Claims (12)

A plurality of panel pads P1-1 to P1-n connected to the data lines DL1 to DLn and a plurality of panel dummy pads DP1 to DPn adjacent to the panel pads P1-1 to P1- -1 to DP1-3);
A source drive IC 300 for generating data voltages supplied to the data lines DL1 to DLn; And
A plurality of film pads P2-1 to P2-n connected to the panel pads P1-1 to P1-n and connected to the source drive IC 300, And a flexible film 500 including a plurality of film dummy pads DP-1 to DP-3 adjacent to each other,
The panel dummy pads DP1-1 to DP1-3 are spaced apart from the interval W between the panel pads P1-1 to P1-n, DP-3 are arranged at intervals different from the interval W between the film pads P2-1 to P2-n. The method of claim 1, wherein the source drive IC (300)
And generates an input signal SIG_IN for checking an alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n. 3. The method of claim 2,
The first panel dummy pad DP1-1 is connected to the first film dummy pad DP-1 and the first film dummy pad DP-1 is connected to the first panel dummy pad DP1-1. And applies the input signal SIG_IN. The method according to claim 1,
The interval PW1 between the first and second panel dummy pads DP1-1 and DP1-2 is smaller than the interval FW1 between the first and second film dummy pads DP- Small display. 5. The method of claim 4,
The interval PW2 between the second and third panel dummy pads DP1-2 and DP1-3 is smaller than the interval FW2 between the second and third film dummy pads DP-2 and DP- Small display. 6. The method of claim 5,
The width (WL) of the first panel dummy pad (DP1-1) is larger than the width (W) of the panel pad (P1). The method according to claim 6,
When the alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n is 2/3 or more of the width W of the panel pad P1,
The second film dummy pad DP-2 is connected to the source drive IC 300 by a first alignment error signal DP2, and the second film dummy pad DP- (MA1). 8. The method of claim 7,
When the alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n is 1/3 or more of the width W of the panel pad P1,
The third film dummy pad DP-3 is connected to the source drive IC 300 and the second film dummy pad DP-3 is connected to the third film dummy pad DP- (MA2). 9. The method of claim 8, wherein the source drive IC (300)
And blocks data voltages supplied to the film pads (P2-1 to P2-n) when the first and second alignment error signals (MA1, MA2) are applied. An alignment error between the panel pads P1-1 to P1-n connected to the data lines DL1 to DLn and the film pads P2-1 to P2-n connected to the source drive IC 300 is checked Applying an input signal SIG_IN to the first panel dummy pad DP1-1;
The film dummy pads DP1-1 to DP1-3 are formed in the panel dummy pads DP1-1 to DP1-3 in accordance with an alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2- Applying output signals SIG_OUT1, SIG_OUT2 to the control signals DP-1 to DP-3;
And outputting alignment error signals (MA1, MA2) in the film dummy pads (DP-1 to DP-3). 11. The method of claim 10, wherein applying the output signals (SIG_OUTl, SIG_OUT2)
When the alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n is 2/3 or more of the width W of the panel pad P1, ≪ / RTI > signal SIG_OUT1. 11. The method of claim 10, wherein applying the output signals (SIG_OUTl, SIG_OUT2)
When the alignment error between the panel pads P1-1 to P1-n and the film pads P2-1 to P2-n is 1/3 or more of the width W of the panel pad P1, Signal < RTI ID = 0.0 > SIG ~ OUT2. ≪ / RTI >

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