KR20170053320A - Jig for manufacturing semiconductor package and method for attaching chip using the same - Google Patents

Jig for manufacturing semiconductor package and method for attaching chip using the same Download PDF

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Publication number
KR20170053320A
KR20170053320A KR1020150155662A KR20150155662A KR20170053320A KR 20170053320 A KR20170053320 A KR 20170053320A KR 1020150155662 A KR1020150155662 A KR 1020150155662A KR 20150155662 A KR20150155662 A KR 20150155662A KR 20170053320 A KR20170053320 A KR 20170053320A
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KR
South Korea
Prior art keywords
laser beam
semiconductor chip
strip substrate
jig
semiconductor
Prior art date
Application number
KR1020150155662A
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Korean (ko)
Inventor
정양규
김민호
김충회
윤태호
Original Assignee
앰코 테크놀로지 코리아 주식회사
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Priority to KR1020150155662A priority Critical patent/KR20170053320A/en
Publication of KR20170053320A publication Critical patent/KR20170053320A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Wire Bonding (AREA)

Abstract

The present invention relates to a jig for manufacturing semiconductor packages capable of performing laser assist bonding of a plurality of semiconductor chips on a strip substrate at the same time, and a method of attaching semiconductor chips using the same.
That is, according to the present invention, when attaching a semiconductor chip to each semiconductor chip attachment region of a strip substrate by a laser assist bonding method, the laser beam shielding jig can be placed in an area excluding the semiconductor chip attachment region of the strip substrate And a laser beam can be irradiated onto the entire semiconductor chip mounted on each semiconductor chip mounting area of the strip substrate, and a method of attaching a semiconductor chip using the same.

Description

Technical Field [0001] The present invention relates to a jig for manufacturing semiconductor packages and a method for attaching semiconductor chips using the same.

The present invention relates to a jig for manufacturing a semiconductor package and a method for attaching a semiconductor chip using the same, and more particularly, to a jig for manufacturing a semiconductor package capable of performing laser assist bonding of a plurality of semiconductor chips to a strip substrate at the same time, ≪ / RTI >

In general, a semiconductor package is manufactured by attaching a semiconductor chip to a substrate (PCB, printed circuit board), connecting the semiconductor chip and the substrate with a conductive wire, sealing the semiconductor chip and the conductive wire with a molding compound resin do.

Among the structures of the semiconductor package, the conductive wires connecting between the conductive pattern of the substrate and the bonding pads of the semiconductor chip are wired with a predetermined height and length, which substantially increases the size of the semiconductor package. Particularly, as the semiconductor chip is highly direct, high-performance, and high-speed, the semiconductor package becomes a factor that is contrary to efforts to miniaturize the semiconductor package.

In view of this point, there has been proposed a semiconductor package in which a bonding pad (= electrode pad) of a semiconductor chip and a conductive pattern of the substrate are electrically connected to each other through a conductive bump made of a metal. A flip chip ball grid array (FCBGA) package, a wafer level chip size / scale package (WLCSP), and the like.

In the flip chip ball grid array package, a conductive bump is integrally formed on each bonding pad formed on one surface of a semiconductor chip by a conventional bumping or plating process, and a semiconductor obtained by soldering each conductive bump to a conductive pattern of the substrate. Package.

Hereinafter, a manufacturing method for a conventional flip chip ball grid array package will be briefly described.

FIG. 3 is a schematic view showing a chip attaching process of a conventional flip chip ball grid array package, and FIG. 4 is a cross-sectional view taken along line A-A of FIG.

In order to improve unit productivity, the flip chip ball grid array package or the like uses a strip substrate (a substrate in which semiconductor packaging regions are arranged in a matrix array in the horizontal and vertical directions).

First, the wafer is sown into individual semiconductor chips.

At this time, a plurality of bonding pads are formed at one pitch on the one surface of the semiconductor chip 10 in order to input and output electrical signals. The conductive bumps 12, which are flip chips, are bonded to the bonding pads by conventional bumping or plating processes. And are formed integrally with each other at a fine pitch.

Usually, the conductive bump 12 is formed of a columnar cooper filler and a solder that is integrally plated on the lower end of the cappa filler.

Then, the semiconductor chip 10 is attached in a conductive manner to a chip attachment region formed in each semiconductor packaging region of the strip substrate 20.

That is, the conductive bumps 12 formed on the bonding pads of the semiconductor chip 10 are fused to the conductive patterns of the strip substrate 20 using a laser assist bonding (LAB) process, The attachment of the semiconductor chip 10 to the semiconductor chip 10 is performed.

3, the laser beam irradiator 30 of the laser assist bonding apparatus is mounted on the semiconductor chip 10 (see FIG. 3) with the semiconductor chip 10 stacked on each semiconductor packaging area of the strip substrate 20, The conductive bump 12 formed on the bonding pad of the semiconductor chip 10 is fused to the conductive pattern of the strip substrate 20 while being melted by the heat generated by the laser beam .

The reason why the laser beam is irradiated only on the semiconductor chip is that the material of the solder resist coated on the surface of the substrate is a polymer having a low bonding energy and is a semiconductor chip material Since it generates heat higher than a silicon wafer (Si wafer), it can be easily damaged by a laser beam.

Thereafter, the semiconductor chip 10 is sealed with a molding compound resin (not shown) by a conventional molding process, a solder ball is fused to the bottom surface of the substrate, and the strip substrate is sown Thereby completing the individual semiconductor packages.

However, the conventional flip chip package manufacturing method has the following problems.

In the laser assist bonding process, since the laser beam irradiator of the laser assist bonding device irradiates the laser beam for each semiconductor chip mounted on the strip substrate, the laser beam assist bonding process takes a very long time, There is a problem that the unit productivity is greatly reduced.

In other words, no matter how fast the laser assist bonding speed is, there is a limit to the productivity of the laser assist bonding process, since laser beams are individually irradiated to each semiconductor chip.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a laser beam shielding method for a semiconductor chip, So that the laser beam can be irradiated to the entire semiconductor chip mounted on each semiconductor chip mounting region of the strip substrate, and a method of attaching the semiconductor chip using the same. It has its purpose.

According to an aspect of the present invention, there is provided a laser beam shielding jig including: a strip substrate; A laser beam irradiator having a structure for simultaneously irradiating a semiconductor chip attached to each of the semiconductor chip attachment regions with a laser beam; And a laser beam shielding jig for shielding the laser beam transmitted from the laser beam irradiator to the strip substrate.

Preferably, the laser beam blocking jig has a lattice structure in which a horizontal bar and a vertical bar intersect at right angles.

Particularly, the laser beam shielding jig is made of a material having a low light transmittance and then coated with a material having a low thermal conductivity.

According to another aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor chip mounted on a strip substrate;

Placing a laser beam shielding jig over a region of the strip substrate except for each semiconductor chip attachment region;

Irradiating a laser beam onto a laser beam shielding jig seated in an area except for the semiconductor chip mounted on each semiconductor chip mounting area and each semiconductor chip mounting area; Shielding the laser beam transmitted to the strip substrate from the laser beam blocking jig and fusing the conductive bump formed on the semiconductor chip to the strip substrate while dissolving the heat by the laser beam; And a semiconductor chip mounting method using the jig for semiconductor package manufacture.

In another embodiment of the present invention, the laser beam blocking jig is made of a material having a low light transmittance and then coated with a material having a low thermal conductivity to block transmission of the laser beam to the strip substrate, And the heat conduction by the heat source is interrupted.

Through the above-mentioned means for solving the problems, the present invention provides the following effects.

First, a semiconductor chip is placed on each semiconductor chip mounting region of a strip substrate, and a laser beam is simultaneously irradiated to each of the semiconductor chips and the laser beam blocking jig in a state where the laser beam blocking jig is placed over the remaining region except for the region where the semiconductor chip is mounted. The entire semiconductor chip can be fused to the strip substrate all at once, and thus the unit productivity of the process of attaching the semiconductor chip can be greatly improved.

Secondly, by blocking the laser beam transmitted to the strip substrate from the laser beam blocking jig, it is possible to easily prevent the surface of the strip substrate from being damaged by the heat caused by the laser beam.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing a jig for manufacturing a semiconductor package and a method of attaching a semiconductor chip using the same according to the present invention;
Fig. 2 is a cross-sectional view taken along line BB in Fig. 1,
3 is a schematic view showing a conventional method of attaching a semiconductor chip,
4 is a cross-sectional view taken along line AA of Fig.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic view showing a jig for manufacturing a semiconductor package and a method of attaching a semiconductor chip using the same according to the present invention, and FIG. 2 is a cross-sectional view taken along the line B-B in FIG.

In Figs. 1 and 2, reference numeral 20 denotes a strip substrate.

The strip substrate 20 refers to a substrate in which semiconductor packaging regions including a semiconductor chip mounting region are arranged in a matrix array in the lateral and longitudinal directions to improve the unit productivity of the semiconductor package.

When a semiconductor chip is attached to each semiconductor chip attachment region of the strip substrate 20 by using a laser assist bonding (LAB) process, the laser beam should not touch the strip substrate other than the semiconductor chip, A solder resist material coated on the surface of a strip substrate is a polymer having a low bonding energy and has higher heat than a silicon wafer of a semiconductor chip due to the light energy of the laser beam So that it can be easily damaged by the laser beam.

In consideration of this point, the laser beam shielding jig 22 is mounted on the strip substrate 20 so as to be positioned over a region except for each semiconductor chip attachment region.

The laser beam shielding jig 22 has a lattice structure in which the lateral bars and the vertical bars are vertically crossed, since the remaining regions except the respective semiconductor chip mounting regions are crossed in the lateral and longitudinal directions about the semiconductor chip mounting region .

In particular, the laser beam blocking jig 22 is formed of a metal or plastic film having a low light transmittance such as a laser beam, and then the surface thereof is coated with a material having low thermal conductivity such as ceramic.

In order to attach the semiconductor chip 10 to the strip substrate 20, the laser beam irradiator 30, which irradiates the semiconductor chip with a laser beam, And a structure for irradiating the beam.

That is, the laser beam irradiator 30 has a structure in which the irradiation range of the laser beam is adjusted according to the size of the entire strip substrate, so that not only the semiconductor chips attached to the respective semiconductor chip attachment regions of the strip substrate, And the laser beam is irradiated over the laser beam blocking jig that is seated in the excluded region.

Hereinafter, a method of attaching a semiconductor chip using the jig device of the present invention having the above-described structure will be described.

First, the semiconductor chip 10 is placed on each semiconductor chip attachment region of the strip substrate 20.

Of course, although not shown, the conductive bumps formed on the bonding pads of the semiconductor chip 10 are raised to match the conductive patterns formed on the respective semiconductor chip mounting regions of the strip substrate 20.

Next, the laser beam shielding jig 22 is seated on the strip substrate 20 over the remaining area except the area where the semiconductor chips are mounted.

Therefore, when the strip substrate 20 is viewed from above, the entire surface of the strip substrate except the semiconductor chip is covered by the laser beam blocking jig 22.

The conductive bumps 12 formed on the bonding pads of the semiconductor chip 10 are fused to the conductive patterns of the strip substrate 20 using a laser assist bonding (LAB) process.

As described above, the laser beam irradiator 30 used in the laser assist bonding process has a structure in which the irradiation range of the laser beam is adjusted to the entire strip substrate size.

Therefore, the laser beam irradiating body 30 has not only the semiconductor chip 10 attached to each semiconductor chip mounting region of the strip substrate 20 but also the laser beam blocking jig 22 mounted on the remaining region except for the semiconductor chip mounting region, The laser beam is simultaneously irradiated onto the surface of the substrate.

At this time, the laser beam transmitted to the strip substrate 20 is blocked by the laser beam blocking jig 22, and at the same time, the laser beam is irradiated on the surface of the semiconductor chip 10, The conductive bump 12 formed is melted and easily fused to the conductive pattern of the strip substrate 20. [

More specifically, since the laser beam blocking jig 22 is made of a material having a low light transmittance and then coated with a material having a low thermal conductivity, it is possible to prevent the laser beam from being transmitted to the strip substrate 20 At the same time, heat generated by the laser beam is prevented from being conducted to the strip substrate 20.

As described above, the semiconductor chips can be fused to the respective semiconductor chip attachment regions of the strip substrate at the same time, thereby greatly improving the unit productivity of the process of attaching the semiconductor chips. Further, the laser beam transmitted to the strip substrate, It is possible to easily prevent the surface of the strip substrate from being damaged by heat generated by the laser beam.

10: Semiconductor chip
12: Conductive bump
20: strip substrate
22: laser beam blocking jig
30: Laser beam irradiation body

Claims (5)

A laser beam shielding jig having a shape that is seated in a region except a region where the semiconductor chips are mounted on the strip substrate;
A laser beam irradiator having a structure for simultaneously irradiating a semiconductor chip attached to each of the semiconductor chip attachment regions with a laser beam;
Respectively,
Wherein a laser beam transmitted from the laser beam irradiator to a strip substrate is blocked by a laser beam blocking jig.
The method according to claim 1,
Wherein the laser beam shielding jig has a lattice structure in which a horizontal bar and a vertical bar are vertically crossed.
The method according to claim 1,
Wherein the laser beam shielding jig is made of a material having a low light transmittance and then coated with a material having a low thermal conductivity.
Placing a semiconductor chip on each semiconductor chip attachment region of the strip substrate;
Placing a laser beam shielding jig over a region of the strip substrate except for each semiconductor chip attachment region;
Irradiating a laser beam onto a laser beam shielding jig seated in an area except for the semiconductor chip mounted on each semiconductor chip mounting area and each semiconductor chip mounting area;
Shielding the laser beam transmitted to the strip substrate from the laser beam blocking jig and fusing the conductive bump formed on the semiconductor chip to the strip substrate while dissolving the heat by the laser beam;
Wherein the semiconductor chip is attached to the semiconductor chip.
The method of claim 4,
The laser beam blocking jig is made of a material having a low light transmittance and then coated with a material having a low thermal conductivity so as to block transmission of the laser beam to the strip substrate and to block heat conduction due to the laser beam Wherein the semiconductor chip is attached to the semiconductor chip.
KR1020150155662A 2015-11-06 2015-11-06 Jig for manufacturing semiconductor package and method for attaching chip using the same KR20170053320A (en)

Priority Applications (1)

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KR1020150155662A KR20170053320A (en) 2015-11-06 2015-11-06 Jig for manufacturing semiconductor package and method for attaching chip using the same

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10410990B2 (en) 2017-09-29 2019-09-10 Samsung Electronics Co., Ltd. Jig for bonding a semiconductor chip, apparatus for bonding a semiconductor chip including the jig, and method of bonding a semiconductor chip using the apparatus
KR20190132712A (en) 2018-05-21 2019-11-29 서울과학기술대학교 산학협력단 Deposition device depositing atomic layer
KR20200113182A (en) 2018-05-21 2020-10-06 서울과학기술대학교 산학협력단 Deposition device depositing atomic layer
KR20230087223A (en) 2021-12-09 2023-06-16 최인성 Apparatus for providing degree of congestion of marine leisure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10410990B2 (en) 2017-09-29 2019-09-10 Samsung Electronics Co., Ltd. Jig for bonding a semiconductor chip, apparatus for bonding a semiconductor chip including the jig, and method of bonding a semiconductor chip using the apparatus
KR20190132712A (en) 2018-05-21 2019-11-29 서울과학기술대학교 산학협력단 Deposition device depositing atomic layer
KR20200113182A (en) 2018-05-21 2020-10-06 서울과학기술대학교 산학협력단 Deposition device depositing atomic layer
KR20230087223A (en) 2021-12-09 2023-06-16 최인성 Apparatus for providing degree of congestion of marine leisure

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