KR20170015609A - Multi-stage Chopping Method for a High Gain and Area Compact and ROIC using the same - Google Patents

Multi-stage Chopping Method for a High Gain and Area Compact and ROIC using the same Download PDF

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Publication number
KR20170015609A
KR20170015609A KR1020150107274A KR20150107274A KR20170015609A KR 20170015609 A KR20170015609 A KR 20170015609A KR 1020150107274 A KR1020150107274 A KR 1020150107274A KR 20150107274 A KR20150107274 A KR 20150107274A KR 20170015609 A KR20170015609 A KR 20170015609A
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KR
South Korea
Prior art keywords
amplifier
chopper
chopping
roic
present
Prior art date
Application number
KR1020150107274A
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Korean (ko)
Inventor
김기진
박상훈
안광호
Original Assignee
전자부품연구원
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Priority to KR1020150107274A priority Critical patent/KR20170015609A/en
Publication of KR20170015609A publication Critical patent/KR20170015609A/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45479Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45632Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
    • H03F3/45744Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction
    • H03F3/45775Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction by using cross switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/331Sigma delta modulation being used in an amplifying circuit

Abstract

Provided are a multi-stage chopping method for high gain and minimization, and an ROIC using applying the same. According to an embodiment of the present invention, the ROIC includes a first chopper disposed on the input end of a first amplifier, and a second chopper disposed on the output end of a second amplifier. There is no chopper on the output end of the first amplifier and the input end of the second amplifier. Thereby, the present invention can be implemented in a pair of configurations regardless of the detailed contents of a multi-stage configuration, thereby simplifying the system.

Description

[0001] The present invention relates to a multi-stage chopping method for high gain miniaturization and a multi-stage chopping method using the same,

The present invention relates to a chopping technique, and more particularly, to a multi-step chopping technique for high gain miniaturization of a read-out integrated circuit (ROIC) circuit for measuring bio-signals.

Conventional chopping technology focuses on low-noise circuit design only. In other words, the existing chopping technique is only for the purpose of pursuing low noise by applying to a given single block.

However, there is a limit to the gain that can be obtained with a single amplifier, and when the circuit is constituted by multiple shunts, the increase of the digital noise due to the increased chopper noise can not be avoided.

In addition, in the case of a multi-stage circuit, there is a need for finding a way to downsize the entire circuit.

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above problems, and it is an object of the present invention to expand the chopping technology from a unit block to a system configuration, and to simplify and miniaturize the entire system by simplifying the chopping technique.

According to an aspect of the present invention, there is provided a read-out integrated circuit (ROIC) including: a first chopper provided at an input terminal of the first amplifier; And a second chopper provided at an output terminal of the second amplifier, wherein the output terminal of the first amplifier has no chopper.

The chopper may be absent from the input terminal of the second amplifier.

Further, the read-out integrated circuit (ROIC) according to an embodiment of the present invention further includes a buffer provided between an output terminal of the first amplifier and an input terminal of the second amplifier

The output terminal of the first amplifier and the input terminal of the second amplifier may not be connected through a capacitor.

According to an embodiment of the present invention, a capacitor pair provided at an input terminal of the first amplifier may be further included.

According to another aspect of the present invention, there is provided a signal chopping method including: chopping an input signal by a first chopper provided at an input terminal of a first amplifier; The first amplifier amplifying the chopped input signal; The second amplifier amplifying the output signal of the first amplifier; And chopping a signal amplified by the second amplifier by a second chopper provided at an output terminal of the second amplifier.

As described above, according to the embodiments of the present invention, the number of choppers can be implemented in a pair of configurations regardless of the details of the multi-stage configuration, and the system can be simplified.

Also, according to embodiments of the present invention, the number of signal lines for dividing the chopping clock by the number of the reduced choppers is reduced, and the digital noise due to the chopping clock is significantly reduced.

In addition, according to the embodiments of the present invention, since the bio-signal detected after the first chopper moves to the high-frequency band, the phenomenon that the signal-to-noise ratio in the low-frequency band with a large circuit noise is lowered is eliminated.

In addition, according to embodiments of the present invention, a coupling capacitor for effective transmission of a biological signal can be reduced only in the first stage, thereby reducing the entire chip area as much as the capacitor reduced.

1 is a block diagram of a unit chopping circuit block,
Fig. 2 is a graph showing changes in the frequency domain of a bio-signal by the chopping technique,
FIG. 3 is a diagram provided for explanation of a chopping technique according to an embodiment of the present invention.

Hereinafter, the present invention will be described in detail with reference to the drawings.

1 is a diagram showing a unit chopping circuit block. FIG. 2 shows changes in the frequency domain of the bio-signal by the chopping circuit block shown in FIG.

Referring to FIG. 2, when the bio-signal near the DC passes through the first chopper, a frequency change occurs from DC to a clock frequency (f CLK ). When the bio-signal passes through the second chopper, it changes to DC.

The corresponding signal appears in the harmonic component of a multiple of the clock frequency (f CLK ), but the size of the harmonic component is relatively small and can mostly be removed by the rear-end filter.

As described above, the chopping technique is focused on low noise of the block like a unit amplifier, and when the stage is passed, the bio-signal is moved to the low-frequency band again in the next stage.

Therefore, when additional blocks are connected, a decrease in the signal-to-noise ratio due to the additional block is expected. If the chopping technique is not added to the second stage, there is no need for a series connected capacitor to increase the chip area, but the low-frequency noise of the second stage may be added to significantly degrade the signal-to-noise ratio.

In order to prevent this, the same chopping method as the first stage and the capacitor connected in series are used in the second stage. In this case, there is a possibility that the added digital chopping of the chopping clock by the added chopper is added, There is room for increase.

Since the signal processing of a low frequency band (0.1 to 300 Hz) is important for a read-out integrated circuit (ROIC) for detecting a living body signal, the required capacitance of the capacitor is about several hundreds to several thousands pF, The increase in chip size may lead to lower price competitiveness of the chip.

3 is a diagram illustrating a ROIC to which a multi-step chopping technique according to an embodiment of the present invention is applied. The ROIC according to the embodiment of the present invention is a bio-signal analog signal processing circuit, and a multi-stage chopping technique for low noise, high gain miniaturization is applied.

Specifically, the ROIC according to the embodiment of the present invention is based on a multi-stage amplifier for stable realization of high gain, and is implemented such that the chopping technique is applied to the entire system instead of the stage.

That is, in the ROIC according to the embodiment of the present invention, the chopping technique using a pair of choppers for each block is extended to the entire system, thereby realizing a low noise high gain amplifier more stably.

In order to smoothly detect a living body signal existing in a low frequency band (0.1 to 300 Hz), a very large series-connected capacitor (several hundred to several thousand pF) was required for each unit block.

However, in the ROIC according to the embodiment of the present invention, the sleep noise is realized through a pair of choppers as a whole, so that a capacitor connected in series between each unit block is not required any more. Thus, the chip area can be greatly reduced.

3, the ROIC according to the embodiment of the present invention includes a chopper-1 110-1, an amplifier-1 120-1, a buffer 130, an amplifier-2 120-2, 2 (110-2).

The ROIC according to the embodiment of the present invention is a multi-stage amplifier composed of a pair of amplifiers 120-1 and 120-2 connected in series. That is, the amplifier-2 120-2 is connected in series to the output terminal side of the amplifier-1 120-1.

The amplifiers 120-1 and 120-2 have an input terminal and an output terminal formed in pairs, and an RC filter is provided at each of the input terminal and the output terminal.

Also, in the ROIC according to the embodiment of the present invention, a pair of amplifiers 120-1 and 120-2 is applied to the entire system. That is, the chopper-1 110-1 for chopping the input signal of the amplifier-1 120-1 is provided at the input terminal of the amplifier-1 120-1, 2 110-2 for chopping the output signal of the amplifier-2 120-2.

On the other hand, the chopper is not provided at the output terminal of the amplifier-1 120-1 and the input terminal of the amplifier-2 120-2. That is, no chopper is provided between the output terminal of the amplifier-1 120-1 and the input terminal of the amplifier-2 120-2.

Instead, a buffer 130 is provided between the output terminal of the amplifier-1 120-1 and the input terminal of the amplifier-2 120-2. The buffer 130 may be implemented as transistors without passive elements.

The output terminal of the amplifier-1 120-1 and the input terminal of the amplifier-2 120-2 are not connected through a capacitor, but are connected through a buffer 130. [ On the other hand, a capacitor is connected in series to the input terminal of the amplifier -1 (120-1).

In the ROIC according to the embodiment of the present invention, the input bio-signal is frequency shifted to the high frequency band through the chopper-1 110-1 and is frequency-converted into the low frequency band through the chopper- So that it remains in the high frequency band.

Therefore, a capacitor having a very large capacitance value for forming a filter characteristic of a low-frequency band is not required, and a passive element value required for processing a living body signal existing in a high-frequency band is also small, A small passive element value and thus a miniaturization of the integrated circuit becomes possible.

In the embodiment of the present invention, a two-stage amplification is assumed, but this is merely an example. It goes without saying that the technical idea of the present invention can also be applied to amplification of three or more stages.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the present invention.

110-1,110-2: Chopper
120-1, 120-2: Amplifier
130: buffer

Claims (6)

A first chopper provided at an input terminal of the first amplifier; And
And a second chopper provided at an output terminal of the second amplifier,
And an output terminal of the first amplifier is not provided with a chopper.
The method according to claim 1,
And the chopper is not provided at an input terminal of the second amplifier.
The method according to claim 1,
And a buffer provided between an output terminal of the first amplifier and an input terminal of the second amplifier.
The method of claim 3,
An output terminal of the first amplifier and an input terminal of the second amplifier,
And is not connected through a capacitor.
The method of claim 4,
And a capacitor pair provided at an input terminal of the first amplifier.
The first chopper provided at the input of the first amplifier chopping the input signal;
The first amplifier amplifying the chopped input signal;
The second amplifier amplifying the output signal of the first amplifier; And
And chopping a signal amplified by the second amplifier by a second chopper provided at an output terminal of the second amplifier.
KR1020150107274A 2015-07-29 2015-07-29 Multi-stage Chopping Method for a High Gain and Area Compact and ROIC using the same KR20170015609A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020150107274A KR20170015609A (en) 2015-07-29 2015-07-29 Multi-stage Chopping Method for a High Gain and Area Compact and ROIC using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020150107274A KR20170015609A (en) 2015-07-29 2015-07-29 Multi-stage Chopping Method for a High Gain and Area Compact and ROIC using the same

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KR20170015609A true KR20170015609A (en) 2017-02-09

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110492887A (en) * 2019-08-20 2019-11-22 深圳市锐能微科技有限公司 Analog-digital converter circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110492887A (en) * 2019-08-20 2019-11-22 深圳市锐能微科技有限公司 Analog-digital converter circuit

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