KR20170014345A - Power semiconductor module and power semiconductor device - Google Patents

Power semiconductor module and power semiconductor device Download PDF

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Publication number
KR20170014345A
KR20170014345A KR1020150107509A KR20150107509A KR20170014345A KR 20170014345 A KR20170014345 A KR 20170014345A KR 1020150107509 A KR1020150107509 A KR 1020150107509A KR 20150107509 A KR20150107509 A KR 20150107509A KR 20170014345 A KR20170014345 A KR 20170014345A
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KR
South Korea
Prior art keywords
electrode
power semiconductor
common electrode
chip
disposed
Prior art date
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KR1020150107509A
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Korean (ko)
Inventor
박유철
Original Assignee
엘에스산전 주식회사
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Priority to KR1020150107509A priority Critical patent/KR20170014345A/en
Publication of KR20170014345A publication Critical patent/KR20170014345A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736—Metallic materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4332—Bellows

Abstract

The power semiconductor module includes a common electrode disposed in the case, a tube disposed on the common electrode and filled with a cooling medium, a first chip disposed on the common electrode, and a first electrode disposed on the first chip .

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a power semiconductor module,

The present invention relates to a power semiconductor module and a power semiconductor device.

Power semiconductor modules are power modules used in inverters, converters, uninterruptible power supplies, motor control, switching, and power supplies.

Generally, in the fabrication of a power semiconductor module composed of an IGBT, a power MOSFET, or a bipolar transistor, a transistor device is bonded to a direct bonded copper (DBC) substrate using a solder, a wire is connected to a direct bonded copper substrate, and a DBC substrate is bonded to the base substrate using solder.

Therefore, in the conventional power semiconductor module, heat generated from the transistor element must pass through a plurality of layers in order for the heat to be emitted through the base substrate.

Further, in the conventional power semiconductor module, since a wire is used, a loss due to wire resistance is generated.

In addition, in the conventional power semiconductor module, the chip design is not easy, and the process is complicated, resulting in a problem that the product cost increases.

The present invention is directed to solving the above-mentioned problems and other problems.

Another object of the present invention is to provide a power semiconductor module and a power semiconductor device capable of improving heat dissipation performance.

It is still another object of the present invention to provide a power semiconductor device which can easily connect the power semiconductor modules of a single product and can simplify the chip design and simplify the process.

According to an aspect of the present invention, there is provided a power semiconductor module including: a case; A common electrode disposed in the case; A tube disposed on the common electrode and filled with a cooling medium; A first chip disposed on the common electrode; And a first electrode disposed on the first chip.

According to another aspect of the present invention, a power semiconductor device includes: a plurality of power semiconductor modules; First and second electrode bars for connecting the first electrodes of the power semiconductor modules to each other; And pins for fastening common electrodes of the power semiconductor modules to each other. The power semiconductor module includes: a case; The common electrode disposed in the case; A tube disposed on the common electrode and filled with a cooling medium; A first chip disposed on the common electrode; And the first electrode disposed on the first chip.

The effect of the terminal according to the present invention is as follows.

According to at least one of the embodiments of the present invention, since the first and / or second chips are attached to the common electrode by solder, there is no layer other than solder between the first and / or second chip and the common electrode The heat of the first and / or the second chip can be immediately transferred to the common electrode and released. In particular, a tube filled with a cooling medium in the common electrode may be provided to further accelerate heat emission. Therefore, since the heat generated in the chip is emitted to the outside in real time, the heat radiation performance can be remarkably improved.

In addition, according to at least one embodiment of the present invention, since the first and second chips of each power module can be connected in parallel by simply using pins or electrode bars, assembly of the product and chip design are easy, You can quickly respond to specifications.

Further scope of applicability of the present invention will become apparent from the following detailed description. It should be understood, however, that the detailed description and specific examples, such as the preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art.

1 is a view showing a power semiconductor module according to the present invention.
2 is a cross-sectional view illustrating a power semiconductor module according to a first embodiment of the present invention.
3 is a plan view showing a power semiconductor module according to a first embodiment of the present invention.
4 is a side view showing a power semiconductor module according to a first embodiment of the present invention.
5 is a view showing a state in which a plurality of power semiconductor modules according to the first embodiment of the present invention are fastened to each other.
6 is a plan view showing a power semiconductor device with a plurality of power semiconductor modules according to a first embodiment of the present invention.
7 is a cross-sectional view illustrating a power semiconductor module according to a second embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, wherein like reference numerals are used to designate identical or similar elements, and redundant description thereof will be omitted. The suffix "module" and " part "for the components used in the following description are given or mixed in consideration of ease of specification, and do not have their own meaning or role. In the following description of the embodiments of the present invention, a detailed description of related arts will be omitted when it is determined that the gist of the embodiments disclosed herein may be blurred. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. , ≪ / RTI > equivalents, and alternatives.

1 is a view showing a power semiconductor module according to the present invention.

Referring to FIG. 1, the power semiconductor module 10 according to the present invention includes a case 12 having a hexahedral shape, and holes 15, 30, and 32 may be formed on each surface.

For example, an upper hole 15 may be formed in the upper surface of the case 12 and the first electrode 14, and a lower hole (not shown) may be formed in the lower surface of the case 12 and the second electrode have. The first hole 30 and the second hole 32 may be formed on the side surface of the case 12 and the side surface of the common electrode (not shown). For example, the first holes 30 may be formed on both sides opposite to each other along the y-axis direction, and the second holes 32 may be formed on both sides facing each other along the x-axis direction.

Although two first holes 30 are shown in the drawing, the present invention is not limited thereto.

The first electrode 14 is disposed on the upper surface of the case 12, and the upper surface of the first electrode 14 can be exposed. In this case, the upper hole 15 may be formed through the first electrode 14 and the case 12 disposed below the first electrode.

The second electrode 34 is disposed on the lower surface of the case 12, and the lower surface of the second electrode can be exposed. In this case, the lower hole 35 may be formed through the case 12 disposed above the second electrode and the second electrode.

The first and second holes 30 and 32 may be formed through the side surface of the case 12 and inside the common electrode. The common electrode serves as a heat dissipation electrode and can serve to dissipate heat. A tube (26) is disposed in the common electrode, and the cooling medium can be filled in the tube (26). For example, the cooling medium may be air or refrigerant, but this is not limiting. The tube 26 can extend from the common electrode and penetrate the side of the case 12. [ The common electrode will be described later in detail.

A chip (not shown), which is a semiconductor element connected in series along the vertical direction with respect to the common electrode, may be provided in the case 12. For example, the first chip may be connected between the first electrode 14 and the common electrode, and the second chip may be connected between the common electrode and the second electrode. The semiconductor device may be a transistor, but is not limited thereto.

According to the present invention, heat generated in the chip can be emitted by the cooling medium of the tube 26 via a common electrode connected to the chip. Specifically, since the first and / or second chips are attached to the common electrode by solder, there is no layer other than solder between the first and / or second chip and the common electrode, so that the first and / And the transferred heat can be discharged to the outside by the cooling medium. Therefore, since the heat generated in the chip is emitted to the outside in real time, the heat radiation performance can be remarkably improved.

FIGS. 2 to 4 illustrate a power semiconductor module having at least two chips connected in series with each other.

FIG. 2 is a cross-sectional view illustrating a power semiconductor module according to a first embodiment of the present invention, FIG. 3 is a plan view illustrating a power semiconductor module according to a first embodiment of the present invention, FIG. 1 is a side view showing a power semiconductor module according to a first embodiment;

Referring to FIGS. 2 to 4, the common electrode 24 may be provided in the case 12. The common electrode 24 may be fixed directly to the case 12 or fixed to the case 12 using fixing means such as bolts.

The common electrode 24 may have a rectangular plate shape. The thickness of the common electrode 24 may be approximately 1 cm, but the thickness is not limited thereto.

The common electrode 24 may be formed of, for example, copper (Cu), but it is not limited thereto.

A hole penetrating the common electrode 24 is formed in the common electrode 24 along the y-axis direction, and the tube 26 may be provided in the hole. As described above, the tube 26 can extend from the inside of the common electrode 24 and penetrate through the case 12. [ For example, the common electrode of the first power semiconductor module and the tube 26 penetrating the case can penetrate the case and the common electrode of the adjacent second power semiconductor module. The common electrode 24 is provided in each power semiconductor module 10 while the tube 26 is arranged to penetrate the common electrode 24 of each power semiconductor module 10.

An insulating film 28 may be formed between the tube 26 and the common electrode 24 to insulate the tube 26 from the common electrode 24 when the tube 26 is formed of a material having electric conductivity have. The insulating film 28 may be made of, for example, an epoxy material, but is not limited thereto.

If the tube 26 is formed of an insulating material, the tube 26 may be installed so as to directly contact the common electrode 24.

The common electrode 24 may include a first hole 30 formed on one side or both sides of the tube 26 along the y axis direction and a second hole 32 formed along the x axis direction.

A hole is also formed in the side surface of the case 12 corresponding to the first hole 30 of the common electrode 24 and a hole is formed in the side surface of the case 12 corresponding to the second hole 32 of the common electrode 24. [ Can be formed.

The first chip 20 is attached to the upper surface of the common electrode 24 using the solder 22 and the second chip 40 is attached to the lower surface of the common electrode 24 using the solder 42 have. The first and second chips 20 and 40 may be transistors, but are not limited thereto. Each of the first and second chips 20, 40 may be attached on the common electrode 24 on which the tube 26 is disposed.

The first electrode 14 may be attached to the first chip 20 using the solder 18 and the second electrode 34 may be attached to the second chip 40 using the solder 38. [ The first chip 20 may be electrically connected to the first electrode 14 and the common electrode 24 and the second chip 40 may be electrically connected to the common electrode 24 and the second electrode 34 .

Each of the first electrode 14 and the second electrode 34 may have a 'C' shape. For example, the first electrode 14 has first to third regions 14a, 14b, and 14c, and the first region 14a is formed by soldering the first or second chip 20, The second region 14b extends vertically from the end of the first region 14a and the third region 14c extends horizontally from the end of the second region 14b have. And the third region 14c may be exposed to the outside through the case 12. [

Similarly, the second electrode 34 may have the same shape as the first electrode 14, but this is not limited thereto.

The upper hole 15 may be formed not only in the third region 14c of the first electrode 14 but also in the case 12 located below the third region 14c. The lower hole 35 may be formed through the case 12 located on the third top of the second electrode 34 as well as the third region.

The first electrode 14 may be used as a heat dissipating member for discharging the heat of the first chip 20 to the outside and the second electrode 34 may be used as a heat dissipating member for discharging the heat of the second chip 40 to the outside. Can be used as a member.

The protective films 16 and 36 may be formed on the upper surface of the common electrode 24 and the lower surface of the common electrode 24. The protective films 16 and 36 cover the first and / or the second chip 20 and 40 as well as the first region 14a or the second region 34 of the first electrode 14, Can be covered. The protective films 16 and 36 can prevent the generation of sparks at a high voltage and prevent contamination of the first or second chips 20 and 40. The protective films 16 and 36 are formed of a material having high internal pressure and excellent insulation property, and may be formed of, for example, silicone gel, but the present invention is not limited thereto.

According to the present invention, since the first chip 20 is attached to the common electrode 24 having a heat-radiating function by using the solder 22, the heat of the first chip 20 is cooled through the common electrode 24 It can be rapidly discharged to the outside through the medium to improve the discharge performance. Likewise, since the second chip 40 is attached to the common electrode 24 by using the solder 42, the heat of the second chip 40 is rapidly discharged to the outside through the cooling medium via the common electrode 24 So that the discharge performance can be improved.

In addition, according to the present invention, since the single power semiconductor module 10 is provided with at least two (20, 40), the number of chips can be increased and the chip layout can be facilitated.

5 is a view showing a state in which a plurality of power semiconductor modules according to the first embodiment of the present invention are fastened to each other.

Referring to FIG. 5, the common electrodes 24 of the unit power semiconductor modules 10 shown in FIGS. 1 to 4 may be fastened to each other.

That is, the common electrodes 24 of the adjacent power semiconductor modules 10 can be fastened using the pins 44 and 46.

For example, the first power semiconductor module 10a and the second power semiconductor module 10b, which are disposed along the y-axis direction, can be fastened using the first pin 44. [ The first pin 44 is inserted into the first hole 30 through the case 12 of the first power semiconductor module 10a and connected to the common electrode 24 while the second power semiconductor module 10b And may be connected to the common electrode 24 by being inserted into the first hole 30.

For example, the first power semiconductor module 10a and the third power semiconductor module 10c, which are disposed along the x-axis direction, can be fastened using the second pin 46. [ The second pin 46 is connected to the common electrode 24 through the second hole 32 through the case 12 of the first power semiconductor module 10a while the third power semiconductor module 10c Through the second hole 32 and through the case 12 of the second electrode 32. [

The common electrode 24 may be an electrode commonly connected to the first and second chips 20 and 40.

Therefore, the common electrodes 24 of the power semiconductor modules 10a, 10b, 10c, and 10d can be electrically connected to each other through the first and second fins 44 and 46. [

6 is a plan view showing a power semiconductor device with a plurality of power semiconductor modules according to a first embodiment of the present invention.

Referring to FIG. 6, the first electrodes 14 and the second electrodes 34 of the unit power semiconductor modules 10 shown in FIGS. 1 to 4 may be fastened to each other.

That is, the first electrodes 14 of the adjacent power semiconductor modules 10 can be fastened along the x-axis direction and the y-axis direction using the first and second electrode bars 50 and 52. Similarly, the second electrodes 34 of the adjacent power semiconductor modules 10 can be fastened along the x-axis direction and the y-axis direction using the first and second electrode bars 50 and 52.

For example, the first electrodes 14 of the plurality of first power semiconductor modules 10e disposed along the y-axis direction may be electrically connected using the first electrode bar 50. [ Specifically, the first electrode bar 50 may be provided with holes corresponding to the upper holes 15 of the first power semiconductor modules 10e. Each electrode bolt 54 penetrates through the corresponding hole of the first electrode bar 50 and the upper hole 15 of the first electrodes 14 of the first power semiconductor modules 10e to be connected to the case 12, As shown in FIG. Therefore, the first electrodes 14 of the first power semiconductor modules 10e can be electrically connected to each other through the electrode bolts 54 and the first electrode bar 50. [

For example, the first electrodes 14 of the plurality of second power semiconductor modules 10f disposed along the x-axis direction may be electrically connected using the second electrode bar 52. [ Specifically, the first electrode bar 50 may be provided with holes corresponding to the upper holes 15 of the second power semiconductor modules 10f. Each of the electrode bolts 54 penetrates the corresponding hole of the second electrode bar 52 and the upper hole 15 of the first electrodes 14 of the second power semiconductor modules 10f, As shown in FIG. Therefore, the first electrodes 14 of the second power semiconductor modules 10f may be electrically connected to each other through the respective electrode bolts 54 and the second electrode bar 52. [

Preferably, the first electrode bar 50 is positioned on the first power semiconductor modules 10e and the second electrode bar 52 is placed on the second power semiconductor modules 10f, Each electrode bolt 54 may be fixed to the case 12 after passing through the hole of the second electrode bar 52 and the hole of the first electrode bar 50 and penetrating the first electrode 14. The first electrodes 14 of the first and second power semiconductor modules 10e and 10f can be electrically connected to each other by the electrode bolts 54 and the first and second electrode bars 52 . In this case, the first electrode bar 50 may be in contact with the upper surface of the first electrode 14, and the second electrode bar 52 may be in contact with the upper surface of the first electrode bar 50.

Likewise, the second electrode 34 of each power semiconductor module may also be electrically connected by the first and second electrode bars and respective bolts.

For example, the second electrodes 34 of the plurality of first power semiconductor modules arranged along the y-axis direction may be electrically connected using the first electrode bar. Specifically, the first electrode bar may be provided with holes corresponding to the upper holes 15 of the first power semiconductor modules. Therefore, each bolt can be fixed to the case 12 through the corresponding hole of the first electrode bar and the upper hole 15 of the second electrodes 34 of the first power semiconductor modules. Therefore, the second electrodes 34 of the respective first power semiconductor modules can be electrically connected to each other through the respective bolts and the first electrode bar.

For example, the second electrodes 34 of the plurality of second power semiconductor modules arranged along the x-axis direction may be electrically connected using the second electrode bar. Specifically, the first electrode bar may be provided with holes corresponding to the upper holes 15 of the respective second power semiconductor modules. Therefore, each bolt can be fixed to the case 12 through the corresponding hole of the second electrode bar and the upper hole 15 of the second electrodes 34 of the second power semiconductor modules. Therefore, the second electrodes 34 of each second power semiconductor module can be electrically connected to each other through the respective bolts and the second electrode bar.

Preferably, the first electrode bar is positioned on the first power semiconductor modules and the second electrode bar is positioned on the second power semiconductor modules, and then each bolt is positioned between the holes of the second electrode bar and the first electrode bar Through the hole of the first electrode 34 and through the second electrode 34, and then fixed to the case 12. Accordingly, the second electrodes 34 of the first and second power semiconductor modules can be electrically connected to each other by the respective bolts and the first and second electrode bars. In this case, the first electrode bar may be in contact with the lower surface of the second electrode 34, and the second electrode bar may be in contact with the lower surface of the first electrode bar.

The first and second electrode bars 50 and 52 disposed on the first electrode 14 are connected to the first electrode 14 so that the heat of the first chip 20 flows through the first electrode 14 To be discharged to the outside.

Similarly, since the first and second electrode bars disposed under the second electrode 34 are connected to the second electrode 34, the heat of the second chip 40 passes through the second electrode 34 to the outside It can be used as a heat dissipating member.

6, the tubes 26 provided in each power semiconductor module 10e are connected to each other, and adjacent power semiconductor modules located at the outermost portion are connected to each other using a separate tube 26 .

Accordingly, the tube 26 filled with the cooling medium can be arranged along the zigzag direction. For example, the tube 26 may be disposed along the y-axis direction, then along the? Y-axis direction, and then along the y-axis direction. The tubes 26 can be arranged in this manner. The cooling medium may be circulated along the direction in which the tube 26 is disposed. The heat generated from the first and / or second chips 20 and 40 provided in each power semiconductor module can be quickly discharged to the outside through the cooling medium filled in the tube 26 according to the circulation of the cooling medium.

As shown in Figs. 5 and 6, a power semiconductor device in which the first chip 20 and the second chip 40 of each power module are connected in parallel can be manufactured.

According to the present invention, since the first and second chips 20 and 40 of each power module can be connected in parallel by simply using pins or electrode bars, assembly of the product and chip design are easy, Can respond.

7 is a cross-sectional view illustrating a power semiconductor module according to a second embodiment of the present invention.

The second embodiment is similar to the first embodiment except that only one chip 20 is provided. In the second embodiment, constituent elements having the same function or shape as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

Referring to FIG. 7, in the power semiconductor module, the common electrode 24 may be disposed on the bottom surface of the case 12. The common electrode 24 may be fixed directly to the case 12 or fixed using bolt-like fastening means.

The common electrode 24 may have a function as an electrode and a function as a heat radiation member. The common electrode 24 may include a tube 26 filled with a cooling medium and first and second holes 30 and 32. For example, the first hole 30 is formed from the side surface of the common electrode 24 along the y-axis direction, and the second hole 32 is formed from the side surface of the common electrode 24 along the x- . The first hole 30 may be formed on both opposite sides of the common electrode 24 and the second hole 32 may be formed on both opposite sides of the common electrode 24. [

The first hole 30 may be a hole for electrically connecting and fixing adjacent power semiconductor modules disposed along the y-axis direction by using the first pin 44. The second holes 32 may be holes for electrically connecting and fixing the adjacent power semiconductor modules disposed along the x-axis direction by using the second pins 46.

The chip 20 may be attached to the common electrode 24 on which the tube 26 is disposed using the solder 22. [ An electrode can be attached on the chip 20 by using the solder 18. Accordingly, the chip 20 can be electrically connected to the common electrode 24 and the electrode.

Some of the electrodes may be disposed so as to be exposed to the outside through the case 12.

Unlike the first embodiment in which at least two chips 20 and 40 are provided, the power semiconductor module may have only one chip 20 as in the second embodiment.

The foregoing detailed description should not be construed in all aspects as limiting and should be considered illustrative. The scope of the present invention should be determined by rational interpretation of the appended claims, and all changes within the scope of equivalents of the present invention are included in the scope of the present invention.

10: Power semiconductor module
12: Case
14: first electrode
15: Upper hole
16, 36: Shield
18, 22, 38, 42: solder
20, 40: chip
24: common electrode
26: Tube
28: Insulating film
30: 1st hole
32: second hole
34: Second electrode
35: Lower hole
44: first pin
46: second pin
50: first electrode bar
52: second electrode bar
54: Electrode bolt

Claims (10)

case;
A common electrode disposed in the case;
A tube disposed on the common electrode and filled with a cooling medium;
A first chip disposed on the common electrode; And
And a first electrode disposed on the first chip. The method according to claim 1,
A second chip disposed under the common electrode; And
And a second electrode disposed under the second chip. 3. The method of claim 2,
And a part of each of the first and second electrodes is exposed to the outside through the case. 3. The method of claim 2,
A first protective film disposed on an upper surface of the common electrode and covering the first chip; And
And a second protective film disposed below the lower surface of the common electrode and covering the second chip. The method according to claim 1,
Wherein the common electrode comprises:
A first hole formed along the first direction; And
And a second hole formed along a second direction different from the first direction. A plurality of power semiconductor modules;
The power semiconductor module includes:
case;
A common electrode disposed in the case;
A tube disposed on the common electrode and filled with a cooling medium;
A first chip disposed on the common electrode; And
And a first electrode disposed on the first chip,
First and second electrode bars for coupling the first electrodes of the power semiconductor modules to each other; And
And a pin for fastening the common electrode of each power semiconductor module to each other. The method according to claim 6,
The power semiconductor module includes:
A second chip disposed under the common electrode; And
And a second electrode disposed under the second chip,
And third and fourth electrode bars for coupling the second electrodes of the power semiconductor modules to each other. 8. The method of claim 7,
Wherein the first electrode includes a first electrode hole,
Wherein the second electrode includes a second electrode hole,
Wherein the common electrode includes a common electrode hole,
Wherein a plurality of bolts pass through the first electrode holes of the first electrodes through the first and second electrode bars. 9. The method of claim 8,
And a plurality of bolts penetrate the third and fourth electrode bars to penetrate the second electrode holes of the second electrodes. 9. The method of claim 8,
And said pin is sandwiched between said common electrode holes of said common electrode of each power semiconductor module.
KR1020150107509A 2015-07-29 2015-07-29 Power semiconductor module and power semiconductor device KR20170014345A (en)

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KR1020150107509A KR20170014345A (en) 2015-07-29 2015-07-29 Power semiconductor module and power semiconductor device

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Application Number Priority Date Filing Date Title
KR1020150107509A KR20170014345A (en) 2015-07-29 2015-07-29 Power semiconductor module and power semiconductor device

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Publication Number Publication Date
KR20170014345A true KR20170014345A (en) 2017-02-08

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102297345B1 (en) 2020-04-24 2021-09-06 주식회사 디에이피 Method for producing pattern image for Printed Circuit Board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102297345B1 (en) 2020-04-24 2021-09-06 주식회사 디에이피 Method for producing pattern image for Printed Circuit Board

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