KR20170007630A - A Switching Circuit and a Switching Method of Common Mode Noise Reduction of Single Phase PWM Inverter - Google Patents
A Switching Circuit and a Switching Method of Common Mode Noise Reduction of Single Phase PWM Inverter Download PDFInfo
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- KR20170007630A KR20170007630A KR1020150098126A KR20150098126A KR20170007630A KR 20170007630 A KR20170007630 A KR 20170007630A KR 1020150098126 A KR1020150098126 A KR 1020150098126A KR 20150098126 A KR20150098126 A KR 20150098126A KR 20170007630 A KR20170007630 A KR 20170007630A
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- switch
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- pwm
- capacitor
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Inverter Devices (AREA)
Abstract
The present invention relates to a switching circuit and a switching method capable of reducing the common mode noise of a PWM single-phase inverter. A PWM single-phase inverter circuit associated with an example of the present invention includes a DC input power supply; A first switch whose one end is connected to the positive (+) voltage terminal of the DC input power supply; A second switch having one end connected to the other end of the first switch and the other end connected to a negative (-) voltage terminal of the DC input power supply; A third switch having one end connected to one end of the first switch; A fourth switch having one end connected to the other end of the third switch and the other end connected to the other end of the second switch; A PWM controller for controlling operations of the third switch and the fourth switch; An inductor having one end connected to the other end of the third switch and one end of the fourth switch; An output capacitor having one end connected to the other end of the inductor and the other end connected to the other end of the first switch and the one end of the second switch; An output unit for outputting a voltage across the capacitor; And a common capacitor connected between the other end of the fourth switch and the ground, wherein the other end of the output capacitor is connected to the ground and the first switch is opened to output a positive voltage to the output unit, The second switch is shorted and the PWM controller is short-circuited so as to complementarily switch the third switch and output a negative voltage to the output section, and the first switch is short- And the PWM controller is capable of complementarily switching the fourth switch.
Description
The present invention relates to a switching circuit and a switching method capable of reducing the common mode noise of a PWM single-phase inverter, and more particularly, to a switching circuit and a switching method capable of reducing a common mode noise of a PWM single-phase inverter, and a switching method and a switching method for reducing mode noise.
In an uninterruptible power supply (UPS) and an energy storage system (ESS: Energy Storage System ESS), a PWM single-phase inverter is used for AC power output.
The PWM single-phase inverter produces AC power through a full-bridge circuit. Unipolar PWM causes a potential difference between the input ground and the AC voltage neutral point, which causes Common Mode Noise .
Common Mode Noise not only generates EMI (Electro Magnetic Interference) but also affects the entire system, which causes measurement errors, leading to deterioration of the control system (prior art document [1]).
As a method for improving common mode voltage which is the cause of common mode noise, the prior art document [2] proposed a bidirectional switching method (bipolar PWM) for reducing leakage current in the conventional switching method (Unipolar PWM). However, the bipolar PWM method has a large switching loss and increases the voltage THD.
In order to solve this problem, the prior art document [3] proposed a method of reducing common mode noise by adding a reflux section switch in the existing full-bridge circuit and using a unipolar PWM method.
In order to solve this problem, the present invention proposes a switching circuit and a switching method capable of reducing common mode noise without adding a separate switch while maintaining the conventional switching method Unipolar PWM.
SUMMARY OF THE INVENTION It is an object of the present invention to provide a PWM single-phase inverter circuit for reducing common-mode noise generated in a conventional PWM single-phase inverter.
Specifically, it is an object of the present invention to provide a switching method capable of reducing common mode noise through a switching method of always fixing a neutral point (N) of a voltage to both ends of an input voltage.
Further, the leakage current flowing through the parasitic capacitor can be remarkably reduced, which is intended to provide the switching method of the PWM single-phase inverter to the user.
It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are not intended to limit the invention to the precise form disclosed. It can be understood.
The PWM single-phase inverter circuit according to an embodiment of the present invention for realizing the above-mentioned problems is characterized in that the PWM single-phase inverter circuit comprises a DC input power supply; A first switch whose one end is connected to the positive (+) voltage terminal of the DC input power supply; A second switch having one end connected to the other end of the first switch and the other end connected to a negative (-) voltage terminal of the DC input power supply; A third switch having one end connected to one end of the first switch; A fourth switch having one end connected to the other end of the third switch and the other end connected to the other end of the second switch; A PWM controller for controlling operations of the third switch and the fourth switch; An inductor having one end connected to the other end of the third switch and one end of the fourth switch; An output capacitor having one end connected to the other end of the inductor and the other end connected to the other end of the first switch and the one end of the second switch; An output unit for outputting a voltage across the capacitor; And a common capacitor connected between the other end of the fourth switch and the ground, wherein the other end of the output capacitor is connected to the ground and the first switch is opened to output a positive voltage to the output unit, The second switch is shorted and the PWM controller is short-circuited so as to complementarily switch the third switch and output a negative voltage to the output section, and the first switch is short- And the PWM controller is capable of complementarily switching the fourth switch.
The PWM controller according to
Further, when outputting a positive voltage to the output section, the PWM controller short-circuits the third switch when the power is supplied to the output section, opens the fourth switch, and, in the regenerative mode, Open the third switch and short the fourth switch, and when outputting a negative voltage to the output section, the PWM controller opens the third switch when power is supplied to the output section, shorts the fourth switch , The third switch is short-circuited in the regenerative mode, and the fourth switch can be opened.
The present invention can provide a user with a PWM single-phase inverter circuit for reducing common mode noise generated in a conventional PWM single-phase inverter.
Specifically, a switching method capable of reducing common mode noise can be provided to a user through a switching method of always fixing a neutral point (N) of a voltage to both ends of an input voltage.
In addition, the leakage current flowing through the parasitic capacitor can be remarkably reduced, which can be provided to the user of the switching method of the PWM single-phase inverter.
It should be understood, however, that the effects obtained by the present invention are not limited to the above-mentioned effects, and other effects not mentioned may be clearly understood by those skilled in the art to which the present invention belongs It will be possible.
BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate a preferred embodiment of the invention and, together with the description, serve to provide a further understanding of the technical idea of the invention, It should not be construed as limited.
1 is a circuit diagram showing a conventional single-phase full-bridge inverter circuit.
FIG. 2 shows a circuit structure in which a capacitor is connected between a heat sink and a switch at a first time in FIG. 1, and a structure in which a capacitor is connected between a second dead load and a ground in FIG.
FIG. 3A shows a current flow period in a positive voltage section in a conventional unipolar switching circuit of a PWM inverter, and FIG. 3B is a graph of a voltage of v inv and v com in the circuit of FIG.
FIG. 4A is a graph showing a current flow period during a negative voltage interval in a conventional unipolar switching circuit of a PWM inverter, and FIG. 4B is a graph illustrating a voltage of v inv and v com in the circuit of FIG. 4A.
FIG. 5A is a graph showing a current flow period in a positive voltage section in the unipolar switching circuit of the PWM inverter of the present invention, and FIG. 5B is a graph of voltages of v inv and v com in the circuit of FIG. 5A.
FIG. 6A is a graph showing a current flow period during a negative voltage interval in the Unipolar switching circuit of the PWM inverter of the present invention, and FIG. 6B is a graph of voltages of v inv and v com in the circuit of FIG. 6A.
FIG. 7A is a graph showing waveforms of various values measured using the Unipolar switching method of the conventional PWM inverter, and FIG. 7B is a graph showing waveforms of various values measured using the Unipolar switching method of the PWM inverter of the present invention .
Prior to describing the PWM switching circuit and the switching method of the present invention, the conventional Unipolar PWM switching circuit and switching method will be described.
Fig. 1 is a circuit diagram showing a conventional single-phase full bridge inverter circuit. Fig. 2 shows a circuit structure in which a capacitor is connected between a heat sink and a switch at a first time in Fig. 1, And the capacitor is connected.
As shown in FIG. 2, such a full bridge inverter has a parasitic capacitor component of a heatsink and a load, and a leakage current is generated due to a common mode voltage, resulting in EMI (Electro Magnetic Interference).
Such EMI causes measurement errors, which deteriorates the control system, so that the common mode voltage must be reduced.
FIG. 3A shows a current flow period in a positive voltage section in a conventional unipolar switching circuit of a PWM inverter, and FIG. 3B is a graph of a voltage of v inv and v com in the circuit of FIG.
4A is a graph showing a current flow period during a negative voltage interval in a conventional unipolar switching circuit of a PWM inverter, and FIG. 4B is a graph of a voltage of v inv and v com in the circuit of FIG. 4A.
Table 1 below shows the switching method of the conventional unipolar switching circuit of the PWM inverter.
As shown in Table 1, the unipolar switching method of the PWM inverter determines the switching pulse according to the state of the command voltage (V * out ), the power supply and the recovery state.
According to Table 1, S2 is always ON in the positive voltage interval in FIG. 3A, and PWM2 (20 kHz) switches S3 and S4 are complementarily operated so that the common mode voltage (hereinafter, vcom ) do.
In the negative voltage range, according to Table 1, S4 is always turned on during the negative voltage interval and the PWM1 (20kHz) switches S1 and S2 are complementarily switched to 20 (kHz).
As shown in Fig. 4a S1 ON when it is conductive and input supply Vdc v com there is caught the -Vdc. The switch S2 is shorted to the input power when the switch S2 is turned on, so that 0 V is applied to v com .
Therefore, the S1 and S2 operate complementarily in accordance with the PWM1 switching frequency (20kHz) v com voltage is changed according to the switching frequency, as shown in Figure 4b, the ground and neutral during S1 and the Dead Time interval of S2 becomes fully open.
During this period, a leak current flows to the load-side parasitic capacitor Ccom, causing noise to occur in the common mode voltage, which causes EMI generation (Prior art document [3]).
Hereinafter, the following switching circuit and switching method for suppressing common mode voltage noise will be described.
FIG. 5A is a graph showing a current flow period in a positive voltage section in the unipolar switching circuit of the PWM inverter of the present invention, and FIG. 5B is a graph of voltages of v inv and v com in the circuit of FIG. 5A.
6A is a graph showing a current flow period in a negative voltage range in the unipolar switching circuit of the PWM inverter of the present invention, and FIG. 6B is a graph of voltages of v inv and v com in the circuit of FIG. 6A.
Table 2 below shows the switching method of the conventional unipolar switching circuit of the PWM inverter.
In the proposed switching circuit, as shown in FIGS. 5A and 6A, the neutral point is always short-circuited to the input voltage regardless of the command voltage state.
As shown in Table 2, in the negative voltage range, S1 is always ON and the S3 and S4 are complementarily switched according to the PWM frequency (20 kHz). Also they are caught in the -Vdc S1 ON when v com in 6a, is to take the -Vdc S2 ON when v com in Figure 6a.
Accordingly, -Vdc is applied in the negative voltage interval regardless of the switching frequency, as shown in FIG. 6B, so that common mode noise occurring in the dead time of the switch is suppressed.
Hereinafter, FIG. 7A is a graph showing waveforms of various values measured using the Unipolar switching method of the conventional PWM inverter, and FIG. 7B is a graph showing waveforms of various values measured using the Unipolar switching method of the PWM inverter of the present invention. Graph.
Table 3 below is a table showing the parameters used in the experiment.
7A and 7B are waveform graphs obtained using Matlab Simulink.
Referring to FIG. 7A, it can be seen that noise is present in the output current of the negative voltage range due to the influence of Common Mode Noise in the conventional switching system.
However, in the switching method as shown in FIG. 7B, it is confirmed that the noise is reduced in the negative voltage section.
As described above, a new switching method for solving the common mode noise problem occurring between the ground and the neutral point in the single-phase inverter is proposed. The common mode noise generated by the load voltage and current is confirmed through experiments. The effect of the proposed switching method can be confirmed by confirming the common mode noise reduction effect appearing on the load side by using the proposed switching method.
The above-described switching circuit and switching method are not limited to the configuration and method of the embodiments described above, but the embodiments may be modified such that all or some of the embodiments are selectively combined .
Claims (4)
DC input power;
A first switch whose one end is connected to the positive (+) voltage terminal of the DC input power supply;
A second switch having one end connected to the other end of the first switch and the other end connected to a negative (-) voltage terminal of the DC input power supply;
A third switch having one end connected to one end of the first switch;
A fourth switch having one end connected to the other end of the third switch and the other end connected to the other end of the second switch;
A PWM controller for controlling operations of the third switch and the fourth switch;
An inductor having one end connected to the other end of the third switch and one end of the fourth switch;
An output capacitor having one end connected to the other end of the inductor and the other end connected to the other end of the first switch and the one end of the second switch;
An output unit for outputting a voltage across the capacitor; And
And a common capacitor connected between the other terminal of the fourth switch and the ground,
The other end of the output capacitor is connected to the ground,
In order to output a positive voltage to the output section,
The first switch is opened, the second switch is shorted,
Wherein the PWM controller is configured to complementarily switch the third switch,
In order to output a negative voltage to the output section,
The first switch is short-circuited, the second switch is opened,
And the PWM controller performs the complementary switching of the fourth switch.
When outputting a positive voltage to the output section,
Wherein the PWM controller comprises:
Shorting the third switch when power is supplied to the output unit, opening the fourth switch,
The third switch is opened in the regenerative mode,
When outputting a negative voltage to the output section,
Wherein the PWM controller comprises:
When the power is supplied to the output unit, the third switch is opened, the fourth switch is shorted,
And opens the fourth switch in the regenerative mode.
When outputting a positive voltage to the output section,
Wherein the PWM controller comprises:
Shorting the third switch when power is supplied to the output unit, opening the fourth switch,
The third switch is opened in the regenerative mode, the fourth switch is short-circuited,
When outputting a negative voltage to the output section,
Wherein the PWM controller comprises:
When the power is supplied to the output unit, the third switch is opened, the fourth switch is shorted,
And the third switch is short-circuited in the regenerative mode, and the fourth switch is opened.
Opening the first switch and shorting the second switch to output a positive voltage to the output section, the PWM controller complementarily switching the third switch; And
And shorting the first switch and opening the second switch in order to output a negative voltage to the output section, wherein the PWM controller performs complementary switching of the fourth switch Phase inverter circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020150098126A KR20170007630A (en) | 2015-07-10 | 2015-07-10 | A Switching Circuit and a Switching Method of Common Mode Noise Reduction of Single Phase PWM Inverter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020150098126A KR20170007630A (en) | 2015-07-10 | 2015-07-10 | A Switching Circuit and a Switching Method of Common Mode Noise Reduction of Single Phase PWM Inverter |
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| Publication Number | Publication Date |
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| KR20170007630A true KR20170007630A (en) | 2017-01-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR1020150098126A KR20170007630A (en) | 2015-07-10 | 2015-07-10 | A Switching Circuit and a Switching Method of Common Mode Noise Reduction of Single Phase PWM Inverter |
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| Country | Link |
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| KR (1) | KR20170007630A (en) |
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2015
- 2015-07-10 KR KR1020150098126A patent/KR20170007630A/en not_active Application Discontinuation
Non-Patent Citations (3)
| Title |
|---|
| [1] M. Cacciato, A. Consoli, G. Scarcella, and A. Testa, "Reduction of common mode currents in pwm inverter motor drives," IEEE IAS Annual Meeting, Vol. 1, pp. 707-713, 1997. |
| [2] Toshiji Kato, Kaoru Inoue and Koji Akimasa "EMI reduction method for a single-phase pwm Inverter by suppressing common-mode currents with complementary switching,"Power Electronics and Motion Control Conference, IEEE 2006. Vol. 3 pp. 1-5 |
| [3] A. Rao, "A modified single phase inverter topology with active common mode voltage cancellation," Proceedings of the IEEE, Vol. 1 No. 4, pp. 850-854, 1999. |
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