KR20160098040A - Image Pickup Device and Method of Manufacturing the Same - Google Patents
Image Pickup Device and Method of Manufacturing the Same Download PDFInfo
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- KR20160098040A KR20160098040A KR1020160010868A KR20160010868A KR20160098040A KR 20160098040 A KR20160098040 A KR 20160098040A KR 1020160010868 A KR1020160010868 A KR 1020160010868A KR 20160010868 A KR20160010868 A KR 20160010868A KR 20160098040 A KR20160098040 A KR 20160098040A
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- 238000004519 manufacturing process Methods 0.000 title description 20
- 239000004065 semiconductor Substances 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000012535 impurity Substances 0.000 claims description 125
- 238000000034 method Methods 0.000 claims description 55
- 238000000926 separation method Methods 0.000 claims description 39
- 238000006243 chemical reaction Methods 0.000 claims description 33
- 239000011229 interlayer Substances 0.000 claims description 23
- 230000015572 biosynthetic process Effects 0.000 claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 229910021332 silicide Inorganic materials 0.000 claims description 8
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 8
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- 238000002955 isolation Methods 0.000 abstract description 26
- 239000010408 film Substances 0.000 description 184
- 229920002120 photoresistant polymer Polymers 0.000 description 79
- 229910052581 Si3N4 Inorganic materials 0.000 description 64
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 64
- 238000005530 etching Methods 0.000 description 46
- 238000003384 imaging method Methods 0.000 description 46
- 238000009413 insulation Methods 0.000 description 22
- 238000002513 implantation Methods 0.000 description 20
- 230000000052 comparative effect Effects 0.000 description 19
- 238000000206 photolithography Methods 0.000 description 15
- 238000009792 diffusion process Methods 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 13
- 229910052814 silicon oxide Inorganic materials 0.000 description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 12
- 239000010703 silicon Substances 0.000 description 12
- 229910052739 hydrogen Inorganic materials 0.000 description 11
- 239000001257 hydrogen Substances 0.000 description 11
- 102100032346 Cell cycle progression protein 1 Human genes 0.000 description 10
- 101000868629 Homo sapiens Cell cycle progression protein 1 Proteins 0.000 description 10
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 10
- 238000012546 transfer Methods 0.000 description 9
- 101100433746 Arabidopsis thaliana ABCG29 gene Proteins 0.000 description 7
- 101100054289 Oryza sativa subsp. japonica ABCG34 gene Proteins 0.000 description 7
- 101100107601 Oryza sativa subsp. japonica ABCG45 gene Proteins 0.000 description 7
- 101150088582 PDR1 gene Proteins 0.000 description 7
- 101100400877 Trichophyton rubrum (strain ATCC MYA-4607 / CBS 118892) MDR1 gene Proteins 0.000 description 7
- 230000004888 barrier function Effects 0.000 description 5
- 238000005036 potential barrier Methods 0.000 description 5
- 101000889335 Bombyx mori Trypsin inhibitor Proteins 0.000 description 3
- 101000831940 Homo sapiens Stathmin Proteins 0.000 description 3
- 102100024237 Stathmin Human genes 0.000 description 3
- 230000003321 amplification Effects 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000005245 sintering Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
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-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/1461—Pixel-elements with integrated switching, control, storage or amplification elements characterised by the photosensitive area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
-
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14621—Colour filter arrangements
-
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- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14627—Microlenses
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- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
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- H01L27/146—Imager structures
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- H01L27/146—Imager structures
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- H01L27/146—Imager structures
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- H01L27/146—Imager structures
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- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
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Abstract
Description
The present invention relates to an image pickup apparatus and a method of manufacturing the same, and can be preferably used for an image pickup apparatus having, for example, a photodiode region and a ground region.
In digital cameras and the like, for example, an image pickup device equipped with a CMOS (Complementary Metal Oxide Semiconductor) image sensor is applied. In the image pickup apparatus, a photodiode is formed to convert incident light into electric charge. Charges generated in the photodiode are transferred to the floating diffusion region by the transfer transistor. The transferred charge is converted into an electric signal by the amplifying transistor and outputted as an image signal.
In an image pickup device, an antireflection film is formed to suppress reflection of light and efficiently introduce light into the photodiode. The antireflection film is formed by forming a silicon nitride film so as to cover the semiconductor substrate and etching the silicon nitride film. As an example of a patent document that discloses an image pickup apparatus provided with such an antireflection film, there are, for example, Japanese Patent Laid-Open Publication Nos. 1-146989 and 2007-165864.
In the image pickup apparatus, a ground region for electrically connecting the anode of the photodiode to the ground potential is disposed in the vicinity of the photodiode, and the ground region is electrically connected to the ground potential through a plug formed in the contact hole. The portion of the silicon nitride film located in the ground region is also removed when the silicon nitride film as the anti-reflection film is etched so that the contact holes are well formed in the ground region. At this time, etching damage may occur in a region where the photodiode is formed.
It has been confirmed by the inventors that dark current is generated in the photodiode if etching damage occurs in a region where the photodiode is formed. The dark current is a current flowing through the photodiode even though no light is incident on the photodiode, which means a minute leakage current.
Other objects and novel features will become apparent from the description of the present specification and the accompanying drawings.
An imaging device according to an embodiment includes a semiconductor substrate, an element formation region, a pixel region, a photoelectric conversion portion, a ground region, an antireflection film, an interlayer insulating film, and a plug. The element formation region is defined by the first impurity region of the first conductivity type and is defined in the semiconductor substrate. The pixel region is defined in the element formation region. The photoelectric conversion portion is formed in the pixel region. The ground region is defined in the element formation region through a separation portion from the photoelectric conversion portion and is electrically connected to the photoelectric conversion portion and electrically connected to the ground potential. The antireflection film is formed so as to cover at least the photoelectric conversion portion and the ground region. The plug is formed to penetrate the interlayer insulating film and the antireflection film and is electrically connected to the ground region.
A manufacturing method of an imaging apparatus according to another embodiment has the following steps. The first conductive type element formation region including the pixel region and the ground region is defined in the semiconductor substrate. A photoelectric conversion portion is formed in the pixel region. An antireflection film for suppressing reflection of light is formed so as to cover at least the photoelectric conversion portion and the ground region. An interlayer insulating film is formed so as to cover the antireflection film.
A plug penetrating the interlayer insulating film and the antireflection film to come in contact with the ground region and electrically connect the ground region to the ground potential.
According to the imaging device of one embodiment, the dark current of the photoelectric conversion portion can be suppressed.
According to the manufacturing method of an image pickup apparatus according to another embodiment, it is possible to manufacture an image pickup apparatus in which the dark current of the photoelectric conversion unit is suppressed.
1 is a diagram showing an example of a pixel circuit of an image pickup apparatus according to each embodiment.
Fig. 2 is a plan view showing a first example of an image pickup device by insulation separation according to the first embodiment. Fig.
Fig. 3 is a cross-sectional view taken along the cross-sectional lines IIIa-IIIa, IIIb-IIIb and IIIc-IIIc shown in Fig. 2 in the first embodiment.
4 is a cross-sectional view showing one step of the manufacturing method of the first example of the imaging device by insulation isolation in the first embodiment.
5 is a cross-sectional view showing a step performed after the step shown in Fig. 4 in the first embodiment.
6 is a cross-sectional view showing a step performed after the step shown in Fig. 5 in the first embodiment.
7 is a cross-sectional view showing a step performed after the step shown in Fig. 6 in the first embodiment.
8 is a cross-sectional view showing a step performed after the step shown in Fig. 7 in the first embodiment.
9 is a cross-sectional view showing a step performed after the step shown in Fig. 8 in the first embodiment.
10 is a cross-sectional view showing a step performed after the step shown in Fig. 9 in the first embodiment.
11 is a cross-sectional view showing a step performed after the step shown in Fig. 10 in the first embodiment.
12 is a cross-sectional view showing a step performed after the step shown in Fig. 11 in the first embodiment.
13 is a cross-sectional view showing a step performed after the step shown in Fig. 12 in the first embodiment.
14 is a cross-sectional view showing a step performed after the step shown in Fig. 13 in the first embodiment.
15 is a cross-sectional view showing a step performed after the step shown in Fig. 14 in the first embodiment.
16 is a cross-sectional view showing a step performed after the step shown in Fig. 15 in the first embodiment.
17 is a cross-sectional view showing a step performed after the step shown in Fig. 16 in the first embodiment.
18 is a cross-sectional view showing a step performed after the step shown in Fig. 17 in the first embodiment.
19 is a cross-sectional view showing a step performed after the step shown in Fig. 18 in the first embodiment.
20 is a cross-sectional view showing a step performed after the step shown in Fig. 19 in the first embodiment.
21 is a cross-sectional view showing a step performed after the step shown in Fig. 20 in the first embodiment.
22 is a cross-sectional view showing a step performed after the step shown in Fig. 21 in the first embodiment.
23 is a cross-sectional view showing one step of the manufacturing method of the imaging device related to the comparative example.
24 is a cross-sectional view showing a step performed after the step shown in Fig.
Fig. 25 is a plan view showing a step performed after the step shown in Fig. 24, and is a plan view of an imaging device in which a main part is completed.
FIG. 26 is a cross-sectional view showing cross-sectional views taken along line XXVIa-XXVIa, XXVIb-XXVIb, and XXVIc-XXVIc shown in FIG.
Fig. 27 is a plan view showing a first example of an imaging device by pn separation according to the first embodiment. Fig.
Fig. 28 is a cross-sectional view taken along line XXVIIIa-XXVIIIa and XXVIIIb-XXVIIIb shown in Fig. 27 in the first embodiment.
29 is a cross-sectional view showing one step of the manufacturing method of the first example of the imaging device by pn separation in the first embodiment.
30 is a cross-sectional view showing a step performed after the step shown in FIG. 29 in the first embodiment.
31 is a cross-sectional view showing a step performed after the step shown in Fig. 30 in the first embodiment.
32 is a cross-sectional view showing a step performed after the step shown in Fig. 31 in the first embodiment.
33 is a cross-sectional view showing a step performed after the step shown in Fig. 32 in the first embodiment.
34 is a cross-sectional view showing a step performed after the step shown in Fig. 33 in the first embodiment.
35 is a cross-sectional view showing a step performed after the step shown in Fig. 34 in the first embodiment.
Fig. 36 is a cross-sectional view showing a step performed after the step shown in Fig. 35 in the first embodiment.
37 is a cross-sectional view showing a step performed after the step shown in Fig. 36 in the first embodiment.
38 is a cross-sectional view showing a step performed after the step shown in FIG. 37 in the first embodiment.
39 is a cross-sectional view showing a step performed after the step shown in Fig. 38 in the first embodiment.
40 is a cross-sectional view showing a step performed after the step shown in FIG. 39 in the first embodiment.
41 is a cross-sectional view showing one step of the manufacturing method of the imaging device related to the comparative example.
42 is a cross-sectional view showing a step performed after the step shown in Fig.
Fig. 43 is a plan view showing a step performed after the step shown in Fig. 42, and is a plan view of an imaging device in which a main part is completed.
Fig. 44 is a cross-sectional view showing cross-sectional views taken along cross-sectional lines XLIVa-XLIVa and XLIVb-XLIVb shown in Fig. 43, respectively.
Fig. 45 is a plan view showing a second example of the imaging device by insulation separation according to the second embodiment. Fig.
Fig. 46 is a cross-sectional view of the second embodiment in which cross-sectional views taken along the cross-sectional lines XLVIa-XLVIa, XLVIb-XLVIb and XLVIc-XLVIc shown in Fig.
47 is a cross-sectional view showing one step of the manufacturing method of the second example of the image pickup device by insulation separation in the second embodiment.
Fig. 48 is a cross-sectional view showing a step performed after the step shown in Fig. 47 in the second embodiment.
49 is a cross-sectional view showing a step performed after the step shown in Fig. 48 in the second embodiment.
50 is a cross-sectional view showing a step performed after the step shown in FIG. 49 in the second embodiment.
51 is a cross-sectional view showing a step performed after the step shown in Fig. 50 in the second embodiment.
52 is a cross-sectional view showing a step performed after the step shown in Fig. 51 in the second embodiment.
53 is a cross-sectional view showing a step performed after the step shown in Fig. 52 in the second embodiment.
54 is a plan view showing a second example of the imaging device by pn separation according to the second embodiment.
Fig. 55 is a cross-sectional view showing the cross-sectional views taken along the cross-sectional lines LVa-LVa and LVb-LVb shown in Fig. 54 according to the second embodiment.
56 is a cross-sectional view showing a step of the manufacturing method of the second example of the imaging device by pn separation in the second embodiment.
57 is a cross-sectional view showing a step performed after the step shown in Fig. 56 in the second embodiment.
Fig. 58 is a cross-sectional view showing a step performed after the step shown in Fig. 57 in the second embodiment.
Fig. 59 is a cross-sectional view showing a step performed after the step shown in Fig. 58 in the second embodiment.
Fig. 60 is a cross-sectional view showing a step performed after the step shown in Fig. 59 in the second embodiment.
61 is a cross-sectional view showing a step performed after the step shown in Fig. 60 in the second embodiment.
62 is a cross-sectional view showing a step performed after the step shown in FIG. 61 in the second embodiment.
63 is a plan view showing a third example of the imaging device by insulation separation according to the third embodiment.
Fig. 64 is a plan view showing an image pickup apparatus related to a comparative example. Fig.
65 is a plan view showing a fourth example of an image pickup apparatus by insulation isolation in the third embodiment.
66 is a plan view showing a third example of the imaging device by pn separation in the third embodiment.
67 is a plan view showing an image pickup apparatus related to a comparative example.
68 is a plan view showing a fourth example of the imaging device by pn separation in the third embodiment.
69 is a partial cross-sectional view showing a modified example of a connection form between a plug and a ground region in each of the embodiments.
70 is a partial cross-sectional view showing another modification of the connection form between the plug and the ground region in each embodiment.
First, the entire configuration (circuit) of the image pickup apparatus will be briefly described. First, the image pickup device is composed of a plurality of pixels arranged in a matrix. In each pixel, a photodiode PD, a transfer transistor TT, an amplification transistor AMI, a selection transistor SEL, and a reset transistor RST are formed as shown in Fig.
In the photodiode PD, light from the object is accumulated as electric charges. The transfer transistor TT transfers the charge to the floating diffusion region (not shown). The reset transistor RST resets the charge of the floating diffusion region before the charge is transferred to the floating diffusion region. The charge transferred to the floating diffusion region is input to the gate electrode of the amplifying transistor AMI, converted into the voltage Vdd, and amplified. When a signal for selecting a specific row of pixels is input to the gate electrode of the selection transistor SEL, a signal converted into a voltage is read out as a video signal.
In this way, in the circuit shown in Fig. 1, the charges generated in the two photodiodes PD are supplied to the two transfer transistors TT, one amplifying transistor AMI, one selecting transistor SEL and one And is controlled by five transistors of the reset transistor RST. That is, the charge is controlled by 2.5 transistors for one photodiode PD (2.5 transistor pixel).
The pixel circuit is not limited to this. For example, there is a circuit in which charge generated in one photodiode is controlled by four transistors: one transfer transistor, one amplification transistor, one selection transistor, and one reset transistor ). In addition, there is a circuit in which charges generated in four photodiodes are controlled by seven transistors of four transfer transistors, one amplification transistor, one selection transistor and one reset transistor (1.75 transistor pixel).
Hereinafter, an image pickup apparatus according to each embodiment having a photodiode region and a ground region will be described in detail.
(Insulation isolation)
First, a first example of an imaging device in which a photodiode region and a ground region are insulated and separated by a separation insulating film will be described.
As shown in FIGS. 2 and 3, the isolation region STI is formed by filling an insulating film in a predetermined region of the semiconductor substrate SUB. The P-type well PW (first impurity region) as an element formation region is defined by the isolation region STI. The P-type well PW defines the pixel region PER and the ground region GND. In the pixel region PER, the photodiode region PDR and the pixel transistor region PTR are defined again. The amplifying transistor AMI, the selecting transistor SEL, or the resetting transistor RST are formed in the pixel transistor region PTR.
A gate electrode GET of the transfer transistor TT is formed so as to traverse the P-type well PW. A photodiode region PDR is formed on a portion of the P-type well PW located on one side of the gate electrode GET and a floating portion PZ is formed on the other side of the P- A diffusion region FD is formed. A metal silicide film MSF is formed on the surface of the floating diffusion region FD.
A photodiode PD is formed in the photodiode region PDR. The photodiode PD includes an N-type impurity region NR. And a P-type impurity region (PSR) is formed on the N-type impurity region NR. A P-type guard ring (PGR) is formed on the side of the N-type impurity region (0NR).
An isolation region STI is disposed between the photodiode region PDR and the ground region GND. The photodiode region PDR and the ground region GND are insulated and separated by an insulating film of the isolation region STI. The P-type guard ring PGR is formed along the isolation region STI.
And a P-type impurity region GPR (second impurity region) is formed in the ground region GND. The impurity concentration of the P-type impurity region is set to be higher than the impurity concentration of the P-type well PW. The P-type impurity region GPR is electrically connected to the photodiode PD (anode) through the P-type well PW.
A pixel transistor PT is formed in the pixel transistor region PTR. In Fig. 3, the pixel transistor PT is represented as one transistor for the amplifying transistor AMI, the selecting transistor SEL, and the resetting transistor RST. In the pixel transistor region PTR, a gate electrode GEN is formed across the P-type well PW.
N-type source and drain regions NSD are formed in portions of the P-type well PW located on one side and the portion of the P-type well PW located on the other side of the gate electrode GEN. A metal silicide film MSF is formed on the surface of the source-drain region NSD.
A silicon oxide film SOF and an antireflection film ARF are formed so as to cover the photodiode region PDR and the ground region GND. As shown in FIG. 2, the antireflection film ARF may be formed so as to cover at least the entire photodiode region PDR and the ground region GND, respectively. In FIG. 3, a structure is shown in which the antireflection film ARF of the ground region GND is continuously formed in the photodiode region PDR for the convenience of explanation and the like. The antireflection film ARF is formed of, for example, a silicon nitride film (SNF).
A liner film LF is formed so as to cover the antireflection film ARF and the gate electrode GEN. The first interlayer insulating film IL1 is formed so as to cover the liner film LF. In the ground region GND, a plug PG connected to the P-type impurity region GPR is formed so as to penetrate the first interlayer insulating film IL1 and the antireflection film ARF. In the pixel region PER, a plug PG connected to the floating diffusion region FD and a plug PG connected to the source-drain region NSD are formed so as to penetrate the first interlayer insulating film IL1.
A first wiring M1 electrically connected to the plug PG is formed on the first interlayer insulating film IL1. And a second interlayer insulating film IL2 is formed so as to cover the first wiring M1. The second interlayer insulating film IL2 is formed of a plurality of layers, and a plurality of wirings (chain double-dashed lines) are formed between the layers. A color filter CF is formed on the second interlayer insulating film IL2 and a microlens ML is formed on the color filter CF. The image pickup apparatus IS according to the first example is configured as described above.
Next, an example of a manufacturing method of the above-described imaging apparatus IS will be described.
First, a separation region formed by an insulating film is formed by a general method. A predetermined photolithography process and an etching process are performed on the silicon nitride film formed so as to cover the surface of the semiconductor substrate to form a mask for forming the trench. Next, as shown in Fig. 4, the trench TC is formed by etching the semiconductor substrate SUB using the silicon nitride film (SSN) as an etching mask.
Next, an insulating film (not shown) such as a silicon oxide film is formed on the silicon nitride film (SSN) to bury the trench TC. Next, a chemical mechanical polishing process is performed on the insulating film, and the silicon nitride film (SSN) is removed to form the isolation region STI filled with the insulating film in the trench TC as shown in FIG.
6, a photoresist pattern PR1 is formed which exposes the pixel region PER and the ground region GND and covers the other region. Next, a part of the P-type well PW in the element formation region EFR is formed by implanting the p-type impurity using the photoresist pattern PR1 as an implantation mask. Thereafter, the photoresist pattern PR1 is removed.
Next, as shown in Fig. 7, a predetermined photographic plate processing is performed to form a photoresist pattern PR2 covering the photodiode region PDR and the like. Next, the p-type impurity is implanted using the photoresist pattern PR2 as an implantation mask. This implantation is an injection for preventing crosstalk to adjacent pixels. Thereafter, the photoresist pattern PR2 is removed.
8, a photoresist pattern PR3 is formed by exposing the pixel region PER and the ground region GND and covering the other region by performing a predetermined photolithography process. Next, the remaining portion of the P-type well PW is formed by implanting the p-type impurity using the photoresist pattern PR3 as an implantation mask. Thereafter, the photoresist pattern PR3 is removed.
9, a photoresist pattern PR4 exposing a part of the ground region GND and a part of the photodiode region PDR1 (PDR1) and covering the other region is formed by photolithography . Next, a p-type impurity region GPR is formed in the ground region GND by implanting the p-type impurity using the photoresist pattern PR4 as an implantation mask.
A P-type guard ring PGR is formed along the isolation region STI in a partial region PDR1 of the photodiode region PDR. This P-type guard ring PGR is formed as a barrier preventing the charge generated at the boundary between the isolation region STI and the photodiode region PDR from affecting the photodiode. Thereafter, the photoresist pattern PR4 is removed.
Next, a conductive film (not shown) such as a polysilicon thin film serving as a gate electrode and a film (not shown) made of a hard mask are formed to cover the surface of the semiconductor substrate SUB. Next, a predetermined photolithography process and an etching process are performed to form a hard mask for patterning the gate electrode. Next, the conductive film is etched using the hard mask or the like as an etching mask. As a result, as shown in Fig. 10, the gate electrode GET, the gate electrode GEN, and the like are formed.
Although the case of patterning the gate electrode (GET) or the like by a hard mask has been described, it is not necessarily required to apply a hard mask to perform patterning. For example, the gate electrode (GET) or the like may be patterned by performing a dry etching process using the photoresist pattern as an etching mask.
Next, as shown in Fig. 11, a photoresist pattern PR5 is formed by exposing the photodiode region PDR and covering the other regions by performing a predetermined photolithography process. Next, the n-type impurity region NR of the photodiode is formed by implanting the n-type impurity using the photoresist pattern PR5 as an implantation mask. Thereafter, the photoresist pattern PR5 is removed.
12, a photoresist pattern PR6 is formed by exposing the photodiode region PDR and the ground region GND and covering the other regions. Then, a p-type impurity region (PSR) having a relatively high impurity concentration is formed by implanting p-type impurity using the photoresist pattern PR6 as an implantation mask. The P-type impurity region (PSR) is formed to protect the surface of the photodiode. Thus, the photodiode PD is formed in the photodiode region PDR. Thereafter, the photoresist pattern PR6 is removed.
13, a photoresist pattern PR7 is formed by exposing the pixel transistor region PTR or the like and covering the photodiode region PDR and the ground region GND. Next, an n-type impurity region (LNR) is formed as an LDD (Lightly Doped Drain) region by implanting n-type impurity using the photoresist pattern PR7 as an implantation mask. Thereafter, the photoresist pattern PR7 is removed.
Next, as shown in FIG. 14, a silicon oxide film (SOF) is formed as a spacer by, for example, a CVD ((CH) emial Vapor Deposition) method or the like to cover the gate electrodes GET and GEN. Next, a silicon nitride film (SNF) which is an antireflection film is formed so as to cover the silicon oxide film (SOF). Although the case of forming the silicon nitride film (SNF) on the silicon oxide film (SOF) has been described, the silicon oxide film (SOF) may be formed on the silicon nitride film (SNF) by changing the order.
Next, as shown in Fig. 15, a photoresist pattern PR8 exposing the pixel transistor region PTR covering the photodiode region PDR and the ground region GND by performing a predetermined photolithography process . Then, the silicon nitride film (SNF) or the like is etched using the photoresist pattern PR8 as an etching mask.
An anti-reflection film ARF covering at least the entire photodiode region PDR and the entire ground region GND is formed by this etching process. A sidewall insulation film SWF is formed on each side of the gate electrode GET and the gate electrode GEN. Thereafter, the photoresist pattern PR8 is removed.
16, a photoresist pattern PR9 for exposing the pixel transistor region PTR covering the photodiode region PDR and the ground region GND is formed do. Next, an n-type impurity is implanted using the photoresist pattern PR9 as an implantation mask to form an n-type impurity region HNR.
As a result, the floating diffusion region FD is formed by the N-type impurity region LNR and the N-type impurity region HNR on the side of the gate electrode GET. In the pixel transistor region PTR, a pair of source-drain regions NSD is formed by the N-type impurity region LNR and the N-type impurity region HNR. Thereafter, the photoresist pattern PR9 is removed.
Next, as shown in Fig. 17, a silicon oxide film SS is formed by, e.g., CVD to cover the antireflection film ARF and the like. 18, a sidewall oxide film SSW is formed on the sidewalls of the gate electrode GET and the gate electrode GET by performing anisotropic etching on the entire surface of the silicon oxide film SS.
19, a metal silicide film MSF is formed on a part of the upper surface of the gate electrode GET and on the surface of the floating diffusion region FD by the self-aligned siliCIDE method. A metal silicide film MSF is formed on the upper surface of the gate electrode GEN and the surface of the source-drain region NSD.
Next, as shown in Fig. 20, a liner film LF made of a silicon nitride film is formed by CVD, for example, so as to cover the antireflection film ARF and the like. Next, as shown in Fig. 21, a first interlayer insulating film IL1 made of, for example, TEOS (Tetra Ethyl Ortho Silicate) film is formed by CVD, for example, so as to cover the liner film LF.
Next, a photoresist pattern (not shown) for forming a contact hole is formed by performing a predetermined photolithography process. Then, the first interlayer insulating film IL1 is etched using the photoresist pattern as an etching mask.
As a result, in the ground region GND, a contact which exposes the P-type impurity region GPR located in the ground region GND through the first interlayer insulating film IL1, the liner film LF and the antireflection film ARF, The hole CH (see FIG. 21) is formed.
21) for exposing the floating diffusion region FD through the first interlayer insulating film IL1, the liner film LF and the antireflection film ARF in the pixel region PER and the contact hole CH And a contact hole CH (see FIG. 21) for exposing the source-drain region NSD are formed.
Next, a barrier metal and a tungsten film (both not shown) are formed on the first interlayer insulating film IL1 so as to fill the contact holes. Next, the barrier metal and the tungsten film portions located on the first interlayer insulating film IL1 are removed by chemical mechanical polishing, and the first interlayer insulating film IL1 is planarized. As a result, the plug PG is formed in the contact hole CH as shown in Fig.
Next, a plurality of wirings (chain double-dashed lines) including the first wirings M1 are formed in the second interlayer insulating film IL2 by repeating the general film formation, etching, and the like. As the wiring material such as the first wiring M1, aluminum or copper is used. When copper is used as the material, wiring is formed by the damascene method.
When this wiring is formed, heat treatment (hydrogen sintering) is performed in a hydrogen atmosphere. As will be described later, hydrogen bonds to the hydrogen sintered silicon dangling bond and the dangling bond is terminated. Thereafter, as shown in Fig. 22, the main portion of the image pickup device IS is completed by forming the color filter CF and the microlens ML.
In the above-described imaging device IS by insulation isolation, the antireflection film ARF composed of a silicon nitride film is formed so as to cover at least the whole of the photodiode region PDR and the entire ground region GND, thereby suppressing the dark current . This is compared with an image pickup apparatus related to a comparative example.
First, the main steps of a manufacturing method of an imaging device by insulation separation relating to a comparative example will be described. 23, a separation region CSTI, an element formation region CEFR, a P-type well CPW, and a P-type well CPW are formed on a semiconductor substrate CSUB, as shown in FIG. 23, A photodiode (CPD) including a N-type impurity region CNR, a P-type impurity region CPSR, a P-type guard ring CPGR and a P-type impurity region CGPR gate electrode CGET are formed. A silicon oxide film CSOI is formed to cover the gate electrode CGET and the like and a silicon nitride film CSNF is formed to cover the silicon oxide film CSOI.
24, a photoresist pattern CPR8 covering the photodiode region CPDR is formed by performing predetermined photographic plate processing. Next, the silicon nitride film (CSNF) is etched using the photoresist pattern CPR8 as an etching mask so that the portion of the silicon nitride film CSNF located in the photodiode region CPDR serves as the antireflection film CARF .
Thereafter, the photoresist pattern CPR8 is removed, and through the same steps as the steps shown in Figs. 16 to 22 described above, as shown in Figs. 25 and 26, the imaging device (CIS) Is completed.
In the image pickup device (CIS) according to the comparative example, when the anti-reflection film CARF is formed as shown in Table 24, the portion of the silicon nitride film (CSNF) covered with the photoresist pattern CPR8 is left An etching process is performed on a portion of the uncovered exposed silicon nitride film (CSNF).
When etching the exposed silicon nitride film (CSNF), plasma damage may occur in the photodiode region CPDR. Particularly, when the portion of the silicon nitride film (CSNF) located in the ground region CGND is etched, plasma damage occurs in the photodiode region CPDR.
This will be described. The ground region CGND is disposed in the vicinity of the photodiode region CPDR. And a contact hole CCH (see FIG. 26) is formed in the ground region CGND so as to expose the ground region CGND. A plug CPG (see FIG. 26) for electrically connecting the anode of the photodiode CPD to the ground potential is formed in the contact hole CCH.
Therefore, when the portion where the minimum contact hole CCH is formed and the portion of the silicon nitride film CSNF located in the vicinity thereof form the antireflection film CARF so that the plug CPG is reliably connected to the ground region CGND, They are simultaneously removed by an etching process. Further, in the comparative example by this insulation separation, the entire ground region CGND is removed.
Since the ground region CGND is disposed in the vicinity of the photodiode region CPDR, the plasma damage caused by the etching process is applied to the photodiode region CPDR. It has been confirmed by the inventors that dark current is generated in the photodiode (CPD) when etching damage occurs in the photodiode region (CPDR).
In the image pickup device CIS according to the comparative example, at least the ground region GND is formed in addition to the photodiode region PDR as shown in Fig. 16 in the case of forming the antireflection film ARF in the image pickup device IS according to the embodiment A photoresist pattern PR8 is formed so as to cover it.
Therefore, the etching process is not performed on the silicon nitride film (SNF) located in the ground region (GND) disposed in the vicinity of the photodiode region (PDR), and compared with the imaging device (CIS) It is possible to suppress the plasma damage due to the photodiode region CPDR.
Furthermore, in the imaging device IS according to the embodiment, the silicon nitride film SNF, which is an antireflection film, is patterned so as to cover at least the photodiode region PDR and the ground region GND, and the silicon nitride film SNF ) Is removed. This structure has also been found by the inventors to contribute to suppressing occurrence of a dark current in the photodiode PD.
This will be described. In the image pickup device IS, it is known that silicon located on the surface of the crystalline semiconductor substrate SUB has a dangling bond (unconnected water) due to breaking of the bond. Silicon with a dangling bond results in a leakage path of leakage current. Since the dark current generated in the photodiode PD is a minute leak current, the presence of silicon having a dangling bond as a leak path can not be ignored.
Therefore, in order to further suppress the dark current, it is required to reduce the dangling bond of silicon in addition to reducing etching damage. One of the ways to reduce dangling bonds, which are still in doubt, is to bond hydrogen (H atoms) as dangling bonds. In the series of manufacturing methods of the imaging device IS according to the embodiment, heat treatment (hydrogen sintering) is performed in a hydrogen atmosphere when wiring is formed. This heat treatment results in a hydrogen source that terminates the silicon dangling bonds.
However, the silicon nitride film (SNF) as an antireflection film consequently inhibits hydrogen from reaching the silicon dangling bond. The silicon nitride film SNF is formed so as to cover at least the photodiode region PDR and the ground region GND in the imaging device IS according to the embodiment with respect to the silicon nitride film SNF as the antireflection film, The portion of the silicon nitride film (SNF) is removed.
As a result, compared with a structure in which a silicon nitride film as an antireflection film is left to cover an area other than the photodiode area (PDR) and the ground area (GND), hydrogen easily reaches the silicon dangling bond and the dangling bond can be terminated . As a result, the inventors have found that the dark current of the photodiode PD can be further reduced.
(pn separation)
Next, a first example of the image pickup apparatus in which the photodiode region and the ground region are separated by pn by pn junction will be described.
As shown in Figs. 27 and 28, the photodiode region PDR and the ground region GND are disposed adjacent to each other. The photodiode region PDR and the ground region GND are connected to the junction between the N-type impurity region NR of the photodiode PD and the P-type impurity region P (IS) (fifth impurity region) of the ground region GND The pn is separated by.
The silicon nitride film SNF as the antireflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND. Other components are the same as those of the image pickup apparatus IS shown in Figs. 2 and 3, and thus the same members are denoted by the same reference numerals, and description thereof will not be repeated unless necessary.
Next, an example of a method of manufacturing the imaging device IS by the above-described pn separation will be described. Is substantially the same as the above-described manufacturing method of the imaging device by insulation isolation, except that no separation region is formed between the photodiode region (PDR) and the ground region (GND). It will be explained briefly.
First, as shown in Fig. 29, a trench TC is formed in a predetermined region. At this time, no trench is formed between the photodiode region PDR and the ground region GND. Next, as shown in Fig. 30, the isolation region STI is formed. Next, as shown in Fig. 31, a part of the P-type well PW is formed by implanting the p-type impurity. Next, as shown in the figure, a p-type impurity is implanted to prevent crosstalk. Next, as shown in FIG. 33, the remaining portion of the P-type well PW is formed by further implanting the P-type impurity.
34, a photoresist pattern PR4 is formed by exposing the ground region GND and covering the photodiode region PDR by performing a predetermined photolithography process. Next, a p-type impurity region PIS having a relatively high impurity concentration is formed in the ground region GND by implanting the p-type impurity using the photoresist pattern PR4 as an implantation mask. Thereafter, the photoresist pattern PR4 is removed.
Next, as shown in Fig. 35, the gate electrode (GET) of the transfer transistor and the gate electrode (GEN) of the pixel transistor are formed. Next, as shown in Fig. 36, an N-type impurity region NR to be a photodiode is formed in the photodiode region PDR. As a result, the photodiode region PDR and the ground region GND are separated from each other by the pn junction between the N-type impurity region NR and the P-type impurity region PIS.
Next, as shown in FIG. 37, a p-type impurity region (PSR) having a relatively high impurity concentration is formed by implanting p-type impurity. Next, as shown in FIG. 38, an N-type impurity region (LNR) as an LDD region is formed. Next, a silicon oxide film (SOF) is formed so as to cover the gate electrodes (GET) and (GEN), and a silicon nitride film (SNF) to be an antireflection film is also formed.
39, a photoresist pattern PR8 is formed which exposes the photodiode region PDR and the pixel transistor region PTR covering the ground region GND and the like . Then, the silicon nitride film (SNF) or the like is etched using the photoresist pattern PR8 as an etching mask.
By this etching treatment, an anti-reflection film ARF covering the entire photodiode region PDR and the entire ground region GND is formed. A sidewall insulation film SWF is formed on each side of the gate electrode GET and the gate electrode GEN. Thereafter, the photoresist pattern PR8 is removed, and the main part of the imaging device IS by pn separation is completed, as shown in Fig. 40, through the same steps as those shown in Figs. 17 to 21.
In the above-described imaging device IS by pn separation, since the antireflection film ARF composed of a silicon nitride film is formed so as to cover at least the whole of the photodiode region PDR and the entire ground region GND, Can be suppressed. This is compared with an image pickup apparatus related to a comparative example.
First, main steps of a manufacturing method of an imaging device by pn separation related to a comparative example will be described. An isolation region CSTI, an element formation region CEFR, a P-type well CPW, and an N-type semiconductor substrate CSUB are formed in the semiconductor substrate CSUB through the same steps as those shown in FIGS. A photodiode (CPD), a P-type impurity region (CPSR), a P-type guard ring (CPGR), a P-type impurity region CGPR and a gate electrode CGET including an impurity region CNR are formed. A silicon oxide film CSOI is formed to cover the gate electrode CGET and the like and a silicon nitride film CSNF is formed to cover the silicon oxide film CSOI.
Next, as shown in Fig. 42, a photoresist pattern CPR8 covering the photodiode region CPDR is formed by performing predetermined photographic plate processing. The silicon nitride film CSNF is etched using the photoresist pattern CPR8 as an etching mask to pattern the portion of the silicon nitride film CSNF located in the photodiode region CPDR as the antireflection film CARF. At this time, in the ground region CGND, a portion where the contact hole CCH is formed and an opening HP for exposing the periphery are formed (refer to FIGS. 43 and 44).
Thereafter, the photoresist pattern CPR8 is removed and the photoresist pattern CPR8 is removed, and the photoresist pattern CPR8 is removed, and the photoresist pattern CPR8 is removed through the same steps as the steps shown in Figs. The main part is completed.
In the imaging device (CIS) according to the comparative example, when the anti-reflection film CARF is formed as shown in Table 42, the portion of the silicon nitride film CSNF located in the ground region CGND adjacent to the photodiode region CPDR An opening portion HP is formed. For this reason, as in the case of the imaging device by insulation isolation related to the above-described comparative example, plasma damage is caused in the photodiode region CPDR due to the etching process. As a result, a dark current may occur in the photodiode (CPD).
In the image pickup device CIS according to the comparative example, at the time of forming the antireflection film ARF in the image pickup device IS according to the embodiment, at least the photodiode region PDR and the ground region GND A photoresist pattern PR8 is formed so as to cover the regions on both sides.
Therefore, the etching process is not performed on the portion of the silicon nitride film (SNF) located in the ground region (GND) adjacent to the photodiode region (PDR), and compared with the imaging device (CIS) It is possible to suppress the plasma damage from reaching the photodiode region (PDR).
In the imaging device IS according to the embodiment, the silicon nitride film SNF covers at least the photodiode region PDR and the ground region GND as in the case of the imaging device IS by insulation isolation. And portions of the silicon nitride film (SNF) located in other regions are not removed. Thus, the silicon dangling bond can be terminated by hydrogen sintering, for example, so that the dark current of the photodiode PD can be further reduced.
Embodiment 2
(Insulation isolation)
Here, a second example of the image pickup device in which the photodiode region and the ground region are insulated and separated by the separating insulating film will be described.
45 and 46, a portion of the P-type well PW having a relatively low impurity concentration is located in the ground region GND. In the photodiode region PDR, the isolation region STI and the photodiode PD Type guard ring PGR (third impurity region) having an impurity concentration higher than the impurity concentration of the P-type well PW along the isolation region STI is formed between the P-
In this way, in the imaging device IS, a concentration gradient is formed between the ground region GND and the photodiode PD with respect to the impurity concentration of the p-type impurity, and the P-type guard ring PGR becomes a potential barrier. Since the other components are the same as those of the image pickup apparatus IS shown in Figs. 2 and 3, the same members are denoted by the same reference numerals, and description thereof will not be repeated unless necessary.
Next, an example of a method of manufacturing the imaging device IS by the above-described insulation separation will be described. Except that the P-type impurity region GPR is not formed in the ground region GND, the same members or the same steps are denoted by the same reference numerals with the same reference numerals attached thereto do.
47, a part of the P-type well PW is formed by implanting a p-type impurity using the photoresist pattern 20 as an implantation mask, as shown in Fig. 47 do. Thereafter, the photoresist pattern 20 is removed.
Next, as shown in Fig. 48, a photoresist pattern PR21 is formed by exposing the pixel transistor region PTR and covering other regions including the ground region GND by performing a predetermined photolithography process. Next, the photoresist pattern PR21 is used as an implantation mask to implant a p-type impurity to prevent crosstalk. Thereafter, the photoresist pattern PR21 is removed.
Next, as shown in Fig. 49, a photoresist pattern PR22 is formed by exposing the pixel region PER and the ground region GND and covering the other region by performing a predetermined photolithography process. Next, the remaining portion of the P-type well PW is formed by implanting the p-type impurity using the photoresist pattern PR22 as an implantation mask. Thereafter, the photoresist pattern PR22 is removed.
50, a photoresist pattern PR23 is formed by exposing a partial region PDR1 of the photodiode region PDR and covering the other region. Next, a p-type impurity is implanted into the partial region PDR1 of the photodiode region PDR with a relatively high impurity concentration along the isolation region STI using the photoresist pattern PR23 as an implantation mask, The ring PGR is formed.
The P-type guard ring PGR is formed as a barrier preventing the charge generated at the boundary of the isolation region STI from affecting the photodiode PD. In addition, as will be described later, the P-type guard ring (PGR) becomes a potential barrier preventing charges from affecting the photodiode in the ground region (GND). Thereafter, the photoresist pattern PR23 is removed.
Next, after a process similar to the process shown in Fig. 10 is performed, a photoresist pattern PR24 is formed which exposes the photodiode region PDR and covers other regions by performing a predetermined photolithography process as shown in Fig. do. Next, an n-type impurity is implanted using the photoresist pattern PR24 as an implantation mask to form an n-type impurity region NR of the photodiode. Thereafter, the photoresist pattern PR24 is removed.
Next, as shown in Fig. 52, a predetermined photolithography process is performed to form a pixel transistor region (pixel region) covering the photodiode region PDR and the ground region GND The photoresist pattern PR25 exposing the photoresist pattern PR25 is formed. Next, etching treatment is performed on the silicon nitride film (SNF) or the like using the photoresist pattern PR25 as an etching mask.
By this etching treatment, an anti-reflection film ARF covering the entire photodiode region PDR and the entire ground region GND is formed. A sidewall insulation film SWF is formed on each side of the gate electrode GET and the gate electrode GEN. Thereafter, the photoresist pattern PR25 is removed, and a main part of the image pickup device IS is completed as shown in Fig. 53 through the same processes as those shown in Figs.
In the above-described imaging device IS, as described in
Since the silicon nitride film SNF is formed to cover at least the photodiode region PDR and the ground region GND and the portion of the silicon nitride film SNF located in the other region is removed, The dangling bond is terminated, and the dark current of the photodiode PD can be further reduced.
In the above-described image pickup device IS, a P-type guard having an impurity concentration higher than the impurity concentration of the P-type well PW between the portion of the P-type well PW located in the ground region GND and the photodiode PD A ring PGR is formed. This P-type guard ring PGR is located between the ground region GND (part of the P-type well PW) and the photodiode PD as a potential barrier with a relatively high p-type impurity concentration. Thereby, even if excess electrons are generated in the ground region GND due to the p-type impurity implanted into the ground region GND, it is possible to suppress the dark current from flowing to the photodiode PD.
(pn separation)
Here, a second example of the image pickup apparatus in which the photodiode region and the ground region are separated from each other by the pn junction will be described.
As shown in Figs. 54 and 55, the photodiode region PDR and the ground region GND are disposed adjacent to each other. A portion of the P-type well PW having a relatively low impurity concentration is located in the ground region GND. A P-type impurity region PIS (sixth impurity concentration) having an impurity concentration higher than the impurity concentration of the P-type well PW is formed between the portion of the P-type well PW and the photodiode PD.
The photodiode region PDR and the ground region GND are separated from each other by the junction of the N-type impurity region NR and the P-type impurity region PIS of the photodiode PD. Thus, in the image pickup device IS, a concentration gradient is formed between the ground region GND and the photodiode PD with respect to the impurity concentration of the p-type impurity, and the P-type impurity region PIS becomes a potential barrier.
The silicon nitride film SNF serving as the antireflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND. 45 and 46, the same components are denoted by the same reference numerals and the explanation thereof will not be repeated unless necessary.
Next, an example of a method of manufacturing the imaging device IS by the above-described pn separation will be described. Is substantially the same as the manufacturing method of the image pickup apparatus by insulation separation related to the second example except that no separation region is formed between the photodiode region PDR and the ground region GND, They will be briefly described with the same reference numerals.
First, as shown in Fig. 56, a p-type impurity is implanted using the photoresist pattern 26 as an implantation mask, thereby forming a part of the p-type well PW . Thereafter, the photoresist pattern 26 is removed.
Next, as shown in Fig. 57, using the photoresist pattern PR27 as an implantation mask, a p-type impurity is implanted to prevent crosstalk. Next, as shown in Fig. 58, the remaining portion of the P-type well PW is formed by further implanting the p-type impurity using the photoresist pattern PR28 as an implantation mask.
59, a photoresist pattern PR29 is formed by exposing a partial region PDR1 of the photodiode region PDR and covering the other regions by a predetermined photolithography process. Next, a p-type impurity region PIS is formed in a partial region PDR1 of the photodiode region PDR by implanting a p-type impurity using the photoresist pattern PR29 as an implantation mask. This P-type impurity region PIS becomes a potential barrier that prevents charges from affecting the photodiode PD in the ground region GND. Thereafter, the photoresist pattern PR29 is removed.
10, a photoresist pattern PR30 that exposes the photodiode region PDR and covers other regions is formed by performing a predetermined photolithography process as shown in Fig. 60 do. Next, an n-type impurity is implanted using the photoresist pattern PR30 as an implantation mask to form an n-type impurity region NR of the photodiode. Thereafter, the photoresist pattern PR30 is removed.
Next, a pixel transistor region PTR covering the photodiode region PDR and the ground region GND is formed by performing a predetermined photolithography process as shown in Fig. 61 through the same process as the process shown in Figs. 12 to 15, A photoresist pattern PR31 is formed. Then, the silicon nitride film (SNF) or the like is etched using the photoresist pattern PR31 as an etching mask.
By this etching treatment, an anti-reflection film ARF covering the entire photodiode region PDR and the entire ground region GND is formed. A sidewall insulation film SWF is formed on each side of the gate electrode GET and the gate electrode GEN. Thereafter, the
In the imaging device IS related to the embodiment, when the antireflection film ARF is formed, the etching process is not performed on the portion of the silicon nitride film SNF located in the ground region GND adjacent to the photodiode region PDR, It is possible to suppress the plasma damage caused by the treatment on the photodiode region (PDR).
Since the silicon nitride film SNF is formed so as to cover at least the photodiode region PDR and the ground region GND and the portion of the silicon nitride film SNF located in the other region is removed, The silicon dangling bond can be terminated and the dark current of the photodiode PD can be further reduced.
In the image pickup device IS described above, the P-type impurity region PIS formed between the portion of the P-type well PW located in the ground region GND and the photodiode PD has a potential of a relatively high p- It becomes a barrier. As a result, even if surplus electrons are generated in the ground region GND due to, for example, the p-type impurity implanted into the ground region GND, surplus electrons are prevented from flowing into the photodiode PD toward the dark current have.
Embodiment 3
(Insulation isolation)
Here, a third example of the image pickup device in which the photodiode region and the ground region are insulated and separated by the separating insulating film will be described.
A pixel transistor region (pixel region) in which a photodiode region PDR, a floating diffusion region FD, and a pixel transistor PT are formed is formed on a surface of a semiconductor substrate SUB by a separation region STI PTR, a ground region GND, and the like are defined. A silicon nitride film (SNF) of the antireflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND.
The pixel transistor region PTR is disposed on the side surface of the photodiode region PDR. The ground region GND is arranged in a direction away from the photodiode region PDR (for example, the Y direction) with respect to the pixel transistor region PTR. That is, the ground region (GND) is arranged so as to be more distant from the photodiode region (PDR), and the other components are the same as those of the imaging device IS shown in FIG. 2 and FIG. And will not repeat the explanation unless necessary.
In the above-described image pickup device IS, since the ground region GND and the photodiode region PDR are arranged so as to be further apart from each other, the dark current of the photodiode PD can be suppressed. This is compared with an image pickup apparatus related to the comparative example.
64, in the image pickup device (CIS) according to the comparative example, a photodiode region CPDR, a floating diffusion region CFD, and a pixel transistor region (not shown) are formed on the surface of a semiconductor substrate CSUB by a separation region CSTI CPTR) and a ground region CGND are defined. A silicon nitride film (CSNF) of the antireflection film CARF is formed so as to cover the photodiode region CPDR.
The pixel transistor region CPTR is disposed on the lateral side of the photodiode region CPDR. The ground region CGND is disposed at the same Y-direction position as the pixel transistor region CPTR. Other components are the same as those of the image pickup apparatus (CIS) shown in Fig. 25, so that the same members are denoted by the same reference numerals, and description thereof will not be repeated unless necessary.
In the imaging device (CIS) related to the comparative example, when the etching treatment is applied to the portion of the silicon nitride film (CSNF) which is the antireflection film (CARF) located in the ground region CGND, plasma damage It becomes easy to go crazy. Furthermore, the ground region CGND is arranged to be in the same Y-direction position as the pixel transistor region CPTR, and is in a position relatively close to the photodiode region CPDR, so that plasma damage becomes more likely to occur.
In the image pickup device IS according to the embodiment of the present invention, the antireflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND, thereby forming the ground region GND. It is possible to suppress the plasma damage due to the etching process from being applied to the photodiode region CPDR without performing the etching process on the portion of the silicon nitride film (SNF) located in the silicon nitride film (SNF). Silicon dangling bonds can also be terminated.
Further, the ground region GND is disposed in a direction away from the photodiode region PDR (for example, the Y direction) with respect to the pixel transistor region PTR, and the ground region GND and the photodiode region PDR are spaced apart from each other Respectively. As a result, the plasma damage caused by the etching treatment is reduced. As a result, the dark current due to the plasma damage can be reliably suppressed.
(Insulation isolation)
Here, a fourth example of an image pickup device in which a photodiode region and a ground region are insulated and separated by a separation insulating film will be described.
The photodiode region PDR, the floating diffusion region FD, the pixel transistor region PTR, and the ground region GND are defined on the surface of the semiconductor substrate SUB by the isolation region STI as shown in FIG. 65 . The silicon nitride film SNF of the antireflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND.
The pixel transistor region PTR is disposed on the lateral side of the photodiode region PDR. The ground region GND is arranged at the same Y-direction position as the pixel transistor region PTR. And is retracted away from the ground region GND or the contact portion PGC at the corner portion of the photodiode region PDR.
The photodiode region PDR is arranged so as to be further away from the ground region GND or the contact portion PGC and the other components are the same as the imaging device IS shown in Figs. Members are denoted by the same reference numerals and will not repeat the description except when necessary.
The antireflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND so that the portion of the silicon nitride film SNF located in the ground region GND is etched The plasma damage caused by the etching process can be suppressed from being applied to the photodiode region (PDR). Silicon dangling bonds can also be terminated.
Furthermore, the corner portions of the photodiode region PDR are arranged to be spaced apart from the ground region GND or the contact portion PGC so as to be spaced apart from each other. As a result, the plasma damage caused by the etching treatment is reduced. As a result, the dark current due to the plasma damage can be reliably suppressed.
(pn separation)
Here, a third example of the image pickup apparatus in which the photodiode region and the ground region are separated by the pn junction will be described.
As shown in Fig. 66, the photodiode region PDR and the ground region GND are arranged adjacent to each other. 28) of the photodiode PD and the P-type impurity region PIS (see FIG. 28) of the ground region GND are formed in the photodiode region PDR and the ground region GND, And pn is separated by bonding.
The silicon nitride film SNF serving as the antireflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND. Particularly, the position of the contact portion PGC of the ground region GND is disposed on the end side in the Y direction of the photodiode region PDR.
And is retracted away from the contact portion PGC at the corner portion of the photodiode region PDR. In other words, the photodiode region PDR is arranged so as to be further away from the contact portion PGC of the ground region GND. Since the other portions are the same as the imaging device IS shown in Figs. 27 and 28, Members are denoted by the same reference numerals and will not repeat the description except when necessary.
In the above-described image pickup device IS, since the contact portion PGC of the ground region GND and the photodiode region PDR are arranged so as to be further apart from each other, the dark current of the photodiode PD can be suppressed. This is compared with an image pickup apparatus related to a comparative example.
As shown in Fig. 67, in the image pickup apparatus (CIS) related to the comparative example, the photodiode region CPDR and the ground region CGND are disposed in contact with each other. The silicon nitride film CSNF serving as the antireflection film CARF is formed so as to cover the photodiode region CPDR and the ground region CGND and the portion where the contact hole CCH is formed in the ground region CGND CPGC) and an opening HP for exposing the periphery thereof are formed.
Therefore, when the opening portion HP is formed in the portion of the silicon nitride film CSNF located in the ground region CGND adjacent to the photodiode region CPDR, plasma damage occurs in the photodiode region CPDR due to the etching process I am crazy. As a result, a dark current may occur in the photodiode (CPD).
The anti-reflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND in the image pickup device IS according to the embodiment of the image pickup apparatus (CIS) It is possible to suppress the plasma damage to the photodiode region (PDR) by the etching process without performing the etching process on the portion of the silicon nitride film (SNF) located on the photodiode region (PDR).
In addition, the position of the contact portion PGC is disposed on the end side in the Y direction of the photodiode region PDR, and is retracted away from the contact portion PGC in the corner portion of the photodiode region PDR. As a result, the plasma damage due to the etching treatment at the time of forming the antireflection film ARF can be reduced, and the dark current generated in the photodiode can be suppressed. The photodiode region (PDR) and the contact portion (PGC) are preferable for reducing plasma damage as the distance decreases, but it is preferable that the distance is 0.1 μm or more, for example.
(pn separation)
Here, a fourth example of the image pickup apparatus in which the photodiode region and the ground region are separated by the pn junction will be described.
As shown in FIG. 68, the photodiode region PDR and the ground region GND are disposed adjacent to each other. 28) of the photodiode PD and the P-type impurity region PIS (see FIG. 28) of the ground region GND are formed in the photodiode region PDR and the ground region GND, And the pn is separated by the joining.
The silicon nitride film SNF serving as the antireflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND. Particularly, the contact portion PGC of the ground region GND is arranged in the vicinity of the center in the Y direction of the photodiode region PDR.
And retreats away from the contact portion PGC in the vicinity of the Y-direction center of the contact portion PGC side of the photodiode region PDR. In other words, the photodiode region PDR is arranged so as to be further away from the contact portion PGC of the ground region GND. Since the other portions are the same as the imaging device IS shown in Figs. 27 and 28, Members are denoted by the same reference numerals and will not repeat the description except when necessary.
The anti-reflection film ARF is formed so as to cover at least the photodiode region PDR and the ground region GND in the above-described image pickup device IS, so that the portion of the silicon nitride film SNF located in the ground region GND is etched It is possible to suppress the plasma damage caused by the etching process from being applied to the photodiode region (PDR) without performing the process.
The contact portion PGC is disposed near the center in the Y direction of the photodiode region PDR and retreats away from the contact portion PGC near the Y direction center of the contact portion PGC side of the photodiode region PDR The photodiode region PDR is arranged so as to be further distant from the ground region GND (contact portion PGC). As a result, the plasma damage caused by the etching treatment is reduced. As a result, the dark current due to the plasma damage can be reliably suppressed.
In the contact portions PGC in which the plug PG is connected to the ground region GND in each of the above-described embodiments, the metal silicide film MSC may be formed as shown in FIG. As shown in FIG. 70, the P-type impurity region HC having a relatively high impurity concentration may be formed in the contact hole CH in a self-adjusting manner. Thereby, the contact resistance between the plug PG and the ground region GND can be reduced.
The semiconductor device described in each of the embodiments can be combined in various manners as required.
Although the invention made by the present inventors has been specifically described on the basis of the embodiments, it is needless to say that the present invention is not limited to the above-described embodiments, and various changes can be made without departing from the gist of the invention.
Claims (15)
An element formation region defined by the first impurity region of the first conductivity type defined in the semiconductor substrate,
A pixel region defined in the element formation region,
A photoelectric conversion unit formed in the pixel region,
A ground region electrically connected to the photoelectric conversion portion and electrically connected to the ground potential; and a ground region electrically connected to the photoelectric conversion portion,
An antireflection film for suppressing reflection of light formed to cover at least the photoelectric conversion portion and the ground region,
An interlayer insulating film formed to cover the antireflection film,
And a plug which is formed to penetrate the interlayer insulating film and the anti-reflection film and is electrically connected to the ground region.
The separation device is insulated and separated by an insulating film, and a second impurity region of the first conductivity type having an impurity concentration higher than the impurity concentration of the first impurity region is formed in the ground region.
The separation device is insulated and separated by an insulating film,
And a third impurity concentration region of the first conductivity type having an impurity concentration higher than the impurity concentration of the first impurity region is formed between the first impurity region portion located in the ground region and the photoelectric conversion portion.
The separation device is insulated and separated by an insulating film,
And a pixel transistor region defined on the side of the photoelectric conversion portion in the pixel region,
And the ground region is disposed in a direction away from the photoelectric conversion portion with respect to the pixel transistor region.
The separation device is insulated and separated by an insulating film,
Wherein the photoelectric conversion portion includes a portion that retreats away from a contact portion of the ground region in contact with the plug.
The separation device is spliced and separated by a pn junction,
A fifth impurity region of the first conductivity type having an impurity concentration higher than the impurity concentration of the first impurity region is formed in the ground region,
Wherein the photoelectric conversion portion includes a second conductivity type photoelectric conversion impurity region,
Wherein the pn junction includes a junction portion between the fifth impurity region of the first conductivity type and the photoelectric conversion impurity region of the second conductivity type.
The separation device is spliced and separated by a pn junction,
And a sixth impurity region of the first conductivity type having an impurity concentration higher than the impurity concentration of the first impurity region between the ground region and the photoelectric conversion portion,
Wherein the photoelectric conversion portion includes a second conductivity type photoelectric conversion impurity region,
Wherein the pn junction includes a junction portion between the sixth impurity region of the first conductivity type and the photoelectric conversion impurity region of the second conductivity type.
Wherein the separating portion is spliced and separated by a pn junction,
Wherein the photoelectric conversion portion includes a portion that retreats away from the contact portion of the ground region in contact with the plug.
And a contact injection portion in which impurities of the first conductivity type are injected into the contact portion of the plug and the ground region.
And the metal silicide is formed in the contact portion of the plug and the ground region.
Forming a photoelectric conversion portion in the pixel region,
Forming an antireflection film for suppressing reflection of light so as to cover at least the photoelectric conversion portion and the ground region;
Forming an interlayer insulating film so as to cover the antireflection film,
Forming a plug through the interlayer insulating film and the antireflection film to contact the ground region and electrically connect the ground region to a ground potential;
And a step of forming an image on the substrate.
The step of defining the element formation region includes a step of defining the region where the photoelectric conversion portion is formed and the ground region by the separation insulating film,
Wherein the ground region and the photoelectric conversion portion are insulated and separated by the separating insulating film.
Wherein the step of forming the photoelectric conversion portion includes a step of forming a second conductivity type photoelectric conversion impurity region,
Wherein the ground region and the photoelectric conversion portion are bonded and separated by bonding between the element formation region portion of the first conductivity type and the photoelectric conversion impurity region of the second conductivity type located in the ground region.
And forming a contact injection portion by implanting impurities into a contact portion between the plug and the ground region.
And forming a metal silicide on a contact portion between the plug and the ground region.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015024059A JP2016149387A (en) | 2015-02-10 | 2015-02-10 | Image pickup device and manufacturing method of the same |
| JPJP-P-2015-024059 | 2015-02-10 |
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| Publication Number | Publication Date |
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| KR20160098040A true KR20160098040A (en) | 2016-08-18 |
Family
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| Application Number | Title | Priority Date | Filing Date |
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| KR1020160010868A KR20160098040A (en) | 2015-02-10 | 2016-01-28 | Image Pickup Device and Method of Manufacturing the Same |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US9647023B2 (en) |
| JP (1) | JP2016149387A (en) |
| KR (1) | KR20160098040A (en) |
| CN (1) | CN105870140A (en) |
| TW (1) | TW201640662A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7156611B2 (en) * | 2018-05-18 | 2022-10-19 | マッハコーポレーション株式会社 | Solid-state imaging device and method for forming the same |
| WO2020100577A1 (en) * | 2018-11-13 | 2020-05-22 | ソニーセミコンダクタソリューションズ株式会社 | Solid-state imaging device and electronic apparatus |
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| US4488165A (en) * | 1981-12-22 | 1984-12-11 | Levine Michael A | Extrinsic infrared detector with a charge reset function |
| US5592124A (en) * | 1995-06-26 | 1997-01-07 | Burr-Brown Corporation | Integrated photodiode/transimpedance amplifier |
| JP2001332714A (en) * | 2000-05-22 | 2001-11-30 | Canon Inc | Solid-state image pickup device |
| TW449939B (en) * | 2000-07-03 | 2001-08-11 | United Microelectronics Corp | Photodiode structure |
| JP2006269546A (en) * | 2005-03-22 | 2006-10-05 | Sony Corp | Solid-state imaging device |
| US20070108546A1 (en) | 2005-11-15 | 2007-05-17 | Canon Kabushiki Kaisha | Photoelectric converter and imaging system including the same |
| JP2007165864A (en) | 2005-11-15 | 2007-06-28 | Canon Inc | Photoelectric converter, manufacturing method thereof, and imaging system |
| US7728277B2 (en) * | 2005-11-16 | 2010-06-01 | Eastman Kodak Company | PMOS pixel structure with low cross talk for active pixel image sensors |
| JP2007149842A (en) * | 2005-11-25 | 2007-06-14 | Sanyo Electric Co Ltd | Semiconductor device |
| US20080217659A1 (en) * | 2007-03-06 | 2008-09-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Device and Method To Reduce Cross-Talk and Blooming For Image Sensors |
| JP2010087379A (en) * | 2008-10-01 | 2010-04-15 | Brookman Technology Inc | Color imaging device |
| US8618458B2 (en) * | 2008-11-07 | 2013-12-31 | Omnivision Technologies, Inc. | Back-illuminated CMOS image sensors |
| JP2010219233A (en) * | 2009-03-16 | 2010-09-30 | Canon Inc | Method of manufacturing semiconductor device |
| JP2010283145A (en) * | 2009-06-04 | 2010-12-16 | Sony Corp | Solid-state image pickup element and method of manufacturing the same, electronic apparatus |
| JP2012015160A (en) * | 2010-06-29 | 2012-01-19 | Panasonic Corp | Solid state imaging device and method of manufacturing the same |
| JP2012084644A (en) * | 2010-10-08 | 2012-04-26 | Renesas Electronics Corp | Backside illumination solid-state imaging device |
| US8664734B2 (en) * | 2011-01-11 | 2014-03-04 | Himax Imaging, Inc. | Hole-based ultra-deep photodiode in a CMOS image sensor and a process thereof |
| JP2012146989A (en) | 2012-02-20 | 2012-08-02 | Canon Inc | Photoelectric conversion device and imaging system |
| KR102017713B1 (en) * | 2012-05-31 | 2019-09-03 | 삼성전자주식회사 | Cmos image sensor |
| JP5985269B2 (en) * | 2012-06-26 | 2016-09-06 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| CN107994041B (en) * | 2012-10-29 | 2021-12-31 | 瑞萨电子株式会社 | Method for manufacturing imaging device |
| US9520425B2 (en) * | 2013-03-01 | 2016-12-13 | Semiconductor Components Industries, Llc | Image sensors with small pixels having high well capacity |
| US9231007B2 (en) * | 2013-08-27 | 2016-01-05 | Semiconductor Components Industries, Llc | Image sensors operable in global shutter mode and having small pixels with high well capacity |
-
2015
- 2015-02-10 JP JP2015024059A patent/JP2016149387A/en active Pending
-
2016
- 2016-01-28 KR KR1020160010868A patent/KR20160098040A/en unknown
- 2016-02-01 TW TW105103078A patent/TW201640662A/en unknown
- 2016-02-05 CN CN201610082713.6A patent/CN105870140A/en active Pending
- 2016-02-09 US US15/019,089 patent/US9647023B2/en not_active Expired - Fee Related
-
2017
- 2017-04-22 US US15/494,473 patent/US10163953B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN105870140A (en) | 2016-08-17 |
| TW201640662A (en) | 2016-11-16 |
| US20160233263A1 (en) | 2016-08-11 |
| US9647023B2 (en) | 2017-05-09 |
| JP2016149387A (en) | 2016-08-18 |
| US20170229495A1 (en) | 2017-08-10 |
| US10163953B2 (en) | 2018-12-25 |
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