KR20160080009A - Digital output overflow processing device - Google Patents

Abstract

Provided is a digital output overflow processing device comprising: an excessive output detecting unit which detects an overflow in a digital signal outputted from a digital signal processor, wherein the digital signal processor is a digital constituent part which performs a digital signal processing required for a relay signal in a digital part mounted in a relay device for relaying a mobile communication signal; and a digital gain control unit which is arranged on a signal transfer path of the digital signal, and controls a gain based on at least one among whether an output is excessive, which is delivered as a detection result from the excessive output detecting unit, and an excessive output level such that a level of an excessively-outputted digital signal is changed to be not higher than a preset tolerance level. According to the present invention, a digital output overflow and digital spurious problems can be solved by monitoring whether an output signal outputted from a digital signal processor is excessive.

Description

[0001] DIGITAL OUTPUT OVERFLOW PROCESSING DEVICE [0002]

The present invention relates to a digital output overflow processing apparatus, and more particularly, to a digital output overflow processing apparatus capable of solving a digital output overflow and a digital spurious problem by monitoring whether a digital signal outputted from a digital signal processor And a digital output overflow processing apparatus.

In general, a repeater is installed in a mobile communication system to expand a service area of a base station or to solve a shadow area. At this time, a distributed antenna system (Distributed Antenna System) is also commercially available as a method capable of appropriately accommodating various requirements of the installation of the repeater depending on the installation area and characteristics. In recent years, demands for a digital system for performing digital processing on a relay signal such as a digital distributed antenna system are also increasing.

In such a digital system, a digital signal processor, which is a component for performing digital signal processing on a relay signal, and a digital-to-analog converter for converting a digital signal back to an analog signal and outputting the analog signal to a final output stage are indispensable. At this time, when an over output occurs in the output from the digital signal processor and / or the digital / analog converter, damage may occur to the downstream PAU or the entire system, and system deterioration and service degradation may occur. Also, when an over-current occurs as described above, the digital unnecessary wave can be radiated to the outside.

Therefore, it is required to monitor whether or not a signal outputted from a digital signal processor or a digital / analog converter in a digital part is over-output, thereby preventing signal distortion and digital spurious emission due to over-output.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital output overflow processing apparatus capable of digital output overflow processing, and more particularly, to a digital output overflow processing apparatus which monitors whether a digital signal output from a digital signal processor A digital output overflow processing apparatus capable of solving the flow and digital spurious problem is provided.

According to an aspect of the present invention, there is provided an over and over detection unit for detecting an overflow of a digital signal output from a digital signal processor, wherein the digital signal processor comprises: A digital component for performing digital signal processing required for a relay signal in a digital part mounted on the device; And a control unit which is disposed on a signal transmission path of the digital signal and outputs the overdriven digital signal based on at least one of an overdelivery and an overdrive level transmitted as a detection result of the overdrive detection unit There is provided a digital output overflow processing apparatus including a digital gain control section for controlling gain.

In one embodiment, a transmission delay, which is disposed on the signal transmission path at a rear end of the over-power detection unit and at a front end of the digital gain control unit, from a signal detection point of the over- And a delay element for giving a time delay to be larger than a time delay required for over-output detection in the output detection section.

In one embodiment, the digital gain control section includes:

A transmission delay time from a signal detection point of the over-power detection unit to a placement position of the digital gain control unit is longer than a transmission delay time of the over-power detection unit in the over-power detection unit, And a value larger than the delay.

In one embodiment, the digital gain control section includes:

And a digital-to-analog converter disposed upstream of the digital-to-analog converter for converting a digital signal into an analog signal based on the signal transmission path and outputting a gain-changed digital signal below the predefined tolerance level.

In one embodiment, the over-

It is possible to determine whether the digital signal output from the digital signal processor exceeds a predetermined maximum bit overflow or whether the output level of the digital signal exceeds a predetermined peak value to determine whether the digital signal is over- have.

In one embodiment, the digital signal processor may further include a digital filter that removes signals other than the frequency band of the relay signal in order to remove digital spurious signals generated by the overflow of the digital signal output from the digital signal processor .

In one embodiment, the digital filter may be disposed at a rear end of the digital gain control unit with respect to the signal transmission path.

According to an embodiment of the present invention, there is provided a digital output overflow processing apparatus capable of digital output overflow processing, and more particularly, to a digital output overflow processing apparatus capable of performing digital output overflow processing, The digital output overflow and the digital spurious problem are solved, thereby preventing damage to the PAU due to saturation of the digital part and digital spurious emission, deterioration of system characteristics and / or service degradation.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a view showing an example of a topology of a distributed antenna system to which the present invention can be applied; FIG.
2 is a block diagram of an embodiment of a remote unit in a distributed antenna system to which the present invention may be applied;
3 is a diagram for explaining a digital output overflow processing apparatus according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention is capable of various modifications and various embodiments, and specific embodiments are illustrated in the drawings and described in detail in the detailed description. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the following description of the present invention, detailed description of known related arts will be omitted when it is determined that the gist of the present invention may be unnecessarily obscured. In addition, numerals (e.g., first, second, etc.) used in the description of the present invention are merely an identifier for distinguishing one component from another.

Also, in this specification, when an element is referred to as being "connected" or "connected" with another element, the element may be directly connected or directly connected to the other element, It should be understood that, unless an opposite description is present, it may be connected or connected via another element in the middle.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a diagram illustrating an example of a topology of a distributed antenna system to which the present invention can be applied.

1, a distributed antenna system (DAS) includes a base station interface unit (BIU) 10, a main unit (MU) 20, (Hub Unit) 30, which is an extension node, and a plurality of RUs (Remote Unit) 40, which are arranged at remote service locations. Such a distributed antenna system may be implemented as an analog DAS or a digital DAS, and in some cases may be implemented as a mixed type (i.e., some nodes perform analog processing and the remaining nodes perform digital processing).

1 shows an example of a topology of a distributed antenna system, and a distributed antenna system may be used in an installation area and an application field (for example, an in-building, a subway, a hospital, Stadiums, etc.), various topology modifications are possible. In this case, the number of BIU 10, MU 20, HUB 30, RU 40, and the connection relationship of the upper and lower ends of the BIU 10, the HUB 30, and the RU 40 may differ from those of FIG. Also, in the distributed antenna system, the HUB 20 is utilized when the number of branches to be branched from the MU 20 to the STAR structure is limited, compared to the number of RUs 40 required for installation. Therefore, the HUB 20 may be omitted when the number of the RUs 40 required to be installed can be sufficiently satisfied even with a single MU 20, or when a plurality of MUs 20 are installed.

Hereinafter, with reference to the topology of FIG. 1, each node in the distributed antenna system applicable to the present invention and its function will be described in turn.

A Base Station Interface Unit (BIU) 10 serves as an interface between a Base Station Transceiver System (BTS) such as a base station and an MU 20 in a distributed antenna system. In FIG. 1, a plurality of BTSs are connected to a single BIU 10, but the BIU 10 may be separately provided for each service provider, for each frequency band, and for each sector.

Generally, since the RF signal transmitted from the BTS is a high power signal, the BIU 10 generally transmits a RF signal of a high power level to the MU 20 And transfers it to the MU 20. 1, the BIU 10 receives a signal of a mobile communication service for each frequency band (or for each service provider, sector) as shown in FIG. 1, combines the signals, ), As shown in FIG.

If the BIU 10 lowers the high power signal of the BTS to a low power and then combines the mobile communication service signals and transmits them to the MU 20, the MU 20 combines the received mobile communication service signals Relay signal ") for each branch. In this case, when the distributed antenna system is implemented as a digital DAS, the BIU 10 includes a unit that performs a function of converting a high-power RF signal of the BTS into a low-power RF signal, and a unit that performs an IF (Intermediate Frequency) And converted into a unit for performing a digital signal process and combines them. Alternatively, if the BIU 10 only performs a function of lowering the high power signal of the BTS to low power, the MU 20 may combine the transmitted relay signals and distribute the relay signals for each branch.

As described above, the combine relay signal distributed from the MU 20 is directly transmitted to the RU 40 or the HUB 20 via the branch, and each RU 40 transmits the combined combine relay signal to the frequency band (Analog signal processing in case of analog DAS, digital signal processing in case of digital DAS). Accordingly, each RU 40 transmits a relay signal to a user terminal in its service coverage through a service antenna. The specific functional configuration of the RU 40 will be described later in detail with reference to FIG.

1, a case where an RF cable is connected between the BTS and the BIU 10 and a case where the BIU 10 and the MU 20 are connected by the RF cable, and all the connections from the MU 20 to the lower end are connected by the optical cable, The signal transport medium between each node can also be modified in various ways. For example, the BIU 10 and the MU 20 may be connected through an RF cable, but may be connected through an optical cable or a digital interface. As another example, an optical cable is connected between the MU 20 and the HUB 30 and an RU 40 directly connected to the MU 20, and an RF cable, a twisted cable, a UTP Cable, or the like. As another example, in another example, the RU 40 directly connected to the MU 20 may also be implemented in such a manner that they are connected via an RF cable, a twisted cable, a UTP cable, or the like.

However, the following description will be made with reference to Fig. Therefore, in this embodiment, the MU 20, the HUB 30, and the RU 40 may include optical transceiver modules for all-optical conversion / photoelectric conversion, and when interconnecting nodes with a single optical cable, Wavelength Division Multiplexing (WDM) devices. This can be clearly understood from the functional description of the RU 40 in FIG. 2, which will be described later.

The distributed antenna system can be connected to an external management apparatus (NMS (Network Management Server or System) in FIG. 1 via the network.) Accordingly, the manager can remotely monitor the status and problem of each node of the distributed antenna system through the NMS And can control the operation of each node remotely.

2 is a block diagram of an embodiment of a remote unit in a distributed antenna system to which the present invention may be applied. Here, the block diagram of FIG. 2 illustrates one implementation of an RU 40 within a digital DAS in which the inter-node connection is via an optical cable.

Referring to FIG. 2, the RU 40 includes an optical to electrical converter 50, a serializer / demultiplexer 50, and a demultiplexer / demultiplexer 50 based on a downlink signal transmission path (i.e., a forward path) Deserializer 44, Deframer 52, Digital Signal Processor (DSP) 70, Digital to Analog Converter (DAC) 54, Up Converter 56, Power Amplifier Unit (58).

Thus, in the forward path, the optical relaying signal digitally transmitted through the optical cable is converted into an electrical signal (serial digital signal) by the optical / electrical converter 50, and the serial digital signal is converted by the parallel digital signal And the parallel digital signal is reformatted by the de-framer 52 so that the digital signal processing unit 70 can perform frequency band processing. The digital signal processing unit 70 performs functions such as digital signal processing, digital filtering, gain control, and digital multiplexing for each frequency band with respect to the relay signal. The digital signal processor 70 may be implemented as an FPGA (Field Programmable Gate Array). The digital signal that has passed through the digital signal processing unit 70 is converted to an analog signal via the digital / analog converter 54 constituting the final stage of the digital part based on the signal transmission path. At this time, the analog signal is an IF signal, and is up-converted to an analog signal of the original RF band through the up-converter 56. In this way, the analog signal converted into the original RF band (i.e., the RF signal) is transmitted through the PAU 58 and transmitted through the service antenna (not shown).

The RU 40 includes a Low Noise Amplifier (LNA) 68, a down converter 66, an analog-to-digital converter (ADC) 68, A digital signal processor (DSP) 70, framers 62 and 44, and an electrical to optical converter 60. The digital signal processor (DSP)

Thus, in the reverse path, the RF signal (i.e., the terminal signal) received via the service antenna (not shown) from the user terminal (not shown) in the service coverage is low noise amplified by the LNA 68, 66, and the converted IF signal is converted into a digital signal by the analog-to-digital converter 64 and transmitted to the digital signal processing unit 70. [ The digital signal passed through the digital signal processing unit 70 is formatted into a format suitable for digital transmission through the framer 62 and converted into a serial digital signal by 44, Converted into an optical digital signal and transmitted to an upper end through an optical cable.

Although not clearly shown in FIG. 2, when the RUs 40 are cascade-connected to each other as in the example of FIG. 1, when a relay signal transmitted from an upper end is transmitted to a neighboring RU of a cascaded lower end The following method can be used. For example, when an optical relay signal digitally transmitted from an upper stage is transmitted to a neighboring RU of a lower stage cascaded, the optical relay signal digitally transmitted from the upper stage is transmitted to the optical / electrical converters 50 -> (44) -> The demultiplexer 52 can be transmitted to the adjacent RUs through the order of the framer 62 and the optical transceiver 60.

Although the downlink and uplink signal path 44 and the digital signal processor (DSP) 70 are shown in FIG. 2 as being common, they may be separately provided for each path. In addition, although the optical / electrical converter 50 and the optical / electrical converter 60 are shown separately in Fig. 2, they may be implemented in a single optical transceiver module.

1 and 2, a configuration example of one form of topology and RU of the distributed antenna system has been described. The digital output overflow processing apparatus described below can be implemented in the MU 20 and / or the RU 40 constituting the above-described distributed antenna system (in particular, the digital DAS). Of course, the present invention can be implemented in an RF digital repeater including both a service antenna for transmitting the downlink relay signal of the forward path to the outside and a link antenna for transmitting the uplink relay signal of the reverse path toward the equipment station. Also, at this time, a digital-to-analog converter will be provided in each of the forward path and the reverse path, so that a digital output overflow processing apparatus according to an embodiment of the present invention to be described below can be implemented in both a forward path and a reverse path. Hereinafter, a digital output overflow processing apparatus according to an embodiment of the present invention will be described in detail with reference to FIG.

3 is a diagram for explaining a digital output overflow processing apparatus according to an embodiment of the present invention.

3, an apparatus for processing digital output overflow according to an exemplary embodiment of the present invention may include an over output detection unit 210, a delay element 215, a digital gain control unit 220, and a digital filter 230 have. At this time, the digital output overflow processing device can be implemented in the digital part 200 mounted in the relay device and responsible for the digital processing required for the relay signal (that is, the downlink or uplink mobile communication signal).

And the output detection unit 210 detect an overflow of the digital signal output from the digital signal processor 205 in the digital part 200 based on the signal transmission path.

2, the digital signal processor 205 is a digital unit for performing digital signal processing required for the relay signal for relaying a mobile communication signal. At this time, if the input digital signal exceeds the processing capability of the digital signal processor 205 and the digital signal processor 205 is saturated, an overflow may occur in the digital signal output from the digital signal processor 205. In addition, when the processing capability of the digital signal processor 205 is saturated, an overflow may occur in a digital signal to be output, and a digital spurious wave may be generated. An example of this is shown in FIG. 3 (a).

Accordingly, the over-power detection unit 210 monitors whether an overflow has occurred in the digital signal output from the digital signal processor 205 based on the signal transmission path.

At this time, the detection as to whether or not the over-output by the over-output detecting unit 210 is performed can be performed by, for example, determining whether or not the digital signal output from the digital signal processor 205 exceeds a predetermined (i.e., allowed) maximum bit overflow Can be performed by monitoring. For example, when the digital signal output from the digital signal processor 205 is a 14-bit signal, it is checked whether an overflow has occurred in the total 13 bits of data excluding the 1-bit sign bit, Can be detected. As another example, the detection as to whether or not the over-output by the over-output detecting unit 210 may be performed by monitoring whether or not the digital output level output from the digital signal processor 205 exceeds a predetermined peak value.

 According to the above-described method, the over-power detection unit 210 can determine whether the digital signal output from the digital signal processor 205 is over-output. If it is determined that the over-output is present, It is possible to output the gain change control signal to the digital gain controller 220 disposed at the subsequent stage. Also, depending on the implementation method, the over-power detection unit 210 may detect the degree of output (i.e., the over-output level) as to how much the digital signal is output. In this case, the over-power detection unit 210 may output, as the determination result, a variable gain change control signal according to the over-power level exceeding the allowable range to the digital gain control unit 220. [

In this case, the overdetection detection unit 210 may be implemented as a separate component for only the corresponding function. However, the overdetection detection unit 210 may include a component other than a DSP (Digital Signal Processor) in the digital part 200 (for example, Gate Array), a CPU (Central Processing Unit), or the like).

The digital gain control unit 220 is disposed at the rear end of the over-power detection unit 210 described above with reference to the signal transmission path of the digital signal, and based on the gain change control signal transmitted from the over-power detection unit 210, And performs gain control so that the digital signal is gain-changed below a predetermined allowable level.

As a gain control method through the digital gain controller 220, the following methods can be applied. For example, the digital gain control unit 220 may apply a fixed attenuation rate to lower the signal level of the digital signal. At this time, if the signal level can not be lowered below the predetermined allowable level by only a single gain change using the fixed signal attenuation rate, the gain changing operation may be repeatedly performed. In another example, the digital gain control unit 220 may be implemented as a variable attenuator so that signal attenuation may be performed by an output level exceeding a tolerance level according to the variable gain change control signal transmitted from the over-power detection unit 210 have. In this case, the digital gain controller 220 may be implemented as a variable attenuator.

The digital gain control unit 220 controls the transmission delay from the signal detection point of the over-power detection unit 210 to the placement position of the digital gain control unit 220 in consideration of the signal transmission delay on the signal transmission path of the digital signal (See Delay A in FIG. 3) has a value larger than a time delay (see Delay B in FIG. 3) required for over-output detection in the over-power detecting section 210. That is, the arrangement position of the digital gain control unit 220 can be selected as an appropriate position on the signal transmission path in consideration of the detection delay by the over-power detection unit 210. This is to increase the effectiveness of the gain control on the output digital signal.

 3, a delay element 215 is further added between the signal detection point by the over-detection detecting section 210 and the digital gain control section 220. [ Here, the delay element 215 is disposed between the signal detection point of the over-detection detection unit 210 and the digital gain control unit 220 on the basis of the signal transmission path, and forcibly delays the transmitted digital signal by a predetermined time do. The reason for this is as follows. The transmission delay of the self-transmission according to the path between the signal detection point of the over-power detection unit 210 and the digital gain control unit 220 is greater than the detection delay of the over- , Long) may be difficult to implement. Therefore, in the example of FIG. 3, in consideration of such a case, a delay element 215 forcibly giving a time delay is additionally provided so that the signal from the signal detection point of the over-power detection section 210 to the digital gain control section 220 So that the transmission delay is larger than the detection delay in the over-power detection unit 210. [

When the gain control process is performed through the digital gain controller 220 as described above, it is possible to obtain a signal in which the overflow of the overdriven digital signal is removed. An example of this is shown in FIG. 3 (b).

The digital signal output from the digital gain control unit 220 in a state in which the output problem is solved through the gain control process is input to the digital filter 230 disposed at the rear stage of the digital gain control unit 220, .

 As described above, the digital filter 230 performs the function of overflowing the digital signal from the digital signal processor 205 according to the over-output and eliminating the digital spurious generated. For example, the digital filter 230 may be implemented to remove unwanted waves existing in a band other than the frequency band of the relay signal that should normally be transmitted. An example of this is shown in FIG. 3 (c).

In FIG. 3, the digital filter 230 is disposed at the rear end of the digital gain controller 220, but the digital filter 230 may be disposed at a position different from that in FIG. For example, it may be disposed between the signal detection point by the over-power detection unit 210 and the digital gain control unit 220 based on the signal transmission path. However, in a state where an excessive overflow occurs, the filter function may also deteriorate. In FIG. 3, the digital filter 230 is disposed at the rear end of the digital gain controller 220 in consideration of this case. However, the above-described digital filter 230 may be omitted. If the filter implementation is difficult, it is effective to remove the overflow and the unwanted wave only by the gain control through the digital gain controller 220 of the previous stage.

Through the above-described configuration, the digital output overflow processing apparatus according to the first embodiment of the present invention appropriately removes the over output and the digital unnecessary wave of the digital signal output from the digital signal processor 205 (d)), deterioration of the PAU and the like at the rear end, system and / or service degradation can be prevented.

At this time, the digital output overflow processing apparatus according to the embodiment of the present invention may be disposed at the previous stage of the digital-to-analog converter 240 for converting a digital signal into an analog signal on the basis of the signal transmission path. In this case, the analog signal to be transmitted to the final stage output of the PAU or the like via the digital / analog converter 240 can have a steady state without distortion.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the following claims And changes may be made without departing from the spirit and scope of the invention.

200: Digital Part
205: Digital signal processor
210: an output detector
215: Delay element
220: digital gain control section
230: Digital filter
240: digital / analog converter

Claims (7)

An over-output detecting unit for detecting an overflow of a digital signal output from a digital signal processor, wherein the digital signal processor includes a digital signal processor A digital component for performing digital signal processing required for the relaying signal; And
And a gain control unit that is disposed on a signal transmission path of the digital signal and outputs a gain control signal to change over-output digital signals to a predetermined allowable level or less based on at least one of over- A digital gain control section
And a digital output overflow processing unit.
The method according to claim 1,
And a transmission delay circuit which is arranged on the signal transmission path at a rear end of the over-power detection unit and at a front end of the digital gain control unit, wherein a transmission delay from a signal detection point of the over- Further comprising a delay element for giving a time delay to be larger than a time delay required for output detection.
The method according to claim 1,
Wherein the digital gain control unit comprises:
A transmission delay time from a signal detection point of the over-power detection unit to a placement position of the digital gain control unit is longer than a transmission delay time of the over-power detection unit in the over-power detection unit, Wherein the delay circuit is disposed at a position that has a larger value than the delay.
The method according to claim 1,
Wherein the digital gain control unit is arranged in front of a digital-to-analog converter for converting a digital signal into an analog signal on the basis of the signal transmission path, and outputs a gain-changed digital signal to the digital- The digital output overflow processing unit.
The method according to claim 1,
The over-
Detecting whether the digital signal output from the digital signal processor exceeds a predetermined maximum bit overflow or whether the output level of the digital signal exceeds a predetermined peak value, Digital output overflow processing device.
The method according to claim 1,
Further comprising a digital filter for removing signals other than the frequency band of the relay signal in order to eliminate digital spurious signals generated by an overflow of the digital signal output from the digital signal processor, .
The method according to claim 6,
Wherein the digital filter is disposed at a rear end of the digital gain control unit with respect to the signal transmission path.

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