KR20160047581A - 인공 신경 시스템에서 브레이크포인트 결정 유닛을 구현하기 위한 방법들 및 장치 - Google Patents

인공 신경 시스템에서 브레이크포인트 결정 유닛을 구현하기 위한 방법들 및 장치 Download PDF

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KR20160047581A
KR20160047581A KR1020167008625A KR20167008625A KR20160047581A KR 20160047581 A KR20160047581 A KR 20160047581A KR 1020167008625 A KR1020167008625 A KR 1020167008625A KR 20167008625 A KR20167008625 A KR 20167008625A KR 20160047581 A KR20160047581 A KR 20160047581A
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breakpoint
determination unit
artificial
spiking
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마이클-데이비드 나카요시 케노이
2세 윌리엄 리차드 벨
라마크리쉬나 킨타다
벤카트 란간
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퀄컴 인코포레이티드
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/10—Interfaces, programming languages or software development kits, e.g. for simulating neural networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/049—Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/0499—Feedforward networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/082—Learning methods modifying the architecture, e.g. adding, deleting or silencing nodes or connections
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/088—Non-supervised learning, e.g. competitive learning
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/302—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a software system

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  • General Engineering & Computer Science (AREA)
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  • Life Sciences & Earth Sciences (AREA)
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  • Measuring And Recording Apparatus For Diagnosis (AREA)
  • Investigating Or Analysing Biological Materials (AREA)
  • Neurology (AREA)
  • Debugging And Monitoring (AREA)
KR1020167008625A 2013-09-03 2014-08-14 인공 신경 시스템에서 브레이크포인트 결정 유닛을 구현하기 위한 방법들 및 장치 Withdrawn KR20160047581A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361873044P 2013-09-03 2013-09-03
US61/873,044 2013-09-03
US14/281,118 2014-05-19
US14/281,118 US9710749B2 (en) 2013-09-03 2014-05-19 Methods and apparatus for implementing a breakpoint determination unit in an artificial nervous system
PCT/US2014/051044 WO2015034640A2 (en) 2013-09-03 2014-08-14 Methods and apparatus for implementing a breakpoint determination unit in an artificial nervous system

Publications (1)

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KR20160047581A true KR20160047581A (ko) 2016-05-02

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US (1) US9710749B2 (enExample)
EP (1) EP3042343A2 (enExample)
JP (1) JP2016532216A (enExample)
KR (1) KR20160047581A (enExample)
CN (1) CN105518721B (enExample)
CA (1) CA2919718A1 (enExample)
WO (1) WO2015034640A2 (enExample)

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WO2016183522A1 (en) * 2015-05-14 2016-11-17 Thalchemy Corporation Neural sensor hub system
KR101806833B1 (ko) 2015-12-31 2017-12-11 인천대학교 산학협력단 인공 신경망의 희소 활동을 활용하는 동기 직접 회로의 소비 전력 절감 장치 및 방법
CN105956658A (zh) * 2016-04-29 2016-09-21 北京比特大陆科技有限公司 数据处理方法、数据处理装置及芯片
CN107545304A (zh) * 2017-09-16 2018-01-05 胡明建 一种根据网络需求改变激活函数人工神经元的设计方法
US11694066B2 (en) * 2017-10-17 2023-07-04 Xilinx, Inc. Machine learning runtime library for neural network acceleration
CN110515754B (zh) * 2018-05-22 2021-01-26 深圳云天励飞技术有限公司 神经网络处理器的调试系统及方法
US11694090B2 (en) 2019-04-10 2023-07-04 International Business Machines Corporation Debugging deep neural networks

Family Cites Families (12)

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Publication number Priority date Publication date Assignee Title
JPH0782439B2 (ja) 1990-01-26 1995-09-06 インターナショナル・ビジネス・マシーンズ・コーポレイション 推論エンジンの実行監視方法及び装置
JP3178884B2 (ja) * 1992-03-30 2001-06-25 株式会社東芝 ニューラルネットワーク装置
US6560592B1 (en) * 1998-03-19 2003-05-06 Micro Data Base Systems, Inc. Multi-model computer database storage system with integrated rule engine
FR2824936B1 (fr) 2001-05-16 2005-09-02 Schneider Automation Systeme de diagnostic predictif dans un automate programmable
JP4944368B2 (ja) * 2004-06-08 2012-05-30 キヤノン株式会社 マルチプロセッサシステム、デバッグ方法、及びプログラム
US7634761B2 (en) 2004-10-29 2009-12-15 Microsoft Corporation Breakpoint logging and constraint mechanisms for parallel computing systems
US7770155B2 (en) * 2005-11-03 2010-08-03 International Business Machines Corporation Debugger apparatus and method for indicating time-correlated position of threads in a multi-threaded computer program
US20070130491A1 (en) 2005-12-06 2007-06-07 Mazumder Didarul A Error detection of digital logic circuits using hierarchical neural networks
US9665822B2 (en) 2010-06-30 2017-05-30 International Business Machines Corporation Canonical spiking neuron network for spatiotemporal associative memory
US8560474B2 (en) 2011-03-07 2013-10-15 Cisco Technology, Inc. System and method for providing adaptive manufacturing diagnoses in a circuit board environment
KR101838560B1 (ko) 2011-07-27 2018-03-15 삼성전자주식회사 뉴로모픽 칩에서 스파이크 이벤트를 송수신하는 송수신 장치 및 방법
US9111224B2 (en) * 2011-10-19 2015-08-18 Qualcomm Incorporated Method and apparatus for neural learning of natural multi-spike trains in spiking neural networks

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CA2919718A1 (en) 2015-03-12
CN105518721A (zh) 2016-04-20
JP2016532216A (ja) 2016-10-13
WO2015034640A2 (en) 2015-03-12
US20150066826A1 (en) 2015-03-05
US9710749B2 (en) 2017-07-18
WO2015034640A3 (en) 2015-05-14
CN105518721B (zh) 2018-10-02
EP3042343A2 (en) 2016-07-13

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Patent event date: 20160331

Patent event code: PA01051R01D

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