KR20160025643A - Display Device and Method of manufacturing the same - Google Patents

Abstract

The present invention relates to a display device, and more particularly, to a display device which is equipped with a sensing electrode to sense a touch of a user. The display device according to an embodiment of the present invention is capable of reducing the thickness and manufacturing costs of the display device because the display device does not require an independent touch screen on the top surface of a display panel as existing techniques do by having the sensing electrode to sense the touch of the user embedded in the display panel. The display device includes: a thin film transistor which is formed in a pixel area defined by a gate line and a data line which intersect with each other and includes a gate electrode, a semiconductor layer, a source electrode and a drain electrode; a first protective film and a second protective film which are successively formed on the thin film transistor and have holes through which the source electrode and the drain electrode are partly exposed; a pixel electrode which is formed by patterning on the second protective film and connected to a section of the drain electrode which is exposed through the hole; a sensing line which is formed by patterning on the second protective film; a common electrode which is connected to the sensing line; a data pad which is connected to an end of the data line; a first connecting electrode and a second connecting electrode which are successively formed by patterning on the data pad; and a data pad electrode which is made of a material identical to that of the common electrode and connected to the data pad via the first connecting electrode and the second connecting electrode.

Description

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

The present invention relates to a display device, and more particularly, to a display device having a sensing electrode for sensing a touch of a user.

Various display devices such as a liquid crystal display device, a plasma display panel, and an organic light emitting display device have been developed.

Such a display device generally includes a mouse and a keyboard as input means, but in the case of navigation, a portable terminal, and a home appliance, a touch screen capable of directly inputting information using a finger or a pen has been applied .

Hereinafter, a conventional display device to which a touch screen is applied using a liquid crystal display device as an example will be described in detail.

1 is a schematic cross-sectional view of a conventional liquid crystal display device.

1, a conventional liquid crystal display device includes a liquid crystal panel 10 and a touch screen 20. As shown in FIG.

The liquid crystal panel 10 displays an image and includes a lower substrate 12, an upper substrate 14 and a liquid crystal layer 16 formed between the two substrates 12 and 14.

The touch screen 20 is formed on the upper surface of the liquid crystal panel 10 and senses the touch of the user. The touch screen 20 includes a touch substrate 22, a first sensing electrode 24 formed on the lower surface of the touch substrate 22, And a second sensing electrode (26) formed on the upper surface of the touch substrate (22).

The first sensing electrodes 24 are arranged in the horizontal direction on the lower surface of the touch substrate 22 and the second sensing electrodes 26 are arranged in the vertical direction on the upper surface of the touch substrate 22. Therefore, when the user touches the predetermined position, the capacitance between the first sensing electrode 24 and the second sensing electrode 26 changes at the touched position, and finally, the position where the capacitance is changed is sensed The touch position of the user can be sensed.

However, since such a conventional liquid crystal display device has a structure in which a separate touch screen 20 is formed on the upper surface of the liquid crystal panel 10, the total thickness is increased due to the touch screen 20, .

The present invention has been devised to overcome the above-mentioned problems of the prior art, and it is not necessary to construct a separate touch screen on the top surface of the display panel as in the prior art by incorporating a sensing electrode for sensing the user's touch inside the display panel, And a method of manufacturing the same.

According to an aspect of the present invention, there is provided a display device including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode formed in a pixel region defined by a crossing arrangement of a gate line and a data line, Thin film transistor; A first protective layer and a second protective layer sequentially formed on the thin film transistor and having a first contact hole for exposing the drain electrode; A pixel electrode formed on the second passivation layer and connected to the drain electrode through the first contact hole; A third protective layer formed on the pixel electrode; A first sensing line formed on the third protective film; And a common electrode formed on the first sensing line and directly connected to the first sensing line.

According to another aspect of the present invention, there is provided a method of manufacturing a display device, including: forming a thin film transistor including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode on a substrate; Sequentially forming a first protective layer and a second protective layer on the thin film transistor, the first protective layer having a first contact hole for exposing the drain electrode; Forming a pixel electrode layer on the second passivation layer; Forming a connection electrode by patterning the pixel electrode layer, and forming a pixel electrode connected to the drain electrode through the first contact hole; Sequentially forming a third protective layer and a metal layer for forming a sensing line on the entire surface of the substrate including the pixel electrode and the connection electrode; Forming a first sensing line and a second sensing line on the third passivation layer by patterning the third passivation layer and the metal layer through a patterning process using a halftone mask and forming a second contact hole exposing the connection electrode on the third passivation layer, Forming a protective film on the substrate; And forming a common electrode directly connected to the first sensing line on the first sensing line and connected to the connection electrode exposed through the second contact hole.

According to the present invention as described above, the following effects can be obtained.

In the present invention, since the common electrode is used as a sensing electrode for sensing a user's touch, it is not necessary to form a separate touch screen on the top surface of the display panel, thereby reducing the thickness of the display panel.

Further, the present invention can reduce the number of masks required in the manufacturing process of the display panel, thereby simplifying the manufacturing process and reducing the manufacturing cost.

1 is a schematic cross-sectional view of a conventional liquid crystal display device.
2 is a schematic plan view of a substrate for a display device according to an embodiment of the present invention.
3 is a cross-sectional view of a display device according to a first embodiment of the present invention.
4A to 4F are schematic sectional views of a manufacturing process of a display device according to the first embodiment of the present invention.
5 is a cross-sectional view showing an example of a common electrode divided into a plurality of regions.
6 is a cross-sectional view of a display device according to a second embodiment of the present invention.
7A to 7F are schematic sectional views of a manufacturing process of a display device according to a second embodiment of the present invention.

The term "on " as used herein is meant to encompass not only when a configuration is formed directly on top of another configuration, but also to the extent that a third configuration is interposed between these configurations.

The modifiers such as " first "and " second" described in the present specification do not mean the order of the corresponding configurations, but are intended to distinguish the corresponding configurations from each other.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

2 is a schematic plan view of a substrate for a display device according to an embodiment of the present invention. 2, the enlarged view drawn by the arrows is for showing a pixel region where the sensing line 600 and the common electrode 700 are electrically connected.

2, a display device according to an exemplary embodiment of the present invention includes a substrate 100, a gate line 200, a data line 300, a thin film transistor T, a pixel electrode 500, A common electrode 700, a driving integrated circuit 1, a gate built-in circuit 2, and a touch driver 3.

The substrate 100 may be made of glass or transparent plastic.

The gate lines 200 are arranged on the substrate 100 in a first direction, for example, in the horizontal direction. One end of the gate line 200 is connected to the gate built-in circuit 2 and the gate built-in circuit 2 is connected to the drive integrated circuit 1 through the gate pad 215, 1 are transferred to the gate line 200 via the gate pad 215 and the gate built-in circuit 2. [

The data lines 300 are arranged on the substrate 100 in a second direction different from the first direction, for example, in the longitudinal direction. In this manner, the gate line 200 and the data line 300 are arranged in an intersecting manner to define a plurality of pixel regions. One end of the data line 300 is connected to the driving integrated circuit 1 through a data pad 315. Therefore, the data signal applied from the driving integrated circuit 1 is transferred to the data line 300 through the data pad 315. [ Although the data lines 300 are arranged in a straight line shape, they are not necessarily limited thereto, and may be arranged in a straight line shape such as a zigzag shape.

The thin film transistor T is formed in each of the plurality of pixel regions as a switching element. Although not shown in detail, the thin film transistor includes a gate electrode connected to the gate line 200, a semiconductor layer functioning as a channel through which electrons move, a source electrode connected to the data line 300, And a drain electrode formed so as to face each other. The thin film transistor T may be formed in various forms known in the art such as a top gate structure or a bottom gate structure.

The pixel electrode 500 is pattern-formed in each of the plurality of pixel regions. The pixel electrode 500 is connected to the drain electrode of the TFT.

The sensing line 600 is connected to the common electrode 700 and transmits a touch signal of a user sensed by the common electrode 700 to the touch driver 3. In order to transmit the touch signal of the user, a plurality of sensing lines 600 are coupled to a plurality of common electrodes 700 in a pair. That is, each of the plurality of sensing lines 600 is connected to the plurality of common electrodes 700 one-to-one.

The sensing line 600 is formed to overlap with the data line 300 in order to prevent the light transmission rate from decreasing due to the sensing line 600.

The common electrode 700 serves as a sensing electrode for sensing a touch position of a user. In the case of a liquid crystal display, the common electrode 700 forms an electric field together with the pixel electrode 500 to drive the liquid crystal. That is, the common electrode 700 may form a fringe field together with the pixel electrode 500, and a plurality of slits 710 are formed in the common electrode 700. Accordingly, a fringe field is formed between the pixel electrode 500 and the common electrode 700 through the slit 710, and the alignment direction of the liquid crystal can be controlled by the fringe field. That is, a fringe field switching mode liquid crystal display device can be implemented.

In addition, a plurality of common electrodes 700 are spaced apart from each other on the substrate 100 so that the common electrode 700 can function as a sensing electrode for sensing a touch position of a user. Each of the plurality of common electrodes 700 is formed to have a size corresponding to one or more pixel regions, in particular, a size corresponding to a plurality of pixel regions in consideration of a touch area of a user.

The driving integrated circuit 1 receives a gate control signal from a timing controller (not shown) and then applies a gate signal to the gate line 200 through the gate pad 215 and the gate built-in circuit 2 .

The driving integrated circuit 1 receives a data control signal from a timing controller (not shown), and then applies a data signal to the data line 300 through the data pad 315.

The gate built-in circuit 2 applies a gate signal transmitted from the drive integrated circuit 1 to the gate line 200. The gate built-in circuit 2 is connected to the GIP In the non-display region on the left side and / or the right side of the substrate 100 by an In-Panel (In-Panel) method. In another embodiment, the gate built-in circuit 2 may be a TCP (Tape Carrier Package) or a COF (Chip On Glass) structure or a COG (Chip On Glass) structure .

The touch driver 3 is connected to the sensing line 600 and receives a user's touch signal from the sensing line 600. The touch driver 3 senses a change in capacitance that is changed by a user's touch and detects whether the user touches or touches the touch.

Hereinafter, a display device according to embodiments of the present invention will be described in more detail through a cross-sectional structure.

First Embodiment

<Display device>

3 is a cross-sectional view of a display device according to a first embodiment of the present invention, which shows a cross section of line A-A, line B-B, and line C-C in Fig. The line A-A in FIG. 2 shows the thin film transistor region, the line B-B in FIG. 2 shows the gate pad region, and the line C-C in FIG. 2 shows the data pad region.

3, a gate electrode 210 and a gate pad 215 are pattern-formed on the substrate 100. As shown in FIG. The gate electrode 210 is formed in the thin film transistor region, and the gate pad 215 is formed in the gate pad region. The gate electrode 210 may protrude from the gate line 200 and the gate pad 215 may be connected to one end of the gate line 200 through the gate built-in circuit 2 .

A gate insulating layer 220 is formed on the gate electrode 210 and the gate pad 215. The gate insulating layer 220 is formed on the entire surface of the substrate except for the third contact hole CH3 region.

A semiconductor layer 230 is patterned on the gate insulating layer 220. The semiconductor layer 230 is formed in a thin film transistor region and a data pad region, and may be formed of a silicon-based semiconductor material or an oxide semiconductor material.

A source electrode 310, a drain electrode 320, and a data pad 315 are pattern-formed on the semiconductor layer 230. The source electrode 310 and the drain electrode 320 are formed on the semiconductor layer 230 in the thin film transistor region and the data pad 315 is formed on the semiconductor layer 230 in the data pad region. At this time, the data pad 315 is connected to one end of the data line 300 described above. The source electrode 310 is connected to the data line 300 and the drain electrode 320 is spaced apart from the source electrode 310 while facing the source electrode 310.

A drain electrode layer (not shown) for forming the source electrode 310 and the drain electrode 320 may be sequentially formed on the semiconductor layer 230. In this case, The material layer and the source and drain electrode layers for forming the semiconductor layer 230 are simultaneously patterned in a single process using a halftone mask so that the semiconductor layer 230 is formed in the data pad region as well as the thin film transistor region. Is formed under the data pad 315.

In the case of the display device according to the first embodiment, the source and drain electrode layers are stacked on the material layer for forming the semiconductor layer 230 as described above, and then the source and drain electrode layers and the material layer are simultaneously formed using the halftone mask The tail region of the semiconductor layer 230 can be minimized.

Although not shown in FIG. 3, the data line 300 is also formed by stacking a semiconductor layer 230 and a source / drain electrode layer.

A first passivation layer 410 is formed on the data line 300, the source electrode 310, and the drain electrode 320. The first passivation layer 410 is formed in a region excluding the first contact hole CH1 in the thin film transistor region, a region excluding the third contact hole CH3 in the gate pad region, and a fourth contact hole CH4 in the data pad region. As shown in FIG. The first passivation layer 410 may be formed of an inorganic insulating material such as silicon nitride or silicon oxide.

A second passivation layer 420 is patterned on the first passivation layer 410. The second passivation layer 420 may be formed of an organic insulating material such as acrylic resin including PAC (photo acryl). The second passivation layer 420 may have a thickness greater than that of the first passivation layer 410 to planarize the substrate. The second passivation layer 420 is formed in a region except for the first contact hole CH1 in the thin film transistor region, a region excluding the third contact hole CH3 in the gate pad region, and a fourth contact hole CH4 in the data pad region. As shown in FIG.

That is, a part of the drain electrode 320 is exposed through the first contact hole CH1 formed through the first protective film 410 and the second protective film 420, and the gate insulating film, the first protective film 410, The gate pad 215 is exposed through the third contact hole CH3 formed through the second passivation layer 420 and the fourth contact hole formed through the first passivation layer 410 and the second passivation layer 420 0.0 &gt; CH4 &lt; / RTI &gt;

A pixel electrode 510, a connection electrode 520, a first protective electrode 530, and a second protective electrode 540 are pattern-formed on the second protective layer 420. The pixel electrode 510 is formed to connect the drain electrode 320 exposed through the first contact hole CH1 in the thin film transistor region and the connection electrode 520 is formed in the thin film transistor region in the gate line 200, Respectively. The first protective electrode 530 is formed to cover the gate pad 215 exposed through the third contact hole CH3 in the gate pad region to protect the gate pad 215, Is formed to cover the data pad 230 exposed through the fourth contact hole CH4 in the data pad region to protect the data pad 230. [

The pixel electrode 510, the connection electrode 520, the first protective electrode 530, and the second protective electrode 540 are formed on the same layer using the same material by a single process.

A third protective layer 440 is formed on the pixel electrode 510, the connection electrode 520, the first protective electrode 530, and the second protective electrode 540. The third protective layer 440 includes a second contact hole CH2 for exposing the connection electrode 520, a fifth contact hole CH5 for exposing the first protective electrode 530, 540 are formed on the entire surface of the substrate except for the sixth contact hole CH6. The third protective layer 440 may be formed of an inorganic insulating material such as silicon nitride or silicon oxide.

A sensing line 600 is patterned on the third passivation layer 440. The sensing line 600 is formed in the thin film transistor region.

In one embodiment, the third passivation layer 440 and the sensing line 600 may be simultaneously formed through a patterning process using a halftone mask.

A common electrode 700 directly connected to the sensing line 600 is pattern-formed on the sensing line 600. That is, in the display device according to the first embodiment, the sensing line 600 and the common electrode 700 are not connected to each other through the insulating film through the contact hole, but the common electrode 700 may be connected to the sensing line 600, the common electrode 600 and the sensing line 600 are directly connected to each other. Accordingly, the deposition process of the insulating film and the mask process for patterning the insulating film, which are required for the connection of the common electrode 600 and the sensing line 600, can be omitted, thereby simplifying the process and reducing the manufacturing cost.

The common electrode 700 is patterned to have a plurality of slits 710 therein. The common electrode 700 is connected to the connection electrode 520 through a second contact hole CH2 provided in the third protective layer 440. [

In the display device according to the first embodiment, since the sensing line 600 and the common electrode 700 are directly connected to each other, as shown in FIG. 2, the common electrode 700 formed to correspond to the first region 800 May be directly connected to a sensing line 610 for sensing a touch signal generated in the second area 900 rather than a sensing line 600 for sensing a touch signal generated in the first area 800 5, in order to electrically isolate the common electrode 700 corresponding to the first region 800 from the other sensing line 610, a common electrode 700 is formed on the common electrode 700, 700b may be divided into a plurality of regions 700a, 700b by cutting along the left and right sides with respect to the other sensing line 610. In accordance with this embodiment, the common electrode regions 700a may be electrically connected to each other through the above-described connecting electrode 520 for applying a common voltage, thereby connecting the sensing line 600 on the sensing line 600 The common electrode 700 formed on the first region 800 is also electrically connected to the common electrode regions 700a so that the common electrodes 700 corresponding to the first region 800 are electrically connected to each other.

A gate pad electrode 750 formed at the same time as the common electrode 700 using the same material as the common electrode 700 is formed on the first protective electrode 530 exposed through the fifth contact hole CH5, (Not shown).

A data pad electrode 760 formed at the same time as the common electrode 700 using the same material as the common electrode 700 is formed on the second protective electrode 540 exposed through the sixth contact hole CH6, (Not shown).

&Lt; Display Device Manufacturing Method >

4A to 4F are schematic sectional views of a manufacturing process of a display device according to the first embodiment of the present invention, which relates to a process for manufacturing the display device shown in Fig.

4A, the gate electrode 210 and the gate pad 215 are pattern-formed on the substrate 100. In this case, The gate electrode 210 is formed in a thin film transistor region, and the gate pad 215 is formed in a gate pad region.

The gate electrode 210 and the gate pad 215 are formed by depositing a thin film layer on the substrate 100 by a sputtering method and then performing a series of mask processes such as photoresist application, exposure, development, The pattern can be formed through the patterning process. The pattern formation process of the structures described below can also be performed through deposition of such a thin film layer and a series of mask processes.

4B, a gate insulating layer 220 is formed on the gate electrode 210 and the gate pad 215, a material for forming the semiconductor layer 230 on the gate insulating layer 220, A source and drain electrode layer (not shown) for forming a layer (not shown) and a source / drain electrode is formed, and then a material layer and a source / drain electrode layer for forming the semiconductor layer 230 are formed in a single process A source electrode 310 and a drain electrode 320 formed on the semiconductor layer 230 and the semiconductor layer 230 are formed by patterning. Accordingly, the semiconductor layer 230 is formed not only in the thin film transistor region but also in the data pad region, and the data pad 315 is formed on the semiconductor layer 230 formed in the data pad region.

The gate insulating layer 220 is formed on the entire surface of the substrate by PECVD (Plasma Enhanced Chemical Vapor Deposition).

In one embodiment, the source and drain electrode layers may be subjected to a first wet etching (e.g., dry etching) in the semiconductor layer 230, the source electrode 310 and the drain electrode 320, or in the process of forming the data pad 315 or the data line 300 After the dry etching of the semiconductor layer 230 and the ashing process of the halftone mask are performed, the source and drain electrode layers are subjected to the second wet etching to form the semiconductor layer 230 and the source electrode 310 and the drain electrode 320 can be formed.

In another embodiment, after the source and drain electrode layers are wet etched and the semiconductor layer 230 is dry etched after the ashing process of the halftone mask is performed, The semiconductor layer 230, the source electrode 310, and the drain electrode 320 may be formed.

In the above embodiments, the semiconductor layer 230 is first dry-etched using the first process gas composed of SF _{6 /} He / Cl ₂ during the dry etching of the semiconductor layer 230, and SF ₆ / O ₂ / The semiconductor layer 230 may be secondarily dry-etched using a second process gas composed of Cl ₂ . The tail region of the semiconductor layer 230 can be minimized through the two-step etching process using the first process gas and the second process gas as described above.

4C, a first protective film 410 and a second protective film 420 are sequentially formed on the entire surface of the substrate including the source electrode 310 and the drain electrode 320. Then, A first contact hole CH1 for removing the first protective layer 410 and a part of the second protective layer 420 through the patterning process using the first passivation layer 410 and the second passivation layer 420 to expose the drain electrode 320, A third contact hole CH3 for exposing the gate pad 215 by removing a part of the first passivation layer 410 and the second passivation layer 420 and a third contact hole CH3 for exposing the gate pad 215, The fourth contact hole CH4 exposing the data pad 230 is formed.

The first protective film 410 is formed on the entire surface of the substrate by PECVD.

The second passivation layer 420 is formed on the entire surface of the substrate by applying an organic insulating material including PAC (photoacryl).

4D, a pixel electrode layer (not shown) is formed on the entire surface of the substrate, and then the pixel electrode layer is patterned to form pixel electrodes (not shown) connected to the drain electrodes 320 exposed through the first contact holes CH1. A connection electrode 520 formed to overlap with the gate line (not shown), and a gate pad 215 exposed through the third contact hole CH3. A second protective electrode 540 for protecting the data pad 315 is formed on the data pad 230 exposed through the fourth contact hole CH 4 and the protective electrode 530.

4E, on the entire surface of the substrate including the pixel electrode 510, the connection electrode 520, the first protective electrode 530, and the second protective electrode 540, a third protective film 440 And a metal layer (not shown) for forming the sensing line 600 and then patterning the third protective layer 440 and the metal layer using a halftone mask through a single process to form a third protective layer 440 A second contact hole CH2 for exposing the connection electrode 520, a fifth contact hole CH5 for exposing the first protection electrode 530, A sixth contact hole CH6 for exposing the electrode 540 is formed.

More specifically, a third protective layer 440 and a metal layer are applied to the entire surface of the substrate through a photolithography process, and then a photoresist (for example, a full photoresist) having a first thickness is formed on a region where the sensing line 600 is to be formed A photoresist is not formed in the region where the second contact hole CH2, the fifth contact hole CH5 and the sixth contact hole CH6 are to be formed, and a region where the sensing line 600 is to be formed, A second photoresist (for example, a Half photoresist) thinner than the first thickness is formed in a region except for the region where the second contact hole CH2, the fifth contact hole CH5, and the sixth contact hole CH6 are to be formed do.

Then, the second contact hole CH2, the fifth contact hole CH5, and the sixth contact hole CH6 are formed by performing the first wet etching of the metal layer and the dry etching of the third protective film 440. [

Then, the ashing process is performed to remove the remaining photoresist except for the photoresist formed in the region where the sensing line 600 is to be formed, and the metal layer is removed by performing the second wet etching of the metal layer to form the sensing line 600 . In one embodiment, only the metal layer is etched in accordance with the selectivity of the wet etch by using the hydro-etchant during the second wet etch of the metal layer. For example, when a metal layer is formed of copper (Cu), only a metal layer formed of copper can be selectively etched by using a hydro-etchant that etches only copper.

Then, the remaining photoresist on the sensing line 600 is removed.

4F, a material layer (not shown) for forming the common electrode 700 is directly formed on the sensing line 600 on the entire surface of the substrate including the sensing line 600, A common electrode 700 directly connected to the sensing line 600 by patterning the material layer for forming the electrode 700 and connected to the connection electrode 520 through the second contact hole CH2, A data pad electrode 760 connected to the second protective electrode 540 exposed through the sixth contact hole CH 6 and a gate pad electrode 750 connected to the first protective electrode 530 exposed through the third contact hole CH 6, Respectively.

The common electrode 700 is patterned to have a plurality of slits 710 in the thin film transistor region and is patterned to be connected to the connection electrode 520 through the second contact hole CH2 .

As described above, in the manufacturing method of the display device according to the first embodiment, since the sensing line 600 and the common electrode 700 are directly connected to each other, In the case of the common electrode 700 formed to correspond to the first region 800 and the second region 900 in which the touch signal generated in the second region 900 is not sensed by the sensing line 600 for sensing the touch signal generated in the first region 800, 5, in order to electrically isolate the common electrode 700 corresponding to the first region 800 from the other sensing line 610, the display region may be directly connected to the line 610, As shown in the figure, the common electrode 700 is divided into a plurality of regions 700a and 700b by cutting along the left and right sides with respect to the other sensing line 610. [ According to this embodiment, the common electrode regions 700a for the application of the common voltage may be electrically connected to each other through the above-described connecting electrode 520, thereby connecting the sensing line 600 shown in FIG. 4F The common electrode 700 formed on the first region 800 is also electrically connected to the common electrode regions 700a so that the common electrodes 700 corresponding to the first region 800 are electrically connected to each other.

4A to 4F, the source and drain electrode layers and the material layer for forming the semiconductor layer 230 are sequentially stacked, compared with the prior art in which the display device is manufactured through nine mask processes, The number of masks is reduced by one compared to the prior art in which the semiconductor layer 230 and the source / drain electrode are separately formed, and the metal layer for forming the third protective layer 440 and the sensing line 600 is formed The number of masks is further reduced by one, and the insulating film interposed between the sensing line 600 and the common electrode 700 is omitted, so that the formation and patterning of the insulating film can be omitted It is possible to further reduce the mask required for the display device, and as a result, the display device can be manufactured with only six masks. Therefore, the productivity can be maximized by reducing the manufacturing time.

Second Embodiment

<Display device>

FIG. 6 is a cross-sectional view of a display device according to a second embodiment of the present invention, which shows a cross section of line A-A, line B-B, and line C-C in FIG. The line A-A in FIG. 2 shows the thin film transistor region, the line B-B in FIG. 2 shows the gate pad region, and the line C-C in FIG. 2 shows the data pad region.

6, a gate electrode 210 and a gate pad 215 are pattern-formed on the substrate 100. As shown in FIG. The gate electrode 210 is formed in the thin film transistor region, and the gate pad 215 is formed in the gate pad region. The gate electrode 210 may protrude from the gate line 200 and the gate pad 215 may be connected to one end of the gate line 200 through the gate built-in circuit 2 .

A first protective electrode 530 is formed on the gate electrode 210 and the gate pad 215, respectively. The first protective electrode 530 is formed of a transparent conductive material such as ITO (Indium Tin Oxide). The first protective electrode 530 is used to prevent the gate pad 215 from being etched when the third protective film 440 described below is patterned.

A gate insulating layer 220 is formed on the gate electrode 210 and the gate pad 215 on which the first protective electrode 530 is formed. The gate insulating layer 220 is formed on the entire surface of the substrate except for the fifth contact hole CH5.

A semiconductor layer 230 is patterned on the gate insulating layer 220. The semiconductor layer 230 is formed in a thin film transistor region and a data pad region, and may be formed of a silicon-based semiconductor material or an oxide semiconductor material.

A source electrode 310, a drain electrode 320, and a data pad 315 are pattern-formed on the semiconductor layer 230. The source electrode 310 and the drain electrode 320 are formed on the semiconductor layer 230 in the thin film transistor region and the data pad 315 is formed on the semiconductor layer 230 in the data pad region. At this time, the data pad 315 is connected to one end of the data line 300 described above. The source electrode 310 is connected to the data line 300 and the drain electrode 320 is spaced apart from the source electrode 310 while facing the source electrode 310.

In the case of the display device according to the second embodiment, a material layer (not shown) and a source electrode 310 / drain electrode 320 for forming the semiconductor layer 230 are formed in the same manner as the display device according to the first embodiment The source and drain electrode layers for forming the semiconductor layer 230 are simultaneously patterned in a single process by using a halftone mask after the source and drain electrode layers (not shown) In addition, a semiconductor layer 230 is formed under the data pad 315 in the data pad region.

In the case of the display device according to the second embodiment, the source and drain electrode layers are stacked on the material layer for forming the semiconductor layer 230 as described above, and then the source and drain electrode layers and the material layer are simultaneously formed using the halftone mask The tail region of the semiconductor layer 230 can be minimized.

Although not shown in FIG. 6, the data line 300 is also formed by stacking the semiconductor layer 230 and the source / drain electrode layer.

A first passivation layer 410 is formed on the data line 300, the source electrode 310, and the drain electrode 320. The first passivation layer 410 is formed only in the region except for the first contact hole CH1 in the thin film transistor region and is not formed in the gate pad region and the data pad region. The first passivation layer 410 may be formed of an inorganic insulating material such as silicon nitride or silicon oxide.

A second passivation layer 420 is patterned on the first passivation layer 410. The second passivation layer 420 may be formed of an organic insulating material such as acrylic resin including PAC (photo acryl). The second passivation layer 420 may have a thickness greater than that of the first passivation layer 410 to planarize the substrate. The second passivation layer 420 is formed only in the region except for the first contact hole CH1 in the thin film transistor region and is not formed in the gate pad region and the data pad region.

That is, a part of the drain electrode 320 is exposed through the first contact hole CH1 formed through the first protective film 410 and the second protective film 420. [

A pixel electrode 510 and a connection electrode 520 are formed on the second passivation layer 420. The pixel electrode 510 is formed to connect the drain electrode 320 exposed through the first contact hole CH1 in the thin film transistor region and the connection electrode 520 is formed to overlap the gate line 200 in the thin film transistor region, .

A second protective electrode 540 for protecting the data pad 315 is formed on the data pad 315 in the data pad region so as to be connected to the data pad 315. A second protective electrode 540 is formed on the data pad 315 to cover the entire data pad 315.

The pixel electrode 510, the connection electrode 520, and the second protective electrode 540 are formed on the same layer using the same material by a single process.

A third protective layer 440 is formed on the pixel electrode 510, the connection electrode 520, and the second protective electrode 540. The third protective layer 440 includes a second contact hole CH2 for exposing the connection electrode 520, a fifth contact hole CH5 for exposing the first protective electrode 530, 540 are formed on the entire surface of the substrate except for the sixth contact hole CH6. The third protective layer 440 may be formed of an inorganic insulating material such as silicon nitride or silicon oxide.

A sensing line 600 is patterned on the third passivation layer 440. The sensing line 600 is formed in the thin film transistor region.

In one embodiment, the third passivation layer 440 and the sensing line 600 may be simultaneously formed through a patterning process using a halftone mask.

A common electrode 700 directly connected to the sensing line 600 is pattern-formed on the sensing line 600. That is, the display device according to the second embodiment is different from the display device according to the first embodiment in that the sensing line 600 and the common electrode 700 are connected through the insulating film to each other through the contact hole, The common electrode 600 and the sensing line 600 are directly connected to each other because the conductive layer 700 is directly formed on the sensing line 600 without mediating the insulating layer. Accordingly, the deposition process of the insulating film and the mask process for patterning the insulating film, which are required for the connection of the common electrode 600 and the sensing line 600, can be omitted, thereby simplifying the process and reducing the manufacturing cost.

The common electrode 700 is patterned to have a plurality of slits 710 therein. The common electrode 700 is connected to the connection electrode 520 through a second contact hole CH2 provided in the third protective layer 440. [

In the display device according to the second embodiment, since the sensing line 600 and the common electrode 700 are directly connected to each other like the display device according to the first embodiment, In the case of the common electrode 700 formed to correspond to the first region 800, the touch signal generated in the second region 900 other than the sensing line 600 for sensing the touch signal generated in the first region 800 The display device according to the second embodiment can also be directly connected to the other sensing line 610 for sensing the common electrode 700 corresponding to the first area 800. In the same way as the display device according to the first embodiment, A plurality of regions 700a and 700b may be formed by cutting the common electrode 700 along the left and right sides with respect to the other sensing line 610 to electrically isolate the common electrode 700 from the other sensing line 610, ). &Lt; / RTI &gt; According to this embodiment, the common electrode regions 700a may be electrically connected to each other through the connection electrode 520 described above for applying the common voltage, and the common electrode regions 700a may be electrically connected to the sensing line 600 The common electrode 700 formed on the first region 800 is also electrically connected to the common electrode regions 700a so that the common electrodes 700 corresponding to the first region 800 are electrically connected to each other.

A gate pad electrode 750 formed at the same time as the common electrode 700 using the same material as the common electrode 700 is formed on the first protective electrode 530 exposed through the fifth contact hole CH5, (Not shown).

A data pad electrode 760 formed at the same time as the common electrode 700 using the same material as the common electrode 700 is formed on the second protective electrode 540 exposed through the sixth contact hole CH6, (Not shown).

&Lt; Display Device Manufacturing Method >

7A to 7F are schematic sectional views of a manufacturing process of a display device according to a second embodiment of the present invention, which relates to a process for manufacturing the display device shown in Fig.

7A, a gate electrode layer (not shown) for forming the gate electrode 210 and the gate pad 215 and a material layer (not shown) for forming the first protective electrode 530 are formed on the substrate 100 and then patterned to form a first protective electrode 530 formed on the gate electrode 210 and the gate electrode 210, a gate pad 215 and a first gate electrode 215 formed on the gate pad 215 A protective electrode 530 is formed. The first protective electrode 530 prevents the first protective electrode 530 from being etched when the third protective film 440 described later is patterned. Although not shown in FIG. 7A, the first protective electrode 530 is also formed on the gate line 200. FIG.

The gate electrode 210 is formed in a thin film transistor region, and the gate pad 215 is formed in a gate pad region.

The material layer for forming the first protective electrode 530 may be formed of a transparent conductive material such as ITO.

The first protective electrode 530 formed on the gate electrode 210, the gate electrode 210, the gate pad 215 and the first protective electrode 530 formed on the gate pad 215 are formed on the substrate 100, A material layer (not shown) for forming a gate electrode layer (not shown) and a first protective electrode 530 is deposited by a sputtering method on the substrate 1, and then a photoresist coating, exposure, development, A pattern can be formed through a series of mask processes. The pattern formation process of the structures described below can also be performed through deposition of such a thin film layer and a series of mask processes.

7B, a gate insulating layer 220 is formed on the gate pad 215 on which the gate electrode 210 and the first protective electrode 530 having the first protective electrode 530 are formed, (Not shown) for forming the semiconductor layer 230 and a source / drain electrode layer (not shown) for forming the source / drain electrode are formed on the gate insulating layer 220, The source electrode 310 and the drain electrode 320 formed on the semiconductor layer 230 and the semiconductor layer 230 are patterned in a single process using a halftone mask to form the source and drain electrode layers 230 and 230, . Accordingly, the semiconductor layer 230 is formed not only in the thin film transistor region but also in the data pad region, and the data pad 315 is formed on the semiconductor layer 230 formed in the data pad region.

The gate insulating layer 220 is formed on the entire surface of the substrate by PECVD (Plasma Enhanced Chemical Vapor Deposition).

In one embodiment, the source and drain electrode layers may be subjected to a first wet etching (e.g., dry etching) in the semiconductor layer 230, the source electrode 310 and the drain electrode 320, or in the process of forming the data pad 315 or the data line 300 After the dry etching of the semiconductor layer 230 and the ashing process of the halftone mask are performed, the source and drain electrode layers are subjected to the second wet etching to form the semiconductor layer 230 and the source electrode 310 and the drain electrode 320 can be formed.

In another embodiment, after the source and drain electrode layers are wet etched and the semiconductor layer 230 is dry etched after the ashing process of the halftone mask is performed, The semiconductor layer 230, the source electrode 310, and the drain electrode 320 may be formed.

In the above embodiments, the semiconductor layer 230 is first dry-etched using the first process gas composed of SF ₆ / He / Cl ₂ during the dry etching of the semiconductor layer 230, and SF ₆ / O ₂ / The semiconductor layer 230 may be secondarily dry-etched using a second process gas composed of Cl ₂ . The tail region of the semiconductor layer 230 can be minimized through the two-step etching process using the first process gas and the second process gas as described above.

7C, the first passivation layer 410 and the second passivation layer 420 are sequentially patterned on the thin film transistor region including the source electrode 310 and the drain electrode 320, The first protection layer 410 and the second protection layer 420 are removed to form the first contact hole CH1 exposing the drain electrode 320. [

That is, unlike the first embodiment, the first protective layer 410 and the second protective layer 420 are not formed on the gate pad region and the data pad region.

Accordingly, in the manufacturing method of the display device according to the second embodiment, the halftone mask is not used for patterning the first protective film 410 and the second protective film 420.

7D, a pixel electrode layer (not shown) is formed on the entire surface of the substrate, and then the pixel electrode layer is patterned to form pixel electrodes (not shown) connected to the drain electrodes 320 exposed through the first contact holes CH1. A connection electrode 520 formed to overlap with a gate line (not shown), and a data pad 310 for protecting the data pad 315 on the data pad 315 formed in the data pad region. The second protective electrode 540 is formed.

7E, a third protective layer 440 and a sensing line 600 are formed on the entire surface of the substrate including the pixel electrode 510, the connection electrode 520, and the second protective electrode 540. Next, A sensing line 600 is formed on the third protective film 440 by patterning at least one of the third protective film 440 and the metal layer using a halftone mask in a single process after applying a metal layer (not shown) A second contact hole CH2 for exposing the connection electrode 520, a fifth contact hole CH5 for exposing the first protection electrode 530 and a second contact hole CH4 for exposing the second protection electrode 540 And a sixth contact hole CH6 is formed.

More specifically, a third protective layer 440 and a metal layer are applied to the entire surface of the substrate through a photolithography process, and then a photoresist (for example, a full photoresist) having a first thickness is formed on a region where the sensing line 600 is to be formed A photoresist is not formed in the region where the second contact hole CH2, the fifth contact hole CH5 and the sixth contact hole CH6 are to be formed, and a region where the sensing line 600 is to be formed, A second photoresist (for example, a Half photoresist) thinner than the first thickness is formed in a region except for the region where the second contact hole CH2, the fifth contact hole CH5, and the sixth contact hole CH6 are to be formed do.

Then, the second contact hole CH2, the fifth contact hole CH5, and the sixth contact hole CH6 are formed by performing the first wet etching of the metal layer and the dry etching of the third protective film 440. [

Then, the ashing process is performed to remove the remaining photoresist except for the photoresist formed in the region where the sensing line 600 is to be formed, and the metal layer is removed by performing the second wet etching of the metal layer to form the sensing line 600 . In one embodiment, only the metal layer is etched in accordance with the selectivity of the wet etch by using the hydro-etchant during the second wet etch of the metal layer. For example, when a metal layer is formed of copper (Cu), only a metal layer formed of copper can be selectively etched by using a hydro-etchant that etches only copper.

Then, the remaining photoresist on the sensing line 600 is removed.

7F, a material layer (not shown) for forming the common electrode 700 is directly formed on the sensing line 600 on the entire surface of the substrate including the sensing line 600, A common electrode 700 directly connected to the sensing line 600 by patterning the material layer for forming the electrode 700 and connected to the connection electrode 520 through the second contact hole CH2, A data pad electrode 760 connected to the second protective electrode 540 exposed through the sixth contact hole CH 6 and a gate pad electrode 750 connected to the first protective electrode 530 exposed through the third contact hole CH 6, Respectively.

The common electrode 700 is patterned to have a plurality of slits 710 in the thin film transistor region and is patterned to be connected to the connection electrode 520 through the second contact hole CH2 .

In the manufacturing method of the display device according to the second embodiment, since the sensing line 600 and the common electrode 700 are directly connected to each other, as shown in FIG. 2, The common electrode 700 may include a sensing line 600 for sensing a touch signal generated in the second area 900 but not a sensing line 600 for sensing a touch signal generated in the first area 800, In order to electrically isolate the common electrode 700 corresponding to the first region 800 from the other sensing line 610, the method of manufacturing the display device according to the second embodiment may include the steps of: As shown in FIG. 5, the common electrode 700 is divided into a plurality of regions 700a and 700b by cutting along the left and right sides with respect to the other sensing line 610. Referring to FIG. In accordance with this embodiment, the common electrode regions 700a may be electrically connected to each other through the above-described connecting electrode 520 for applying a common voltage, thereby connecting the sensing line 600 on the sensing line 600 The common electrode 700 formed on the first region 800 is also electrically connected to the common electrode regions 700a so that the common electrodes 700 corresponding to the first region 800 are electrically connected to each other.

7A to 7F, the source and drain electrode layers and the material layer for forming the semiconductor layer 230 are sequentially stacked, compared with the prior art in which the display device is manufactured through nine mask processes, The number of masks is reduced by one compared to the prior art in which the semiconductor layer 230 and the source / drain electrodes are formed separately, and the number of masks is reduced by one, and the metal layer for forming the sensing line 600 and the third protective layer 440 are formed. The number of masks is further reduced by one and the insulating film interposed between the sensing line 600 and the common electrode 700 is omitted. Therefore, the formation of the insulating film and the patterning It is possible to manufacture the display device with only the six masks. Therefore, the productivity can be maximized by reducing the manufacturing time.

While the present invention has been described with respect to the substrate and the method of manufacturing the display device, the present invention can be applied to various display devices such as a liquid crystal display device, a plasma display A panel (Plasma Display Panel), an organic light emitting display device (Organic Light Emitting Display Device), and a manufacturing method thereof.

100: substrate 200: gate line
210: gate electrode 215: gate pad
220: gate insulating film 230: semiconductor layer
300: Data line 315: Data pad
310: source electrode 320: drain electrode
410, 420, and 440: first, second,
510: pixel electrode 520: connection electrode
530: first protection electrode 540: second protection electrode
600: sensing line 700: common electrode
710: Slit 750: Gate pad electrode
760: Data pad electrode

Claims (11)

A thin film transistor formed in a pixel region defined by a crossing arrangement of a gate line and a data line and including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode;
A first protective layer and a second protective layer sequentially formed on the thin film transistor and having a first contact hole for exposing the drain electrode;
A pixel electrode formed on the second passivation layer and connected to the drain electrode through the first contact hole;
A third protective layer formed on the pixel electrode;
A first sensing line formed on the third protective film; And
And a common electrode formed on the first sensing line and directly connected to the first sensing line. The method according to claim 1,
A connection electrode formed between the second passivation layer and the third passivation layer and formed of the same material as the pixel electrode; And
And a second sensing line formed between the third protective film and the common electrode,
A second contact hole for exposing the connection electrode is formed in the third protection film,
Wherein the first sensing line is connected to a common electrode corresponding to a first region including the pixel region and the second sensing line is connected to a common electrode corresponding to a second region adjacent to the first region,
Wherein the common electrode comprises a plurality of regions formed along the left and right sides of the first sensing line and the second sensing line, respectively, a region of the common electrode directly connected to the first sensing line, And regions of the common electrode which are not directly connected to the second sensing line are electrically connected to each other through the connection electrode exposed through the second contact hole. The method according to claim 1,
A gate pad connected to one end of the gate line;
A data pad connected to one end of the data line;
A first protective electrode connected to the gate pad electrode exposed through a third contact hole formed in the first protective film and the second protective film;
A second protective electrode connected to the data pad electrode exposed through a fourth contact hole formed in the first protective film and the second protective film;
A gate pad electrode connected to the first protective electrode exposed through a fifth contact hole formed in the third protective film; And
And a data pad electrode connected to the second protective electrode exposed through a sixth contact hole formed in the third protective film,
Wherein the gate pad electrode and the data pad electrode are formed of the same material as the common electrode,
Wherein the first protective electrode and the second protective electrode are formed of the same material as the pixel electrode. The method according to claim 1,
A gate pad connected to one end of the gate line;
A data pad connected to one end of the data line;
A first protective electrode formed on the gate pad;
A second protective electrode formed on the data pad;
A gate pad electrode connected to the first protective electrode exposed through a fifth contact hole formed in the third protective film; And
And a data pad electrode connected to the second protective electrode exposed through a sixth contact hole formed in the third protective film,
Wherein the gate pad electrode and the data pad electrode are formed of the same material as the common electrode. The method according to claim 3 or 4,
Wherein the data line and the data pad are connected to each other,
A first material layer formed of the same material as the semiconductor layer; And
And a second material layer formed of the same material as the source electrode and the drain electrode on the first material layer. Forming a thin film transistor including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode on a substrate;
Sequentially forming a first protective layer and a second protective layer on the thin film transistor, the first protective layer having a first contact hole for exposing the drain electrode;
Forming a pixel electrode layer on the second passivation layer;
Forming a connection electrode by patterning the pixel electrode layer, and forming a pixel electrode connected to the drain electrode through the first contact hole;
Sequentially forming a third protective layer and a metal layer for forming a sensing line on the entire surface of the substrate including the pixel electrode and the connection electrode;
Forming a first sensing line and a second sensing line on the third passivation layer by patterning the third passivation layer and the metal layer through a patterning process using a halftone mask and forming a second contact hole exposing the connection electrode on the third passivation layer, Forming a protective film on the substrate; And
And patterning a common electrode directly connected to the first sensing line on the first sensing line and connected to the connection electrode exposed through the second contact hole. The method according to claim 6,
Wherein the common electrode corresponds to a first region including a plurality of pixel regions and is composed of a plurality of regions formed by patterning along the left and right sides of the first sensing line and the second sensing line,
Wherein the first sensing line is formed to be connected to the common electrode corresponding to the first area and the second sensing line is formed to be connected to another common electrode corresponding to the second area adjacent to the first area,
And regions of the common electrode that are not directly connected to the first and second sensing lines are electrically connected to each other through the connection electrode exposed through the second contact hole. The method according to claim 6,
The step of forming the thin film transistor includes:
Forming a gate electrode and a gate pad on the substrate;
Sequentially forming a gate insulating layer, a first material layer, and a second material layer on the entire surface of the substrate including the gate electrode and the gate pad; And
The first material layer and the second material layer are simultaneously patterned through a patterning process using a halftone mask to form the thin film transistor including the semiconductor layer, the source electrode, and the drain electrode, and the data composed of the first and second material layers Forming a pad,
Wherein the patterning process using the halftone mask is performed by sequentially using a first process gas composed of SF ₆ / He / Cl ₂ and a second process gas composed of SF ₆ / O ₂ / Cl ₂ . Gt; 9. The method of claim 8,
A third contact hole for exposing the gate pad and a fourth contact hole for exposing the data pad are additionally formed through a patterning process using a halftone mask in the step of forming the first protective film and the second protective film in order Forming a first protective film and a second protective film on the first protective film,
Wherein the pixel electrode layer is patterned to form a first protective electrode connected to the gate pad exposed through the third contact hole and connected to the data pad exposed through the fourth contact hole, A second protective electrode is further formed,
The fifth contact hole exposing the first protective electrode to the third protective film by patterning the third protective film and the metal layer in the step of forming the second contact hole in the third protective film, A sixth contact hole is formed,
A gate pad electrode connected to the first protective electrode exposed through the fifth contact hole and a data pad electrode connected to the second protective electrode exposed through the sixth contact hole, Is further formed on the surface of the display panel. 9. The method of claim 8,
Forming a first protective electrode between the gate pad and the gate insulating film by patterning,
The pixel electrode layer may be patterned to form a second protective electrode on the data pad,
The fifth contact hole exposing the first protective electrode to the third protective film by patterning the third protective film and the metal layer in the step of forming the second contact hole in the third protective film, A sixth contact hole is formed,
A gate pad electrode connected to the first protective electrode exposed through the fifth contact hole and a data pad electrode connected to the second protective electrode exposed through the sixth contact hole, Is further formed on the surface of the display panel. The method according to claim 6,
Wherein the third protective film and the metal layer are selectively patterned using a hydro-etching solution in the step of forming the second contact hole in the third protective film.

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