KR20160018959A - Display Device - Google Patents

Abstract

The present invention relates to a display device which comprises: a display panel including gate lines and data lines; an image determining unit dividing the gate lines into non-display horizontal lines which do not display an image and image display horizontal lines which display an image and outputting a selection signal for separating a first scan period for scanning the non-display horizontal lines from a second scan period for scanning the image display horizontal lines; a power module generating a first high-level voltage and a second high-level voltage having a voltage level lower than that of the first high-level voltage which are used in outputting a data voltage supplied to the data lines; and a data driving unit supplied with the first and second high-level voltages by the power module, and selecting the second high-level voltage during the first scan period while selecting the first high-level voltage during the second scan period according to the selection signal provided by the image determining unit to output the data voltage generated by using the selected first or second high-level voltage to the data lines.

Description

[0001]

The present invention relates to a display device capable of reducing power consumption.

The flat panel display includes a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an organic light emitting diode (OLED) ). In the flat panel display device, the data lines and the gate lines are arranged to be orthogonal to each other, and the region where the data lines and the gate lines are orthogonal is defined as one pixel. A plurality of pixels are formed in a matrix form in the panel. In order to drive the respective pixels, video data voltages to be displayed are supplied to the data lines and gate pulses are sequentially supplied to the gate lines. The video data voltage is supplied to the pixels of the display line to which the gate pulse is supplied, and all the display lines are sequentially scanned by the gate pulse to display the video data.

The display device receives image information including video data (RGB) of an image from an external system in order to display an image through a display panel. When image information having a screen ratio different from that of the display panel is input There is also. Typically, in the case of video content such as a movie, it is general that the length of the screen in the horizontal direction is longer than the number of pixels in the horizontal direction in comparison with the number of vertical pixels in the display panel. If the aspect ratio of the image is different from the ratio of the rows and columns of the pixels formed in the display area, the area of the image is deleted in the process of displaying the image contents, or the area Lt; / RTI > In order to prevent the image area from being deleted, a 'letterbox' area that does not display an image is formed in the upper or lower part of the display area. As described above, the letter box area does not display an image, and generally displays a single color such as black gradation. Although the letterbox area does not display an image, since the same driving voltage as that of the image display area is used in the process of applying the data voltage of the corresponding area, waste of power consumption occurs more than necessary.

The present invention is intended to provide a display device capable of reducing power consumption.

The display device of the present invention is a display device including a display panel including a gate line and a data line, a non-display horizontal line that does not display an image and a video display horizontal line that displays an image, An image discrimination unit for outputting a selection signal for discriminating a scan period and a second scan period for scanning an image display horizontal line, a first high potential voltage and a first high potential voltage, A second high potential voltage which is supplied from the power module and the power module generating a second high potential voltage of a voltage level lower than the first voltage level and is supplied with a second high potential voltage during the first scan period in accordance with a selection signal provided from the image discrimination section, Selects a first high potential voltage during a second scan period, and selects a data voltage generated by using the selected first or second high potential voltage as a data voltage A data driver for outputting the line.

The present invention can separate the non-display horizontal line from the display horizontal line and reduce the power consumption by outputting the data voltage using the high-potential voltage having a low voltage level during the period of scanning the non-display horizontal line.

1 is a view showing a display device according to the present invention.
Fig. 2 is a view showing the power module shown in Fig. 1; Fig.
FIGS. 3 and 4 are block diagrams showing the structure of the source drive IC shown in FIG. 1. FIG.
5 is a flowchart showing a method of driving a display device according to the present invention.
6 is a schematic diagram showing a state in which a scan horizontal line and a non-display horizontal line are divided.
7 is a diagram showing a change in high-potential voltage according to a selection signal and a selection signal;

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Like reference numerals throughout the specification denote substantially identical components. In the following description, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

The display device of the present invention may be applied to a liquid crystal display (LCD), an organic light emitting diode (OLED), a field emission display : FED, a plasma display panel (PDP), and an electrophoresis (EPD) display device.

1 is a view showing a display device according to the present invention.

1, the display device of the present invention includes a display panel 100, a data driver, a gate driver 220, a timing controller 210, and the like.

The display panel 100 includes data lines DL and gate lines GL intersecting with each other, and a plurality of pixels P arranged in a matrix form. The pixels P are formed in the display region 100A and are supplied with a scan signal through a gate line GL and a data voltage through a data line DL. The pixels P are turned on by the scan signal and the data voltage to display the luminance corresponding to the data voltage. The pixel circuit PC formed in the pixels P may include a liquid crystal element or may include an organic light emitting diode according to a panel structure for luminance display.

The timing controller 210, the level shifter 221 and the power module 230 are mounted on a printed circuit board (PCB) 200.

The timing controller 210 receives digital video data RGB from an external host (not shown) and receives a vertical synchronizing signal Vsync, a horizontal synchronizing signal Hsync, a data enable signal DE, (CLK) or the like. The timing controller 22 transmits digital video data (RGB) to the source drive ICs 24. The timing controller 22 generates a timing control signal for controlling the operation timing of the source drive ICs 24 using the timing signals Vsync, Hsync, DE, and CLK and a timing control signal for controlling the operation of the level shifter 221, And generates gate timing control signals (ST, GCLK, MCLK) for controlling the operation timing of the register 223.

The image determination unit 211 of the timing controller 210 determines the aspect ratio of the image content using the additional information META of the image and determines whether the image ratio of the image content is equal to the ratio of the display area 100A . The additional information of the video is information attached to the video data of the video and is used in the process of driving the display device or displayed as character information on the display panel 100 to include information that the viewers can assist in watching the video . For example, the additional information META of the image may include a title, a frame rate and a screen ratio of the image content.

The image determination unit 211 detects a horizontal line that does not receive image data for a predetermined period or longer as a non-display horizontal line. The horizontal line is a horizontal column of pixels formed along the gate line. The image discrimination unit 211 may store the image data received from the external system on a line by line basis, and may detect a non-display horizontal line based on the stored image data.

In order to detect a non-displayed horizontal line, the image determining unit 211 may use the additional information of the input image. The image discrimination unit 211 determines whether the image content is equal to the ratio of the rows and columns of the pixels P arranged in the display area 100A of the display panel 100 based on the information on the aspect ratio . If the image aspect ratio is different from the ratio of the rows and columns of the pixels P in the display area 100A, the image area may be deleted in the process of displaying the image content, An area for displaying a black area occurs.

The display device of the present invention displays a part of the display area 100A as a black area in order to prevent loss of image data. The image discrimination unit 211 distinguishes between a non-display horizontal line that does not display an image and a display horizontal line that displays an image. The display horizontal line is a horizontal line of the area where the image data RGB of the image content is displayed in the display area 100A and the image of the image content is not displayed in the display area 100A, ) In the horizontal direction. The horizontal line is a set of pixels arranged along a gate line supplied with a scan pulse from the gate driver 220.

The image determination unit 211 outputs a selection signal to the power module 230 to distinguish a period for scanning the non-display horizontal line from a period for scanning the display horizontal line. The selection signal includes first and second selection signals, the first selection signal is output in the first scanning period, and the second selection signal is output in the second scanning period.

The gate driver 220 of the GIP type includes a level shifter 221 and a shift register 223 mounted on the PCB 200.

The level shifter 221 receives a drive voltage such as a gate high voltage VGH and a gate low voltage VGL and receives a start signal ST and a gate clock signal GCLK from the timing controller 210, And outputs a start pulse VST and a clock signal CLK that swing between the voltage VGH and the gate low voltage VGL. The clock signals CLK output from the level shifter 26 are sequentially shifted in phase and transferred to the shift register 223 formed on the display panel 100. [

The shift register 223 is connected to the gate line GL of the display panel 100. The shift register 223 includes a plurality of stages connected in a dependent manner. The shift register 223 shifts the start pulse VST input from the level shifter 221 according to the clock signal CLK to sequentially supply gate pulses to the gate lines GL.

The power module 230 receives the power supply voltage VCC and outputs a gate high voltage VGH, a gate low voltage VGL, a first high potential voltage VDD and a second high potential voltage BVDD. The gate high voltage VGH is the high level voltage of the scan pulse supplied to the gate line GL and the gate low voltage VGL is the low level voltage of the scan pulse supplied to the gate line GL.

The power module 230 includes a first high potential voltage generating portion 231 and a voltage dividing portion 233 as shown in FIG. 2 to generate the first and second high potential voltages BVDD. The first high potential voltage generating unit 231 boosts the power supply voltage VCC to generate the first high potential voltage VDD. The voltage divider 233 receives the first high potential voltage VDD and outputs the first and second high potential voltages VDD and BVDD. The voltage divider 233 includes a resistor string 223 and outputs a first high potential voltage VDD through one node of the resistor string 223 and a first high potential voltage VDD) to output a second high potential low voltage (BVDD). The power module 230 outputs the first and second high potential voltages BVDD to the source drive IC 240. [

The data driver includes a plurality of source drive integrated circuits (ICs) 240. The source driver ICs 240 receive the digital video data RGB from the timing controller 210. The source driver IC 240 converts the digital video data RGB into a positive / negative analog data voltage in response to a source timing control signal from the timing controller 210 and then converts the data voltage into a gate pulse To the data lines of the display panel 100 so as to be synchronized with each other.

3 is a block diagram showing a detailed configuration of the source drive IC 240. As shown in FIG.

3, each source driver IC 240 includes a resistor 241, a first latch 243, a second latch 245, a digital-to-analog converter (DAC) A high-potential voltage selection unit 248, and an output unit 249. [

The register unit 241 samples the RGB digital video data bits of the input video using the data control signals SSC and SSP supplied from the timing controller 210 and provides the sampled RGB digital video data bits to the first latch 243.

The first latch 243 samples and latches the digital video data bits according to the clocks sequentially supplied from the register unit 241, and simultaneously outputs the latched data. The second latch 235 latches the data provided from the first latch 243 and latches in response to the source output enable signal SOE in synchronization with the second latch 235 of the other source drive ICs 240, Simultaneously output one data.

The DAC 247 converts the video data input from the second latch unit 245 into a gamma compensation voltage (GMA) to generate an analog video data voltage.

As shown in FIG. 4, the high-potential voltage selection unit 248 includes first and second terminals 1 and 2 and first and second terminals 2 and 3 receiving the first and second high-potential voltages BVDD from the power module 230, And a third terminal 3 receiving the first, second, third, The high potential voltage selection unit 248 provides the second high potential voltage BVDD to the output unit 249 in response to the first selection signal SEL1 and supplies the second high potential voltage BVDD to the output unit 249 in response to the second selection signal SEL2, And provides the above voltage (VDD) to the output portion 249.

The output section 249 provides the analog data voltage ADATA output from the DAC 247 to the data lines DL during the low logic period of the source output enable signal SOE. The output unit 249 may be implemented as an output buffer that outputs the data voltage using the driving voltage, which is input through the low potential GND and the high potential input terminal v. The high-potential input terminal (v) receives the first high-potential voltage (VDD) or the second high-potential voltage (BVDD) by the high-potential voltage selection unit 248. During a period of scanning a non-displayed horizontal line, the output 249 is provided with a second high potential voltage (BVDD) from the high potential voltage selector 248. The first high potential voltage VDD is a high potential voltage for gradation display of a general image and the second high potential voltage BVDD is a high potential voltage used for displaying a monochromatic gradation having a low brightness, to be. The magnitude of the high-potential voltage that the output unit 249 receives through the high-potential input terminal (v) is related to the magnitude of the data voltage output through the output terminal (o). Since the data voltage is proportional to the luminance displayed by the pixel P, the output section 249 can use a high-potential voltage having a low voltage level in the process of outputting the data voltage corresponding to the black gradation with low luminance.

Since the output unit 249 is driven using the second high potential voltage (BVDD) of a low voltage level during the period of scanning the non-display horizontal line which does not display an image, the power consumption can be reduced.

5 is a flowchart showing a process of outputting a data voltage by the display device according to the present invention. A process of outputting the data voltage by the display apparatus according to the present invention will be described with reference to FIG.

First, the image discrimination unit 211 confirms image supplement information received from the external system. The image determination unit 211 confirms the image addition information and confirms the aspect ratio of the image display area of the image content. The image determination unit 211 determines whether the image ratio of the image content is different from the image ratio of the display area 100A belonging to the display panel 100. [ As shown in Fig. 6, in the display area 100A of the display panel 100, pixels are arranged in the form of m rows by n columns (m is an even number and n is a natural number) (k is a natural number smaller than m), the display area 100A and the image ratio of the image are different from each other. When the screen area ratio of the display area 100A is different from the screen area ratio of the image, the image determination unit 211 determines the m horizontal lines of the display area 100A as an 'image area' Letter box '. That is, the image determination unit 211 divides the m horizontal lines into k display horizontal lines that display the image and (m-k) non-display horizontal lines that do not display the image (S701, S703).

The image discrimination unit 211 distinguishes between a scan period for scanning a non-display horizontal line and a scan period for scanning a display horizontal line. As shown in FIG. 6, when the image is displayed at the center of the display area, the non-display horizontal line may be located at the upper and lower portions of the display horizontal line, respectively. That is, if the display horizontal line is k horizontal lines, the non-display horizontal line is mk from the first horizontal line HL1 to the [(mk) / 2] horizontal line HL [(mk) / 2] / 2 horizontal lines and (mk) / 2 horizontal lines from the [(m + k) / 2] horizontal line HL [(m + k) / 2] to the mth horizontal line HLm . If the period for scanning each horizontal line is one horizontal period (1H), as shown in FIG. 7, the image determination unit 211 determines the horizontal period ([(mk) / 2] from the first horizontal period (m + k) / 2] H up to the m-th horizontal period (mH) from the first period t1 to the (m + k) And the third period t3 of the non-display horizontal line is scanned. Then, the image discrimination unit 211 receives the [(m + k) / 2-1] horizontal period ([(mk) / 2 + m + k) / 2-1] H is divided into a scan period for scanning the display horizontal line (S705)

The image discrimination unit 211 generates a selection signal for distinguishing the non-display horizontal line from the display horizontal line, and outputs the generated selection signal to the source driver IC 240. [ For example, as shown in FIG. 7, the image determination unit 211 outputs a first selection signal SEL1 during a period of scanning a non-display horizontal line, a second selection signal SEL2 during a period of scanning a display horizontal line, Can be output. The first and second selection signals SEL1 and SEL2 may be classified into signals having different voltage levels. (S707)

The source drive IC 240 selects the first high potential voltage VDD or the second high potential voltage BVDD based on the selection signal. The high potential voltage selection unit 248 of the source drive IC 240 receives the first high potential voltage VDD corresponding to the first selection signal SEL1 and the second high potential voltage VDD corresponding to the second selection signal SEL2, And receives a high potential voltage (BVDD). Therefore, the output unit 249 outputs the data voltage using the second high-potential voltage BVDD during the first period t1 and the third period t3, and during the second period t2, And outputs the data voltage using the voltage VDD. In other words, the output unit 249 outputs the data voltage using the second high potential voltage (BVDD) having a low voltage level during the period of scanning the non-display horizontal line.

As described above, the display device of the present invention separates the non-display area from the display area and drives the output part using a high potential voltage having a low voltage level during a scan period for scanning the non-display area. Therefore, unnecessarily consuming power can be reduced by providing a higher potential voltage than necessary in the output section. Particularly, the present invention can reduce power consumption unnecessarily consumed in displaying an area where an image is not displayed for a long time by using additional information of the image.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims (7)

A display panel including a gate line and a data line;
An image discrimination unit for discriminating a first scan period for scanning a non-display horizontal line that does not display an image and a second scan period for scanning an image display horizontal line for displaying an image, among the gate lines;
A power module for generating a first high potential voltage used for outputting a data voltage to be provided to the data line and a second high potential voltage having a voltage level lower than the first high potential voltage; And
Wherein the second high voltage is selected during the first scan period in accordance with the selection signal received from the image discrimination unit and the first and second high potential voltages are supplied from the power module, And a data driver for selecting the first high potential voltage during the period and outputting the data voltage generated using the selected first or second high potential voltage to the data line.
The method according to claim 1,
Wherein the image discrimination unit detects a horizontal line which does not receive image data for a predetermined period or longer as a non-display horizontal line.
The method according to claim 1,
Wherein the image determining unit determines that the image content is not provided in the process of displaying the image content on the display area of the display panel when the aspect ratio of the image content is different from the display area of the display panel, And a horizontal line which is not a horizontal line.
The method according to claim 1,
Wherein the image discrimination unit sets the (mk) row as the non-display horizontal line when the pixels formed in the display area are m rows by n columns and the screen ratio of the image contents is k rows x n columns, A display device for preventing image data loss of image contents.
The method according to claim 1,
The image discrimination unit
And outputs a first scan signal during the first scan period,
And outputs a second scan signal having a voltage level different from that of the first scan signal during the second scan period.
6. The method of claim 5,
The data driver
Wherein the first and second high potential voltages are received from the timing controller and the first or second selection signal is received from the power module, A high potential voltage selection unit for selecting and outputting a high potential voltage; And
The first and second high potential voltages output from the high potential voltage selection unit are input to the high potential input terminal and the analog data voltages input from the digital analog converter are output using the low potential voltage and the driving voltage input from the high potential input terminal And an output section for outputting the output signal.
The method according to claim 1,
The power module
A high potential voltage generating unit for stepping up the power supply voltage to generate a high potential voltage; And
And a resistance string for dividing the high potential voltage to generate the first and second high potential voltages.

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