KR20150121988A

KR20150121988A - SiC SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SiC SEMICONDUCTOR MODULE

Info

Publication number: KR20150121988A
Application number: KR1020140048290A
Authority: KR
Inventors: 이홍섭; 원덕희; 김유석; 김은식
Original assignee: (주)하이브론
Priority date: 2014-04-22
Filing date: 2014-04-22
Publication date: 2015-10-30

Abstract

A method of manufacturing an SiC semiconductor module and a SiC semiconductor module is disclosed. A semiconductor module according to one aspect of the present invention includes a base plate, a DBC (Direct Bonded Copper) substrate bonded to the upper surface of the base plate, an extended silicon carbide (SiC) chip bonded to the upper surface of the DBC substrate, and an extended silicon carbide chip Wherein the extended silicon carbide chip has at least four unit chips connected to each other in a square shape without a gap, and each of the unit chips has a source, a drain, and a gate separately.

Description

TECHNICAL FIELD [0001] The present invention relates to a SiC semiconductor module and a manufacturing method of the SiC semiconductor module.

The present invention relates to a semiconductor module and a method of manufacturing a semiconductor module, and more particularly, to a method of manufacturing a SiC semiconductor module and a SiC semiconductor module.

SiC (Silicon Carbide) semiconductors are superior in heat resistance and withstand voltage compared to silicon (Si), which is generally used for device fabrication, and realize high performance and low power consumption in inverter devices, home power modules and automotive power semiconductor devices. We are looking forward to a promising material.

Silicon carbide is the material most commonly known as semiconductor material, which is a combination of silicon and carbon in a ratio of 1: 1. It has been used as a material for sandpaper since the latter half of the 19th century because of its strong covalent bond, which is next to diamond. Silicon carbide was first made synthetically before it was discovered in nature and is rarely observed in nature.

Silicon carbide as a semiconductor has been studied in the early stage of semiconductor research in addition to silicon and germanium in the 1950s, but it has not been noticed for a while because it is difficult to produce large single crystals and wafers like current silicon semiconductors. Therefore, until recently, it has been used more as a sintered body for manufacturing high strength material than an application as a semiconductor material. Since the 1980s, a single crystal growth method capable of producing semiconductor devices has been developed and is attracting attention as a next-generation semiconductor material. Silicon carbide is superior to conventional silicon in terms of electrical and mechanical thermal properties, and has excellent chemical and mechanical stability, making it the most suitable material for next-generation semiconductor materials, especially high-voltage, high-output, high-temperature semiconductor materials.

SiC has a bandgap ranging from 2.2 eV to 3.3 eV depending on the type of SiC. Typically, 4H-SiC and 6H-SiC used are 3.0 eV to 3.3 eV, which is three times as large as Si and has a wide band gap such as GaN, ZnO, Material. The critical electric field is 10 times that of Si and the thermal conductivity is 3 times. In addition, it is chemically stable and highly resistant to radiation, making it well suited for the manufacture of semiconductor devices that operate in special environments. Due to its high threshold voltage and thermal conductivity, it is suitable as a high output power device with a power range from 1kV to 100kV. It is an optimal material for power devices for high temperature (operating up to 500 ~ 700 ℃) due to its wide bandgap and high thermal conductivity.

As mentioned above, SiC has superior thermal conductivity (similar to Cu) characteristics compared to other compound semiconductors among various excellent physical properties, and is currently used as a substrate for vertical LED devices. It is a high power, low loss power semiconductor, . Therefore, it is expected to be applied to power conversion semiconductor devices of inverters for solar power generation and inverters for electric vehicles.

Since SiC has a high breakdown field strength of about 10 times higher than that of silicon, it is possible to reduce the on-resistance at the time of energization by thinning the power device in view of the high breakdown voltage, thereby miniaturizing the power device and simplifying the cooling system.

Especially, as the hybrid automobile and electric vehicle markets are expected to grow significantly with the recent introduction of environmentally friendly automobile technology, development of power semiconductor devices used in automotive inverter modules is actively being carried out.

In Korea, the development of power conversion devices for miniaturization and high output of inverters for electric vehicles and photovoltaic power generation is underway. Replacing existing silicon-based power semiconductors with SiC-based power semiconductors enables high efficiency and high integration of power conversion devices, which can reduce volume and weight to less than one-third.

However, the SiC chip provides less current than the Si-based chip providing a maximum current of 200 A per chip and the current provided by the unit chip is 50 A or less, so that the current to be supplied is relatively small and several chips are arranged in parallel. The use of the SiC chips in parallel causes various problems such as an increase in the size of the entire module.

SUMMARY OF THE INVENTION An object of the present invention to overcome the above-mentioned problems is to provide an SiC semiconductor module including an extended SiC chip.

It is another object of the present invention to provide a method of manufacturing the SiC semiconductor module.

According to another aspect of the present invention, there is provided a semiconductor module comprising: a base plate; a DBC (Direct Bonded Copper) substrate bonded to an upper surface of the base plate; an extended silicon carbide SiC) chip and a bonding wire for electrically connecting the DBC substrate and the extended silicon carbide chip.

The extended silicon carbide chip has a shape in which at least four unit chips are densely arranged in the form of a square and are bonded to each other without a gap. Each of the unit chips is characterized by having a source, a drain, and a gate separately.

The DBC substrate includes an upper copper layer joined to the upper surface of the DBC substrate and a lower copper layer joined to the lower surface of the DBC substrate.

The semiconductor module may include an Insulated Gate Bipolar Transistor (IGBT), a Metal Oxide Silicon Field Effect Transistor (MOSFET), a Transistor (TR), and a diode.

The base plate and the DBC substrate are bonded to each other through solder, and the DBC substrate and the expanded SiC chip are bonded to each other via solder.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor module, comprising: fabricating an expanded silicon carbide chip by sawing a silicon carbide wafer; printing lead on the lower substrate; And mounting the manufactured extended silicon carbide chip on the printed lower substrate.

The step of fabricating the expanded silicon carbide chip by sawing the silicon carbide wafer includes the step of sawing the silicon carbide wafer by adjusting the size of the expanded silicon carbide chip according to the type of the semiconductor module to be manufactured .

The manufacturing method of the semiconductor module may further include a step of soldering and fixing the product on which the mounted chip is mounted, and a step of performing packaging.

The lower substrate may include a base plate and a DBC (Direct Bonded Copper) substrate bonded to the upper surface of the base plate.

According to the SiC chip module as described above, the sawing operation and the mounting process are greatly simplified.

In addition, it does not require any alignment and reduces the size of the entire module.

1 is a view showing a general SiC chip.
2 is a circuit diagram of a general SiC chip.
3 is a view showing a parallel structure of a general SiC chip.
4 is a schematic plan view of a SiC chip according to the present invention.
5 is a structural view of a DBC substrate of a SiC semiconductor module according to the present invention.
6 is a cross-sectional view of a SiC semiconductor module according to the present invention.
7 is a flow chart of a process for fabricating a SiC semiconductor module according to the present invention.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail.

It should be understood, however, that the invention is not intended to be limited to the particular embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. And / or < / RTI > includes any combination of a plurality of related listed items or any of a plurality of related listed items.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises" or "having" and the like are used to specify that there is a feature, a number, a step, an operation, an element, a component or a combination thereof described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the relevant art and are to be interpreted in an ideal or overly formal sense unless explicitly defined in the present application Do not.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In order to facilitate the understanding of the present invention, the same reference numerals are used for the same constituent elements in the drawings and redundant explanations for the same constituent elements are omitted.

1 is a view showing a general SiC chip.

A silicon device, a gallium nitride (GaN) device and a silicon carbide (SiC) device are mainly used as a semiconductor device which is mainly used for a power device. Among them, a power device using silicon carbide, .

1 shows the structure of a silicon carbide chip. In a power semiconductor device package using a SiC device, a silicon carbide chip is mounted on a substrate and packed. In this case, the substrate used is a copper substrate having excellent thermal characteristics or a direct bonded copper (DBC) type substrate .

The silicon carbide chip shown in Fig. 1 forms a drain on the surface in contact with the substrate, a large portion of the upper surface of the chip serves as a source, and a small region formed in a pattern different from the source on the upper surface of the chip serves as a gate. The size of the SiC chip is generally 6 mm in length and 6 mm in length. The current that can be provided by a single SiC chip is usually from 1 A to 10 A and a maximum of about 50 A.

Fig. 2 shows the SiC chip of Fig. 1 as a circuit symbol.

3 shows a parallel structure of a general SiC chip.

The current provided by the power module is proportional to the chip size, and the manufacturing cost of the power module is also proportional to the chip size. The current supplied per chip of the SiC chip is usually in the range of 1A to 10, and the maximum value is about 50A, so that the Si series chip supplies a very small amount of current as compared with the current of 200A per chip.

Therefore, in the case of a SiC chip having a smaller amount of current per chip than the Si-based semiconductor chip, there is a case where SiC chips are arranged in parallel as shown in FIG. 3 for use in a power module that provides high power or current many.

In the example of Fig. 3, nine SiC chips are arranged in parallel, and the chips are arranged at regular intervals. Each gate of the SiC chip is connected to a gate (G) pattern located around the parallel arrangement of chips, and each source of the SiC chip is connected to a source (S) pattern that surrounds it closely. On the other hand, the bottom surface of the SiC chip serves as a drain, which has already been described with reference to FIG.

In order to arrange the SiC chips in parallel with each other as shown in FIG. 3, the SiC wafers are first sawed to form nine unit SiC chips 100-1, 100-2, 100-3, 100-4, and 100- 5, 100-6, 100-7, 1 100-8, and 100-9), and each mounting process, ie, the mounting process, must be performed for each chip. In addition, it takes a considerable amount of time and effort to align the nine SiCs in parallel to maintain proper spacing between the chips.

Mounting is often called SMT (Service Mount Technology) process. Automated mounting of components (semiconductor, diode, chip) on PCB (Printed Circuit Board) Solder or the like to the PCB, and specifically includes the following processes.

SMT is a device that removes dust and foreign matter on the top surface of supplied PCB and it processes loading PCB to supply PCB to the line by using the device that automatically supplies PCB to line by using magazine, Screen printing process in which cream solder is applied using a device that repeatedly prints a cream solder on the copper plate of the PCB substrate at a fixed position using a metal mask, Solder printing inspection (solder printing inspection) to check the cream solder on the top of the product, inspection of the cream solder on the surface before mounting the component, mounting process to place the device on the fixed position using SMT machine, printing Reflow machine process that melts cream solder and performs metal bonding (soldering by hot air) to PCB terminal parts and PAD of PCB. It is: (AOI Automatic Optical Inspection) includes the step learning test.

Here, the automatic optical inspection is a work process in which defective parts are automatically inspected for defects in part mounting on the solder application position on the PCB, and AOI and PCB for mounting inspection are defective in soldering after passing through the reflow And AOI for solder inspection, which is a process for inspecting a defective position and inspecting appearance defects such as over-lead, solder, short, etc. of solder joint. Finally, the finished PCB is automatically loaded into the magazine and shipped to the next process.

4 is a schematic plan view of a SiC semiconductor module according to the present invention.

The SiC chip 400 disposed at the center in the plan view of FIG. 4 has nine single SiC chips 100-1 through 100-9 as shown in FIG. 3 arranged in a 3x3 square shape It is not. The extended SiC chip 400 according to the present invention includes nine unit chips therein, but nine unit chips are sowed in a shape of 3 x 3 square in the sowing stage of the wafer, Shape.

Each of the unit chips constituting the extended SiC chip 400 according to the present invention has a source, a drain, and a gate separately. In other words, each of the unit chips includes a source, a gate, and a drain. The bottom surfaces serving as drains are commonly attached to the lower substrate, and the gates of the unit chips are wire-bonded to the gate pattern 430 on the substrate. In addition, the source of each unit chip is wire-bonded to the source pattern 420 on the substrate. In FIG. 4, for convenience of illustration, the wire bonding for connecting the source of each unit chip and the source pattern 420 is shown as one line. However, in order to increase the bonding force of bonding, the wire bonding may be composed of multiple strands.

In the case of the expanded SiC chip according to the present invention as shown in FIG. 4, the sowing operation is performed in a wafer state as much as the required number of sowing operations are performed.

Further, as compared with the case where nine dice are arranged in parallel, the SMT process is greatly simplified for the extended SiC chip according to the present invention by performing the SMT process only once, not nine times.

In addition, it is possible to reduce the time and effort required for aligning a single chip in parallel. In addition, since the space between the chips is not required when arranged on a substrate, and the compact structure is not a rectangular parallel structure, it is advantageous in that the size of the entire module can be reduced.

5 is a structural view of a DBC substrate of a SiC semiconductor module according to the present invention.

The structure of the DBC substrate 500 used in the SiC semiconductor module according to the present invention is such that the ceramic base material 520 of alumina (Al ₂ O ₃ ) or aluminum nitride (AIN) A lower copper layer 510 bonded to the lower surface of the base material and an upper copper layer 530 bonded to the upper surface of the ceramic base material so as to have a pattern. The DBC substrate 500, which is copper-bonded on both sides, can be soldered or wire-bonded.

The SiC semiconductor module may include various devices such as IGBT (Insulated Gate Bipolar Transistor), MOSFET (Metal Oxide Silicon Field Effect Transistor), TR (Transister), and Diode. IGBTs are mainly used in high-power areas such as electronically controlled ignition devices, AC-motor / DC-motor controls, frequency converters, converters / inverters and uninterruptible power supplies. IGBTs are used directly as devices or in modules

6 is a cross-sectional view of a SiC semiconductor module according to the present invention.

In the SiC semiconductor module according to the present invention, a DBC (Direct Bonded Copper) substrate 500 is disposed on the base plate 600 and the base plate 600 at the bottom. In addition, the extended SiC chip 400 according to the present invention is disposed on the DBC substrate 500. The extended SiC chip 400 is connected to the pattern on the DBC via wire bonding 700.

Since the base plate 600 and the DBC substrate 500 are disposed under the extended SiC chip 400 according to the present invention, the base plate 600 and the DBC substrate 500 are collectively referred to as a lower substrate .

The base plate 600 and the DBC substrate 500 are bonded to each other through the solder 610 and the DBC substrate 500 and the extended SiC chip 400 are also bonded to each other via the solder 620.

7 shows a flow chart of a method of manufacturing a SiC semiconductor module according to the present invention.

In order to manufacture the SiC semiconductor module according to the present invention, a process (S710) of preparing a SiC wafer is required.

Here, the process of obtaining a wafer from a single crystal rod is specifically exemplified by a step of preparing a single crystal ingot grown, a step of cutting unnecessary portions of the single crystal ingot, a step of thinning the single crystal ingot as required, a grinding step of forming a flat zone, A cornering step to prevent damage due to inter-wafer friction through edge machining, a polishing step to remove damage from previous machining, an etching step to dip the surface into a chemical solution, a rapid thermal annealing (RTA) (CMP), cleaning step, cleaning step, resistance, thickness, flatness, impurity, lifetime, visual inspection from the finished product, heat treatment step for removing oxygen impurities from the wafer, And an inspection step for performing inspection or the like.

When the SiC wafer is prepared, the SiC wafer is sowed to produce an expanded SiC chip (S720). The expanded SiC chip manufactured at this time is different from the unit chip size generally used, and has a square shape and the chip size is adjusted according to the use. For example, assuming that the maximum current per unit chip is 50 A when the device is used in a device requiring a current of 400 A, roughly nine unit chips are connected to the square shape 33 in consideration of the lost current. . Further, if the device requires a current of about 180 A, the SiC chip is manufactured with a structure in which four chips are arranged in a square shape 22.

Thereafter, the manufactured chip is inspected (S730), and if there is no abnormality in the chip, the lead is printed on the substrate (S740). At this time, in the process of printing the lead, the device and the parts are bonded to the DBC substrate and the base plate by using the screen printing method in order to dissolve the lead and apply it to the correct position.

After the screen printing is completed on the DBC substrate and the base plate, the extended SiC chip according to the present invention is mounted on the screen-printed DBC substrate and the base plate (S750). At this time, the chip mounting according to the present invention is not performed per unit chip, and is performed only once per integrated SiC chip according to the present invention as shown in FIG. 4 because it is performed on the extended SiC chip according to the present invention.

When the chip mounting is completed, the chip mounted product is soldered and fixed (S760), and the semiconductor module is packaged (S770).

Although one embodiment of the manufacturing method of the SiC semiconductor module according to the present invention has been described above, it should be understood that the detailed steps that can be added are omitted in the present process for convenience of explanation.

It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined in the appended claims. It will be possible.

100, 100-1 to 100-9: unit SiC chip 400: Expanded SiC chip
420: source pattern 430: gate pattern
500: DBC substrate 600: base plate
610, 620: solder 700: wire bonding

Claims

A base plate;
A DBC (Direct Bonded Copper) substrate bonded to the upper surface of the base plate;
An extended silicon carbide (SiC) chip bonded to the upper surface of the DBC substrate; And
And a bonding wire for electrically connecting the DBC substrate and the extended silicon carbide chip.

The method according to claim 1,
Wherein the extended silicon carbide chip has a shape in which at least four unit chips are densely arranged in the form of a square.

The method of claim 2,
Wherein the at least four unit chips are bonded to each other without a gap.

The method of claim 2,
And each of the unit chips has a source, a drain, and a gate separately.

The method according to claim 1,
In the DBC substrate,
A top copper layer joined to the top surface of the DBC substrate, and a bottom copper layer joined to the bottom surface of the DBC substrate.

The method according to claim 1,
Wherein the semiconductor module includes an Insulated Gate Bipolar Transistor (IGBT), a Metal Oxide Silicon Field Effect Transistor (MOSFET), a Transistor (TR), and a diode.

The method according to claim 1,
Wherein the base plate and the DBC substrate are bonded to each other via solder, and the DBC substrate and the extended SiC chip are bonded to each other via solder.

Fabricating an expanded silicon carbide chip by sawing a silicon carbide wafer;
Printing lead on the lower substrate; And
And mounting the manufactured expanded silicon carbide chip on the printed lower substrate.

The method of claim 8,
The step of fabricating the expanded silicon carbide chip by sawing the silicon carbide wafer includes:
And adjusting the size of the expanded silicon carbide chip according to the type of the semiconductor module to be manufactured, thereby sawing the silicon carbide wafer.

The method of claim 8,
Wherein the extended silicon carbide chip has a shape in which at least four unit chips are densely arranged in a square shape.

The method of claim 10,
Wherein the at least four unit chips are bonded to each other without a gap.

The method of claim 10,
Wherein each of the unit chips has a source, a drain, and a gate separately.

The method of claim 8,
A step of soldering and fixing a product on which a mounted chip is mounted; And
A method of manufacturing a semiconductor module, comprising: performing packaging;

The method of claim 8,
Wherein the lower substrate comprises:
And a DBC (Direct Bonded Copper) substrate bonded to the upper surface of the base plate.