KR20150052809A - IR Emitter and NDIR Sensor - Google Patents

Abstract

An infrared (IR) source is provided in the form of a micro-heating element comprising a CMOS metal layer made of at least one layer embedded on a dielectric membrane supported by a silicon substrate. The device is formed by a CMOS process followed by a backside etch step. The device provides a microfabricated infrared source capable of achieving high temperatures (and hence higher radiation) and, at the same time, can be manufactured by commercial CMOS processes, resulting in lower manufacturing costs, higher reproducibility and reliability And offers the possibility of a monolithic integrated circuit. The device can also be integrated with an infrared detector on the same chip and packaged to form a complete NDIR sensor.

Description

IR Emitter and NDIR Sensor [0002]

The present invention relates to a thermal Infra-Red (IR) source using a micro-hotplate fabricated on a microchip. The present invention also relates to integrating the IR source and the IR detector to create a non-dispersive infrared (NDIR) sensor.

It is known to produce a thermal infrared source on a silicon substrate consisting of a micro-heater formed in a thin membrane layer (made of electrically insulating layers) formed by etching a portion of the substrate. These devices can be used to provide heat (e.g., 600 [deg.] C) with low power consumption (typically several mW to hundreds of mW) for use as infrared sources / emitters.

For example, Parameswaran et al., "Micro-machined thermal emitter from a commercial CMOS process" (IEEE EDL 1991), describes a polysilicon heater for IR applications made in CMOS technology that is side- etched to reduce power consumption to suspend heaters .

Similarly, D.Bauer et al. "Design and fabrication of a thermal infrared emitter" (Sens & Act A 1996) also suggests that the device is not expected to be manufactured in a CMOS process, but an IR source using a suspended polysilicon heater . Furthermore, wafer bonding is used to encapsulate the heater in vacuum (this adds additional manufacturing steps and increases manufacturing costs).

Patent US5285131 by Muller et al. And US2008 / 0272389 by Rogne et al. All describe similar devices using polysilicon heaters.

San et al., "A silicon micromachined infrared emitter based on SOI wafer" (Proc of SPIE 2007) describes an IR emitter made from an SOI substrate using polysilicon and DRIE as heaters to form the membrane .

The use of polysilicon in all of these designs reduces the stability of the device as the polysilicon resistance drifts at temperatures higher than 400 캜.

Yuasa et al., "Single Crystal Silicon Micromachined Pulsed Infrared Light Source" (Transducers 1997) describes an infrared emitter using a suspended boron doped monocrystalline silicon heater.

Watanabe describes a silicon filament that hangs as an IR source in patent EP2056337. The device is vacuum sealed by bonding the second substrate. The device is not expected to be fabricated in a CMOS process, and the structure of the device is not provided as such by itself being fabricated in a CMOS process.

Cole et al., "Monolithic Two-Dimensional Arrays of Micromachined Microstructures for Infrared Applications" (proc of IEEE 1998) describe the IR source on top of a CMOS device. These IR sources are composed of suspended micro-heaters manufactured after a significant post-CMOS process. These surplus process steps increase the manufacturing cost of the device.

The Hildenbrand et al. Article "Micromachined Mid-Infrared Emitter for Fast Transient Temperature Operation for Optical Gas Sensing Systems" (IEEE Sensor 2008 Conference) reports a platinum heater on a suspended membrane for IR applications. However, platinum can not be compatible with CMOS because it acts as a deep dopant and can contaminate other CMOMS process steps, and its use in CMOS fabs is prohibited.

Similarly, in a document entitled " A MEMS IR Thermal Source For NDIR Gas Sensors "(IEEE 2006) and Barritault et al.," Mid- IR source based on a free-standing microhotplate for autonomous CO2 sensing in indoor applications & Actuators A 2011) describe micromachined IR sources based on platinum heaters. Weber et al. "Improved design for fast modulating IR source" both describe platinum heaters and closed, as well as suspended membrane designs for IR sources using silicon oxide and silicon nitride layers .

Spannhake et al. "High-temperature MEMS Heater Platforms: Long-term Performance of Metal and Semiconductor Heater Materials" (Sensors 2006) describe micro-hotplates based on TiN oxide heaters doped with either platinum or antimony .

As already mentioned, platinum can not be compatible with CMOS processes, so these devices can not be fabricated in a CMOS process. This increases the manufacturing cost and means that the circuit can not be fabricated like the device.

Tu, et al., "Micromachined, silicon filament light source for spectrophotometric microsystems" (Applied Optics, 2002) show the design of a light source employing single crystal silicon heaters on SOI membranes. However, hanging filaments have lower mechanical stability than the entire membrane.

Syllaios et al. US6297511 describes an IR emitter formed on a suspended membrane with a resistive heater that can be made of various materials such as titanium, tungsten, nickel, single crystal silicon or polysilicon. Patents US5500569, US5644676, and US5827438 of Bloomberg et al. Report IR sources having heaters such as polysilicon or metal (tungsten, tantalum, titanium-tungsten alloys, molybdenum). However, these elements are not expected to be fabricated using a CMOS process.

WO 02/080620 by Pollien et al. Suggests the use of metal silicides as heater material in micro-hot plates. The silicide is said to have a polycrystalline structure from tantalum, zirconium, tungsten, molybdenum, niobium and hafnium suicides. The possibility of using these devices with IR sources is mentioned. However, metal silicides are not the standard materials used in commercial CMOS processes. Given the advantages of fabricating micro-hot plates by standard CMOS processes, no mention has been made as to how this can be achieved given that metal silicides are not the materials found in CMOS processes. In addition, no mention of the CMOS process has been made in the claims of the patent.

It is also known to produce IR detectors in silicon technology. Kim et al., "A new uncooled thermal infrared detector using silicon diode" (Sens & Act A 89 (2001) 22-27) . Eminoglu et al., "Low-cost uncooled infrared detectors in CMOS process" (Sens & Act A 109 (2003) 102-113) describes an IR detector using diodes on a micro-bridge membrane fabricated in a CMOS process. A. Graf, et al., "Review of micromachined thermopilers for infrared detection" (Meas. Sci. Technol. 18 (2007) R59-R75), described various thermopiles based on micromachined IR detectors reported in the literature ). It is also known to make NDIR sensors, for example, in the document "A High-Precision NDIR CO2 gas sensor for automotive applications" (IEEE Sensors Journal vol 6 No. 2006) and Cutler et al., US2007 / 0102639 Describes a typical NDIR sensor consisting of a filament bulb as an IR source and a thermopile-based IR detector. The two are located at opposite ends of the small chamber where the gas can enter the semi-permeable membrane (which prevents dust and IR radiation from the outside). Depending on the concentration of the target gas, the amount of IR emission of a particular wavelength is absorbed in the optical path, and measurements from the IR detector can be used to determine the gas concentration. Most NDIR sensors also have an optical filter to allow only a small range of wavelengths to reach the IR detector, so as to be specific for the gas that absorbs its wavelength.

Other patents describe similar devices, such as Hodgkinson et al US2008 / 0239322, Stuttard et al US7244939, Doncaster et al US2008 / 0308733, Cutler et al US7541587.

In almost all cases, the IR emitter and detector are packaged together but are two different elements. The exception is patent US5834777 by Wong, wherein said emitter and detector are the same chip and have a light path made on said chip. However, in this case, since the optical path is on the chip, it is very small distance that the IR emission travels, so the sensor has low sensitivity.

An object of the present invention is to provide an improved infrared source and a non-dispersive infrared sensor from the prior art.

The aspects of the invention are summarized in the appended claims.

In one embodiment, an infrared (IR) source is provided on a dielectric membrane, preferably fabricated in a CMOS process followed by a backside etch, preferably comprising a resistive heater made of a metal usable in CMOS. The CMOS metal may comprise at least one tungsten layer.

In one embodiment, an infrared source is provided that includes a resistive heater on a CMOS-based dielectric film formed on a chip, and at least one tungsten layer is formed on the CMOS circuit on the chip by a resistive heater and an internal wiring metal It forms everything. It will be appreciated that the term "CMOS-based dielectric membrane" refers to a dielectric membrane fabricated using the state of conventional CMOS process steps.

According to one embodiment of the present invention, a micro-hotplate manufactured using a CMOS process is provided. The process begins with a simple silicon wafer or SOI wafer that is processed using standard commercial CMOS or SOI processes using tungsten as interconnect material for electronic devices. The tungsten interconnect metal is used to form a micro-heater for the device. A Ti / IiN liner is used to improve the stability of the metal. The CMOS process step is followed by a back etch step to form the membrane. This step can be either dry etching by DRIE or wet anisotropic etching such as KOH or TMAH.

The membrane or heater can be circular or rectangular in shape, and the circular shape has the additional advantage that it can reduce mechanical stress. The heater may be any shape such as a meander, a spiral, a ring, multiple rings, and the like. The element may be comprised of one or more metal heat spreaders on the heater. The device may have a metal heat dissipation plate formed from an upper metal layer, which may be exposed by removing the blanket. A silicon heat dissipation plate may also be fabricated directly below the heater to improve temperature uniformity. This can be done using an active silicon layer in the SOI process, or using a bulk process that dopes the silicon region during the bulk etch to leave a silicon island that is not etched during the backside etch. Alternatively, a resistive silicon track may be provided under the heater (or alternatively, the heater) instead of a diode (e.g., a thermodiode) or a thermo transistor (npn or pnp with a shorted junction) And can serve as a temperature sensor. The device may also have a resistive temperature sensor formed from one of the metal layers. The heater itself may be used as a temperature sensor, in which case two extra tracks may be selectively connected to the heater to improve resistance measurement using 4-wire measurements.

In another embodiment of the present invention, the infrared source is comprised of an array of several membranes etched by DRIE packaged together, each having its own micro-heater made of tungsten. This improves redundancy when one of the elements is bad. Another use of the array is for compensation for drift. For example, in two arrays, only one can be used regularly, and the other only occasionally works to calibrate the drift of the main heater. Alternatively, only one can operate at any given time, so that two or more micro-hotplates can be operated in one cycle to increase the overall lifetime of the device.

Another use of the array is to have an array of smaller membranes instead of one large membrane. Large membranes will be mechanically less stable than small membranes, but small membrane elements will have low infrared radiation. By using an array of small membranes, the mechanical stability of the small membrane can be obtained and a high level of infrared radiation can be obtained. Using DRIE to etch the membranes means that the membranes can be packaged very close together and require very little extra space on the chip as compared to a single large membrane. The micro-heaters can be electrically connected so that they can be driven simultaneously or individually.

The micro-hot plates in the array may be independently driven at different temperatures. This results in a spectrum of wider IR emissions and, when used in an NDIR gas sensor system, can help improve selectivity if multiple detectors are used. Alternatively, the optics in the NDIR system may be designed to pass through different IR filters on the emitter through each emitter in the array and onto different detectors. This provides the possibility to detect more than one gas using a single NDIR sensor.

In another embodiment of the present invention, the micro-hot plate is coated with a coating to improve IR radiation. The coating may be in any form such as a carefully controlled silicon oxide, silicon nitride, or polymers (e.g., polyimide). Alternatively, materials such as carbon black, carbon nanotubes, metal oxides or graphenes may be grown or deposited on the micro-hot plate. These materials have a high emissivity and thus improve the amount of IR released. Other materials with high emissivity may be used. These materials may be deposited as post-CMOs onto the heating area of the microheating plate through similar techniques to inkjet or nano-deposits, or may be deposited across the entire wafer using a micro-heating plate as a source of heat during growth, Lt; / RTI > Several micro-hot plates may be connected together across the silicon wafer to promote local growth.

In another embodiment of the present invention, an IR filter is coupled to the IR source. This is done using a backside etch to form a thin membrane composed of silicon dioxide and / or silicon nitride on a silicon or SOI chip or wafer. This membrane can serve as an IR filter. The chip / wafer is then combined with the IR source using wafer bonding. The composition of the membrane acting as a filter can be varied and other materials can be deposited on the membrane to change the filtration properties as desired.

Alternatively, the filter can be made by selectively etching the CMOS metal layers on the silicon in mesh form or as dots. The size of the mesh or the size of the points and the distance between the points can be adjusted to filter the desired radiation at specific wavelengths and / or to increase radiation at specific wavelengths. The etching of the metal layers on the silicon can be done in a CMOS sequence, thus no additional cost is incurred.

The method may be combined with arrays by using an array of wafer coupled filters onto an array of IR sources. Each filter may have the same properties, or may have different properties to allow wavelengths of different spectra.

Another aspect is to package the micro-hot plates. Any standard packaging such as TO-5, TO-39 or TO-46 can be used or they can be placed directly on the PCB board, Lt; / RTI > Additionally, the packaging may be provided with IR reflective surfaces beneath the chip as well as on the sides of the chip to enhance the direction of radiation. The packaging may also include a filter in addition to, or instead of, the filter bonded to the IR source or made of the CMOS metal layer.

It can also be packaged directly in the NDIR chamber. Another possible packaging method is by flip chip, in which a bump bond is applied to the bond pads and the chip is packed upside down on a PCB or package. An advantage of this method is that infrared rays are emitted through the trenches, and the sidewalls of the trenches serve as reflectors. This makes the beam more directional. Reflective materials may be deposited on the trench sidewalls to enhance their reflectivity. Alternatively, the backside etch may be controlled using various wet or dry techniques to shape the sidewalls of the trench to enhance reflectivity. The additional metal layers in the membrane and the back plate of the packaging surface also serve as reflectors.

According to the present invention, since the IR source is preferably made of a CMOS process, the circuit can be integrated on the same chip as the IR source. This includes a drive circuit for the heater, a circuit for the temperature sensor, as well as a temperature control circuit and other complex circuits. The drive circuit can be made to regulate the IR source and drives it at various frequencies. For example, a very simple circuit can be made of only one MOSFET located in series with the heater. The heater can be switched on or off by applying a controlled potential on the gate of the MOSFET. The pulse width for the gate and the amplitude of the pulse control the temperature of the micro-hot plate.

In another embodiment of the present invention, an IR detector is integrated on the same chip as the IR source. The IR detector consists of an array of thermopiles or thermodiodes or thermo-transistors on the membrane. If the detector is a thermopile, it may consist of one or more thermocouples connected in series with one junction on the inside of the membrane and one on the outside. The two thermocouple materials may be composed of p or n doped monocrystalline silicon, n or p doped polysilicon or metal (such as tungsten). If thermodiodes are used, they may constitute a P + / N + junction or may have a p or n type well or drift region therebetween. The diodes may be connected as an array to improve sensitivity. In particular, thermodiodes have the advantage that their temperature coefficient is constant for high temperatures up to 500 ° C. The circuits may be integrated on the chip to process the detector signals. Similarly, the thermo-transistors are made of CMOS technology using bipolar npn or pnp structures with at least one junction that is short-circuited. Thermodiodes or thermo transistors or circuits based on them are desirable because process control of active elements in CMOS, such as diodes and transistors, is better than passive elements such as resistors.

In order to improve the performance, the IR detector may comprise an IR absorbing material such as carbon nanotubes deposited on top of the membrane, carbon black, graphene, polyimide, polymer, metal films, metal blacks, It may have other materials with high IR absorption. The IR absorber layer should be performed with post-CMOS and may be formed by CVD, local growth or ink-jet deposition techniques.

Alternatively, the IR absorption of the integrated IR detector may be increased by selectively etching the CMOS metal layers on the silicon with a mesh shape or dots. The size of the mesh or the size of the points and the distance between the points can be adjusted to increase the optical signal at a particular wavelength, and / or to filter the signal at other wavelengths. The etching of the metal layers on the silicon is performed in a CMOS sequence, so that no additional cost is incurred.

The chip can be packaged to be used as an NDIR sensor in a package such that there is a partition between the two elements and IR radiation can not travel directly from the source to the detector. Instead, the IR radiation must travel a much longer path to reach the source via the IR filter. This is achieved in both chip and package design. When designing the chip, a dielectric oxide between the emitter and the detector is filled with vias and metal layers to block transmission of IR in the dielectric oxide. A partition is then formed over the chip, which may be done during packaging or prior to wafer bonding to the patterned substrate on top. A complex circuit may be integrated on the chip for driving both the IR source and detector on the chip and for signal processing.

The packaging for such sensel formation may be in other forms. One embodiment of the present invention is a method of forming a cylindrical (not shown) structure having walls made of a charged central and reflective surface such that the IR radiation travels from the emitter of the chip to the detector portion in a circular path (reflected from the package walls) And packaging the chip with the package. In addition, the optical path has an optical filter such that only the wavelengths of interest reach the IR detector. The package is covered with a particle filter to prevent particles contained in the air from entering the optical path.

Another embodiment is for a rectangular package having a chip on one side, the reflective surface on the far side of the package allowing reflected infrared radiation to travel from the source to the detector.

According to the present invention, an improved infrared source and a non-dispersive infrared sensor can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of an embodiment of the present invention; Fig.
Figures 1-8 are schematic cross-sectional views of different designs of CMOS emitters.
9 to 12 are plan views of the IR source.
Figures 13 and 14 are top views of an IR source constructed with a 2 x 2 membrane array.
15 is a schematic cross-sectional view of the array element.
Figures 16 and 17 are top views of an IR source having a patterned top metal to improve emission for a particular wavelength.
Figures 18-20 are cross-sectional views of an IR source having a patterned top metal to improve emission for a particular wavelength.
Figure 21 shows a schematic cross-section of an IR source with a wafer coupled IR filter.
Figure 22 shows a schematic cross-section of a chip with an IR source packaged in a flip chip method.
Figure 23 shows a schematic cross-section of a chip with IR sources and IR detector integrated on the same chip with partitions therebetween to prevent direct IR radiation between the IR source and the IR detector.
Figure 24 shows a schematic cross-section of a chip with an IR source and a thermopile IR detector integrated on the same chip.
Figure 25 shows a chip with IR source and IR detector integrated on the same chip with partitions therebetween to prevent direct IR radiation between the IR source and the IR detector as well as a thin back film that is opaque to IR radiation And shows a schematic cross-section.
Figure 26 shows a schematic top view of a chip with an IR source and a thermopile IR detector integrated on the same chip.
Figure 27 shows a three dimensional schematic of a chip with both an IR emitter and a detector and also shows a patterned substrate for wafer-bonding onto the chip.
28 shows a three-dimensional schematic view of a chip having both an IR emitter and a detector wafer with a substrate wafer coupled thereon to prevent the IR radiation from traveling directly from the emitter to the detector.
29 and 30 show chips packaged with an NDIR sensor.

Embodiments of the present invention seek to improve the state of prior art devices by using a CMOS layer of tungsten as part of a heater that emits infrared radiation and as interconnect metal for electronic devices. The IR emitter is embedded in a dielectric membrane defined by etching the silicon substrate. The etching can be performed by a deep reactive ion (DRIE) technique. Because these devices use tungsten heaters, they can operate reliably at high temperatures (as high as 600 ° C). Moreover, the use of the tungsten layer in a CMOS process ensures very high stability, long term reliability and high reproducibility. This contrasts with heaters manufactured by technologies other than CMOS, such as screen printing. To further enhance reliability, the tungsten heater may have a titanium / titanium nitride liner. Furthermore, the use of CMOS technology to fabricate the device results in lower manufacturing costs and allows circuits to be integrated on the same chip as the device.

In another embodiment of the invention, the elements can be made as an array of micro-hot plates, each having their own heater, consisting of the same size or smaller membranes packaged together in close proximity. The use of several smaller membranes instead of the larger ones results in better mechanical stability for each membrane without the IR emission. Also, arrays add redundancy to the design if one element is defective. Packaging these membranes closely together can be achieved using DRIE which allows vertical sidewalls between the membranes.

Another embodiment of the present invention is to integrate an IR detector on the same chip as the IR source, in order to use the chip in a Non-dispersive InfraRed (NDIR) gas sensor. Fabricating the IR emitters and detectors on the same chip can ensure that the IR emitters and detectors have a similar thermal mass and thus a similar rate. Moreover, the noise of the system is reduced. Furthermore, as a result of integration and use of the CMOS process, the NDIR chip can be made significantly less expensive.

The IR source and detector have a partition between them and may be on the same chip and are packaged in such a way that there is a relatively long optical path for the IR emission from the emitter to the detector. The IR filter may be packaged between the paths so that only the wavelengths of interest reach the detector. This wavelength is absorbed by the target gas so that the signal at the detector can be used to determine the gas concentration.

In all embodiments, the CMOS process can be applied to SOI (Silicon-on-Insulator) substrates. SOI technology is widely used in high voltage, high temperature and high frequency electronic devices. The SOI can be used for three purposes:

1) To provide a silicon area beneath the heater to integrate a thermodiode or a thermotransistor as a temperature sensor. The thermodiode or thermo-transistor may be small in area to keep the leakage low and is generally expected to be used for operation at high temperatures (e.g., 600 < 0 > C). The IR emitter temperature can be monitored with high precision using a thermodiode or a thermo-transistor.

2) To allow the ambient temperature to reach 225 ° C. This is a result of both SOI technology and the use of tungsten metallization, which results in low leakage current and no latch-up.

3) to use the buried oxide present in the SOI substrates as an effective etch stop during backside etching.

Figure 1 shows a schematic cross-sectional view of an IR source made in an SOI-CMOS process. Membrane layers (4,5,6) are supported on a silicon substrate (1), and the membrane layer is composed of a buried oxide layer (4), a dielectric layer (5) and a protective layer (6). A tungsten resistive heater 2 is formed in the membrane layer and is connected to the rest of the chip by tracks 3. The resistive heater 2 may be of any shape, for example a meander, spiral or ring-shaped, or may be composed of multiple rings. The tungsten layer has a thin titanium / titanium liner 7 to improve the reliability of the heater.

The entire micro-hotplate is manufactured by a commercial SOI process. Alternatively, the membrane layer is formed in this case by the use of a backside etch using deep reactive ion etching (DRIE) techniques. The micro-hot plate may be manufactured with or without a network on the same chip.

Figure 2 shows another cross-section of a micro-hotplate used as an IR emitter, fabricated in a bulk CMOS process. The device is similar to that of Fig. 1 except that the buried layer 4 is absent.

Figure 3 shows a cross-section of an IR emitter in which the membrane layers comprise a thin silicon layer 8 to improve the firmness of the membrane.

Figure 4 shows a cross-sectional view of an IR emitter having a thin silicon plate (9) directly under the heater and a thin metal plate (10) directly above the heater for dispersing heat. Their purpose is to improve temperature uniformity. Although this figure shows a particular arrangement of these plates, it will be readily seen that other arrangements can be made. For example, there may be two metal plates above the heater, or there may be metal plates above or below the heater, and a silicon plate may be below the membrane instead of being embedded in the membrane For example with a bulk CMOS process).

5 shows a cross-sectional view of an IR emitter having a single crystal silicon plate as well as a polysilicon plate 11 under the heater. Both plates are as wide as the heater, the purpose of which is to reflect the IR radiation from the heater to the front side, otherwise it will be wasted on the back side of the chip. In this way, the efficiency of the IR emitter is improved.

Figure 6 shows a cross section of an IR emitter with a diode temperature sensor (12) embedded in the membrane. The diode is as wide as the heater and serves not only as a diode, but is also intended to reflect IR radiation from the heater to the front of the chip. The diode may be made smaller than the heater, but in this case it will act primarily as a temperature sensor but will not be effective at reflecting IR radiation.

Figure 7 shows a cross section of an IR emitter with a diode temperature sensor and a polysilicon plate 11 both under the heater having the same width as the heater. Both of these serve as reflectors for IR radiation, and the diode also serves as a temperature sensor.

Figure 8 shows another cross-section of an IR emitter formed by wet etching, optionally by anisotropic KOH or TMAH backside etching.

9 shows a top view of a rectangular (in this case square) shaped micro-well plate IR emitter having a grain heater 2 on a square membrane 13 with metal tracks 3. 10 is a plan view of the circular micro-heating plate 2 on the circular membrane 13. Fig.

11 shows a circular IR emitter having reinforcing silicon beams 14 for improving the mechanical stability of a membrane formed from a thin silicon layer in an initial SOI substrate. Figure 12 shows another pattern of silicon beams 15 for improving membrane stability. It will be readily appreciated that while these are given by way of example, other arrangements and structures within the silicon layers may be used to enhance the stability. Additionally, the metal layers on the heater may also be made of these structures to enhance membrane stability.

Figure 13 shows a top view of an array of micro-hot plates that can be used as an IR source. For the same output power, the array of smaller micro-hot plates will be mechanically more stable than a larger single micro-hot plate. Membranes for this array are formed by DRIE so that the membranes can be packaged together close together. 14 is a top view of an array of circular micro-hot plates.

Fig. 15 shows a schematic cross-section of an array of two micro-hot plates adjacent to each other. The nearly vertical sidewalls obtained due to the DRIE etch allow close packing of the membranes.

16 shows a top view of an IR source having a top metal 16 patterned with a grid. The pattern is designed to act as a filter or to enhance emission to a specific wavelength.

FIG. 17 shows a top view of an IR source having top metal 16 patterned in an array of dots to improve emission for a particular wavelength.

18 shows a cross-sectional view of an IR source having a patterned top metal 16 to serve as a filter or to enhance emission for a particular wavelength.

Figure 19 shows a cross-section of an IR source with two patterned top metals 16.

Figure 20 shows a cross section of an IR source having a patterned top metal 16 to improve IR emission only in the heater region instead of the entire membrane.

The drawings shown in Figures 16-20 for the patterned metal layer 16 to enhance the emission are given by way of example and may include other possible patterns and schemes such as hexagonal or circular shapes, schemes may be used.

Figure 21 shows a schematic cross-section of an IR source with a wafer coupled IR filter. The combined chip / wafer consists of a silicon substrate 17 and a membrane 18. The membrane may be composed of silicon dioxide, silicon nitride and / or other materials to modify the required filter properties.

Figure 22 shows a schematic cross-section of an IR source packaged in a flip-chip method. The flip chip is mounted upside down on the package base 20, and is electrically connected through the bump bonds 19.

Figure 23 shows a schematic cross-section of a chip with an IR source and a diode based IR detector. The IR detector consists of a diode 21 and its connecting track 22. The diodes are on a membrane similar to the membrane of the IR source. The chip is designed such that the emission from the IR source does not go directly towards the IR detector. This is accomplished by forming isolation between the two via the metal layers and the stack of vias 23 formed by the CMOS process parameters and preventing the IR from traveling through the interlayer dielectric layers.

Figure 24 shows a schematic cross-section of a chip with an IR source and a thermopile IR detector. The thermopile shown in this case is a thermocouple consisting of a p-doped silicon track 24 and a tungsten track 25. However, it should be noted that these two materials are given by way of example and other materials useful in the above process, such as polysilicon and n-doped silicon, may also be used.

Figure 25 shows an IR detector and IR emitter on the same chip with a thin film coating 26 on the backside of the chip. The coating is made of an opaque material with respect to IR to prevent IR radiation from traveling from the source to the detector from the backside.

Figure 26 shows a top view of a chip having an IR source and a thermopile IR detector. In this case, the thermopile consists of several thermocouples made of p-doped silicon and tungsten connected in series, and the connecting portion 27 is made of a single crystal silicon or polysilicon, Typically from one of the metal layers. The arrangement of thermocouples is shown by way of example, and many different arrangements or a large number of thermocouples can be used.

27 and 28 show wafer bonding techniques to ensure that IR radiation does not travel in a short path between the source and the detector. For this purpose, a substrate is patterned or wafer bonded onto the chip to create a partition between the source and the detector. Figure 27 shows a chip with a side-by-side IR emitter and detector, and a substrate patterned for wafer bonding on the chip. 28 shows a chip with both IR emitters and detectors separated by use of wafer bonding.

29 shows a schematic plan view of a chip with an emitter and detector integrated in a circular package 29 for use as an NDIR sensor. This constitutes a circular optical path from the IR source on the chip to the IR detector. The sidewalls of the path are made of a reflective material that allows the IR radiation to reflect it back to the detector. The optical filter 30 is packaged near the detector such that it passes only the wavelengths of interest.

Figure 30 shows a schematic plan view of a chip in a rectangular package having a reflective surface (31) at its far end to reflect the emission to the detector.

Claims (42)

An infrared (IR) source comprising a resistive heater made of a CMOS metal on a dielectric membrane fabricated in a CMOS process followed by a backside etch. The method according to claim 1,
Wherein the CMOS metal forms interconnection metal in a CMOS circuit formed on the same chip as the dielectric membrane. The method according to claim 1 or 2,
RTI ID = 0.0 > 1, < / RTI > wherein the CMOS metal comprises at least one tungsten layer. The method according to any one of claims 1 to 3,
Wherein the dielectric membrane is fabricated on a starting substrate comprising an SOI or silicon wafer. The method according to any one of claims 1 to 4,
Wherein the heater comprises a metal layer having a titanium / titanium nitride liner directly below the metal layer. An infrared (IR) source comprising a resistive heater on a CMOS-based dielectric film formed on a chip, wherein at least one tungsten layer forms both the resistive heater and the interconnection metal in a CMOMS circuit on the chip. Source. The method according to any one of claims 1 to 6,
Further comprising one or more metal heat dissipating plates directly above or below the heater. The method according to any one of claims 1 to 7,
Characterized in that there is a monocrystalline silicon heat dissipation plate and / or a polycrystalline silicon plate directly under the heater, the plates being configured to reflect infrared (IR) radiation from the heater. The method according to any one of claims 1 to 8,
Wherein the infrared source is integrated into a chip including a control circuit. The method according to any one of claims 1 to 9,
Further comprising a MOSFET in series with said heater for controlling the temperature of said heater. The method of any one of claims 1 to 10,
Wherein the membrane is formed by a process selected from DRIE, anisotropic wet etching, KOH and TMAH. The method according to any one of claims 1 to 11,
Wherein each micro-hotplate comprises a resistive heater made of a CMOS metal on a dielectric film made by a CMOMS process followed by a backside etch. The method of claim 12,
Wherein all micro-hotplates in the array are operable at the same time or individually. The method according to any one of claims 3 to 12,
Wherein the tungsten layer used for the heater is near zero stress axis on the membrane. The method according to any one of claims 7 to 13,
Wherein the metal heat spreader plate is exposed by etching the blank. The method according to any one of claims 1 to 15,
Further comprising a temperature sensor embedded in the membrane and positioned beneath or adjacent to the heater, the temperature sensor being selected from the group consisting of a diode temperature sensor, a bipolar transistor temperature sensor (thermo transistor), a resistive silicon temperature sensor And a resistive metal temperature sensor. 18. The method of claim 16,
Wherein the temperature sensor is the same as the heater, or is smaller or larger than the heater. The method according to claim 16 or 17,
Wherein the temperature sensor is configured to reflect infrared radiation from the heater. The method according to any one of claims 1 to 18,
Wherein the upper surface of the membrane is provided as either a silicon dioxide protective layer and a silicon nitride protective layer. The method according to any one of claims 1 to 19,
Wherein an upper surface of the membrane is provided with a coating comprising a material selected from the group comprising polymers, carbon black, carbon nanotubes, graphene, and materials having a high infrared emissivity. The method of claim 20,
Wherein the coating is compatible with a post-CMOS process and is formed by at least one of CVD, local growth and ink-jet deposition techniques. The method according to any one of claims 1 to 21,
Further comprising a mesh made of a CMOS metal layer located on top of the resistive heater to increase the emissivity, wherein the size of the mesh is selected to filter the desired signal at specific wavelengths, and / Infrared radiation source characterized by being selected to increase infrared radiation. The method according to any one of claims 1 to 22,
Further comprising dots of a CMOS metal layer located on top of the resistive heater to increase the emissivity, wherein the size of the points and the distance between the points are selected to filter the desired signal at specific wavelengths and / Wherein the radiation source is selected to increase radiation in the radiation source. The method of any one of claims 1 to 23,
Further comprising an infrared (IR) filter attached by wafer bonding. 27. The method of claim 24,
Wherein the infrared filter comprises a chip or wafer etched by DRIE to form one or more membranes comprising at least one of silicon dioxide and silicon nitride. 26. The method according to any one of claims 1 to 25,
An infrared source characterized by being packaged with a reflector. 26. The method according to any one of claims 1 to 26,
An infrared source packaged in a flip chip method. A non-dispersive infrared (NDIR) sensor comprising an infrared detector according to any one of claims 1 to 27 on the chip and an infrared detector on the second membrane on the same chip. 29. The method of claim 28,
Wherein the infrared detector comprises a thermopile, wherein the thermopile comprises one or more thermocouples. 29. The method of claim 28 or 29,
Characterized in that the infrared detector comprises one or more thermocouples or thermo-transistors. 29. The method as claimed in any one of claims 28 to 30,
Further comprising a partition formed by a structure of vias and metal layers between the infrared source and the detector. 31. The method according to any one of claims 28 to 31,
Further comprising a partition formed over the chip by wafer bonding of the patterned substrate. ≪ RTI ID = 0.0 > 8. < / RTI > 32. The method according to any one of claims 28 to 32,
Further comprising a partition formed over the chip during packaging of the chip. 34. The method according to any one of claims 29 to 33,
The infrared detector includes a mesh made of a CMOS metal layer located on top of the thermopile to increase the degree of sensitivity and the size of the mesh can be adjusted to filter the desired signal at specific wavelengths and / Wherein the signal is selected to increase the signal at the output of the detector. 34. The method according to any one of claims 29 to 34,
The infrared detector includes dots of a CMOS metal layer located on top of the thermopile to increase the sensitivity, the size of the dots and the distance between the dots to filter the desired signal at specific wavelengths, and / RTI > and / or is selected to increase the signal at specific wavelengths. 34. The method according to any one of claims 28 to 35,
A non-dispersive infrared (NDIR) sensor, wherein a nondispersive infrared chip is packaged in a cylindrical package such that it is a circular optical path from the source to the detector. 37. The method of any one of claims 28-36,
Further comprising an infrared filter in the optical path of the package comprising the chip. 37. The method of any one of claims 28-37,
(NDIR) sensor, further comprising a particle filter. 39. The method of any one of claims 28-38,
Further comprising an infrared absorbing layer selected from the group consisting of polymers, carbon nanotubes, graphenes, metal films, metal blacks, and thin film stacks. 42. The method of claim 39,
The infrared absorbing layer may be compatible with the post-CMO process and is formed by any technique selected from CVD, local growth and ink-jet deposition. A method of fabricating an infrared (IR) source using a CMOS process, the method comprising:
Forming a substrate;
Forming a dielectric layer on the substrate;
Etching a part of the substrate to form a dielectric film; And
And forming a resistive heater in or on the dielectric film using a CMOS usable metal. A method of fabricating an infrared (IR) source using a CMOS process, the method comprising:
Forming a substrate;
Forming a dielectric layer on the substrate;
Etching a part of the substrate to form a dielectric film; And
Forming a resistive heater in or on the dielectric membrane using at least one tungsten layer,
Wherein the dielectric membrane comprises at least one tungsten layer as interconnects of CMOS circuits formed on the same chip as the dielectric membrane.
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