KR20150028877A - Chip embedded type printed circuit board and method of manufacturing the same - Google Patents

Abstract

Disclosed are a chip embedded type printed circuit board and a method of manufacturing the same. An embedded chip is inserted into the chip insertion hole of a core layer. A chip compensation material layer is filled in the chip insertion hole, thereby stably protecting the embedded chip. Also, the embedded chip is directly and electrically connected to an internal circuit pattern, thereby improving electrical bonding reliability and minimizing substrate thickness and component volume. A chip embedded type printed circuit board according to the present invention includes a core layer which has an upper side and a lower side, a through hole and a chip insertion hole which penetrate the upper side and the lower side, respectively; an internal circuit pattern which is formed in the upper and the lower side of the core layer and the through hole; an embedded chip which is inserted into the chip insertion hole of the core layer and is electrically connected to the internal circuit pattern of the upper side of the core layer; a chip compensation material layer which is filled in the chip insertion hole of the core layer and protects the lateral side and the lower side of the embedded chip; a first resin layer which covers the upper side of the core layer and has a first via hole which exposes part of the internal circuit pattern; a second resin layer which covers the lower side of the core layer and has a second via hole which exposes part of the internal circuit pattern; and a first and a second external circuit pattern which are respectively formed in the upper side of the first resin layer and the lower side of the second resin layer, and is electrically connected to the internal circuit pattern through the first and the second via hole.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board having a built-in chip and a method of manufacturing the same,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board and a method of manufacturing the same. More particularly, the present invention relates to a printed circuit board and a method of manufacturing the same, And more particularly to a printed circuit board capable of minimizing the thickness of a board and a volume of a component while improving electrical connection reliability by electrically connecting the built-in chip to an internal circuit pattern directly, and a manufacturing method thereof.

Generally, a printed circuit board (PCB) is manufactured by performing an internal circuit layer formation, a pressing process, a drilling process, an external circuit layer formation, a solder mask formation, and the like. And a chip is mounted on the chip mounting region of the semiconductor chip using a surface mounting technique.

That is, since the chip is mounted in the surface mounting process using the die attach device after the printed circuit board is made, it is difficult to reduce the thickness of the printed circuit board and the thickness of the component. Particularly, due to the development of high-specification products requiring high-speed operation, it has become a limit to reduce the thickness of components. To overcome this, development of embedded type printed circuit boards is preferred.

In the conventional embedded type, drilling or laser drilling is used to form a cavity in the core layer. In this case, the fabrication process becomes complicated, resulting in an increase in cost, deterioration in workability, Resulting in a problem that the production yield is rapidly deteriorated.

Korean Patent Laid-Open No. 10-2007-0034710 (published on Mar. 29, 2007) discloses a related art document, which discloses a printed circuit board having electronic components built therein by using screen printing and a manufacturing method thereof.

An object of the present invention is to provide a chip-embedded printed circuit board and a method of manufacturing the same that can improve the reliability of electrical bonding while minimizing thickness and component volume by incorporating a built-in chip in a chip insertion hole.

According to an aspect of the present invention, there is provided a chip-embedded printed circuit board comprising: a core layer having a top surface and a bottom surface and including a through hole and a chip insertion hole penetrating the top and bottom surfaces, respectively; An upper surface and a lower surface of the core layer, and an internal circuit pattern formed in the through hole; An embedded chip inserted in a chip insertion hole of the core layer and electrically connected to an internal circuit pattern on an upper surface of the core layer; A chip compensating material layer filled in the chip inserting holes of the core layer to protect side surfaces and bottom surfaces of the embedded chip; A first resin layer covering a top surface of the core layer and having a first via hole exposing a part of the internal circuit pattern; A second resin layer covering the lower surface of the core layer and having a second via hole exposing a part of the internal circuit pattern; And first and second external circuit patterns respectively formed on the upper surface of the first resin layer and the lower surface of the second resin layer and electrically connected to the internal circuit pattern through the first and second via holes .

According to an aspect of the present invention, there is provided a method of manufacturing a chip-embedded printed circuit board, comprising: (a) forming a through hole and a chip insertion hole each penetrating an upper surface and a lower surface of a core layer; (b) attaching a chip fixing film to an upper surface of the core layer and attaching a chip embedded in the chip insertion hole via the chip fixing film; (c) filling a chip compensating material layer in the chip insertion hole of the core layer with the built-in chip attached thereto; (d) forming upper and lower surfaces of the core layer and an internal circuit pattern in the through-hole; (e) a first resin layer covering the upper surface of the core layer and having a first via hole exposing a part of the internal circuit pattern, and a second resin layer covering the lower surface of the core layer, Forming a second resin layer having a second via hole for exposing the second resin layer; And (f) forming first and second external circuit patterns on the upper surface of the first resin layer and the lower surface of the second resin layer, the first and second external circuit patterns being electrically connected to the internal circuit pattern through the first and second via- ; And

The chip-embedded printed circuit board and the method of manufacturing the same according to the present invention can embody a circuit pattern on the top and bottom surfaces of the embedded chip and the core layer after inserting the embedded chip in the chip insertion hole penetrating the core layer The degree of freedom of circuit design can be improved.

In addition, the chip-embedded printed circuit board and the method of manufacturing the same according to the present invention can be used in a chip-embedded printed circuit board and a method of manufacturing the same, in which a chip-fixing material layer is used to fix a chip embedded in a chip-inserting hole, The first and second resin layers and the first and second external circuit patterns are collectively formed in an upper portion and a lower portion of the multilayer bold process, thereby achieving a process shortening and a cost reduction effect.

1 is a cross-sectional view illustrating a chip-embedded printed circuit board according to an embodiment of the present invention.
FIGS. 2 to 10 are cross-sectional views illustrating a method of manufacturing a chip-embedded printed circuit board according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. It should be understood, however, that the invention is not limited to the disclosed embodiments, but is capable of many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, To fully disclose the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a chip-embedded printed circuit board and a method of manufacturing the same according to preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a cross-sectional view illustrating a chip-embedded printed circuit board according to an embodiment of the present invention.

1, a chip-embedded printed circuit board 100 according to an embodiment of the present invention includes a core layer 110, an internal circuit pattern 120, a built-in chip 130, a chip correction material layer 140, A first resin layer 150, a second resin layer 152, a first external circuit pattern 160,

The core layer 110 has an upper surface 110a and a lower surface 110b. The core layer 110 has a through hole (not shown) and a chip insertion hole (not shown) passing through the upper surface 110a and the lower surface 110b, respectively. At this time, the through hole may be formed at the edge of the core layer 110, but it is not limited thereto and may be formed at the center portion.

The chip insertion hole is used as a space for accommodating the embedded chip 130 as well as being used as a path for electrical connection of the internal circuit pattern 120. 1, the chip insertion holes are disposed at the center of the core layer 110, but this is merely an example, and may be disposed at one side or both edges of the core layer 110. At least one such chip insertion hole may be formed.

The core layer 110 is a part of the body of the printed circuit board 100, and a prepreg may be used as the material of the core layer 110.

The internal circuit pattern 120 is formed in the through hole and the upper surface 110a and the lower surface 110b of the core layer 110. [ The internal circuit pattern 120 includes a first internal circuit pattern 120a formed on the upper surface of the core layer 110, a second internal circuit pattern 120b formed on the lower surface 110b of the core layer 110, And inner via vias 120c formed in the first and second internal circuit patterns 120a and 120b to electrically connect the first and second internal circuit patterns 120a and 120b.

The embedded chip 130 is inserted into the chip insertion hole of the core layer 110 and is electrically connected to the internal circuit pattern 120 of the upper surface 110a of the core layer 110. [ That is, the embedded chip 130 is horizontally inserted into the chip insertion hole, and one end and the other end of the embedded chip 130 are electrically connected to the first internal circuit pattern 120a, respectively.

At this time, the embedded chip 130 may be at least one selected from a memory chip, a driving chip, a capacitor, and an inverter.

The chip compensating material layer 140 is filled in the chip insertion holes of the core layer 110 to protect the side surfaces and the bottom surface of the embedded chip 130. At this time, the chip compensating material layer 140 is filled in the chip inserting holes to stably protect the side surface and the bottom surface of the embedded chip 130. As the material of the chip compensating material layer 140, one selected from a polyimide resin, an epoxy resin, a nonconductive ink and the like may be used.

At this time, in the present invention, since the embedded chip 130 is inserted in the chip insertion hole in the horizontal direction and one end and the other end of the embedded chip 130 are connected to the first internal circuit pattern 120a, In addition, since the chip compensating material layer 140 is filled in the chip inserting hole, there is a structural advantage that the embedded chip 130 can be stably protected.

In particular, the combined thickness of the embedded chip 130 and the chip compensating material layer 140 is preferably formed to have a thickness corresponding to the thickness of the core layer 110, 140 may be embedded in the core layer 110 to minimize the thickness and the volume of the printed circuit board 100. In addition, when the multilayered board is designed, the first and second external circuit patterns 160, and 162, respectively.

The first resin layer 150 has a first via hole (not shown) that covers an upper surface 110a of the core layer 110 and exposes a part of the internal circuit pattern 120. The second resin layer 152 has a second via hole (not shown) which covers the lower surface 110b of the core layer 110 and exposes a part of the internal circuit pattern 120. [ As the material of the first and second resin layers 150 and 152, an epoxy resin, a polyimide resin, or the like may be used.

The first external circuit pattern 160 is formed on the upper surface of the first resin layer 150 and is electrically connected to the internal circuit pattern 120 through the first via hole, more specifically, the first internal circuit pattern 120a. . The second external circuit patterns 162 are formed on the lower surface of the second resin layer 152 and are electrically connected to the internal circuit patterns 120 through the second via holes, And is electrically connected.

In addition, the chip-embedded printed circuit board 100 according to the embodiment of the present invention may further include first and second solder mask patterns 170 and 172.

The first solder mask pattern 170 is formed to cover the entire surface of the first resin layer 150 except a part of the first external circuit pattern 160. The second solder mask pattern 172 is formed to cover the entire surface of the second resin layer 152 except a part of the second external circuit pattern 162. At this time, the first and second solder mask patterns 170 and 172 may be formed using a photo solder resist (PSR), a liquid photosensitive coverlay, a photo polyimide film, an epoxy resin, Can be used.

The chip-embedded printed circuit board according to the embodiment of the present invention can embody a circuit pattern on the upper and lower surfaces of the embedded chip and the core layer after inserting the embedded chip in the chip insertion hole penetrating the core layer It is possible to improve the degree of freedom of circuit design.

Further, in the chip-embedded printed circuit board according to the present invention, a built-in chip to be inserted into the chip insertion hole is fixed using a chip correction material layer, the chip fixing film bonded to the substrate is removed, The first and second resin layers and the first and second external circuit patterns are collectively formed in a MLB (multi layer bold) process, thereby shortening the process time and reducing the cost.

This will be described in more detail through a method of manufacturing a chip-embedded printed circuit board according to an embodiment of the present invention.

FIGS. 2 to 10 are cross-sectional views sequentially illustrating a method of manufacturing a chip-embedded printed circuit board according to an embodiment of the present invention.

As shown in FIG. 2, a core layer 110 having an upper surface 110a and a lower surface 110b opposite to the upper surface 110a is provided. The core layer 110 constitutes the body of the printed circuit board. The material of the core layer 110 may be a prepreg, for example. At this time, the first seed layer 112 and the second seed layer 114 may be provided on the upper surface 110a and the lower surface 110b of the core layer 110, respectively.

Next, as shown in FIG. 3, a through hole TH and a chip insertion hole CH, which respectively penetrate the upper surface 110a and the lower surface 110b of the core layer 110, are formed. At this time, the through hole TH and the chip insertion hole CH may be formed by performing mechanical drilling, laser drilling using a laser, or the like. At this time, the through hole TH may be formed at the edge of the core layer 110, but it is not limited thereto and may be formed at the center portion.

The chip insertion hole CH may be disposed at a central portion of the core layer 110, but may be disposed at one or both edges of the core layer 110, which is merely an example. At least one such chip insertion hole (CH) may be formed.

4, after the chip fixing film 10 is attached to the upper surface 110a of the core layer 110, the chip fixing film 10 is embedded in the chip insertion hole (CH in FIG. 3) The chip 130 is attached.

The attachment of the embedded chip 130 is performed by attaching the chip fixing film 10 to the upper surface 110a of the core layer 110 and then attaching the chip fixing film 10 to the lower surface of the chip fixing film 10 in the chip insertion hole of the core layer 110 It is preferable that the built-in chip 130 is mounted in a horizontal direction.

This embedded chip 130 is horizontally inserted into the chip insertion hole. At this time, the embedded chip 130 may be at least one selected from a memory chip, a driving chip, a capacitor, and an inverter.

Next, the chip compensation material layer 140 is filled in the chip insertion holes of the core layer 110 to which the embedded chip 130 is attached. The chip compensating material layer 140 is filled in the chip inserting holes of the core layer 110 to protect the side surfaces and the bottom surface of the embedded chip 130. As the material of the chip compensation material layer 140, one selected from polyimide resin, epoxy resin, nonconductive ink, etc. may be used.

In particular, the combined thickness of the embedded chip 130 and the chip compensating material layer 140 is preferably formed to have a thickness corresponding to the thickness of the core layer 110, 140 may be embedded in the core layer 110 to minimize the thickness of the printed circuit board and the volume of the components. In addition, the first and second external circuit patterns (see FIG. 9 160, and 162, respectively.

Referring to FIG. 5, a first mask pattern M1 is formed on the top and bottom surfaces 110a and 110b of the core layer 110 to cover the entire surface excluding the internal circuit pattern forming region.

Referring to FIG. 6, first and second seed layers (see FIG. 5) attached to the upper and lower surfaces 110a and 110b of the core layer 110 exposed to the outside of the first mask pattern 112 and 114 to form an internal circuit pattern 120 in the upper surface 110a and the lower surface 110b of the core layer 110 and in the through hole (TH in FIG. 5). The internal circuit pattern 120 includes a first internal circuit pattern 120a formed on the upper surface 110a of the core layer 110 and a second internal circuit pattern 120b formed on the lower surface 110b of the core layer 110. [ And an inner via 120c formed in the through hole and electrically connecting the first and second inner circuit patterns 120a and 120b. By forming the internal circuit pattern 120, one end and the other end of the embedded chip 130 are electrically connected to the first internal circuit pattern 120a, respectively.

Next, the first mask pattern (M1 in FIG. 5) disposed on the upper surface 110a and the lower surface 110b of the core layer 110 on which the internal circuit pattern 120 is formed is removed.

7, a first resin layer 150 covering a top surface 110a of the core layer 110 and having a first via hole V1 exposing a part of the internal circuit pattern 120, The second resin layer 152 having the second via hole V2 covering the lower surface 110b of the core layer 110 and exposing a part of the internal circuit pattern 120 is formed.

The first and second resin layers 150 and 152 having the first and second via holes V1 and V2 are disposed on the upper portion of the core layer 110 spaced from the upper surface 110a of the core layer 110, (Not shown) and a lower thermocompression plate (not shown) are attached to the lower part separated from the lower surface 110b and laminated by thermocompression using the upper and lower thermocompression plates, The first internal circuit pattern 120a and the bottom surface 110b of the core layer 110 and the second internal circuit pattern 120b so as to ensure electrical insulation do. As the material of the first and second resin layers 150 and 152, an epoxy resin, a polyimide resin, or the like may be used.

The first and second via holes V1 and V2 form the first and second resin layers 150 and 152 and then the first and second resin layers 150 and 152 are formed by a laser drilling or etching process. As shown in FIG. Although not shown in the drawing, the third seed layer and the fourth seed layer may be provided on the upper surface of the first resin layer 150 and the lower surface of the second resin layer 152.

Referring to FIG. 8, a second mask pattern M2 is formed to cover the entire surfaces of the first and second resin layers 150 and 152 except for the external circuit pattern forming area.

9, the upper surface of the first resin layer 150 exposed to the outside of the second mask pattern (M2 of FIG. 8) and the lower surface of the second resin layer 152 are formed with first and second via holes The first and second external circuit patterns 160 and 162 electrically connected to the internal circuit pattern 120 are formed through the V1 and V2 of FIG.

The first and second external circuit patterns 160 and 162 are formed on the upper surface 110a and the lower surface 110b of the core layer 110 exposed to the outside of the second mask pattern, (Not shown in the drawing).

The first and second solder mask patterns 150 and 152 covering the front surfaces of the first and second resin layers 150 and 152 except a part of the first and second external circuit patterns 160 and 162, respectively, (170, 172). At this time, the first and second solder mask patterns 170 and 172 may be formed using a photo solder resist (PSR), a liquid photosensitive coverlay, a photo polyimide film, an epoxy resin, Can be used.

The chip-embedded printed circuit board manufactured by the above process can embody a circuit pattern on the top and bottom surfaces of the embedded chip and the core layer after inserting the embedded chip in the chip insertion hole passing through the core layer , The degree of freedom in circuit design can be improved.

In addition, the chip-embedded printed circuit board manufactured by the method according to the present invention can be manufactured by fixing a chip embedded in a chip insertion hole using a chip correction material layer, removing a chip fixing film bonded to the substrate, The first and second resin layers and the first and second external circuit patterns are collectively formed in an upper portion and a lower portion of the multilayer bold process, thereby achieving a process shortening and a cost reduction effect.

Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. These changes and modifications may be made without departing from the scope of the present invention. Accordingly, the scope of the present invention should be determined by the following claims.

100: printed circuit board 110: core layer
110a: upper surface of the core layer 110b: lower surface of the core layer
120: internal circuit pattern 120a: first internal circuit pattern
120b: second internal circuit pattern 120c: internal through vias
130: embedded chip 140: chip correction material layer
150: first resin layer 152: second resin layer
160: first external circuit pattern 162: second external circuit pattern
170: first solder mask pattern 172: second solder mask pattern

Claims (12)

A core layer having an upper surface and a lower surface and including a through hole and a chip insertion hole penetrating the upper surface and the lower surface, respectively;
An upper surface and a lower surface of the core layer, and an internal circuit pattern formed in the through hole;
An embedded chip inserted in a chip insertion hole of the core layer and electrically connected to an internal circuit pattern on an upper surface of the core layer;
A chip compensating material layer filled in the chip inserting holes of the core layer to protect side surfaces and bottom surfaces of the embedded chip;
A first resin layer covering a top surface of the core layer and having a first via hole exposing a part of the internal circuit pattern;
A second resin layer covering the lower surface of the core layer and having a second via hole exposing a part of the internal circuit pattern; And
And first and second external circuit patterns respectively formed on the upper surface of the first resin layer and the lower surface of the second resin layer and electrically connected to the internal circuit pattern through the first and second via holes Features embedded chip printed circuit board.
The method according to claim 1,
The embedded chip
Wherein the at least one chip is at least one selected from the group consisting of a memory chip, a driving chip, a capacitor, and an inverter.
The method according to claim 1,
The combined thickness of the embedded chip and the chip compensating material layer is
Wherein the core layer has a thickness corresponding to the thickness of the core layer.
The method according to claim 1,
The chip compensating material layer
A polyimide resin, an epoxy resin, and a nonconductive ink.
The method according to claim 1,
The internal circuit pattern
A first internal circuit pattern formed on an upper surface of the core layer,
A second internal circuit pattern formed on a lower surface of the core layer,
And an inner through-hole formed in the through hole and electrically connecting the first and second inner circuit patterns.
6. The method of claim 5,
The embedded chip
And one end and the other end of the chip are connected to the first internal circuit pattern, respectively.
The method according to claim 1,
The printed circuit board
Further comprising first and second solder mask patterns covering the front surfaces of the first and second resin layers except for a part of the first and second external circuit patterns, respectively.
(a) forming a through hole and a chip insertion hole each penetrating an upper surface and a lower surface of the core layer;
(b) attaching a chip fixing film to an upper surface of the core layer and attaching a chip embedded in the chip insertion hole via the chip fixing film;
(c) filling a chip compensating material layer in the chip insertion hole of the core layer with the built-in chip attached thereto;
(d) forming upper and lower surfaces of the core layer and an internal circuit pattern in the through-hole;
(e) a first resin layer covering the upper surface of the core layer and having a first via hole exposing a part of the internal circuit pattern, and a second resin layer covering the lower surface of the core layer, Forming a second resin layer having a second via hole for exposing the second resin layer; And
(f) forming first and second external circuit patterns on the upper surface of the first resin layer and the lower surface of the second resin layer, the first and second external circuit patterns being electrically connected to the internal circuit pattern through the first and second via holes; The method comprising the steps of:
9. The method of claim 8,
The step (b)
(b-1) attaching a chip fixing film to an upper surface of the core layer,
(b-2) attaching a built-in chip in a horizontal direction to a lower surface of the chip fixing film in the chip insertion hole of the core layer.
9. The method of claim 8,
In the step (b)
The embedded chip
Wherein the semiconductor chip is a selected one of a memory chip, a driving chip, a capacitor, and an inverter.
9. The method of claim 8,
In the step (c)
The chip compensating material layer
Polyimide resin, an epoxy resin, and a nonconductive ink.
9. The method of claim 8,
After the step (e)
(f) forming first and second solder mask patterns covering the entire surfaces of the first and second resin layers except a part of the first and second external circuit patterns, respectively, A method of manufacturing a printed circuit board.

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