KR20150010037A - Display device and method of fabricating the same - Google Patents

Abstract

The present invention relates to a display device capable of preventing the voltage drop across a cathode electrode. The display device according to the present invention includes: an organic light emitting element including a first electrode receiving a first power supply voltage and a second electrode receiving a second power supply voltage; a first protection layer which is arranged on the second electrode and includes at least one inorganic layer; and an auxiliary electrode layer which is arranged on the first protection layer and is electrically connected to the second electrode through the first protection layer.

Description

TECHNICAL FIELD [0001] The present invention relates to a display device and a method of manufacturing the same.

The present invention relates to a display device and a method of manufacturing the same, and more particularly, to a display device capable of preventing a voltage drop of a cathode electrode and a method of manufacturing the same.

The organic light emitting diode display is a display device having a light emitting layer made of an organic material between an anode electrode and a cathode electrode. Of the display devices, the organic light emitting display device has a wide viewing angle and a high response speed, and is receiving attention as a next generation display device.

Such an organic light emitting display device is classified into a back light emitting method and a front light emitting method depending on the direction of light transmission. Compared with the bottom emission type, the front emission type can have a high aperture ratio.

However, since the light is transmitted through the cathode electrode in the top emission type, the cathode electrode must be conductive and simultaneously permeable. Such semi-permeable materials have a thin thickness and thus have limitations in realizing a low-resistance cathode electrode.

Therefore, a voltage drop (i.e., IR drop) may occur in the cathode electrode, and the phenomenon may be conspicuous as the size of the organic light emitting display increases.

Accordingly, it is an object of the present invention to provide a display device and a method of manufacturing the same that can prevent a cathode voltage drop provided to each pixel.

A display device according to the present invention includes a substrate including at least one light emitting region and a non-light emitting region which is adjacent to the light emitting region and in which at least one switching element is disposed, a substrate disposed on the light emitting region, A first electrode for receiving a first power supply voltage, an organic thin film layer disposed on the first electrode, and a second electrode disposed on the organic thin film layer, the second electrode receiving a second power supply voltage different from the first power supply voltage An organic light emitting device, comprising: a first protective layer disposed on the second electrode, the first protective layer including at least one inorganic layer; and a second protective layer disposed on the first protective layer, And an auxiliary electrode layer electrically connected thereto. At this time, the first protection layer includes at least one connection portion in which the second electrode and the auxiliary electrode layer are electrically connected.

The auxiliary electrode layer overlaps the light emitting region and the non-emitting region, and the connecting portion may be disposed on the non-emitting region.

The first passivation layer may further include an organic layer for protecting the organic light emitting diode, and the auxiliary electrode layer may be a transparent electrode layer.

The display device according to the present invention may further comprise a second protective layer disposed on the auxiliary electrode layer and including at least one inorganic layer.

A display device according to the present invention includes a substrate including a plurality of light emitting regions disposed apart from each other and each including an organic light emitting element and a non-emitting region adjacent to the plurality of light emitting regions, , A first passivation layer including at least one inorganic layer, and an auxiliary electrode layer disposed on the first passivation layer and electrically connected to the organic light emitting element.

Wherein the organic light emitting element includes a first electrode for receiving a first power supply voltage, a pixel defining layer disposed on the substrate and including an opening for exposing a portion of the first electrode and an insulating portion for covering the substrate, And a second electrode disposed on the organic thin film layer and receiving a second power supply voltage different from the first power supply voltage. The first passivation layer includes at least one connection portion that passes through the first passivation layer and is electrically connected to the second electrode and the auxiliary electrode layer.

The auxiliary electrode layer may overlap the plurality of light emitting regions and the non-emitting region, and the auxiliary electrode layer may have the same area as the second electrode.

The plurality of connection portions may be arranged in a one-to-one correspondence with each of the plurality of light emission regions.

The display device according to the present invention may further comprise a pixel defining layer disposed between the substrate and the second electrode and exposing a part of the first electrode, A plurality of openings, and an insulating portion adjacent to the plurality of openings and overlapping the non-emitting region, wherein the insulating portion further includes protrusions protruding on one surface. The connecting portion may overlap with the protrusion.

The first protective layer may include a first cover layer that protects the second electrode and includes an organic material, and a second cover layer that is disposed on the first cover layer and includes an inorganic material.

The display device according to the present invention may further comprise a second protective layer disposed on the first protective layer and including at least one inorganic layer.

A method of manufacturing a display device according to the present invention includes the steps of forming a first electrode on a substrate, forming a pixel defining layer exposing a part of the first electrode on the substrate, Forming a second electrode on the organic thin film layer, forming a first protective layer on the second electrode, penetrating the first protective layer to expose a part of the second electrode, Forming an auxiliary electrode layer on the first passivation layer, the auxiliary electrode layer being connected to the exposed second electrode through the through hole, and forming a second passivation layer on the auxiliary electrode layer, .

The step of forming the pixel defining layer includes the steps of applying an insulating layer on the substrate and patterning an opening in the insulating layer to expose a part of the first electrode.

The forming of the pixel defining layer may further include forming protrusions protruding from one surface of the pixel defining layer.

The through hole may be formed in a region overlapping the protrusion.

The through hole may be formed by irradiating the first protective layer with a laser.

The display device of the present invention further includes an auxiliary electrode layer disposed on the cathode electrode, and the auxiliary electrode layer and the cathode electrode include an electrical connection portion electrically connected to each other. The voltage of the auxiliary electrode layer can be uniformly applied to the entire surface of the cathode electrode through the electrical connection portion. As a result, it is possible to improve the luminance reduction caused by the area of the display device.

Also, in the method of manufacturing a display device according to the present invention, an electrical connection part for connecting the cathode electrode and the auxiliary electrode layer is formed through laser irradiation. Therefore, the electrical connecting portion can be finely formed, which is advantageous in realizing high resolution quality.

1 is a block diagram of a display device according to an embodiment of the present invention.
2 is an equivalent circuit diagram of the pixel shown in Fig.
3 is a plan view of a display panel according to an embodiment of the present invention.
4 is a cross-sectional view taken along line I-I 'of Fig. 3;
5 is a sectional view taken along the line I-I 'in Fig.
6A to 6H show a method of manufacturing a display device according to an embodiment of the present invention.

FIG. 1 is a block diagram of a display device according to an embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of the pixel shown in FIG.

1, an OLED display according to an exemplary embodiment of the present invention includes an organic light emitting display panel (DP), a timing controller TC, a scan driver SD, and a data driver DD .

The display panel DP includes a base substrate 101 (see FIG. 4), a plurality of scan lines S1 to Sn disposed on the base substrate 101, a plurality of data lines D1 to Dm, And a plurality of pixels PX ₁₁ to PX _nm connected to corresponding data lines among the plurality of data lines D1 to Dm corresponding to the plurality of scan lines S1 to Sn .

The plurality of scan lines S1 to Sn extend in a first direction D1 on one surface of the base substrate 101 and are arranged in a second direction D2 that intersects the first direction D1. The plurality of data lines D1 to Dm insulate the plurality of scan lines S1 to Sn. The plurality of data lines D1 to Dm extend in the second direction D2 and are arranged in the first direction D1.

The display panel DP receives a first power supply voltage ELVDD and a second power supply voltage ELVSS from the outside. Each of the plurality of pixels PX ₁₁ to PX _nm is turned on in response to a corresponding scanning signal. Each of the plurality of pixels PX ₁₁ to PX _nm receives the first power source voltage ELVDD and the second power source voltage ELVSS and generates light in response to a corresponding data signal. The first power supply voltage ELVDD is a voltage higher than the second power supply voltage ELVSS.

Each of the plurality of pixels PX ₁₁ to PX _nm includes at least one transistor, at least one capacitor, and an organic light emitting diode. 2, an equivalent of a pixel PX _ij connected to an i-th scan line Si among the plurality of scan lines S1 to Sn and an i-th data line Dj among a plurality of data lines D1 to Dm Circuit is illustrated by way of example.

The pixel PX _ij includes a first transistor TFT 1, a second transistor TFT 2, a capacitor Cap, and an organic light emitting diode OLED _ij . The first transistor TFT1 includes a control electrode connected to the ith scan line Si, an input electrode connected to the jth data line Dj, and an output electrode. The first transistor TFT1 outputs a data signal applied to the jth data line Dj in response to a scan signal applied to the ith scan line Si.

The capacitor Cap includes a first capacitor electrode connected to the first transistor TFT1 and a second capacitor electrode receiving the first power voltage ELVDD. The capacitor Cap charges the amount of charge corresponding to the difference between the voltage corresponding to the data signal received from the first transistor TFT1 and the first power supply voltage ELVDD.

The second transistor TFT2 includes a control electrode connected to the output electrode of the first transistor TFT1 and the first capacitor electrode of the capacitor Cap, an input electrode receiving the first power supply voltage ELVDD, And an output electrode. The output electrode of the second transistor (TFT2) is connected to the organic light emitting device (OLED _ij).

The second transistor (TFT2) controls the drive current flowing through the organic light emitting device (OLED _ij) corresponding to the amount of charge stored in the capacitor (Cap). The turn-on time of the second transistor TFT2 is determined according to the amount of charge charged in the capacitor Cap. Substantially the output electrode of the second transistor TFT2 supplies a voltage lower than the first power supply voltage ELVDD to the organic light emitting device OLED _ij .

The organic light emitting device (OLED _ij) is a second electrode for receiving a first electrode and the second power supply voltage (ELVSS) is connected to the second transistor (TFT2). The organic light emitting device OLED _ij may include a first common layer, an organic light emitting pattern, and a second common layer disposed between the first electrode and the second electrode. The organic light emitting device (OLED _ij) is the turn of the second transistor (TFT2) - it emits light during the on period. The color of the light generated in the organic light emitting device OLED _ij is determined by the material of the organic light emitting pattern. For example, the color of light generated by the organic light-emitting device (OLED _ij) may be any one of red, green, blue, and white.

The timing controller TC receives the input video signals and outputs the converted video data I _DATA and various control signals SCS and DCS in accordance with the operation mode of the display panel DP.

The scan driver SD receives the scan driving control signal SCS from the timing controller TC. The scan driver SD receiving the scan driving control signal SCS generates a plurality of scan signals. The plurality of scan signals are sequentially supplied to the plurality of scan lines S1 to Sn.

The data driver DD receives the data driving control signal DCS and the converted image data I _DATA from the timing controller TC. The data driver DD generates a plurality of data signals based on the data driving control signal DCS and the converted image data I _DATA . The plurality of data signals are supplied to the plurality of data lines D1 to Dm.

FIG. 3 is a plan view of a display panel according to an embodiment of the present invention, and FIG. 4 is a cross-sectional view corresponding to I-I 'of FIG. 3 exemplarily shows six light emitting regions PXA ₂₂ to PXA ₃₄ corresponding to six openings OP ₂₂ to OP ₃₄ . In FIG. 3, only some configurations are shown for convenience of explanation. 4 is shown a cross-section of any one of the light-emitting region (PXA ₂₂₎ by way of example.

With, the display panel (DP) is a non-emission region (NPXA) adjacent to the plurality of light emitting regions (PXA ₂₂ ~ PXA ₃₄₎ and the plurality of light emitting regions (PXA ₂₂ ~ PXA _34), as shown in Figure 3 Respectively. The plurality of light emitting regions PXA ₂₂ to PXA ₃₄ are surrounded by the non-light emitting region NPXA. First electrodes of the organic light emitting elements of the plurality of pixels PX ₁₁ to PX _nm are disposed in the plurality of light emitting regions PXA ₂₂ to PXA ₃₄ , respectively.

As shown in Fig. 4, a thin film transistor (TFT) is formed on the base substrate 101. Fig. The thin film transistor TFT may be any one of the first transistor TFT1 and the second transistor TFT2 shown in FIG. The thin film transistor TFT includes a semiconductor layer AL, a gate electrode GE and a source electrode SE and a drain electrode DE which are electrically connected to the semiconductor layer AL.

The semiconductor layer (AL) is formed on the base substrate (101). At this time, a buffer layer (not shown) may be further disposed on the base substrate 101 before the semiconductor layer AL is formed. The buffer layer may be an insulating layer.

The semiconductor layer (AL) may be formed of an amorphous silicon thin film or a polycrystalline silicon thin film, but is not limited thereto. For example, the semiconductor layer AL may include an organic semiconductor. Although not shown, the semiconductor layer AL includes a heavily doped source region, a heavily doped drain region, and a channel region disposed between the source region and the drain region .

A gate insulating film GI is disposed on the semiconductor layer AL. The zeta insulating layer GI allows the layers to be formed in the subsequent process and the semiconductor layer AL to be insulated from each other. The gate insulating film GI may include an inorganic insulating layer such as silicon oxide, silicon nitride, aluminum oxide, or the like. Alternatively, the gate insulating film GI may be an organic insulating film including a polymer material such as polymethyl methacrylate, polystyrene, phenol-based polymer, acrylic polymer, polyimide, polyvinyl, and the like.

The gate electrode GE is disposed on the gate insulating film GI. Although not shown, the gate electrode GE is connected to the corresponding scanning line G ₂₂ . The gate electrode GE receives a signal for turning on / off the thin film transistor TFT from the scan line G ₂₂ . The gate electrode GE may be arranged to correspond particularly on the channel region.

The gate electrode GE may include polysilicon or a conductive metal such as molybdenum fluoride, aluminum, chromium, aluminum / chromium, or the like. Alternatively, the gate electrode GE may include a conductive polymer such as conductive polyaniline, conductive polypyrrole, conductive polythiophene, and polystyrenesulfonic acid.

A first insulating layer 102 is disposed on the gate electrode GE. The first insulating layer 102 covers the gate electrode GE and electrically isolates the gate electrode GE and other structures from each other. The first insulating layer 102 includes a first contact hole TH1 and a second contact hole TH2 which are spaced apart from each other.

On the first insulating layer 102, a source electrode SE and a drain electrode DE are disposed apart from each other. The source electrode SE and the drain electrode DE are in contact with the semiconductor layer AL through the first contact hole TH1 and the second contact hole TH2, respectively.

A second insulating layer 103 is disposed on the first insulating layer 102. The second insulating layer 103 covers the source electrode SE and the drain electrode DE. The source electrode SE may be disposed to correspond to the source region, and the drain electrode DE may be disposed to correspond to the drain region.

Although not shown, the thin film transistor TFT may be a bottom gate type in which the gate electrode GE is disposed below the source electrode SE and the drain electrode DE. At this time, the semiconductor layer AL is disposed on the source electrode SE and the drain electrode DE. In the present invention, the driving method of the thin film transistor (TFT) is not limited to any one, and various structures and methods for switching can be selected.

As shown in FIG. 4, the organic light emitting diode OLED ₂₂ is disposed on the second insulating layer 103. The organic light emitting device OLED ₂₂ includes the first electrode ED1, the organic thin film layer EL, and the second electrode ED2. In the present embodiment, the first electrode ED1 is an anode and the second electrode ED2 is a cathode.

The first electrode (ED1) is disposed on the second insulating layer (103). The first electrode ED1 is connected to the drain electrode DE through a contact hole TH3 passing through the second insulating layer 103. [ Although not shown, the first electrodes (ED1) and the drain electrode (DE) is connected to the corresponding data line (D ₂₂₎ receives a first power supply voltage.

The first electrode ED1 may be formed of a material having high conductivity and work function. The first electrode ED1 may include a transparent conductive oxide. For example, indium tin oxide, indium zinc oxide, zinc oxide or indium oxide.

As shown in FIGS. 3 and 4, the pixel defining layer (PDL) is disposed on the second insulating layer 103. The pixel defining layer PDL includes a plurality of openings OP ₂₂ to OP ₃₄ and an insulating portion adjacent to the plurality of openings OP ₂₂ to OP ₃₄ . The plurality of openings OP ₂₂ to OP ₃₄ correspond to the plurality of light emitting regions PXA ₂₂ to PXA _34, respectively, and the insulating portion corresponds to the non-light emitting region NPXA.

As it is shown in Figure 4, in which said opening (OP ₂₂₎ exposes a portion of the first electrode (ED1). The opening OP ₂₂ corresponds to the light emitting region PXA ₂₂ . The first electrodes (ED1) is disposed corresponding to the light emitting region (PXA _22). The first electrode ED1 receives the first power voltage ELVDD (see FIG. 1). Although not shown, the first electrodes disposed in the plurality of light emitting regions PXA ₂₂ to PXA ₃₄ constitute a first electrode layer at the display panel level.

As shown in FIG. 4, the organic thin film layer EL is disposed on the first electrode ED1. The organic thin film layer EL includes a first common layer FL1, an organic light emitting layer (EML), and a second common layer FL2. The organic thin film layer (EL) may be formed of a low-molecular organic material, for example, copper phthalocyanine, tris-8-hydroxyquinoline aluminum, or the like. Also, the organic layer 140 may be formed of a polymer organic material, and may be formed of various materials such as poly (3,4-ethylenedioxythiophene), polyphenylene vinylene, and polyfluorene.

The first common layer FL1 may be arranged to cover the first electrode ED1 and the insulating portion of the pixel defining layer. Although not shown, the first common layer FL1 having an integral shape is disposed in the plurality of light emitting regions PXA ₂₂ to PXA ₃₄ (see FIG. 3) and the non-light emitting region NPXA.

The first common layer FL1 controls the mobility of holes injected from the first electrode ED1. Although not shown, the first common layer FL1 includes a hole injection layer. In addition, the first common layer FL1 may further include a hole transport layer.

The organic emission layer (EML) is disposed on said first common layer (FL1) to correspond to the light emitting region (PXA _22). The organic emission layer (EML) is disposed on said first common layer (FL1) to correspond to the opening (OP _22). The organic light emitting layer (EML) emits light of color. The organic light emitting layer (EML) produces one of red, green, blue, and white. The organic light emitting layer (EML) may include a fluorescent material or a phosphorescent material.

The second common layer FL2 is disposed on the organic light emitting layer (EML). The second common layer FL2 can control the mobility of electrons. Although not shown, the second common layer FL2 having an integral shape is disposed in the plurality of light emitting regions PXA ₂₂ to PXA ₃₄ (see FIG. 3) and the non-light emitting region NPXA.

The second common layer includes an electron injection layer. In addition, the second common layer may further include an electron transport layer disposed between the electron injection layer and the organic emission layer (EML). Meanwhile, in another embodiment of the present invention, the second common layer FL2 may be omitted.

Although not shown, the organic light emitting diode OLED ₂₂ may further include a hole blocking layer disposed between the second common layer FL2 and the organic light emitting layer EML. The hole blocking layer prevents holes from moving from the organic emission layer (EML) to the second common layer (FL2), thereby enhancing the luminous efficiency.

The second electrode (ED2) on the light emitting region (PXA ₂₂₎ and the second common layer (FL2) is arranged to respond to. The second electrode may be disposed in an integral shape covering the plurality of light emitting regions PXA ₂₂ to PXA ₃₄ (see FIG. 3) and the non-light emitting region NPXA. Alternatively, although not shown, a plurality of second electrodes arranged in the plurality of light emitting regions PXA ₂₂ to PXA ₃₄ (see FIG. 3) may constitute a second electrode layer at the display panel level. The second electrode ED2 receives the second power voltage ELVSS (see FIG. 1).

The second electrode ED2 is formed of a material having a lower work function than the first electrode ED1. For example, the second electrode ED2 may be formed as a reflective electrode including lithium, calcium, lithium fluoride / calcium, lithium fluoride / aluminum, aluminum, silver, magnesium, or a compound thereof. Alternatively, the second electrode ED2 may be formed as a transparent electrode. For example, the second electrode ED2 may be formed of a semipermeable thin film layer containing silver.

The first protective layer 200 formed on the organic light-emitting device (OLED ₂₂₎ are arranged. The first passivation layer 200 is disposed on the second electrode ED2 to isolate other structures disposed on the second electrode ED2 and the second electrode ED2.

In addition, the first passivation layer 200 may prevent moisture and oxygen from penetrating into the organic light emitting diode OLED ₂₂ . The first passivation layer 200 may be formed of at least one layer, and the first passivation layer 200 may include at least one of an organic layer and an inorganic layer. The first passivation layer 200 flattens the top surface of the OLED ₂₂ .

An auxiliary electrode layer 300 is disposed on the first passivation layer 200. Although not shown, the auxiliary electrode layer 300 may be disposed in an integral shape covering the plurality of light emitting regions PXA ₂₂ to PXA ₃₄ (see FIG. 3) and the non-light emitting region NPXA. The auxiliary electrode layer 300 may have a shape corresponding to the shape of the second electrode ED2.

The auxiliary electrode layer 300 may include a conductive material. For example, the auxiliary electrode layer 300 may include the same material as the second electrode ED2. In addition, the auxiliary electrode layer 300 may include a transparent conductive material.

The first protective layer 200 comprises a connecting portion ₍₂₂ CH) in which the second electrode (ED2) and the auxiliary electrode layer 300 is connected. As shown in Figure 3, the display panel (DP) according to the present invention may include at least one of the connecting portions (CH ₂₂ ~ CH _34).

The connection portion ₍₂₂ CH) may be located in a number of areas in which the second electrode (ED2) and the auxiliary electrode layer 300 is superposed. For example, although not shown, the connecting part (CH ₂₂₎ may be disposed on the light emitting region (PXA _22). Or, may be disposed on the, the plurality of connection portions (CH ₂₂ ~ CH ₃₄₎ is so that the effect on the transmittance of the non-emitting region (NPXA), as shown in Fig.

The display panel (DP) may comprise a plurality of connecting portions arranged so that the one-to-one basis (CH ₂₂ ~ CH ₃₄₎ for each of the plurality of light emitting regions (PXA ₂₂ ~ PXA _34). The plurality of connection portions (CH ₂₂ to CH ₃₄ ) may be irregularly arranged. The number of the plurality of connection portions (CH ₂₂ to CH ₃₄ ) or the arrangement region is not limited.

The plurality of light emitting regions PXA ₂₂ to PXA ₃₄ may be disposed in a region where the voltage drop of the second electrode ED2 is generated. For example, it may be disposed along the edge region of the display panel according to the present invention, and may be disposed only in a partial region of the center region.

Further, although not shown, each of the connecting portions (CH ₂₂ ~ CH ₃₄₎ may have various shapes. For example, the connecting part (CH ₂₂₎ may have a circular, cross-section of a polygon. Alternatively, the connecting part (CH ₂₂₎ may have a line shape. When the area of the electrical contact CH22 increases, the voltage of the auxiliary electrode layer 300 is easily transferred to the second electrode ED2. The connection portion (CH ₂₂₎ may be may have various shapes, are arranged in different locations, preventing a voltage drop of the second electrode (ED2).

The second electrode ED2 is formed as a relatively thin film layer by a deposition process. Particularly, when the display panel DP is a top emission type, the second electrode ED2 may be a thin film layer having a thickness of about 100 Å in order to improve transmittance. When the thickness is thin, the internal resistance of the second electrode ED2 increases.

In particular, when applied to a large-area display panel, the second electrode ED2 may be deposited on the front surface of the display panel. At this time, the second electrode ED2 formed of a thin-film layer having a large area may have a high resistance, so that a voltage drop may be partially generated. Particularly, the voltage drop ratio is relatively higher in the central region of the display panel than in the peripheral region of the display panel.

The auxiliary electrode layer 300 is thicker than the second electrode ED2. Therefore, the voltage drop ratio of one area of the auxiliary electrode layer 300 corresponding to one area of the second electrode ED2 in the same area of the display panel is relatively low.

The second electrode ED2 receives the voltage of the auxiliary electrode layer 300 through the connection portion CH22. The auxiliary electrode layer 300 may reduce the voltage drop of the second electrode ED2. Therefore, the display device according to the present invention includes the auxiliary electrode layer 300, thereby preventing display quality deterioration that may occur in a large-area display panel.

4, the display panel DP according to the present invention may further include a second protective layer 400 disposed on the auxiliary electrode layer 300. Referring to FIG. The second passivation layer 400 protects the auxiliary electrode layer 300 from the outside.

The second passivation layer 400 may be a passivation layer for preventing penetration of moisture and oxygen. The second passivation layer 400 may include at least one inorganic film and an organic film. For example, the second passivation layer 400 may include Al, Al ₂ O _3, AlO _x N _y, SiO _2, SiO _x N _y or the like.

5 is a cross-sectional view corresponding to I-I 'of Fig. FIG. 5 shows an embodiment including a pixel defining layer (PDL) having a shape different from that of the embodiment shown in FIG. In FIG. 5, the organic thin film layer EL is shown as one layer for convenience of explanation. On the other hand, in Fig. 5, the same reference numerals are assigned to the same components as those described in Figs. 1 to 4, and redundant explanations are omitted.

5, a display panel according to an embodiment of the present invention includes a pixel defining layer (PDL) including protrusions PDL-B and a first passivation layer 200 composed of a plurality of layers .

The pixel definition layer PDL includes an opening portion OP ₂₂ (see FIG. 3) and an insulation portion PDL-I adjacent to the opening portion OP ₂₂ and covering the second insulation layer 103. The insulation part PDL-I forms the opening OP ₂₂ and has a first surface overlapping with the light emitting area PXA ₂₂ and a first surface extending from the first surface and overlapping with the non-light emitting area NPXA As shown in FIG.

As shown in FIG. 5, the insulation part PDL-I may further include the protrusion part PDL-B. The protrusions PDL-B protrude from the second surface. The protrusion PDL-B may be formed of the same material as the insulation portion PDL-I. Although not shown, the protrusion PDL-B may be disposed on the insulation portion PDL-I in a configuration different from the insulation portion PDL-I.

The protrusion PDL-B is disposed on the non-emission area NPXA. Although not shown, a plurality of the protrusions PDL-B may be provided at the display panel level. Alternatively, the protrusions PDL-B may have an integral shape that overlaps the non-emission area NPXA and surrounds the plurality of emission areas. For example, the protrusions PDL-B may have a lattice shape surrounding each of the light emitting regions.

As shown in FIG. 5, the second electrode ED2 is disposed on the organic thin film layer EL. The second electrode ED2 may be disposed to overlap the light emitting region PXA22 and the non-light emitting region NPXA. At this time, the second electrode ED2 covers the insulation part PDL-I and the protrusion part PDL-B. The second electrode ED2 is disposed along the shape of the surface on which the second electrode ED2 is disposed. Therefore, the second electrode ED2 may have predetermined steps.

The first passivation layer 200 is disposed on the second electrode ED2. The first passivation layer 200 may have a plurality of layers including a plurality of layers. The first passivation layer 200 includes a first cover layer 210. The first cover layer 210 may comprise a transparent polymer and / or an inorganic material. The first cover layer 210 protects the second electrode ED2 and isolates the second electrode ED2 and other structures to be disposed on the second electrode DE2.

The first passivation layer 200 may further include a second cover layer 220. The second cover layer 220 may be disposed on the first cover layer 210. The second cover layer 220 may include a material having high heat resistance. The second cover layer 220 prevents the second electrode ED2 from being damaged during a subsequent process, for example, a patterning process of the auxiliary electrode layer 300.

The first passivation layer 200 may further include the third cover layer 230. The third cover layer 230 may be disposed on the uppermost layer of the first passivation layer 200. The third cover layer 230 prevents moisture and oxygen from penetrating into the organic light emitting diode OLED ₂₂ including the second electrode ED2. The third cover layer 230 may include an inorganic material having high moisture resistance. For example, the third cover layer 230 may comprise silicon oxide or silicon nitride. Alternatively, the third cover layer 230 may be a multilayer film of silicon oxide / silicon nitride.

The auxiliary electrode layer 300 is disposed on the first passivation layer 200. At this time, the auxiliary electrode layer 300 is electrically connected to the second electrode ED2. The auxiliary electrode layer 300 and the electrical connection portion CH ₂₂ of the second electrode ED 2 are formed in the first passivation layer 200. As shown in FIG. 5, the electrical connection portion CH22 may be disposed over the protruding portion PDL-B.

The electrical connection part (CH ₂₂ ) penetrates the first passivation layer (200). Thus, the side surface of the electrical contact CH ₂₂ includes the cross-sections of the first cover layer 210, the second cover layer 220, and the third cover layer 230. The auxiliary electrode layer 300 covers the cross sections of the first to third cover layers 210, 220 and 230.

The auxiliary electrode layer 300 contacts with the second electrode (ED2) via the electrical connection (CH _22). Thus, the second electrode (ED2) is supplied with the same voltage and the auxiliary electrode layer 300, from where the arrangement that the electrical connection (CH _22). The auxiliary electrode layer 300 may prevent a voltage drop of the second electrode ED2.

The second passivation layer 400 is disposed on the auxiliary electrode layer 300. The second passivation layer 400 serves as a sealing layer for preventing moisture and oxygen from penetrating into the auxiliary electrode layer 300. This will be omitted from duplicating the description of FIG. The first passivation layer 200 and the second passivation layer 400 can double the penetration of moisture and oxygen, thereby improving the reliability of the device.

6A to 6H are cross-sectional views illustrating a method of manufacturing a display device according to an embodiment of the present invention. 6A to 6H show cross sections corresponding to the light emitting region PXA ₂₂ shown in FIG.

Also, as shown in 6a, the pixel defining layer including an opening (OP ₂₂₎ for placing a first electrode (ED1) on the base substrate 101, exposing a portion of the first electrode (ED1) (PDL ). Wherein the first electrodes (ED1) the placement area is defined as a light emitting region (PXA _22), an area adjacent to the light emitting region (PXA ₂₂₎ is defined as the non-emission region (NPXA).

An insulating layer is disposed between the base substrate 101 and the first electrode ED1. The insulating layer includes a first insulating layer 102 and a second insulating layer 103. The first insulating layer 102 and the second insulating layer 103 may include at least one thin film transistor.

As shown in FIG. 6A, a thin film transistor (TFT) is disposed on the base substrate 101. The thin film transistor TFT is insulated from the semiconductor layer AL formed on the base substrate 101, the gate electrode GE disposed on the semiconductor layer, the gate electrode GE, A source electrode SE and a drain electrode DE, which are arranged on the same plane. The drain electrode DE is electrically connected to the first electrode ED1 through a contact hole TH3. The thin film transistor (TFT) is formed through deposition, exposure, and development processes. The process of forming the thin film transistor (TFT) is obvious to those skilled in the art, and a detailed description thereof will be omitted.

The first electrode (ED1) is formed on the second insulating layer (103). The first electrode ED1 may be formed by a conventional deposition method, for example, chemical vapor deposition, sputtering, or the like, and then patterning by photolithography or the like. The anode electrode 120 may be formed to have a size corresponding to the light emitting region PXA ₂₂ .

A pixel definition layer (PDL) having an opening OP ₂₂ on the second insulating layer 103 is formed. The pixel defining layer (PDL) is formed from a base film through an exposure process using a mask (not shown) and a developing process. The mask includes a transmission region and a blocking region as a slit mask or a diffraction mask. The opening OP ₂₂ is formed in correspondence with the transmissive region of the mask and a region other than the opening OP ₂₂ is formed corresponding to the blocking region of the mask.

Although not shown, the mask can use a halftone mask. The halftone mask may include a semi-transmissive region adjacent to the transmissive region, the blocking region, and the transmissive region and the blocking region. In this case, the opening OP22 is formed corresponding to the transmission region, the protrusion (PDL-B: see FIG. 5) corresponding to the blocking region is formed, and the insulation portion (PDL- I: see Fig. 5).

As shown in FIG. 6B, an organic thin film layer EL is formed on the exposed first electrode ED1. The organic thin film layer EL may include a first common layer FL1 and an organic light emitting layer (EML). The first common layer FL1 is formed on the pixel defining layer PDL and the first electrode ED1.

A liquid organic light emitting material is provided on the first common layer FL1 to form the organic light emitting layer (EML). The organic material is provided in a region corresponding to the opening (OP ₂₂ ) of the pixel defining layer (PDL). The organic emission layer (EML) may determine the size of the emission region (PXA ₂₂ ). The organic light emitting layer (EML) may be provided by an inkjet printing method or a nozzle printing method.

The second common layer FL2 may be further formed on the organic emission layer EML. The second common layer FL2 covers the organic emission layer EML and the first common layer FL1.

The first common layer FL1 and the second common layer FL2 may be formed through a patterning or deposition process. The first common layer FL1 and the second common layer FL2 are integrated layers covering a plurality of light emitting regions PXA ₂₂ to PXA ₃₄ (see FIG. 3) and non-light emitting regions NPXA on a plane .

As shown in FIG. 6C, the second electrode ED2 is formed on the organic thin film layer EL. The second electrode ED2 may be formed using a conventional deposition method, for example, chemical vapor deposition or sputtering, but is not limited thereto.

As shown in FIGS. 6D to 6F, the first passivation layer 200 is formed on the second electrode ED2. The first passivation layer 200 is formed to have a thickness enough to planarize the second electrode ED2. The first passivation layer 200 may include an organic layer and / or an inorganic layer, and may be formed by laminating a plurality of layers.

Light (LS) is irradiated on the planarized first passivation layer (200) to form a through hole. The through hole becomes an electrical connecting portion (CH ₂₂ ). The through hole exposes the second electrode ED2.

The light LS may be an infrared ray or a laser having a UV wavelength. That is, the through holes may be formed using a mask. Particularly, the through hole can use a laser. In the case of forming by irradiating a laser, the electrical connection part (CH ₂₂ ) can be formed in a minute size and has a small influence on adjacent structures. Therefore, it is advantageous to realize a high-resolution display device.

As shown in FIG. 6G, an auxiliary electrode layer 300 is formed on the first passivation layer 200. The auxiliary electrode layer 300 covers the light emitting region PXA ₂₂ and the non-light emitting region NPXA. The auxiliary electrode layer 300 is in contact with the second electrode ED2 through the electrical connection part CH22. Therefore, if the through hole has a narrow area, it can be filled with the auxiliary electrode layer 300.

The auxiliary electrode layer 300 is thicker than the second electrode ED2. The auxiliary electrode layer 300 is electrically connected to the second electrode ED2 to prevent a voltage drop of the second electrode ED2. Due to the auxiliary electrode layer 300, the second electrode ED2 maintains a uniform voltage distribution over the entire surface. Therefore, even if the display panel includes the cathode electrode formed in a large area of the thin film layer of semipermeable property for the whole light emission, uniform display quality can be obtained over the entire surface.

In the case of a large-area display panel, a voltage drop mainly occurs in the central region of the display panel. In the case where the electrical connection portion CH ₂₂ is formed in the central region of the display panel, such a voltage drop phenomenon can be mitigated to prevent display quality deterioration.

6H, a second passivation layer 400 may be further disposed on the auxiliary electrode layer 300. In this case, The second passivation layer 400 is formed of an organic material and / or an inorganic material to prevent water and oxygen from penetrating into the auxiliary electrode layer 300 and isolating adjacent structures of the auxiliary electrode layer 300 from each other. The second passivation layer 400 seals the organic light emitting diode OLED ₂₂ together with the first passivation layer 200.

101: Base substrate TFT: Thin film transistor
OLED: organic light emitting diode 200: first protective layer
300: auxiliary electrode layer 400: second protective layer
PDL-I: Isolation part PDL-B:
PXA: Light emitting area NPXA: Non light emitting area

Claims (19)

A substrate including at least one light emitting region and a non-light emitting region adjacent to the light emitting region, in which at least one switching element is disposed;
A first electrode disposed on the light emitting region and connected to the switching element to receive a first power supply voltage, an organic thin film layer disposed on the first electrode, and a second electrode disposed on the organic thin film layer, An organic light emitting element including a second electrode for receiving another second power supply voltage;
A first passivation layer disposed on the second electrode and including at least one inorganic layer; And
And an auxiliary electrode layer disposed on the first passivation layer and electrically connected to the second electrode through the first passivation layer,
Wherein the first protective layer includes at least one connection portion in which the second electrode and the auxiliary electrode layer are electrically connected to each other. The method according to claim 1,
And the auxiliary electrode layer overlaps the light emitting region and the non-emitting region. 3. The method of claim 2,
And the connection portion is disposed on the non-emission region. The method of claim 3,
Wherein the first passivation layer further comprises an organic layer that protects the organic light emitting device. 5. The method of claim 4,
Wherein the auxiliary electrode layer is transparent. 6. The method of claim 5,
And a second protective layer disposed on the auxiliary electrode layer and including at least one inorganic material layer. A substrate disposed spaced apart from each other and including a plurality of luminescent regions each including an organic luminescent element and a non-luminescent region adjacent to the plurality of luminescent regions;
A first passivation layer covering the organic light emitting device and including at least one inorganic layer; And
And an auxiliary electrode layer disposed on the first passivation layer and electrically connected to the organic light emitting element,
The organic light-
A first electrode for receiving a first power supply voltage;
A pixel defining layer disposed on the substrate and including an opening exposing a portion of the first electrode and an insulating portion covering the substrate;
An organic thin film layer disposed on the exposed first electrode; And
And a second electrode disposed on the organic thin film layer and receiving a second power supply voltage different from the first power supply voltage,
Wherein the first protective layer passes through the first protective layer and includes at least one connection portion in which the second electrode and the auxiliary electrode layer are electrically connected to each other. 8. The method of claim 7,
And the auxiliary electrode layer overlaps the plurality of light emitting regions and the non-light emitting region. 9. The method of claim 8,
And the auxiliary electrode layer has the same area as the second electrode. 9. The method of claim 8,
The plurality of connection portions are provided,
Wherein each of the plurality of connection portions is disposed to correspond to each of the plurality of light emitting regions. 9. The method of claim 8,
And a pixel defining layer disposed between the substrate and the second electrode and exposing a portion of the first electrode,
The pixel defining layer may include,
A plurality of openings corresponding to each of the plurality of light emitting regions; And
And an insulating portion adjacent to the plurality of openings and overlapping the non-emitting region,
Wherein the insulating portion further comprises protrusions protruding on one surface. 12. The method of claim 11,
And the connection portion overlaps with the protrusion. 13. The method of claim 12,
The first protective layer may be formed,
A first cover layer protecting the second electrode and containing an organic material; And
And a second cover layer disposed on the first cover layer and including an inorganic material. 14. The method of claim 13,
And a second passivation layer disposed on the first passivation layer and including at least one inorganic material layer. Forming a first electrode on the substrate;
Forming a pixel defining layer exposing a portion of the first electrode on the substrate;
Forming an organic thin film layer on the exposed first electrode;
Forming a second electrode on the organic thin film layer;
Forming a first protective layer on the second electrode;
Forming a through hole for exposing a portion of the second electrode on the first passivation layer;
Forming an auxiliary electrode layer on the first passivation layer, the auxiliary electrode layer being connected to the exposed second electrode through the through hole; And
And forming a second passivation layer on the auxiliary electrode layer. 16. The method of claim 15,
Wherein forming the pixel defining layer comprises:
Applying an insulating layer on the substrate; And
And patterning an opening portion for exposing a part of the first electrode in the insulating layer. 17. The method of claim 16,
Wherein forming the pixel defining layer comprises:
Further comprising the step of forming protrusions protruding on one surface of the pixel defining layer. 18. The method of claim 17,
And the through hole is formed in a region overlapping with the protrusion. 16. The method of claim 15,
Wherein the through hole is formed by irradiating the first protective layer with a laser.

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