KR20150007732A - Watchdog system and watchdog control method - Google Patents

Watchdog system and watchdog control method Download PDF

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Publication number
KR20150007732A
KR20150007732A KR1020130082131A KR20130082131A KR20150007732A KR 20150007732 A KR20150007732 A KR 20150007732A KR 1020130082131 A KR1020130082131 A KR 1020130082131A KR 20130082131 A KR20130082131 A KR 20130082131A KR 20150007732 A KR20150007732 A KR 20150007732A
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KR
South Korea
Prior art keywords
signal
microcomputer
software
watchdog
cycle
Prior art date
Application number
KR1020130082131A
Other languages
Korean (ko)
Inventor
김학진
Original Assignee
현대모비스 주식회사
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Application filed by 현대모비스 주식회사 filed Critical 현대모비스 주식회사
Priority to KR1020130082131A priority Critical patent/KR20150007732A/en
Publication of KR20150007732A publication Critical patent/KR20150007732A/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Abstract

A watchdog system according to the present invention includes a signal generator for outputting a first signal, a first microcomputer for receiving the first signal and converting the first signal according to at least one software operation cycle to output a second signal, And a second microcomputer for receiving the 2a signal and comparing the 2b signal itself calculated from the first signal with the 2a signal to output a reset signal of the first microcomputer when the operation of the software is abnormal do.

Description

[0001] The present invention relates to a watchdog system and a watchdog control method,

The present invention relates to a watchdog system, and more particularly, to a watchdog system capable of determining whether the software is normally dynamically or not.

Generally, in a system using a microcomputer, a plurality of kinds of monitoring functions are provided to secure the stability of the system. Among these monitoring functions, a watchdog function for judging whether the system is in a continuous operation state is built in .

Since conventional watchdog technology only monitors the period of the microwave's implementation wave to determine whether the micom is normal, it is necessary to determine the operation status of the microcomputer in the case of a system requiring high stability such as a microcomputer used in an ACU (Airbag Control Unit) Is insufficient.

In order to solve the above problems, the present invention provides a watchdog system for determining the operation of software and the normal operation of a microcomputer.

The problems of the present invention are not limited to the above-mentioned problems, and other problems not mentioned can be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided a watchdog system comprising: a signal generator for outputting a first signal; a second signal generator for receiving the first signal and converting the first signal according to at least one software operation cycle; A second microcomputer for receiving the second signal from the first signal and comparing the second signal, which is calculated from the first signal, with the second signal, and when the operation of the software is abnormal, And a second microcomputer for outputting a signal.

The effect of the watchdog system according to the embodiment of the present invention is as follows.

First, whether or not each important software module operates and whether the operation is appropriate can be judged not simply whether the microcomputer is operating or not.

Second, high reliability of the system can be ensured.

Third, it can be used for devices requiring high stability.

Fourth, it is possible to prevent the software load controlled by the microcomputer from increasing beyond a predetermined level.

The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art from the description of the claims.

1 is a configuration diagram according to an embodiment of the present invention.
2 is a flowchart according to an embodiment of the present invention.
3 is a flow chart according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. To fully disclose the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

In order to clearly illustrate the present invention, parts not related to the description are omitted, and the same or similar components are given the same reference numerals throughout the specification.

In the following detailed description, the names of the components are denoted by the first, second, and so on in order to distinguish them from each other in terms of the same names, and are not necessarily limited to those in the following description.

1 is a configuration diagram according to an embodiment of the present invention.

The watchdog system according to the embodiment of the present invention may include a first microcomputer 110, a second microcomputer 120, and a signal generator 125.

The signal generator 125 outputs the first signal at regular intervals. The signal generator 125 may be included in the second microcomputer 120, but is not limited thereto. The period of the first signal generated in the signal generator 125 may be, for example, 100 ms. Here, the first signal may be generated when the first microcomputer 110 generates the first trigger signal and transmits the first trigger signal to the second microcomputer.

The first microcomputer 110 may transmit the first trigger signal to the second microcomputer 120. When the first signal is output from the signal generator 125 in response to the first trigger signal, the first microcomputer 110 receives the first signal. The first microcomputer 110 converts the first signal according to the operation cycle of at least one software and outputs the second signal.

The first microcomputer 110 generates the watchdog signal at a predetermined period and transmits the watchdog signal with a period that is faster than the period of the first signal by the second microcomputer 120. For example, the watchdog signal may be 1 ms.

Meanwhile, the first microcomputer 110 may be a microcomputer using at least one large-scale integrated circuit (LSI) in which a large number of electronic circuits are integrated on a silicon substrate of several mm. The first microcomputer 110 has a central arithmetic circuit, a memory circuit, and an input / output control circuit, and can perform not only simple arithmetic but also logical arithmetic. It can be used in various controls built in household appliances such as TVs and audio devices, or can be used for engine control of automobiles, airbag control, and the like.

Here, the software operates by exchanging signals with the first microcomputer 110 at regular intervals. For example, assuming that the first microcomputer 110 is a microcomputer used in an automobile airbag control unit (ACU), the first microcomputer 110 sends and receives signals to and from the software related to the airbag control of the vehicle at regular intervals, Lt; / RTI >

The first microcomputer 110 receives the first signal and converts the first signal into a second signal according to the operation cycle of at least one or more software. The communication between the first microcomputer 110 and the second microcomputer 120 may be an SPI (Serial to Peripheral Interface) communication and is a two-way communication.

For example, it is assumed that the first microcomputer 110 controls operations of the first software, the second software, and the third software. When the operation cycle of the first software is 100 ms, the operation cycle of the second software is 20 ms, and the operation cycle of the third software is 50 ms, the first microcomputer 110, which receives the first signal, And converts the first signal into the second signal according to the operation of the second software and the operation of the third software. The first microcomputer 110 transmits the second signal to the second microcomputer 120. Also, the first microcomputer 110 transmits information on the operation cycles of the first software, the second software, and the third software to the second microcomputer 120. [

The second microcomputer 120 receives the second signal from the first microcomputer 110. The communication between the second microcomputer 120 and the first microcomputer 110 may be an SPI (Serial to Peripheral Interface) communication, and is a two-way communication. The second microcomputer 120 compares the second signal, which is calculated from the first signal, with the second signal to determine whether the operation of the software in the first microcomputer 110 is normal. That is, the second microcomputer 120 itself calculates the second b signal from the first signal using the operation cycle information of the software received from the first microcomputer 110. The second microcomputer 120 compares the second b signal calculated by the second microcomputer 120 with the second a signal received from the first microcomputer 110 and controls the first microcomputer 110 to control at least one It is determined whether the operation of the above software is normal. If the operation of the software is abnormal, the second microcomputer 120 outputs a reset signal of the first microcomputer 110. When the first microcomputer 110 receives the reset signal, the first microcomputer 110 is reset.

On the other hand, the equation for calculating the 2a signal and the 2b signal is as follows.

Signal 2a = ((first signal ^ 0x484A) >> 1) + 0x8000

If n is an even number, the second b signal = (first signal >> n) + (0xFFFF << n)

If n is an odd number, the second b signal = ((first signal ^ 0x484A) >> n) + (0xFFFF << n)

Here, n denotes the number of software operated under the control of the first microcomputer 110. For example, when the operations of the first application, the second application, and the third application are operated under the control of the first microcomputer 110, n is 3 and an odd number. In the above equation, the first signal, the 2a signal, and the 2b signal are 16-bit data.

The second microcomputer 120 receives the watchdog signal generated at a predetermined period from the first microcomputer 110 and having a period faster than the period of the first signal. The second microcomputer 120 determines whether the first microcomputer 110 operates normally based on the watchdog signal. When the watchdog signal of a predetermined period is received at a fast cycle, is received at a slow cycle, or is not received a watchdog signal, the second microcomputer 120 determines that the first microcomputer 110 is abnormal. For example, when the second microcomputer 120 receives the watchdog signal from the first microcomputer 110 at a period of 1 ms, if the watchdog signal is received at a period faster than 0.9 ms or is received at a period slower than 1.1 ms, When the poison signal is not received, the second microcomputer 120 determines that the first microcomputer 110 is abnormal. When the second microcomputer 120 determines that the first microcomputer 110 is abnormal, the second microcomputer 120 outputs a reset signal of the first microcomputer 110. When the first microcomputer 110 receives the reset signal, the first microcomputer 110 is reset.

Meanwhile, the second microcomputer 120 may be a microcomputer using at least one large-scale integrated circuit (LSI) in which a large number of electronic circuits are integrated on a silicon substrate of several mm. The second microcomputer 120 has a central arithmetic circuit, a memory circuit, and an input / output control circuit, and can perform not only simple arithmetic but also logical operation. It can be used in various controls built in household appliances such as TVs and audio devices, or can be used for engine control of automobiles, airbag control, and the like.

Meanwhile, the watchdog system according to the embodiment of the present invention may be included in an ACU (Airbag Control Unit) of an automobile. Also, the ACU including the watchdog system may be included in the vehicle.

2 is a flowchart according to an embodiment of the present invention.

The second microcomputer 120 receives the first trigger signal from the first microcomputer 110 (S210). When the first trigger signal is received, the signal generator 125 generates a first signal (S220). The signal generator 125 may be included in the second microcomputer 120, but is not limited thereto. The first signal generated from the signal generator 125 is transmitted to the first microcomputer 110. The first microcomputer 110 converts the first signal into the second signal according to the operation cycle of at least one software. The second microcomputer 120 receives the second signal from the first microcomputer 110 (S230). The second microcomputer 120 calculates the second signal using the first signal generated from the signal generator 125 and the operation cycle of at least one software received from the first microcomputer 110. [ The second microcomputer 120 compares the second signal and the second signal to determine whether the operation of the software is normal (S240). If the operation of the software is not normal, the second microcomputer 120 outputs a reset signal of the first microcomputer 110 (S250). When the first microcomputer 110 receives the reset signal, the first microcomputer 110 is reset. If the operation of the software is determined to be normal in step S240, the process proceeds to step S210 and receives the first trigger signal from the first microcomputer 210. [

3 is a flow chart according to an embodiment of the present invention.

The second microcomputer 120 receives the watchdog signal from the first microcomputer 110 (S310). The second microcomputer 120 determines whether the first microcomputer 110 operates normally from the watch dog signal (S320). When the watchdog signal of a predetermined period is received at a fast cycle, is received at a slow cycle, or is not received a watchdog signal, the second microcomputer 120 determines that the first microcomputer 110 is abnormal. If the first microcomputer 110 is abnormal, the second microcomputer 120 outputs a reset signal of the first microcomputer 110. When the first microcomputer 110 receives the reset signal, the first microcomputer 110 is reset.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It should be understood that various modifications may be made by those skilled in the art without departing from the spirit and scope of the present invention.

110: first microcomputer
120: second microcomputer
125: Signal generator

Claims (3)

A signal generator for outputting a first signal;
A first microcomputer receiving the first signal and converting the first signal according to at least one software operation cycle to output a second signal; And
A second microcomputer for receiving the 2a signal and comparing the 2b signal itself calculated from the first signal with the 2a signal to output a reset signal of the first microcomputer when the operation of the software is abnormal; . The method according to claim 1,
Wherein the second microcomputer further determines whether the first microcomputer is operating normally by receiving the watchdog signal generated at a predetermined cycle from the first microcomputer and having a cycle that is faster than the cycle of the first signal, And outputs a reset signal of the first microcomputer when the first microcomputer is in the first state. Generating a first signal;
Receiving from the first microcomputer a second signal that is transformed in accordance with an operation cycle of at least one or more software in the first signal;
And outputting a reset signal of the first microcomputer when the operation of the software is abnormal.
KR1020130082131A 2013-07-12 2013-07-12 Watchdog system and watchdog control method KR20150007732A (en)

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Application Number Priority Date Filing Date Title
KR1020130082131A KR20150007732A (en) 2013-07-12 2013-07-12 Watchdog system and watchdog control method

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Application Number Priority Date Filing Date Title
KR1020130082131A KR20150007732A (en) 2013-07-12 2013-07-12 Watchdog system and watchdog control method

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190091854A (en) * 2018-01-29 2019-08-07 주식회사 만도 Apparatus and method for monitoring program and electronic control system
KR20220084775A (en) * 2020-12-14 2022-06-21 현대오토에버 주식회사 Bidirectional microcomputer monitoring method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190091854A (en) * 2018-01-29 2019-08-07 주식회사 만도 Apparatus and method for monitoring program and electronic control system
KR20220084775A (en) * 2020-12-14 2022-06-21 현대오토에버 주식회사 Bidirectional microcomputer monitoring method

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