KR20150004973A - Liquid crystal display device - Google Patents

Abstract

According to an embodiment of the present invention, a liquid crystal display device includes a substrate having multiple pixel areas defined and arranged in a matrix, a pixel electrode formed on each of the pixel areas on the substrate, and common electrodes which are formed on the substrate to be electrically insulated from the pixel electrodes and include multiple first sub-electrodes. Each of the first sub-electrodes is formed over unit pixel groups in the row direction. The first common sub-electrodes are spaced apart from other first common sub-electrodes adjacent in the row direction. The first common sub-electrodes in each pixel area are arranged in the column direction to be spaced apart from each other.

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device in which a common electrode and a pixel electrode are formed on a substrate.

2. Description of the Related Art A liquid crystal display (LCD) is one of the most widely used flat panel displays, and is composed of two substrates on which electrodes are formed and a liquid crystal layer interposed therebetween. And rearranges the liquid crystal molecules in the liquid crystal layer to adjust the amount of light transmitted.

One of the driving methods of the liquid crystal display device is a method in which a common electrode and a pixel electrode are disposed on a single display panel and the interval therebetween is narrower than the interval between the upper and lower display panels to form a fringe field on the common electrode and the pixel electrode, A PLS (Plane to Line Switching) mode has been attracting attention.

However, in the liquid crystal display device of the PLS mode, the behavior of the liquid crystal located at the periphery of the pixel is not well controlled due to the influence of the lateral field formed by the interference between the data line and the adjacent pixels in the peripheral portion of the pixel, A texture or the like may be generated, thereby lowering the luminance or decreasing the transmittance.

The technical objects of the present invention are not limited to the technical matters mentioned above, and other technical subjects not mentioned can be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided a liquid crystal display device including a substrate on which a plurality of pixel regions arranged in a matrix are defined, and pixel electrodes formed on each of the pixel regions on the substrate, And a common electrode formed on the substrate and electrically insulated from the pixel electrode and including a plurality of first sub-electrodes, wherein each of the first sub-electrodes is formed across a unit pixel group in a row direction, Each of the first common sub-electrodes adjacent to each other is physically spaced from each other, and a plurality of the first common sub-electrodes in each pixel region are arranged apart from each other along the column direction.

According to another aspect of the present invention, there is provided a liquid crystal display device including a substrate on which a plurality of pixel regions arranged in a matrix are defined, and pixel electrodes formed on each of the pixel regions on the substrate, And a common electrode formed on the substrate and electrically insulated from the pixel electrode and including a plurality of first common sub-electrodes and a third common sub-electrode, wherein each of the first common sub- The first common sub-electrodes adjacent to each other in the row direction are physically spaced from each other, and the first common sub-electrodes in each pixel region are spaced apart from each other along the column direction, and the third common sub- The common sub electrode extends in the column direction and is physically spaced from the first common sub electrode.

The details of other embodiments are included in the detailed description and drawings.

According to the embodiments of the present invention, at least the following effects are obtained.

That is, it is possible to reduce the occurrence of texture at the portion where the electric field between the unit pixel groups is changed, and to improve the transmittance at the unit pixel group boundary.

In addition, visibility can be improved by varying the direction of the electric field generated between adjacent unit pixel groups in the column direction.

It is also possible to control not only the portion where the electric field between the unit pixel groups is changed but also the luminance generated for each adjacent pixel by controlling the texture.

The effects according to the present invention are not limited by the contents exemplified above, and more various effects are included in the specification.

1 is a plan view of a liquid crystal display device according to an embodiment of the present invention.
2 is a cross-sectional view taken along line II-II 'of FIG.
3 is a cross-sectional view of the liquid crystal display device taken along line III-III 'in FIG.
4 is a view for explaining the direction of an electric field for each unit pixel group according to an embodiment of the present invention.
5 is a block diagram of a liquid crystal display device according to an embodiment of the present invention.
6 is a plan view of a liquid crystal display device according to another embodiment of the present invention.
7 is a plan view of a liquid crystal display device in which the structure of a pixel electrode according to another embodiment of the present invention is modified.
8 is a plan view of a liquid crystal display device in which a structure of a common electrode is modified according to another embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

Although the first, second, etc. are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may be the second component within the technical scope of the present invention.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

1 is a plan view of a liquid crystal display device according to an embodiment of the present invention. 2 is a cross-sectional view taken along line II-II 'of FIG.

1 and 2, a liquid crystal display device according to an embodiment of the present invention includes a substrate 1, a pixel electrode 80 formed on the substrate 1, a pixel electrode 80 formed on the substrate 1, And a common electrode 100 formed to be insulated from the common electrode 100. The substrate 1 may be a transparent insulating substrate. For example, the substrate may be formed of a material such as glass, quartz, ceramics, or plastic.

On the substrate 1, one or more pixel regions arranged in a matrix form are defined. In each pixel region, a pixel electrode 80 is formed as described later, and a different electric field can be generated for each pixel.

At least one layer of conductive material and at least one layer of insulating material may be formed on the substrate 1. The conductive material layer may include various electrodes and wires for applying signals to various electrodes. The wirings may include a plurality of gate lines 62, a plurality of data lines 71, and pixel electrodes 80, which will be described later.

A buffer layer 10 may be formed on the substrate 1. The buffer layer 10 is formed on the whole surface of the substrate 1 and can prevent penetration of impurities such as alkali ions flowing out from the substrate 1. [ The buffer layer 10 can perform this role and is preferably formed of a transparent material.

A semiconductor layer 50 may be formed on the buffer layer 10. The semiconductor layer 50 may be formed of amorphous silicon, polycrystalline silicon, or the like. The semiconductor layer 50 may include P-type or N-type impurities.

A gate insulating film 20 is formed on the front surface of the substrate 1 and formed on the semiconductor layer 50. The gate insulating film 20 may be formed of an inorganic material or a mixture of an organic material and an inorganic material. For example, SiO ₂ , SiN _x , SiON, or the like may be used as the inorganic material.

The gate electrode 61 may be formed on the passivation film 30 to be described later. The gate electrode 61 may overlap with the semiconductor layer 50 and may extend in the first direction. For example, the gate electrode 61 may be formed in the row direction. The gate electrode 61 may serve as a gate line 62 for transmitting a gate signal. The gate electrode 61 may be formed of a single layer of aluminum (Al), copper (Cu), silver (Ag), molybdenum (Mo), or an alloy thereof. Also. Layer structure including another layer made of a material such as chromium (Cr), titanium (Ti), or tantalum (Ta) with excellent physical and electrical contact properties in such a single layer.

On the gate electrode 61, a passivation film 30 covering the gate electrode 61 and the gate insulating film 20 may be formed. The passivation film 30 may be formed to contain an inorganic material. For example, SiO ₂ , SiN _x , SiON, or the like may be used as the inorganic material. However, the present invention is not limited thereto. .

A first interlayer insulating film 41 may be formed on the passivation film 30. The first interlayer insulating film 41 not only serves to insulate the gate electrode 61 from the source electrode 73 and the drain electrode 75 to be formed subsequently but also smoothes the entire surface of the device to facilitate a subsequent process Can be performed. The first interlayer insulating film 41 is, for _{example, SiO 2, SiNx, SiON,} Al 2 O 3, TiO 2 And the like. However, the present invention is not limited thereto and may be formed to contain various other inorganic substances.

A source electrode 73 and a drain electrode 75 may be formed on the first interlayer insulating film 41. The source electrode 73 and the drain electrode 75 may be electrically connected to the semiconductor layer 50 through the contact holes 92 and 93. The source electrode 73 and the drain electrode 75 may be formed of a single layer of aluminum (Al), copper (Cu), silver (Ag), molybdenum (Mo), or an alloy thereof. Also. Layer structure including another layer made of a material such as chromium (Cr), titanium (Ti), or tantalum (Ta) with excellent physical and electrical contact properties in such a single layer.

The drain electrode 75 is spaced apart from the source electrode 73 around the gate electrode 61 and another contact hole is formed in contact with the pixel electrode 80 through another contact hole 91 to be electrically connected to the pixel electrode 80 .

A part of the source electrode 73 may serve as a data line 71 for transmitting a data signal. The data line 71 may extend in the second direction. For example, the data line 71 may be formed in the column direction. The data line 71 may extend in the direction of the gate electrode 61 in the region adjacent to the gate electrode 61 to form a part of the source electrode 73. [ The data lines 71 and the gate lines 62 can be formed on the substrate 1 to separate the unit pixel regions 80a arranged in a matrix form.

Also, at least one switching element may be formed on the substrate 1. In some embodiments, a thin film transistor connected to the gate line 62 and the data line 71 may be formed on the substrate 1. The thin film transistor can correspond to at least one pixel electrode 80 and can turn on and off a voltage applied to the pixel electrode 80. [

A second interlayer insulating film 42 covering these and the first interlayer insulating film 41 may be formed on the source electrode 73 and the drain electrode 75. The second interlayer insulating film 42 is, for _{example, SiO 2, SiNx, SiON,} Al 2 O 3, TiO 2 And the like. However, the present invention is not limited thereto and may be formed to contain various other inorganic substances.

A pixel electrode 80 may be formed on the second interlayer insulating film 42. In the drawing, for convenience of description, one pixel electrode 80 occupies one pixel region 80b. The pixel electrodes 80 are arranged in a matrix form with rectangular surface electrodes and fill a space defined by the gate lines 62 and the data lines 71 (spaces 80b corresponding to one pixel region) And a part of the pixel electrode 80 may overlap with the common electrode 100. [ Referring to FIGS. 1 and 2, neighboring pixel electrodes 80 may be spaced apart from each other.

The pixel electrode 80 receives the data voltage from the drain electrode 75 and generates an electric field together with the common electrode 100 to which the common voltage is applied. The pixel electrode 80 may be formed of a conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

A third interlayer insulating film 43 may be formed on the pixel electrode 80. The third interlayer insulating film 43 is, for _{example, SiO 2, SiNx, SiON,} Al 2 O 3, TiO 2 And the like. However, the present invention is not limited thereto and may be formed to contain various other inorganic substances. The third interlayer insulating film 43 has a contact hole 93 connected to the drain electrode 75 and the drain electrode 75 and the pixel electrode 80 can be electrically connected through the contact hole 93 .

1 and 2 illustrate a case where the interlayer insulating film 40 is formed of a triple layer of a first interlayer insulating film 41, a second interlayer insulating film 42, and a third interlayer insulating film 43. FIG. At this time, the refractive index of the first interlayer insulating film 41, the second interlayer insulating film 42, and the third interlayer insulating film 43 may be different from each other, and the thickness thereof may also be different.

The common electrode line 101 may be formed on the third insulating layer 43. The common electrode line 101 may extend in the first direction. For example, it may extend in the row direction in the vicinity of the boundary of each pixel region adjacent in the column direction, and may extend parallel to the gate line 62. The common electrode line 101 extending in the first direction may intersect and be connected to the second common sub electrode 120 extending in the second direction in the vicinity of the semiconductor layer 50, voltage can be applied. The common electrode line 101 may be formed of a conductive material, and may be made of the same material as the common electrode 100 described later for convenience of the process.

 The common electrode 100 may be formed on the third insulating layer 43. The common electrode 100 receives a common voltage from the common electrode line 101 and generates an electric field together with the lower pixel electrode 80. The common electrode 100 may be formed of a conductive material such as indium tin oxide (ITO) or indium-zinc oxide (IZO), and may include a first common sub electrode 110 and a second common sub electrode 120 . The common electrode 100 may be formed on the same layer as the common electrode line 101 and may have a connection branch for electrically connecting to the common electrode line 101 in this case.

The first common sub electrode 110 may be a branch electrode formed across a plurality of pixels in the first direction. The second common sub electrode 120 may be a connection electrode connecting the plurality of first common sub electrodes 110 arranged in the second direction.

The first common sub-electrode 110 may extend across a plurality of pixels that are branched at the second common sub-electrode 120 and neighbor to each other in the first direction, and each first common sub-electrode 110 may be physically spaced from one another. By separating the first common sub-electrodes 110 from each other, the texture generated in the unit pixel group 80a can be reduced. When a common voltage is applied to the first common sub electrode 110 and a gate voltage is applied to the pixel electrode 80, an electric field is formed. In this embodiment, the electric field is formed according to the shape of the common electrode 100, and the direction and intensity of the electric field are determined by the voltage difference between the common electrode 100 and the pixel electrode 80. In this specification, a portion where the direction of electric field generation is constant or continuously varies and there is no discontinuity is referred to as a domain, and a boundary between domains is referred to as a domain boundary. The direction of the electric field is discontinuously changed at the domain boundary, and the boundary of the unit pixel group 80a in which the direction of the electric field is opposite may cause a change in the electric field due to the influence of the adjacent electrodes, thereby causing a texture. The spaced-apart first common sub-electrode 110 forms an electric field with the pixel electrode 80, and the electric field forms a fringe field between the spaced-apart first common sub-electrodes 110. The fringe field can reduce the texture generation area and improve the light efficiency at the boundary of the unit pixel group 80a.

The plurality of first common sub-electrodes 110 may be arranged at equal intervals in the second direction in each pixel region. For example, the plurality of first common sub-electrodes 110 may be arranged at equal intervals in the column direction.

A common voltage is applied to the first common sub-electrode 110 and a gate voltage is applied to the pixel electrode 80 so that fringe fields fringe between the first common sub- field can be generated to reduce the field change.

The first common sub electrode 110 may extend over the unit pixel group 80a or a plurality of pixels adjacent to each other in the first direction. The unit pixel group 80a denotes a unit of pixels neighboring in a predetermined number of row directions. For example, three adjacent pixels in the RGB system and two neighboring pixels in the penta-system can be defined as a unit pixel group.

The first common sub electrode 110 may include a plurality of interval electrodes. The first common sub electrode 110 may be a part of the first common sub electrode 110 that extends over the individual pixel region 80b and the first common electrode 110 may include a first interelectrode 111a and a second interelectrode 112a, And may include other interval electrodes. The other interval electrodes may be repeated in the same manner as the patterns of the first interval electrode 111a and the second interval electrode 112a.

The first interval electrode 111a and the second interval electrode 112a may have different inclination angles. The electric field is formed according to the shape of the electrode. If the first and second electrode segments 111a and 112a have different inclination angles, the direction of the electric field generated by each of the segment electrodes is different. That is, a plurality of domains are formed by varying the electric field generation direction with respect to the boundary of the interval electrodes, and the plurality of domains improve the visibility in the left and right direction and provide a wide viewing angle.

The angle formed by one side of the first interval electrode 111a with the gate line 62 is defined as a first inclination angle? 1 and the angle formed by one side of the second interval electrode 112a with the gate line 62 is defined as a second inclination angle? ). The first inclination angle [theta] 1 and the second inclination angle [theta] 2 are different angles, and the sum of the inclination angles may be 0 [deg.].

The first interval electrode 111a and the second interval electrode 112a are divided based on the boundary of the pixel region 80b adjacent to the first interval electrode 111a in the first direction. The first interval electrode 111a and the second interval electrode 112a may have different inclination angles between the adjacent two data lines 71 and the first interval electrodes 111a and 112b may be formed between two data lines extending in the second direction. 111a and the inclination of the second section electrode 112a.

The second common sub-electrode 120 may extend over adjacent pixels spaced in the second direction. The second common sub-electrode 120 connects the plurality of first common sub-electrodes 110 extending in the second direction, and may be positioned adjacent to the data line 71.

1 may include the same pattern as the first common sub-electrode 110 in a pixel region adjacent to the first direction and a pixel region adjacent to the second direction.

Although the first common sub electrode 110 is formed in the first direction in FIG. 1, it may be formed in the second direction. In this case, the second common sub electrode 120 may be formed on the gate line 62 And may be formed so as to form a predetermined angle with the data line 71. This can be easily understood by those skilled in the art from the case of FIG. 1, and a detailed description thereof will be omitted.

1, the first common sub-electrode 110 may be formed in the longitudinal direction. In this case, the second common sub-electrode 120 may be formed adjacent to the gate line 62 And may be formed so as to form a predetermined angle with the data line 71. It will be easily understood by those skilled in the art from the case of FIG. 1, so a detailed description thereof will be omitted.

3 is a cross-sectional view taken along line III-III 'in FIG. Referring to FIG. 3, the boundary structure of the adjacent unit pixel group 80a in the first direction can be confirmed. The adjacent pixel electrodes 80 may be spaced apart from each other with respect to the two data lines 71. Each unit pixel group 80a adjacent to each other in the first direction has an opposite electric field due to a difference in voltage magnitude applied to the common electrode 100 and each pixel electrode 80. [ At the same time, an electric field is formed between adjacent unit pixel groups 80a in the first direction due to a voltage difference between adjacent pixel electrodes 80. [ An interference phenomenon occurs between the electric field between the unit pixel group 80a and the electric field between the common electrode 100 and each pixel electrode 80 and the electric field changes at the boundary of the unit pixel group 80a. In the present embodiment, the electric field is formed in accordance with the shape of the common electrode 100. When the common electrode 100 extends over the adjacent unit pixel group 80a, The formation of an electric field between the pixel electrodes 80 is conspicuous. However, when the common electrode 100 is also spaced apart, an electric field is formed between the spaced-apart surface of the common electrode 100 and the pixel electrode 80, and the change of the electric field between the adjacent pixel electrodes 80 can be reduced. An electric field between the pixel electrode 80 and the common electrode 100 is formed by forming the second common sub electrode 120 extending in the second direction in the spaced-apart region between the adjacent unit pixel groups 80a, The change of the electric field can be further reduced.

The third section electrode 113a refers to the common electrode 100 formed on the left side of the data line 71 among the first common sub electrodes 110 and the second common electrode 100a belonging to the adjacent unit pixel group 80a. And may be physically spaced apart from the electrode 120. The first interval electrode 111a is branched from the second common sub electrode 120 and may be formed on the pixel electrode 80 in a superimposed manner.

4 is a diagram for explaining the direction of an electric field for each unit pixel group 80a. Referring to FIG. 4, the electric field generated for each unit pixel group 80a is inverted. In the adjacent regions of the electric field which are mutually inverted, the change of the electric field is intensified by the interference phenomenon, and a texture is generated. The generation of such a texture lowers the transmittance at the boundary of the unit pixel group 80a. With the present invention, it is possible to reduce the generation of textures at the boundary of the unit pixel group 80a and to control the electric field at the boundary of the unit pixel group 80a.

5 is a block diagram of a liquid crystal display device according to an embodiment of the present invention. Referring to FIG. 5, the liquid crystal display according to the present exemplary embodiment may include a liquid crystal panel assembly 210, a gate driver 220, and a data driver 230.

The liquid crystal panel assembly 210 may be formed on the substrate 1. And may include a plurality of signal lines on the liquid crystal panel assembly 210. The plurality of signal lines may include a plurality of gate lines G1-Gn for transmitting gate signals and a plurality of data lines D1-Dm for transmitting data signals.

The plurality of gate lines G1 to Gn may extend in the first direction and may extend in the row direction, for example. The gate lines 62 adjacent to each other in the second direction may be physically spaced from each other.

The plurality of data lines D1-Dm may extend in the second direction and may extend in the column direction, for example. The data lines 71 adjacent to each other in the second direction may be physically spaced from each other.

The unit pixel region 80a can be defined by a plurality of gate lines G1-Gn and a plurality of data lines D1-Dm crossing each other. The unit pixel region 80a may include at least one switching element.

The gate driver 220 may be formed on the liquid crystal panel assembly 210. The gate driver 220 is connected to the plurality of gate lines G1 to Gn and can apply a gate signal applied from the outside to the plurality of gate lines G1 to Gn.

The data driver 230 may be formed on the liquid crystal panel assembly 210. The data driver 230 is connected to the plurality of data lines D1 to Dm and can apply a data signal applied from the outside to the plurality of data lines D1 to Dm.

6 is a plan view of a liquid crystal display device according to another embodiment of the present invention. Referring to FIG. 6, the first interval electrodes 111a formed in the unit pixel group 80a adjacent to each other in the second direction may have mutually different inclination angles. In the present invention, the electric field is determined according to the shape of the common electrode 100. If the common electrodes 100 have different inclination angles, the direction of the electric field generated by each common electrode 100 is different. That is, according to this embodiment, the direction of the electric field generated in the unit pixel group 80a adjacent to the unit pixel group 80a in the second direction is changed, so that two domains can be additionally formed, thereby improving the visibility and the viewing angle.

The angle formed by each first interval electrode 111b of the unit pixel group 80a adjacent in the second direction with the gate line 62 may be a first inclination angle? Also, the second section electrode 112b may be symmetrical with the first section electrode on the basis of the boundary of the section electrode.

7 is a plan view of a liquid crystal display device in which the structure of the pixel electrode 80 according to another embodiment of the present invention is modified. Referring to FIG. 7, the liquid crystal display according to another embodiment of the present invention may include a pixel electrode 80 having a shape parallel to the first common sub-electrode 110.

The pixel electrode 80 includes a plurality of first pixel sub-electrodes 81 extending in a first direction and a plurality of first pixel sub-electrodes 81 adjacent to each other in the first direction, And two pixel sub-electrodes 82.

The first pixel sub electrode 81 may be formed by extending from the second pixel sub electrode 82 to extend in the first direction across the unit pixel group 80a and may include a unit pixel group 80a adjacent in the first direction The second pixel sub-electrode 82 of the second pixel sub-electrode 82 may be physically separated from the second pixel sub- In addition, the first pixel sub-electrodes 81 adjacent to each other in the second direction may be formed at equal intervals.

The first pixel sub-electrode 81 may be formed between the first common sub-electrodes 81 adjacent to each other in the second direction, and the angle formed by one side of the first pixel sub-electrode 81 and the gate line 62 may be Can be the same.

The second pixel sub electrode 82 extends in the second direction and is connected to the adjacent first pixel sub electrodes 81 and overlaps with the second common sub electrode 120 . At least one second pixel sub electrode 82 may be formed in the unit pixel group 80a. Also, the second pixel sub-electrode 82 may extend over the unit pixel group 80a adjacent in the second direction.

And the drain electrode 75 may be connected to the upper or lower end of the second pixel sub-electrode 82 to receive a data signal.

8 is a plan view of a liquid crystal display device in which the structure of the common electrode 100 according to another embodiment of the present invention is modified. Referring to FIG. 8, the liquid crystal display according to another embodiment of the present invention may include other electrodes than the first electrode 111a and the second electrode. In the embodiment of FIG. 8, Electrode 113a as shown in FIG. The liquid crystal display of FIG. 8 has a structure in which the second common electrode 82a is formed at the boundary between the first interval electrode 111a and the second interval electrode 112a and at the boundary between the second interval electrode 112a and the third interval electrode 113a ). In addition, the liquid crystal display according to another embodiment of the present invention may include a third common sub electrode 130 at the boundary of the unit pixel group 80a adjacent in the first direction.

The second common sub electrode 120 is disposed adjacent to the boundary between the first interval electrode 111a and the second interval electrode 112a and the boundary between the second interval electrode 112a and the third interval electrode 113a in the second direction May extend over the unit pixel group 80a and may be formed on the center portion of the two data lines 71 extending in the second direction. By adding the second common sub electrode 120 between the pixel electrodes, an electric field can be generated by the shape of the second common sub electrode 120, and the generated electric field is generated between the first common sub electrode 110 and the pixel electrode (80) to generate a texture. In the embodiment of FIG. 1, a texture is generated only at the boundaries of the unit pixel group 80a, and an unbalance occurs between the brightnesses of the individual pixels in the unit pixel group 80a, making color coordinate matching difficult. That is, in the present embodiment, the second common sub-electrode 120 is artificially added to the boundary of the interval electrode so that a texture can be generated at the boundary of the individual pixels, thereby controlling the electric field of the individual pixels in the unit pixel electrode 80a Color coordinate matching can be facilitated.

The first interval electrode 111a, the second interval electrode 112a, and the third interval electrode 113a may continuously extend in the first direction and may be formed at different inclination angles. The angle formed by one side of the first interval electrode 111a with the gate line 62 is defined as a first inclination angle? 1 and the angle formed by one side of the second interval electrode 112a with the gate line 62 is defined as a second inclination angle? ). The first inclination angle? 1 and the second inclination angle? 2 are different from each other, and the sum of the inclination angles may be 0 占 The angle formed by one side of the third interval electrode 113a with the gate line 62 is May be an inclination angle? 1.

The third common sub electrode 130 may extend over the unit pixel group 80a adjacent to the boundary of the unit pixel group 80a adjacent in the first direction in the second direction. The third common sub electrode 130 may be formed on the center of the two data lines 71 existing at the boundary of the adjacent unit pixel group 80a in the first direction. The third common sub electrode 130 may be physically separated from the first common sub electrode 110.

The second common sub electrode 120 and the third common sub electrode 130 intersect and are connected to the common electrode line 101 extending in the first direction and can receive a common voltage from the common electrode line 101. Since the first common sub electrode 110 is connected to the second common sub electrode 120, a common voltage can be applied from the second common sub electrode 120. The first common sub-electrode 110, the second common sub-electrode 120, and the third common sub-electrode 130 receiving the common voltage from the common electrode line 101 have the same voltage.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, You will understand. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

1: substrate 10: buffer layer
20: gate insulating film 30: passivation film
40: interlayer insulating film 50: semiconductor layer
61: gate electrode 62: gate line
71: data line 73: source electrode
75: drain electrode 80: pixel electrode
80a: unit pixel group 80b: pixel area
81: first pixel sub electrode 82: second pixel sub electrode
100: common electrode 110: first common sub electrode
111a: first interval electrode 112a: second interval electrode
113a: third section electrode 120: second common sub electrode 130: third common sub electrode 210: liquid crystal panel assembly
220: Gate driver 230: Data driver

Claims (10)

A substrate on which a plurality of pixel regions arranged in a matrix form are defined;
A pixel electrode formed on each of the pixel regions on the substrate; And
And a common electrode formed on the substrate and electrically insulated from the pixel electrode and including a plurality of first common sub-electrodes,
Wherein each of the first common sub-electrodes is formed across a unit pixel group in a first direction,
The first common sub-electrodes neighboring in the first direction are physically spaced from each other,
Wherein a plurality of first common sub-electrodes in each pixel region are spaced apart from each other along a second direction. The method according to claim 1,
A plurality of first common sub-electrodes arranged in a first direction,
And a second common sub electrode extending in a second direction on the boundary of the unit pixel group. The method according to claim 1,
Wherein the substrate includes a plurality of gate lines and a plurality of data lines,
And the plurality of gate lines and the plurality of data lines cross each other to define the plurality of pixel regions. The method according to claim 1,
Wherein each of the first common sub-electrodes includes a plurality of interval electrodes,
Wherein the plurality of interval electrodes are formed over the unit pixel group and the plurality of interval electrodes include a first interval electrode and a second interval electrode formed on the individual pixel regions of the unit pixel group. 5. The method of claim 4,
Wherein an angle formed by one side of the first interval electrode and the gate line is a first inclination angle, and an angle formed by one side of the second common section electrode and the gate line is a second inclination angle. A substrate on which a plurality of pixel regions arranged in a matrix form are defined;
A pixel electrode formed on each of the pixel regions on the substrate; And
And a common electrode formed on the substrate, the common electrode being electrically insulated from the pixel electrode and including a plurality of first common sub-electrodes and a third common sub-electrode,
Wherein each of the first common sub-electrodes is formed across a unit pixel group in a first direction,
The first common sub-electrodes neighboring in the first direction are physically spaced from each other,
A plurality of first common sub electrodes are spaced apart from each other along a second direction in each pixel region,
Wherein the third common sub electrode extends in a second direction and is physically spaced apart from the first common sub electrode and is formed at a boundary of the plurality of unit pixel groups. The method according to claim 6,
A plurality of first common sub-electrodes arranged in a first direction,
And a second common sub electrode extending in a second direction on the boundary of the unit pixel group. The method according to claim 6,
Wherein the substrate includes a plurality of gate lines and a plurality of data lines,
And the plurality of gate lines and the plurality of data lines cross each other to define the plurality of pixel regions. The method according to claim 6,
Wherein each of the first common sub-electrodes includes a plurality of interval electrodes,
Wherein the plurality of interval electrodes are formed over the unit pixel group and the plurality of interval electrodes include a first interval electrode and a second interval electrode formed on the individual pixel regions of the unit pixel group. The method according to claim 6,
Wherein an angle formed by one side of the first interval electrode and the gate line is a first inclination angle, and an angle formed by one side of the second common section electrode and the gate line is a second inclination angle.

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