KR20140109689A - Apparatus and method for optimization for improved performance and enhanced lifetime of hybrid flash memory devices - Google Patents

Abstract

The present invention relates to a method for optimizing the performance and lifetime of a hybrid SSD. The hybrid SSD may be configured in various combinations including SLC, MLC, TLC flash memories. The present invention defines a lifetime model to optimize performance. The lifetime model suggests a method for allocating hot and cold data that maximizes the lifetime of the entire flash memory by finding the optimal solution. On the other hand, the present invention defines a write cost model other than the lifetime mode and suggests a method of allocating the hot and cold data in each flash memory by finding the optimal solution in the write cost model. Further, the present invention suggests a management method capable of the appropriate compromise between the two models depending on the weight of the lifetime and performance of the entire flash memory.

Description

[0001] APPARATUS AND METHOD FOR OPTIMIZATION FOR IMPROVED PERFORMANCE AND ENHANCED LIFETIME OF HYBRID FLASH MEMORY [0002]

The present invention relates to a method of optimizing the performance and lifetime of a hybrid flash memory, and more particularly, to a method of optimizing performance and lifetime of a hybrid flash memory using various types of flash memory such as a single-level cell (SLC), a multi-level cell (MLC) The present invention relates to a method and apparatus for optimizing performance and lifetime using a lifetime model and a write cost in a hybrid flash memory having a device.

The present invention has been derived from research carried out as part of the Basic Research Project / General Researcher Support Project / Basic Research Support Project (Type II) of the Ministry of Education, Science and Technology and the Korea Research Foundation [assignment number: 2010-0025282, Optimization of Storage Software for Solid State Drives].

A flash memory is a nonvolatile memory device in which information is stored even when the power is turned off. It has faster data accessibility, smaller size, stronger external physical impact and lighter weight than conventional storage media such as hard disk. Due to these advantages, it is widely used as a storage device for portable devices such as MP3 players, portable phones, and digital cameras. Recently, as the capacity of the flash memory storage device has increased and the price has decreased, it has been used as a storage device of personal computers and enterprise servers .

A flash memory is divided into a single level cell (SLC) and a multi level cell (MLC) according to the number of bits that can be represented by one memory cell. SLC has the disadvantage of high data operation performance, high durability but high price. On the other hand, MLC is less durable than SLC and has the advantage of providing more storage space for price instead of slower data operation speed. The MLC is a generic term for a device capable of holding two or more bits in one cell. In some cases, a device capable of storing 3 bits in one cell is called a triple level cell (TLC) May represent a device capable of storing two bits in one cell compared to TLC.

Flash memory is widely used in embedded systems such as computers, digital cameras or mobile phones. In order to use flash memory in such an embedded system environment, a logical memory address used by the system and a flash memory There is a need for translation between physical memory addresses. The interface involved in this conversion is called the Flash Translation Layer (FTL)

The log block method FTL is a method of distinguishing between data blocks and log blocks in the FTL. Generally, in the log block method FTL, a logical storage situation recognized by a file system or an operating system (OS) And the actual physical storage situation is inconsistent, the function of FTL is important.

In order to effectively improve the functions of the FTL, a number of prior arts have been derived. Among them, Korean Patent No. 10-1066634 entitled " Data Storage Method of Hybrid Flash Memory "as a prior art related to FTL of a hybrid SSD including SLC and MLC It has been suggested.

Referring to FIG. 1, the prior art includes a controller 300 and a buffer RAM 200 for connecting the host 50 and the memory cell 400. The memory cell 400 includes an SLC 420 device and an MLC 440 device. When data is written to the memory cell 400, the page data is stored in the page buffer 500 and then programmed into the SLC 420 or the MLC 440 on a page basis. The process of writing data to the flash memory is customarily expressed as a program.

In FIG. 1, the flash translation layer FTL 100 is shown as being separate from the controller 300, but this is only one embodiment. Generally, the FTL is a logical address-to-physical address mapping performed in the controller 300, 400, and a function of determining whether the write data is to be stored in the SLC 420 or the MLC 440.

The prior art includes: (a) determining whether the data requested to be recorded is a large-capacity data by receiving a data recording request of the host; (b) determining whether there is a space to record data in the SLC area when it is determined that the data requested to be recorded is not a large amount of data; (c) collecting valid data stored in each block of the SLC area and merging with data of the MLC area by performing garbage collection when it is determined that there is no space to record the data in the SLC area; (d) storing the merged data in a block of the MLC area and deleting data stored in a predetermined SLC block to secure a space for data recording. As a result, data processing speed and durability are improved, a large storage space can be ensured for a price, and all blocks of the SLC area are uniformly used and deleted to ensure the stability of stored data.

However, in the above-mentioned prior art, it is still necessary to determine whether the data requested to be recorded is stored in the SLC or the MLC depending on whether the data is large-capacity data. In order to apply the SLC and the MLC or the TLC, Cost, and write / erase life.

The conventional management technique of the SLC / MLC hybrid flash memory mainly focuses on research on how to allocate data to the SLC and the MLC by using the update frequency of the data, the size and the attribute of the data. However, such prior art technology only takes into account only the most basic features of asymmetry of the read / write / erase performance of the SLC and the MLC. Thus, when the flash memory is changed at every moment according to the data requested by the user, There is a limit to respond.

Therefore, it is necessary to systematically model the characteristics of write performance such as SLC, MLC and TLC, and to design a hybrid flash memory management method suitable for the situation.

Korean Registered Patent No. 10-106634 (Registered on Mar. 25, 2011)

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems of the prior art, and a lifetime model is defined to optimize performance. An object of the present invention is to provide a technique for allocating hot and cold data that maximizes the lifetime of the entire flash memory by finding an optimal solution in the lifetime model.

In addition, the present invention defines a write cost model in addition to the life model, and also suggests a technique of allocating hot and cold data to each flash memory by finding an optimal solution in the write cost model. Another object of the present invention is to provide a management technique capable of making an appropriate trade-off between the lifetime and the weight of performance of the entire flash memory.

Hybrid SSDs can be configured in various combinations including SLC, MLC, TLC flash memory. Each of SLC, MLC, and TLC has different write / erase overhead due to garbage collection of the FTL, and thus also has a factor of decreasing the lifetime according to the maximum number of write / erase cycles.

Accordingly, it is an object of the present invention to propose a write cost model considering the characteristics of a flash memory and to propose a life model in which the life of the hybrid SSD can be optimized according to the write cost. The purpose of this study is to provide a management method that can provide appropriate compromise between the proposed cost model and the lifetime model so that the writing cost and the life span can be properly maintained.

In order to achieve the above object, a life-model-based hybrid flash memory management device including a first device (SLC) and a second device (MLC or TLC) according to an embodiment of the present invention includes a first device A lifetime model generating unit for acquiring a lifetime model of the hybrid flash memory by using the number of remaining erasable times of each of the two devices, the size of the storage space and the usage ratio of the size of the storage space of the first device, And a lifetime model-based optimization unit for obtaining an optimized utilization rate.

At this time, the lifetime model generation unit calculates a cumulative write frequency function for the entire hybrid flash memory of the first device using the utilization rate of the first device, and generates a life model having a cumulative write frequency function of the first device as a variable .

A lifetime model generation unit for acquiring a lifetime model of the hybrid flash memory by using the number of times of erasure of each of the first device and the second device, the size of the storage space and the usage ratio of the size of the storage space of the first device, A write cost model for each of the device and the second device according to the usage ratio of the storage space is obtained, and the write cost model for each of the first device and the second device is used, A writing cost modeling unit for obtaining a writing cost model of a hybrid flash memory in which each cumulative writing frequency function is considered, and a writing cost modeling unit for obtaining an optimized usage rate of the first device using the lifetime model of the hybrid flash memory and the writing cost of the hybrid flash memory And an optimization unit.

A method for managing a hybrid flash memory according to an exemplary embodiment of the present invention is a method for managing a hybrid flash memory by using a hybrid flash memory using the number of times that the first device and the second device can be erased and the size of the storage space, Acquiring a lifetime model of the memory, and acquiring an optimized utilization rate of the first device using the lifetime model.

Acquiring a lifetime model of the hybrid flash memory by using the number of times that the first device and the second device can be erased, the size of the storage space, and the usage ratio of the size of the storage space of the first device; Acquiring a write cost model for each of the first device and the second device, the write cost model corresponding to a usage ratio of the storage space; Obtaining a write cost model of a hybrid flash memory in which a cumulative write frequency function of each of the first device and the second device is taken into consideration using each of the write cost models obtained for the first device and the second device; And acquiring an optimized utilization rate of the first device using the lifetime model of the hybrid flash memory and the write cost model of the hybrid flash memory.

According to the present invention, in a hybrid flash memory having various types of flash memory devices such as single-level cell (SLC), multi-level cell (MLC), and triple level cell (TLC) Can solve the low performance and low life problems of MLC and TLC compared with SLC.

Further, the present invention can be applied to all devices capable of using a hybrid flash memory, for example, a mobile phone, a tablet PC, a notebook, an MP3 player, a PDA, a portable computer and the like. As the capacity of a hybrid flash memory increases The applicability may be increased. Accordingly, performance of the device using the hybrid flash memory can be improved by improving the overall performance of the hybrid flash memory. The hybrid flash memory referred to herein may be a hybrid SSD (Solid State Disk) comprising various possible combinations of SLC-TLC, SLC-MLC, MLC-TLC, SLC-MLC-TLC, And a storage device.

1 is a block diagram showing an embodiment of a conventional hybrid flash memory.
FIG. 2 is a diagram comparing data stored in a general single-level cell (SLC), a multi-level cell (MLC), and a triple-level cell (TLC).
3 is a block diagram illustrating a management system of a hybrid flash memory according to an embodiment of the present invention.
4 is a flowchart illustrating a method of managing a hybrid flash memory based on a lifetime model according to an embodiment of the present invention.
5 is a flowchart illustrating a method of managing a hybrid flash memory using a write cost and a life model according to another embodiment of the present invention.
Figure 6 is an operational flow diagram illustrating in more detail one embodiment of the one step of Figure 5-obtaining the optimized utilization of the first device.
FIG. 7 is an operation flow diagram illustrating in detail one embodiment of the step of obtaining the optimized utilization rate of the first device using the one-stage optimization utilization rate and the second optimization utilization rate of FIG. 6;
FIG. 8 is a diagram illustrating an embodiment of a relationship between a usage rate, a cumulative write frequency function, a write cost, and a life model in a hybrid flash memory management method according to an embodiment of the present invention.
9 is a conceptual diagram of an optimization process in a method of managing a hybrid flash memory according to another embodiment of the present invention.
FIG. 10 is a block diagram illustrating a conceptual configuration of a life-model-based hybrid flash memory management apparatus according to an embodiment of the present invention.
11 is a block diagram illustrating a conceptual configuration of a life time model and a write cost based hybrid flash memory management apparatus according to another embodiment of the present invention.
12 is a block diagram showing a conceptual configuration of one component of Fig.

Other objects and features of the present invention will become apparent from the following description of embodiments with reference to the accompanying drawings.

Preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

However, the present invention is not limited to or limited by the embodiments. Like reference symbols in the drawings denote like elements.

In the present invention, a hybrid flash memory or a solid state disk (SSD) may be configured in various combinations including an SLC, an MLC, and a TLC flash memory.

FIG. 2 conceptually shows data stored in a general single-level cell (SLC), a multi-level cell (MLC) and a triple-level cell (TLC).

The NAND flash memory of the single-level cell (SLC) records data in one bit according to the presence or absence (1, 0) of the charge charged in one cell (Cell) The memory writes data in two bits according to the change (11, 10, 01, 00) of the charge charged in one cell (Cell).

The NAND flash memory of the triple level cell TLC has 3 bits according to the change of the charge (111, 110, 101, 100, 011, 010, 001, 000) charged in one cell Data is recorded.

The single-level cell SLC records one bit (1, 0) of data by applying one reference voltage, and the multi-level cell MLC applies three reference voltages, The data is written in 2 bits (11, 10, 01, 00). The triple level cell TLC applies 7 reference voltages and records data in 3 bits (111, 110, 101, 100, 011,

FIG. 3 illustrates a management system of a hybrid flash memory according to an embodiment of the present invention.

The hybrid flash memory of the embodiment of the present invention can be applied to various combinations of SLC, MLC, and TLC. For convenience of explanation, the SLC SSD is referred to as a first device and the TLC SSD as a second device in FIG.

In FIG. 3, an SLC SSD is shown as a first device and a TLC SSD is shown as a second device. However, the first device may be an SLC SSD or an MLC SSD, and the second device may be an MLC SSD or a TLC SSD. That is, the first device can be selected to have a longer read / write performance and a longer life than the second device. Hereinafter, the modules of the hybrid SSD controller will be described on the assumption that the first device has better performance and longer lifetime than the second device.

The basic structure of a hybrid SSD controller is a Data Classifier that classifies a read or write request (I / O Request) from a file system (FS) or an operating system (OS) an analyzer module for calculating and managing an optimal usage rate according to workload, and a data migrator for moving data between a first device (SLC SSD) and a second device (TLC SSD). These modules may be implemented in the form of a software module, and in some embodiments may be implemented in the form of a hardware module containing the function.

The Data Classifier observes the workload pattern of the I / O request and classifies the data into hot data and cold data. Various algorithms have been introduced for such algorithms in a number of prior art related to conventional FTLs. For example, data whose size is small or frequently updated is hot data depending on the size of data and the update frequency of data, and data that is large in size and not frequently updated is classified as cold data. In general, data classified as hot data may be stored in the first device (SLC SSD), and data classified as cold data may be stored in the second device (TLC SSD).

As a data classification standard of the data classifier, many prior arts have already been proposed. In the present invention, a method of classifying the hot data and the cold data by counting the frequency of the access period (frequency) periodically as an embodiment of the data classifier . After counting the frequency of access for a period of time, the data can be classified based on the result of the counting, and the frequency of the accesses can be counted again for the next period after resetting the previous counting result.

The information about whether data is stored in the first device (SLC SSD) or the second device (TLC SSD) and the mapping information necessary for FTL mapping management is implemented by various known mapping management techniques already known to those skilled in the art Can be managed. For example, there are various types of hybrid mapping FTL management techniques such as a page mapping FTL on a page basis, a block mapping FTL on a block basis, and a block mapping and a page mapping.

Also, in the present invention, the mapping FTL information of the first device and the second device can be individually stored and managed. For example, the mapping information between the physical page and the logical page stored in the first device is backed up in the first device or stored in the memory of the FTL, and the mapping information on the data stored in the second device is backed up to the second device, Can be stored in memory.

The data migrator moves data between the first device and the second device so that the data is transferred to the first device or the second device via the data classifier and the analyzer, and then the optimum performance and lifetime are maintained according to the analysis result of the analyzer can do. The analyzer can determine the usage rate of each device for optimization of the hybrid flash memory and allocate the I / O request to the first device and the second device accordingly, as described with reference to FIG. 4 through FIG. However, when the I / O request is rapidly transmitted and the workload of the first device and the second device changes, the optimization condition determined by the analyzer may not be naturally satisfied. At this time, the Data Migrator can move the data from the first device to the second device according to the optimization condition determined by the analyzer, or conversely move the data from the second device to the first device to manage the hybrid flash memory so that the optimization condition is satisfied have.

Since the data migrator may incur additional costs in moving the data, the data migrator of the embodiment of the present invention may adopt a passive approach. For example, if hot data is stored in the second device (TLC SSD), since such hot data will be accessed relatively frequently, the data migrator regards the data stored in the second device as hot data and moves it .

On the other hand, if cold data is stored in the first device (SLC SSC), the frequency of accessing cold data is relatively low, which may make it difficult to satisfy the optimization condition only by a passive approach. In this case, some of the data not accessed by the first device after a predetermined period of time has passed may be regarded as cold data, and the cold data may be moved in the background environment.

Unlike conventional hard disk drives (HDDs) that support in-place writing, the role of FTL is important because of the restriction of performing erase before write operations before writing in flash memory. Same as. In addition, due to recent developments in technology, the storage density of flash memory has become very high as MLC and TLC technologies, which have higher integration than SLC, have increased. However, MLC and TLC have lower performance (read / write performance) . TLC has lower performance and longer life than MLC. SLC, MLC, and TLC are combined with each other to optimize the performance of the hybrid storage medium. However, most of the conventional techniques are used to classify hot data and cold data based on data access frequency, size, basic attributes, and the like.

In the present invention, an analyzer is placed in the FTL to analyze the cost model (especially the write cost model) and the lifetime model for the performance of a comprehensive hybrid flash memory device and propose an optimization technique therefor.

The lifetime model and the write cost model proposed in the embodiment of the present invention are derived based on utilization data u according to the ratio of the space reserved for garbage collection and OPS (Over-Provisioned Space) do. The usage rate can be defined for each of the first device SLC and the second device TLC as shown in Fig. For a more sophisticated operation, the utilization u can be modified to some extent.

For example, if SLC is composed of 8 blocks and 3 of them are used, the utilization rate u can be expressed as 3 / (3 + 5). If the number of empty blocks that must be maintained for garbage collection is 1, then the usage rate u is 3 / (3+ 5-1).

The mapping between the logical block and the physical block is complicated by the use of the flash memory device, and when only one unused block is left, the garbage collection is performed. When a garbage is collected, a block having the smallest number of valid pages is designated as a victim block, and only a valid page is copied into an unused block. At this time, the usage rate u 'of the big-team block has the relationship as shown in Equation 1 below with the utilization rate u of the entire device.

[Equation 1]

If the function of converting u to u 'as an inverse function of Equation (1) is defined as a convenience function U (u), the cost of garbage collection, that is, erasing the unused block (erasing the block into an unused block) The cost of copying the valid page of the unused block into the unused block can be expressed as Equation 2 below.

&Quot; (2) "

C _GC (u) is the cost of garbage collection with the utilization as a variable, N _P is the number of pages in the block, C _CP is the effective copying (writing) cost, and C _E is the cost of erasing one block.

Once a basic garbage collection has been performed, a valid page of [U (u) N _P ] is stored and a clean page of [(1 - U (u)) N _P ] Is created. If C _PROG is the program cost per page of the flash memory, the write cost reflecting the average overhead due to the garbage collection for the write request is expressed by Equation 3 below.

&Quot; (3) "

Hereinafter, the operations and roles of the data migrator will be described in more detail with reference to FIGS. 4 through 12, focusing on the operation and role of the analyzer.

4 is a flowchart illustrating a method of managing a hybrid flash memory based on a lifetime model according to an embodiment of the present invention.

Referring to FIG. 4, a method of managing a hybrid flash memory based on a lifetime model derives a relation between a utilization of a hybrid flash memory and a cumulative write frequency function H (u) for the entire hybrid flash memory (S410 ).

At this time, the cumulative write frequency function H (u) can be calculated considering the access frequency of data for the entire hybrid flash memory (including both SLC and TLC).

The size of the storage space of the first device SLC is defined as S _SLC , the size of the stored data is defined as D _SLC , the size of the storage space of the second device _TLC is defined as S _TLC , and the size of the stored data is defined as D _TLC . The utilization rate _uSLC of the first device u _SLC = D _SLC / S _SLC , the utilization rate u _TLC of the second device u _TLC = D _TLC / S _TLC . 0 " when no data is stored for each of the first device and the second device, and " 1 "

The cumulative write frequency function H (u) denotes the hit ratio at which data is actually stored in each device among all I / O requests. In this case, the cumulative write frequency function is affected by the usage rate u, the size S of the storage space, the size D of the stored data, and the usage rate of each other in the hybrid flash memory in which the first device and the second device coexist.

The relationship of the following expression (4) is established between the cumulative write frequency function H _SLC of the first device and the cumulative write frequency function H _TLC of the second device.

&Quot; (4) "

H _SLC + H _TLC = 1

If the total data storage size for the hybrid flash memory is determined from the OS or FS since the size S _SLC of the storage space of the first device and the size S _TLC of the storage space of the second device are determined, if u _SLC is determined, u _TLC Is also determined. Accordingly, the cumulative write frequency function H _SLC (u _SLC ) for the first device can be obtained from the use rate u _SLC of the first device. One example of the relationship between the utilization rate of the first device and the cumulative write frequency function when the size of the storage space of each device of the hybrid flash memory and the total size of data required in the hybrid flash memory are given is shown in Fig. .

FIG. 8 is a diagram illustrating an embodiment of a relationship between a usage rate, a cumulative write frequency function, a write cost, and a life model in a hybrid flash memory management method according to an embodiment of the present invention.

In the embodiment of FIG. 8 (a), S _SLC = 2 GB, S _TLC = 8 GB and the total data size required for the hybrid system is assumed to be 9 GB. The horizontal axis is u _SLC and the vertical axis is H _SLC (u _SLC ). If u _SLC = 0.63, D _SLC = 1.26 GB, and 7.74 GB, which is obtained by subtracting D _SLC from 9 GB of total data, will be D _TLC , so u _TLC will also be determined as 7.74 / 8 = 0.9675.

The cumulative write frequency function H _SLC (u _SLC ) can be determined through simulations of the array data structure in a state where the usage rate u _SLC of the first device and the usage rate u _TLC of the second device are determined. The simulation of the array data structure is well known in the field of data structure technology, and a description thereof will be omitted here.

The analysis module (Analyzer) of the embodiment of the present invention takes the cumulative write frequency function of the first device and the usage rate of the first device as variables and calculates the lifetime model based on the number of remaining erasable times of each of the first device and the second device, (S420), and a change in lifetime model value according to the usage rate (or cumulative write frequency function) with respect to the size of the storage space of the first device is derived (S430).

At this time, the lifetime model (W _LEFT ) of the hybrid flash memory can be expressed by Equation (5).

&Quot; (5) "

Here, E _SLC ^LEFT denotes the number of times that the first device SLC can be erased, and E _TLC ^LEFT denotes the number of times that the second device TLC can be erased.

However, Equation (5) does not consider the life shortening factor [WAF (u)] due to the garbage collection for the first device and the second device, so that the life shortening factor due to garbage collection for the first device and the second device [ WAF (u)] can be expressed by Equation (6).

&Quot; (6) "

&Quot; (7) "

The lifetime shortening factor, that is, the write amplification factor (WAF), due to garbage collection versus the usage rate of each device can be expressed by Equation (7). In this way, the lifetime model may be obtained in consideration of the life shortening factor due to the garbage collection for the first device and the second device according to the embodiment.

One embodiment in which the change of the first device usage rate and the lifetime model value according to the embodiment of the present invention is derived is shown in Fig. 8 (c). Referring to FIG. 8 (c), the first device usage rate u _SLC is shown on the horizontal axis and Lifetime W _LEFT of the hybrid flash memory is shown on the vertical axis.

The analysis module of the present invention determines the usage rate of the first device (SLC) that maximizes the value of the derived lifetime model (S440).

In the embodiment where S _SLC = 2 GB, S _TLC = 8 GB, and the total data size = 9 GB as shown in FIG. 8 (c), the usage rate of the first device (SLC) maximizing the lifetime and _LEFT of the hybrid flash memory is 0.81 appear. In this case, D _SLC = 2 GB x 0.81 = 1.62 GB, D _TLC = 9 GB - 1.62 GB = 7.38 GB, u _TLC = 7.38 / 8 = 0.9225. Steps S410 to S440 may be performed by an analyzer module of the embodiment of the present invention.

The data migration module of the embodiment of the present invention can manage the hybrid flash memory so that the utilization rate of the first device that maximizes the value of the lifetime model of the hybrid flash memory is maintained, (S450). Thus, the life span of the hybrid flash memory including the first device and the second device can be maximized.

Although FIGS. 4 and 8 illustrate embodiments that are the first device SLC and the second device TLC, the present invention is also applicable to the embodiments that are the first device SLC and the second device MLC. In addition, it will be apparent to those skilled in the art from the description of the present invention that the present invention can be applied to a combination of MLC - TLC and SLC - MLC - TLC combination.

5 is a flowchart illustrating a method of managing a hybrid flash memory that determines a usage rate of a first device using a write cost and a life model according to another embodiment of the present invention.

The analysis module of the embodiment of the present invention obtains the lifetime model of the hybrid flash memory by using the number of times of erasure of the first device and the second device, the size of the storage space, and the usage ratio of the size of the storage space of the first device (S610 ).

At this time, the lifetime model can be obtained in consideration of the life shortening factor due to the garbage collection for the first device and the second device of the hybrid flash memory.

The above description can be derived using Equations (5) to (7).

The analysis module of the embodiment of the present invention obtains a writing cost model according to the usage ratio of the first device and the second device of the hybrid flash memory according to the size of the storage space (S620).

When the usage rate u of the first _SLC device is given, the average cost of writing a first device considering the garbage collection overhead C _{PW _ SLC} is shown in equation (8) below.

&Quot; (8) "

Similarly, given the usage rate u _TLC of the second device, the average write cost C _{PW _ TLC} of the second device considering the garbage collection overhead is given by Equation 9 below.

&Quot; (9) "

The analysis module of the embodiment of the present invention uses the write cost model obtained for each of the first device and the second device of the hybrid flash memory so as to determine the write cost of each of the first device and the second device, A writing cost model is obtained (S630).

In this case, step S620 may be followed by step S630, and steps S620 and S630 may be performed in parallel or independently with step S610.

The analysis module of the embodiment of the present invention can obtain the write cost of the hybrid flash memory by combining the expressions (8) and (9) and (4). The write cost of the hybrid flash memory can be expressed by Equation 10 below.

&Quot; (10) "

The analysis module of the embodiment of the present invention acquires the optimized utilization rate of the first device using the lifetime model of the hybrid flash memory and the write cost model of the hybrid flash memory (S640).

6 is an operational flow diagram illustrating in more detail the one step of FIG. 5-the step of obtaining an optimized utilization of the first device.

The analysis module of the embodiment of the present invention acquires the first optimization utilization rate using the lifetime model of the hybrid flash memory (S710).

An embodiment of the process of acquiring the first optimized utilization rate based on the lifetime model in step S710 is shown in FIG. 8 (c). Referring to FIG. 8 (c), the lifetime model W _LEFT is maximized at the first device usage rate u _SLC = 0.81. S _SLC = 2 GB, S _TLC = 8 GB, total stored data size = 9 GB An analysis made in the embodiment.

The analysis module of the embodiment of the present invention acquires the second optimization utilization rate using the write cost model of the hybrid flash memory (S720).

An embodiment of the process of acquiring the first optimized utilization rate based on the write cost in step S720 is shown in FIG. 8 (b). Referring to Figure 8 (b), the first device usage rate u = _SLC hybrid letter costs _{0.63 C PW _ HY (u SLC} ) is maximized. Similarly, S _SLC = 2 GB, S _TLC = 8 GB, total stored data size = 9 GB An analysis made in the example.

In this case, steps S710 and S720 may be performed in parallel or independently.

The analysis module of the embodiment of the present invention analyzes the first optimization utilization rate obtained using the life model of the hybrid flash memory and the second optimization usage rate obtained using the write cost model of the hybrid flash memory, And obtains an optimized utilization rate (S730).

FIG. 7 is an operational flowchart illustrating in more detail the step of obtaining the optimized utilization rate of the first device using the one-stage optimization utilization rate and the second optimization utilization rate of FIG. 6;

The analysis module of the embodiment of the present invention sets weights in consideration of the aging degree of the hybrid flash memory, the read and write performance, and the size of data requested by the user (S810).

The analysis module of the embodiment of the present invention assigns the weight set in the step S810 to the first optimization utilization rate obtained using the lifetime model of the hybrid flash memory and the second optimization usage rate obtained using the write cost model of the hybrid flash memory And obtains an optimized utilization rate of the first device of the hybrid flash memory (S820).

9 is a conceptual diagram of an optimization process in a method of managing a hybrid flash memory according to another embodiment of the present invention.

Referring to FIG. 9, u ^PERF _SLC is the utilization rate of the first device capable of achieving the write cost, that is, performance based optimization, and u ^LIFE _SLC is the utilization rate of the first device capable of achieving lifetime model based optimization.

The analysis module of the embodiment of the present invention can obtain the final optimum utilization rate u ^TUNE _SLC by weighting the first and second optimization utilization rates u ^PERF _SLC and u ^LIFE _SLC, respectively. In this case, the weight can be set in consideration of the aging degree of the hybrid flash memory, the read and write performance, and the size of the data requested by the user. For example, if the flash memory is a new product and read and write performance is good, then weights can be set to maximize it. On the other hand, when priority is given to extending the life of the flash memory due to aging, the weight can be set in the direction of maximizing the life span. As described above, the analysis module of the embodiment of the present invention assigns weights to the first and second optimization utilization rates u ^PERF _SLC and u ^LIFE _SLC to achieve a compromise between the performance and the lifetime, thereby achieving comprehensive optimization of the hybrid flash memory And the weights can be adjusted dynamically according to the tuning policy.

Referring again to FIG. 5, the data migration module (Data Migrator) of the embodiment of the present invention acquires the optimized usage rate of the first device using the lifetime model of the hybrid flash memory and the write cost model of the hybrid flash memory (S640) The hybrid flash memory can be managed such that the optimized utilization rate is maintained in the first device of the hybrid flash memory (S650).

The performance and lifetime of the hybrid flash memory can be improved by managing the hybrid flash memory so that the optimized utilization rate is maintained in the first device of the hybrid flash memory, and can be dynamically optimized according to the optimization policy for a given environment.

FIG. 10 is a block diagram illustrating a conceptual configuration of a life-model-based hybrid flash memory management apparatus according to an embodiment of the present invention.

The lifetime model-based hybrid flash memory management device 1200 may mean a conceptual device in which an analyzer is implemented in hardware.

The lifetime model-based hybrid flash memory management device 1200 uses the remaining erasable number of the first device and the second device of the hybrid flash memory, the size of the storage space, and the usage ratio of the size of the storage space of the first device A lifetime model-based optimization for obtaining an optimized utilization rate of the first device of the hybrid flash memory using the lifetime model acquired by the lifetime model generation unit 1210 and the lifetime model generation unit 1210 for acquiring the lifetime model of the hybrid flash memory (1220). Steps S410 and S410 of FIG. 4 may be performed by the lifetime model generation unit 1210, and steps S430 and S440 may be performed by the lifetime model-based optimization unit 1220. FIG.

Although not shown in FIG. 10, according to another embodiment of the present invention, the lifetime model-based optimization unit 1220 may manage the hybrid flash memory such that the optimized utilization rate obtained in the first device of the hybrid flash memory is maintained . At this time, the lifetime model-based optimization unit 1220 performs some functions of the data movement module as well as the analysis module.

In addition, the lifetime model-based optimization unit 1220 may track the change in the lifetime model value according to the usage rate of the first device to determine the usage rate of the first device that maximizes the lifetime model value (S430, S440).

In addition, the lifetime model in the lifetime model generation unit 1210 can be acquired in consideration of a life shortening factor due to garbage collection for the first device and the second device of the hybrid flash memory.

Also, the lifetime model generation unit 1210 may include an accumulated write frequency function calculation unit for calculating an accumulated write frequency function for the entire hybrid flash memory of the first device using the utilization rate of the first device (S410, S420) .

11 is a block diagram illustrating a conceptual configuration of a life time model and a write cost based hybrid flash memory management apparatus according to another embodiment of the present invention.

The lifetime model and write cost based hybrid flash memory management device 1300 including the first device and the second device may include some functions of an analyzer module and a data migration module (Data Migrator) of the embodiment of the present invention Lt; / RTI >

The lifetime model and write cost based hybrid flash memory management device 1300 including the first device and the second device can determine the number of remaining erasable times and the size of the storage space of each of the first device and the second device of the hybrid flash memory, A lifetime model generation unit 1310 for acquiring a lifetime model of a hybrid flash memory using a usage ratio with respect to a size of a storage space of the first device (S610), a storage device for storing, for each of the first device and the second device of the hybrid flash memory, (S620), and a cumulative write frequency function of each of the first device and the second device is taken into account by using each of the write cost models obtained for the first device and the second device The write cost modeling unit 1 (S630) for acquiring the write cost model of the hybrid flash memory 320) and an optimizing unit 1330 for acquiring an optimized utilization rate of the first device using the lifetime model of the hybrid flash memory and the write cost model of the hybrid flash memory (S640).

At this time, the lifetime model in the lifetime model generation unit 1310 can be acquired in consideration of a life shortening factor due to garbage collection for the first device and the second device of the hybrid flash memory.

The management unit 1300 of the hybrid flash memory based on the lifetime model and the writing cost acquires the optimized usage rate of the first device using the lifetime model of the hybrid flash memory and the write cost model of the hybrid flash memory in the optimizing unit 1330 Thereafter, the hybrid flash memory management unit 1340 may manage the hybrid flash memory so that the optimized utilization rate of the first device of the hybrid flash memory is maintained (S650).

FIG. 12 is a block diagram showing a conceptual configuration of the optimizing unit 1330, which is one component of FIG.

The optimization unit 1330 shown in FIG. 12 uses a first optimization utilization factor acquisition unit 1331 to acquire a first optimized utilization rate using the lifetime model of the hybrid flash memory (S710), a write cost model of the hybrid flash memory A second optimization utilization rate acquisition unit 1332 for acquiring a second optimization usage rate S720 and a second optimization utilization rate acquisition unit 1332 for acquiring the first optimization usage rate acquired by the first optimization usage rate acquisition unit 1331 and the second optimization usage rate acquired by the second optimization usage rate acquisition unit 1332 And an optimization utilization determining unit 1333 for acquiring an optimized utilization rate of the first device of the hybrid flash memory using the second optimization utilization rate (S730).

At this time, the optimization utilization factor determiner 1333 may set the weights in consideration of the degree of obsolescence of the hybrid flash memory, the diary and the write performance, and the size of data requested by the user (S810).

In addition, the optimization utilization rate determiner 1333 assigns the weights to the first and second optimization usage ratios acquired by the first optimization usage rate acquisition unit 1331 and the second optimization usage rate acquisition unit 1332, respectively So that the optimized utilization rate of the first device of the hybrid flash memory can be obtained (S820).

The method for managing a hybrid flash memory according to an exemplary embodiment of the present invention may be implemented in the form of a program command that can be executed through various computer means and recorded in a computer readable medium. The computer-readable medium may include program instructions, data files, data structures, and the like, alone or in combination. The program instructions recorded on the medium may be those specially designed and constructed for the present invention or may be available to those skilled in the art of computer software. Examples of computer-readable media include magnetic media such as hard disks, floppy disks and magnetic tape; optical media such as CD-ROMs and DVDs; magnetic media such as floppy disks; Magneto-optical media, and hardware devices specifically configured to store and execute program instructions such as ROM, RAM, flash memory, and the like. Examples of program instructions include machine language code such as those produced by a compiler, as well as high-level language code that can be executed by a computer using an interpreter or the like. The hardware devices described above may be configured to operate as one or more software modules to perform the operations of the present invention, and vice versa.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, And various modifications and changes may be made thereto without departing from the scope of the present invention.

Accordingly, the spirit of the present invention should not be construed as being limited to the embodiments described, and all of the equivalents or equivalents of the claims, as well as the following claims, belong to the scope of the present invention .

1200: Hybrid memory management device based on lifetime model
1210: Lifetime model generation unit
1220: Optimization unit based on lifetime model
1300: Hybrid Flash memory management device based on lifetime model and write cost
1320: write cost modeling unit
1330:

Claims (19)

A method for managing a hybrid flash memory including a first device and a second device,
Obtaining a lifetime model of the hybrid flash memory by using the number of times of erasure of the first device and the second device, the size of the storage space, and the usage ratio of the size of the storage space of the first device; And
Obtaining an optimized utilization rate of the first device using the lifetime model;
Wherein the method further comprises the steps of: The method according to claim 1,
The step of obtaining an optimized utilization of the first device
Tracking a change in the value of the lifetime model according to a usage rate of the first device; And
Determining a usage rate of the first device that maximizes a value of the lifetime model;
Wherein the method further comprises the steps of: The method according to claim 1,
The step of acquiring the lifetime model
Calculating a cumulative write frequency function for the entirety of the hybrid flash memory of the first device using the utilization rate of the first device; And
Generating the life span model with the cumulative write frequency function of the first device as a variable
Wherein the method further comprises the steps of: The method according to claim 1,
Managing the hybrid flash memory such that the optimized utilization rate is maintained in the first device
Further comprising the steps of: The method according to claim 1,
Wherein the lifetime model is obtained in consideration of a life shortening factor due to garbage collection for the first device and the second device. A method for managing a hybrid flash memory including a first device and a second device,
Obtaining a lifetime model of the hybrid flash memory by using the number of times of erasure of the first device and the second device, the size of the storage space, and the usage ratio of the size of the storage space of the first device;
Acquiring a write cost model for each of the first device and the second device according to a usage ratio of the storage space;
Acquiring a write cost model of the hybrid flash memory in which a cumulative write frequency function of each of the first device and the second device is taken into consideration using each of the write cost models obtained for the first device and the second device step; And
Acquiring an optimized utilization rate of the first device using a lifetime model of the hybrid flash memory and a write cost model of the hybrid flash memory
Wherein the method further comprises the steps of: The method according to claim 6,
The step of obtaining an optimized utilization of the first device
Obtaining a first optimized utilization rate using the lifetime model of the hybrid flash memory;
Obtaining the second optimal utilization rate using a write cost model of the hybrid flash memory; And
Acquiring an optimized utilization rate of the first device using the first optimized utilization rate and the second optimized utilization rate
Wherein the method further comprises the steps of: 8. The method of claim 7,
Wherein the step of acquiring the optimized utilization rate of the first device using the first optimized utilization rate and the second optimized utilization rate comprises:
Wherein a weight is assigned to each of the first optimization use rate and the second optimization usage rate, and the sum is used to obtain an optimized usage rate of the first device. 9. The method of claim 8,
Wherein the step of acquiring the optimized utilization rate of the first device using the first optimized utilization rate and the second optimized utilization rate comprises:
Setting the weights in consideration of the aging degree of the hybrid flash memory, the read and write performance, and the size of data requested by the user
Wherein the method further comprises the steps of: The method according to claim 6,
Managing the hybrid flash memory such that the optimized utilization rate is maintained in the first device
Further comprising the steps of: The method according to claim 6,
Wherein the lifetime model is obtained in consideration of a life shortening factor due to garbage collection for the first device and the second device. The method according to claim 6,
The step of acquiring a write cost model for each of the first device and the second device,
Calculating a write cost model for each of the first device and the second device in consideration of an overhead of write cost due to garbage collection for each of the first device and the second device. A computer-readable recording medium having recorded therein a program for executing the method according to any one of claims 1 to 12. A management device for a hybrid flash memory including a first device and a second device,
Generating a lifetime model of the hybrid flash memory using the number of times of the remaining erasable times of the first device and the second device, the size of the storage space, and the utilization ratio of the size of the storage space of the first device part; And
A lifetime model-based optimization unit that obtains an optimal utilization rate of the first device using the lifetime model;
And a controller for controlling the hybrid flash memory. 15. The method of claim 14,
Wherein the life-
An accumulated write frequency function calculating unit for calculating an accumulated write frequency function for the entirety of the hybrid flash memory of the first device using the utilization rate of the first device; Lt; / RTI >
Wherein the lifetime model generating unit generates the lifetime model having the cumulative write frequency function of the first device as a variable
A management device for a hybrid flash memory. A management device for a hybrid flash memory including a first device and a second device,
Generating a lifetime model of the hybrid flash memory using the number of times of the remaining erasable times of the first device and the second device, the size of the storage space, and the utilization ratio of the size of the storage space of the first device part;
Acquiring a write cost model for each of the first device and the second device according to a usage ratio of the storage space to the size of the storage space and using each of the write cost models obtained for the first device and the second device, A write cost modeling unit for obtaining a write cost model of the hybrid flash memory in which a cumulative write frequency function of each of the first device and the second device is taken into consideration; And
An optimizing unit for obtaining an optimized utilization rate of the first device by using a lifetime model of the hybrid flash memory and a write cost model of the hybrid flash memory;
And a controller for controlling the hybrid flash memory. 17. The method of claim 16,
The optimizing unit,
A first optimization utilization rate obtaining unit for obtaining a first optimization usage rate using the lifetime model of the hybrid flash memory;
A second optimization usage rate obtaining unit for obtaining the second optimization usage rate by using a write cost model of the hybrid flash memory; And
An optimization usage rate determining unit for obtaining an optimized usage rate of the first device using the first optimization usage rate and the second optimization usage rate;
And a controller for controlling the hybrid flash memory. 18. The method of claim 17,
Wherein the optimization utilization rate determination unit determines,
Wherein a weight is assigned to each of the first optimized utilization rate and the second optimized utilization rate, and then a sum is obtained to obtain an optimized utilization rate of the first device. 17. The method of claim 16,
Wherein the hybrid flash memory management unit manages the hybrid flash memory such that the optimized utilization rate is maintained in the first device,
Further comprising: a management unit for managing the hybrid flash memory.

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