KR20140078908A - Light emitting diode display device - Google Patents

Abstract

The present invention relates to a light emitting diode display device and, in particular, to a light emitting diode display device capable of detecting a threshold voltage of an accurate size and inhibiting a flicker phenomenon. The light emitting diode display device comprises: 1 to i pixels which are commonly connected to a data line (i is a natural number greater than 1); a timing controller to compensate for a value of image data to be supplied to an n pixel based on a threshold voltage of a driving switching element which is detected from the n pixel, and output compensated image data; and a data driver to generate a data voltage based on the image data from the timing controller, and sequentially supply, to the data line, a reference voltage and the data voltage which are required for the n pixel during a n horizontal period. The n pixel detects the threshold voltage of the internal driving switch element to be supplied to the timing controller based on the reference voltages and the data voltages which are supplied to the data line during a n-x horizontal period (x is a natural number smaller than 1 or k) or a n-1 horizontal period and the reference voltage which is supplied to the data line during the n horizontal period.

Description

[0001] LIGHT EMITTING DIODE DISPLAY DEVICE [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode display, and more particularly, to a light emitting diode display capable of detecting a precise threshold voltage and suppressing flicker.

The light emitting diode is an element controlled by a current. At this time, the current flowing through the light emitting diode is controlled by adjusting the gate voltage of the driving switching element connected to the light emitting diode.

The threshold voltage of the driving switching element for controlling the current is determined differently from pixel to pixel due to process variations or the like. Therefore, even if a data voltage corresponding to the same gradation is supplied to these pixels, Light is generated.

An internal compensation circuit structure for forming an additional plurality of switching elements for each pixel has been proposed in order to compensate for this in a circuit. However, since the undesired light emission may occur during the storage of the threshold voltage during the scan period, In contrast, in the case of an internal compensation circuit which can not emit light during the storage of the threshold voltage, the non-emission period and the simultaneous emission period for storing the threshold voltage are repeated frame by frame, There is a problem that a flicker phenomenon that a screen flickers occurs.

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-described problems, and it is an object of the present invention to provide an organic light emitting display device capable of accurately detecting a threshold voltage and also capable of preventing flicker, The present invention has been made in view of the above problems.

According to a first aspect of the present invention, there is provided a light emitting diode display comprising first to i-th pixels (i is a natural number greater than 1) connected in common to a data line; A timing controller for compensating for the value of the image data to be supplied to the n-th pixel based on the threshold voltage of the drive switching element detected from the n-th pixel and outputting the compensated image data; And a data driver that generates a data voltage based on the image data from the timing controller and sequentially supplies the reference voltage and the data voltage required for the nth pixel in the nth horizontal period to the data line; The n-th pixel includes the reference voltages and the data voltages supplied to the data line during the (n-1) -th horizontal period (x is a natural number smaller than 1 or k) to the n-1-th horizontal period, And the threshold voltage of the driving switch element is detected based on the reference voltage supplied to the line and supplied to the timing controller.

A driving switching element connected between an nth variable driving power supply line for transmitting an nth variable driving voltage and an anode electrode of the light emitting diode, the nth pixel being controlled according to a data voltage applied to its gate electrode; A data switching element for applying reference voltages and data voltages from the data line to the gate electrode of the driving switching element during the nx-th horizontal period to the n-th horizontal period; A detection switching element for detecting the voltage of the anode electrode as the threshold voltage of the driving switching element during the n-th horizontal period and providing it to the timing controller; And a storage capacitor connected between the gate electrode of the drive switching element and the nth variable drive power supply line; And the cathode electrode of the light emitting diode is connected to a positive power supply line for transmitting a constant voltage.

Each of the first through i-th horizontal periods is divided into a first half where a reference voltage is supplied to the data line and a second half in which a data voltage is applied to the data line; The detection switching element provided in the n-th pixel supplies the voltage of the anode electrode to the timing controller in the first half of the n-th horizontal period.

The data driver supplies a data voltage corresponding to the n-th pixel to the data line in the second half of the n-th horizontal period; The detection switching element included in the n-th pixel further detects the voltage of the anode electrode in the second half of the n-th horizontal period as deterioration data for the light emitting diode and provides the detected voltage to the timing controller .

First to i-th gate lines separately connected to the first to i-th pixels, and first to i-th scan lines individually connected to the first to i-th pixels, respectively; A data switching element provided in the n-th pixel is controlled according to an n-th gate signal from an n-th gate line; The detection switching element included in the n-th pixel is controlled according to the n-th scan signal from the n-th scan line.

Wherein the n-th gate signal is maintained in an active state during the n-x-th horizontal period to the n-th horizontal period, and remains inactive during a remaining horizontal period; The n-th scan signal is maintained in an active state during the n-th horizontal period and remains inactive during a remaining horizontal period.

Wherein the timing controller compensates the image data based on the threshold voltage and the deteriorated data.

Wherein the timing controller compares preset reference data with the deteriorated data, calculates a deterioration compensation value for the video data based on the comparison result, and outputs the calculated deterioration compensation value and the threshold voltage to the video data To compensate the image data.

The data driver supplies a data voltage corresponding to the n-th pixel to the data line in the second half of the n-th horizontal period; The detection switching element included in the n-th pixel detects the voltage of the anode electrode as deterioration data for the light emitting diode in the second half of the n-th horizontal period (y is a natural number smaller than kx) And further performs the operation of providing the data.

First to i-th gate lines separately connected to the first to i-th pixels, and first to i-th scan lines individually connected to the first to i-th pixels, respectively; A data switching element provided in the n-th pixel is controlled according to an n-th gate signal from an n-th gate line; The detection switching element included in the n-th pixel is controlled according to the n-th scan signal from the n-th scan line.

Wherein the n-th gate signal is maintained in an active state during the n-x-th horizontal period to the n-th horizontal period, and remains inactive during a remaining horizontal period; The n-th scan signal is maintained in an active state in the first half of the n-th horizontal period and in a second half of the n-x-y horizontal period, and remains inactive during the remaining horizontal periods.

Further comprising first to i-th variable drive voltages for supplying the first to i-th pixels, and a power supply for generating the constant voltage; The n-th variable driving voltage supplied to the n-th pixel is maintained at a value smaller than the constant voltage during the first nx-th horizontal period to the (n-1) -th horizontal period and the first half of the n-th horizontal period, Is maintained at a value greater than the constant voltage from the second half of the period.

And the value of the n-th variable drive voltage is equal to the reference voltage when the n-th variable drive voltage is a value smaller than the constant voltage.

The reference voltage is defined by the following equation (1); In the above equation (1), Vref denotes a reference voltage, VSS denotes a constant voltage, Vth_oled denotes a threshold voltage of the light emitting diode, and Vth_Dr denotes a threshold voltage of the driving switching element. [Equation 1] 0 Vref <VSS + Vth_oled - Vth_Dr .

According to another aspect of the present invention, there is provided an LED display device including first through i-th pixels (i is a natural number greater than 1) connected in common to a data line; A timing controller for compensating for the value of the image data to be supplied to the n-th pixel based on the threshold voltage of the drive switching element detected from the n-th pixel and outputting the compensated image data; And a data driver for generating a data voltage based on the image data from the timing controller and supplying a data voltage necessary for the n-th pixel to the data line in the n-th horizontal period; The nth pixel detects the threshold voltage of the internal driving switch element based on the reference voltage supplied to the data line during a part of the blank period of the nth frame and provides the detected voltage to the timing controller.

A driving switching element connected between an nth variable driving power supply line for transmitting an nth variable driving voltage and an anode electrode of the light emitting diode, the nth pixel being controlled according to a data voltage applied to its gate electrode; N-th frame period during a n-th horizontal period, and applying a reference voltage from the data line to a gate electrode of the driving switching element in a part of a blank period of the n-th frame, A data switching element to be applied to the gate electrode of the device; The voltage of the anode electrode is detected as a threshold voltage of the driving switching element during a part of the blank period of the n-th frame and provided to the timing controller, and the voltage of the anode electrode during the n- A detection switching element for detecting as deterioration data for a diode and providing it to the timing controller; And a storage capacitor connected between the gate electrode of the drive switching element and the nth variable drive power supply line; And the cathode electrode of the light emitting diode is connected to a positive power supply line for transmitting a constant voltage.

Further comprising first through i-th gate lines individually connected to the first through i-th pixels, respectively; The data switching element and the detection switching element provided in the n-th pixel are controlled according to the n-th gate signal from the n-th gate line.

Wherein the n-th gate signal is maintained in an active state during a partial period of the blank period and the n-th horizontal period in the n-th frame, and remains inactive during the remaining horizontal period.

Further comprising first to i-th variable drive voltages for supplying the first to i-th pixels, and a power supply for generating the constant voltage; The n-th variable driving voltage supplied to the n-th pixel is maintained at a value smaller than the constant voltage for a part of the blank period in the n-th frame, and a part of the blank period in the n- And is maintained at a value greater than the constant voltage before reaching a post-n-th horizontal period.

And the value of the n-th variable drive voltage is equal to the reference voltage when the n-th variable drive voltage is a value smaller than the constant voltage.

The reference voltage is defined by the following equation (1); In the above equation (1), Vref denotes a reference voltage, VSS denotes a constant voltage, Vth_oled denotes a threshold voltage of the light emitting diode, and Vth_Dr denotes a threshold voltage of the driving switching element. [Equation 1] 0 Vref <VSS + Vth_oled - Vth_Dr .

Wherein the remaining blank periods except for the partial period of the blank period of the n-th frame are divided into at least two periods; At least two pixels, which are connected to the data line and different from the n-th pixel, are arranged on the basis of a reference voltage supplied to the data line during the at least two periods, Voltage is sequentially detected and provided to the timing controller.

And the nth pixel detects the threshold voltage of the driving switching element at the end of the partial period.

The present invention has the following effects.

The voltage of the anode electrode formed in the pixel can be dropped to the threshold voltage for a sufficient time using the reference voltages applied during the previous horizontal periods before the pixel is supplied with the actual data voltage required for the pixel, Can be detected.

In addition, since the pixels emit light in units of horizontal lines, it is possible to prevent a flicker phenomenon occurring in a structure in which light is emitted as a whole and light is not emitted as a whole.

In addition, since the number of switching elements and the number of capacitors included in one pixel are considerably small, they are advantageous for manufacturing a high-resolution panel.

In addition, during the preparation period for lowering the voltage of the anode electrode to the threshold voltage, the source electrode and the drain electrode of the driving switching element are reversed in direction, and the current flows toward the variable driving power line, not the light emitting diode. It is possible to suppress unnecessary emission of light. Therefore, the lifetime of the light emitting diode can be increased and the contrast can be improved.

1 is a view illustrating a light emitting diode display device according to a first embodiment of the present invention;
2 is a diagram showing a circuit configuration of an n-th pixel according to the first embodiment of the present invention
Fig. 3 is a diagram showing various signals supplied to the (n-1) th horizontal line through (n + 1) th horizontal line pixels commonly connected to one mth data line and their timing diagrams
4A to 4E are diagrams showing circuit states of respective periods of the pixel shown in Fig. 2
5 is a view for explaining another point in time of the deteriorated data detection period
6 is a view illustrating a light emitting diode display device according to a second embodiment of the present invention.
7 is a diagram showing a circuit configuration of a first pixel according to a second embodiment of the present invention;
8A to 8C are diagrams showing various signals supplied to the first to third frames from the first to third horizontal line pixels connected in common to one first data line and the timing charts thereof,
9A to 9C are diagrams showing circuit states of respective periods of the pixel shown in Fig. 7
10 is a view for explaining an example in which two preparation periods are set in one blank period
11 is a view showing a result of a simulation test using the LED display device according to the first embodiment of the present invention
12 is a graph showing the magnitude of the threshold voltage detected according to the variation amount of the threshold voltage based on the simulation in Fig.
13 is a graph showing a deviation of a driving current for each gradation according to a variation amount of a threshold voltage in the LED display device according to the first embodiment of the present invention

1 is a view illustrating a light emitting diode display device according to a first embodiment of the present invention.

1, the LED display device according to the first embodiment of the present invention includes a display unit DSP, a system SYS, a timing controller TC, a data driver DD, a gate driver GD, A scan driver SD, an analog-to-digital converter ADC, and a power supply PS.

The display unit DSP includes i * j pixels PX, i (i is a natural number greater than 1) gate lines, i scan lines SL1 to SLi, j Data lines DL1 to DLj, and j sense lines PL1 to PLj. Here, first to i-th gate signals GL1 to GLi are applied with first to i-th gate signals, first to i-th scan lines are applied with first to i-th scan signals, respectively, The first through j-th sensing lines PL1 through PLj receive the reference voltage and the data voltage, respectively, from the first through j-th data lines DL1 through DLj, A threshold voltage and deterioration data of the light emitting diode are inputted. Here, the deteriorated data is an index indicating to what extent the light emitting diode is deteriorated. The greater the degradation, the higher the value of the degraded data.

These pixels PX are arranged in a matrix on the display unit DSP. These pixels PX are divided into a red pixel R for displaying red, a green pixel G for displaying green, and a blue pixel B for displaying blue. At this time, the red pixels, the green pixels and the blue pixels R, G, B adjacent in the horizontal direction are unit pixels for displaying one unit image.

Although not shown in FIG. 1, the display unit DSP further includes first through i-th variable power supply lines and a constant power source line. Here, first through i-th variable driving power lines VDD1 through VDDi are applied to the first through i-th variable driving power lines, respectively, and a constant voltage VSS is applied to the constant power source lines.

The j pixels (hereinafter, the nth horizontal line pixels) arranged along the nth horizontal line (n is any one of 1 to i) are individually connected to the first to jth data lines DL1 to DLj Respectively. In addition, the n-th horizontal line pixels are individually connected to each of the first to j-th detection lines PL1 to PLj. The n-th horizontal line pixels are commonly connected to the n-th gate line, the n-th scan line, the n-th variable driving power supply line, and the constant power source line. Accordingly, the n-th horizontal line pixels are supplied with the n-th gate signal, the n-th scan signal, the n-th variable driving voltage, and the constant voltage VSS in common. That is, all the j pixels arranged on the same horizontal line are supplied with the same gate signal, the scan signal, and the variable drive voltage, but the pixels located on different horizontal lines are supplied with different gate signals, scan signals and variable drive voltages. For example, both the red pixel R and the green pixel G located on the first horizontal line HL1 are supplied with the first gate signal, the first scan signal, and the first variable drive voltage VDD1, The red pixel R and the green pixel G located on the two horizontal lines HL2 are supplied with a second gate signal having a different timing from them, a second scan signal, and a second variable driving voltage.

The i gate signals, the i scan signals, and the i variable drive voltages described above are actually the same type of pulses between signals having the same name, and only the output timing is different in terms of time.

The system SYS outputs a vertical synchronizing signal, a horizontal synchronizing signal, a clock signal, and image data through an interface circuit through a Low Voltage Differential Signaling (LVDS) transmitter of a graphic controller. The vertical / horizontal synchronizing signal and the clock signal output from the system SYS are supplied to the timing controller TC. In addition, the image data sequentially output from the system SYS is supplied to the timing controller TC.

The timing controller TC generates a data control signal, a gate control signal, a scan control signal, and a power supply control signal by using a horizontal synchronizing signal, a vertical synchronizing signal, and a clock signal input to the timing controller TC, The driver GD, the scan driver SD, and the power supply PS. The timing controller TC compensates the value of the image data to be supplied to each pixel PX based on the threshold voltage of the drive switching element detected from each pixel PX and outputs the compensated image data . At this time, the timing controller TC processes the pixels PX in units of horizontal lines. For example, j threshold voltages for j pixels PX located in the first horizontal line HL1 are simultaneously detected, and j pieces of image data corresponding to the j pixels PX are corrected And then j threshold voltages for j pixels PX located in the second horizontal line HL2 are simultaneously detected to correct j picture data corresponding to the j pixels PX. In addition, the timing controller TC may further receive deterioration data for the light emitting diodes from the respective pixels PX. At this time, the timing controller TC compensates the image data for each pixel based on the threshold voltage and the deteriorated data. For example, the timing controller (TC) compares preset reference data with deteriorated data, calculates a deterioration compensation value for the video data based on the comparison result, and compares the calculated deterioration compensation value and the threshold voltage Can be added to the image data to compensate the image data.

The data driver DD samples image data (compensated image data) in accordance with a data control signal from the timing controller TC and then outputs sampling image data corresponding to one horizontal line every horizontal period And supplies the latched image data to the data lines DL1 to DLj. That is, the data driver DD converts the video data from the timing controller TC into an analog signal (data voltage) by using the gamma voltage input from the power supply unit PS and supplies the converted video data to the data lines DL1 to DLj do. In addition, the data driver DD outputs a reference voltage. At this time, the data driver DD alternately outputs the reference voltage and the data voltage to the data lines DL1 to DLj every horizontal period. That is, the data driver DD simultaneously supplies the j reference voltages required for the nth horizontal line pixels to the j data lines DL1 to DLj in the first half of the nth horizontal period, The j data voltages required for the pixels of the nth horizontal line are simultaneously supplied to the j data lines DL1 to DLj in the latter half of the line.

The reference voltage is 0 [V], and the magnitudes of the reference voltages supplied to the respective data lines are all the same. On the other hand, the data voltage has a voltage greater than the reference voltage, and the magnitude of the data voltage may vary from pixel to pixel depending on the gray value of the corresponding image data.

The gate driver GD sequentially generates and outputs the first to i-th gate signals described above according to the gate control signal from the timing controller TC. The n-th horizontal line pixels are controlled according to the n-th gate signal.

The scan driver SD sequentially generates the first through i-th scan signals according to a scan control signal from the timing controller TC. The nth horizontal line pixels are controlled according to the nth scan signal.

The first to i-th gate signals and the first to i-th scan signals have -10 [V] when they are in an active state (low level voltage) and 14 [V] Voltage.

The analog-to-digital converter ADC converts the threshold voltages of the driving switching elements detected from the first through j-th sensing lines PL1 through PLj and the deterioration data of the light emitting diodes into a digital signal, Voltages and degradation data to the timing controller TC.

The power supply unit PS generates the gamma voltage, the first to i-th variable drive voltages VDD1 to VDDi, and the constant voltage VSS in accordance with the power supply control signal from the timing controller TC. The nth horizontal line pixels are supplied with the nth variable driving voltage and the constant voltage VSS. Here, each of the first to i-th variable drive voltages is composed of a low voltage and a high voltage, and when the variable drive voltage is maintained at a low voltage, its voltage has a value smaller than the constant voltage (VSS). For example, each of the first to i-th variable drive voltages VDD1 to VDDi may have 0 [V] at a low voltage and 12 [V] at a high voltage, where the constant voltage VSS is 2 [V The DC voltage is set to a DC voltage of The nth horizontal line pixels are supplied with the nth variable driving voltage and the constant voltage VSS.

The n-th horizontal line pixels are supplied with the reference voltages and the data voltages corresponding thereto in the n-th horizontal period, and each of the n-th horizontal line pixels includes a plurality of previous horizontal periods j (I.e., the reference voltages and data voltages of the previous horizontal line pixels) applied to the data lines DL1 to DLj and the reference voltages of the nth horizontal period, The threshold voltage of the driving switching element is detected.

In other words, one n-th pixel connected to the m-th data line among the n-th horizontal line pixels will be described as an example.

The n-th pixel is connected to the reference voltages and data voltages supplied to the m-th data line during the (n-1) -th horizontal period (x is a natural number smaller than 1 or n) And detects the threshold voltage of the driving switch element inside based on the reference voltage supplied to the m-th data line. And supplies the detected threshold voltage to the timing controller TC.

To this end, each of the pixels PX according to the present invention can have the following circuit configuration, and since the circuit configuration of all the pixels PX is the same, the circuit configuration for the above-mentioned n-th pixel will be exemplified .

2 is a diagram showing a circuit configuration of an n-th pixel according to the first embodiment of the present invention.

The nth pixel PXn includes a drive switching element Tr_DR, a data switching element SW_data, a detection switching element SW_det, a storage capacitor Cst and a light emitting diode OLED as shown in FIG. do.

The driving switching element Tr_DR is controlled according to a signal applied to its gate electrode and is connected to the nth variable driving power supply line VDLn for transmitting the nth variable driving voltage VDDn, (An). The driving switching element Tr_DR adjusts the amount (density) of driving current flowing from the nth variable driving power supply line VDLn to the constant power source line VSL according to the magnitude of a signal applied to its gate electrode.

The data switching element SW_data applies the reference voltages and the data voltages from the m-th data line DLm to the gate electrode of the driving switching element Tr_DR for the n-x-th horizontal period to the n-th horizontal period. This data switching element SW_data is controlled in accordance with the n-th gate signal GSn from the n-th gate line GLn. The n-th gate signal GSn is supplied to the n-th horizontal period to the n-th horizontal And remain inactive for the remaining horizontal periods.

The detection switching element SW_det detects the voltage of the anode electrode An as the threshold voltage of the driving switching element Tr_DR during the n-th horizontal period and provides it to the timing controller TC. That is, the detection switching element SW_det supplies the voltage of the anode electrode An to the timing controller TC in the first half of the n-th horizontal period. In other words, each of the first through i-th horizontal periods is divided into a first half, to which the reference voltage is supplied to the m-th data line DLm, and a second half, to which the data voltage is applied to the m-th data line DLm, The detection switching element SW_det supplies the voltage of the anode electrode An to the timing controller TC in the first half of the n-th horizontal period. On the other hand, the detection switching element SW_det detects the voltage of the anode electrode An as deterioration data for the light emitting diode OLED in the second half of the n-th horizontal period and provides it to the timing controller TC . For this operation, the detection switching element SW_det is controlled according to the n-th scan signal SSn from the n-th scan line SLn, wherein the n-th scan signal SSn is active during the n-th horizontal period State, and remains inactive for the remaining horizontal period.

The storage capacitor Cst is connected between the gate electrode of the driving switching element Tr_DR and the nth variable driving power supply line VDLn to store the threshold voltage of the driving switching element Tr_DR.

The light emitting diode OLED emits light according to the driving current supplied through the driving switching element Tr_DR, and emits light of different brightness depending on the magnitude of the driving current. The anode electrode An of the light emitting diode OLED is connected to the drain electrode (or the source electrode) of the drive switching element Tr_DR and its cathode electrode is connected to the positive power supply line VSL. The light emitting diode (OLED) in the present invention may be an organic light emitting diode (OLED).

The operation of the n-th pixel PXn will be described with reference to FIG. 3 and FIGS. 4A to 4E.

FIG. 3 is a diagram showing various signals supplied to the (n-1) th horizontal line through (n + 1) th horizontal line pixels commonly connected to one mth data line DLm and their timing diagrams. 4A to 4E are diagrams showing circuit states of respective periods of the pixel shown in FIG. 2. FIG.

The pixels included in the LED display device according to the first exemplary embodiment of the present invention include a preparation period Tpr, a threshold voltage detection period Tth, a deteriorated data detection period Td, and a light emission sustain period Te, . Accordingly, the gate signals and the scan signals change to the active state or the inactive state based on the sequentially generated threshold voltage detection period Tth, the deteriorated data detection period Td, and the light emission period. In addition, the variable drive voltages change to high voltage or low voltage based on sequentially generated threshold voltage detection period (Tth), deteriorated data detection period (Td), and light emission period.

Here, an active state of a signal means a state in which a switching element to be supplied thereto can be turned on, and an inactive state of a signal means a state in which any switching element to be supplied can be turned off. In the present invention, the above-described data switching element (SW_data) and the detection switching element (SW_det) may be of N-type or P-type transistors. If all the above-mentioned switching elements are N-type, this active state means a state of a high voltage, and the inactive state means a state of a low voltage. On the other hand, if all these switching elements are P type, this active state means a state of a low voltage and the inactive state means a state of a high voltage. The switching elements in the present invention are all P-type transistors.

1) Preparation period ( Tpr )

First, with reference to FIG. 3 and FIG. 4A, let us consider the operation of the n-th pixel PXn in the preparation period Tpr.

Here, the preparation period Tpr of the n-th pixel PXn is a period corresponding to the n-th horizontal period to the (n-1) -th horizontal period Hn-1 described above, for example, , And the (n-3) th to (n-1) -th horizontal periods Hn-3 to Hn-1. As described above, the preparation period Tpr includes three consecutive horizontal periods. Since the operations of the n-th pixel PXn in the respective horizontal periods included in the preparation period Tpr are the same, Only the operation in the (n-3) -th horizontal period Hn-3 will be described. At this time, the first half (fh) of the (n-3) th horizontal period (Hn-3) will be described first, and the latter half (sh) thereof will be described.

As shown in Fig. 3, the n-th variable driving voltage VDDn is held at a low voltage of 0 [V] and the n-th gate signal (Hn-3) GSn remain active and the nth scan signal SSn remains inactive and the reference voltage Vref is applied to the mth data line DLm. This reference voltage Vref is a reference voltage Vref necessary for the (n-3) -th pixel connected to the m-th data line DLm among the (n-3) th horizontal line pixels and has a value of zero. On the other hand, regardless of the horizontal period, the constant voltage VSS is always maintained at a constant value of 2 [V] during all horizontal periods.

By the signals in this state, the data switching element SW_data is turned on, while the detection switching element SW_det is turned off, as shown in FIG. 4A. Then, the reference voltage Vref is applied to the gate electrode of the drive switching element Tr_DR through the turn-on data switching element SW_data. On the other hand, since the voltage (2 [V] + Vth_oled (the threshold voltage of the light emitting diode OLED) of the anode electrode An is higher than the nth variable driving voltage VDDn of 0 [V] The electrode of the driving switching element Tr_DR connected to the n-th variable driving power supply line VDLn becomes the source electrode and the electrode connected to the n-th variable driving power supply line VDLn becomes the drain electrode. Then, the voltage (hereinafter, gate-source voltage) between the gate electrode and the source electrode of the driving switching element Tr_DR becomes smaller than 0, and the driving switching element Tr_DR is turned on. Accordingly, a current I flowing from the anode electrode An to the n-th variable driving power supply line VDDn is generated through the turned-on switching element Tr_DR. Then, the voltage of the anode electrode An gradually decreases. That is, the voltage of the anode electrode An gradually decreases in a direction toward the threshold voltage of the driving switching element Tr_DR.

On the other hand, in the first half (fh) of the (n-3) th horizontal period (Hn-3), the pixels of the other horizontal lines connected to the mth data line DLm individually perform operations corresponding to the horizontal period. For example, in the first half (fh) of the (n-3) -th horizontal period Hn-3, the (n-1) th pixel PXn-1 receives the second reference voltage Vref, And the (n + 1) th pixel PXn + 1 maintains the light emitting state by the data voltage (compensated data voltage) applied to the previous frame.

The operation of the n-th pixel PXn in the second half (sh) of the (n-3) -th horizontal period Hn-3 will now be described with reference to Figs. 3 and 4B.

The nth variable driving voltage VDDn, the n-th gate signal GSn, and the n-th scan signal (n) are supplied to the second half portion sh of the (n-3) -th horizontal period Hn- Th data voltage Dn-3 is applied to the m-th data line DLm, while the n-th data voltage Dn-3 is maintained in the same state as the first half fh described above. This n-3 data voltage Dn-3 is a data voltage necessary for the above-mentioned n-3 pixel, which has a value larger than zero.

Therefore, as shown in Fig. 4B, the n-3 data voltage Dn-3 is applied to the gate electrode of the drive switching element Tr_DR through the turn-on data switching element SW_data. The n-th data voltage Dn-3 is greater than the voltage of the anode electrode An (a small voltage close to the threshold voltage of the drive switching element Tr_DR) The driving switching element Tr_DR supplied with the n-3 th data voltage Dn-3 is turned off. Therefore, since there is no charge outflow from the anode electrode An in the latter half portion sh, the anode electrode An in the latter half portion sh remains as the voltage in the above-mentioned first half portion fh.

On the other hand, in the second half (sh) of the (n-3) th horizontal period Hn-3, the pixels of the other horizontal lines connected to the mth data line DLm individually perform operations corresponding to the horizontal period. For example, the second data voltage Dn-3 is supplied to the (n-1) th pixel PXn-1 in the second half portion sh of the (n-3) -th horizontal period Hn- Tpr), and the (n + 1) th pixel PXn + 1 maintains the light emitting state by the data voltage (compensated data voltage) applied to the previous frame.

The voltage of the anode electrode An formed in the nth pixel PXn is applied to the first half of the (n-3) th horizontal period Hn-3 included in the preparation period Tpr of the nth pixel PXn The voltage of the anode electrode An is maintained at the voltage value in the first half portion fh in the second half portion sh. Herein, when the operation of the n-th pixel PXn in the first half fh is defined as a first operation (1) and the operation in the second half sh is defined as a second operation (2) The n-th pixel PXn repeats the first operation (1) and the second operation (2) described above for the remaining n-2 horizontal periods and the (n-1) . Accordingly, as the voltage of the anode electrode An is repeatedly decreased and maintained during the preparation period Tpr, the driving switching element Tr_DR is turned off at the time when the preparation period Tpr ends, The voltage of the anode electrode An becomes equal to the threshold voltage of the driving switching element Tr_DR. Specifically, the voltage of the anode electrode An becomes a value corresponding to the sum (Vref + Vth) between the threshold voltage and the reference voltage Vref. However, since the reference voltage Vref is zero here, the voltage of the anode electrode An is substantially maintained at the threshold voltage.

2) Threshold voltage detection period ( Tth )

Next, the operation of the n-th pixel PXn in the threshold voltage detection period Tth will be described with reference to Figs. 3 and 4C.

Here, the threshold voltage detection period Tth of the n-th pixel PXn is a period corresponding to the first half (fh) of the n-th horizontal period Hn.

As shown in Fig. 3, the nth variable driving voltage VDDn is held at a low voltage of 0 [V] and the nth gate signal GSn is kept active at the first half of the nth horizontal period Hn, And the nth scan signal SSn is maintained in the active state, and the reference voltage Vref is applied to the mth data line DLm. This reference voltage Vref is a reference voltage Vref necessary for the nth pixel PXn connected to the mth data line DLm among the nth horizontal line pixels and has a value of zero.

By the signals in this state, the data switching element SW_data and the detection switching element SW_det are both turned on, as shown in FIG. 4C. Then, the reference voltage Vref is applied to the gate electrode of the drive switching element Tr_DR through the turn-on data switching element SW_data. At this time, the voltage of the anode electrode An (that is, the source electrode voltage of the drive switching element Tr_DR) is a value corresponding to the threshold voltage Vth of the drive switching element Tr_DR already in the preparation period Tpr described above . Therefore, since the driving switching element Tr_DR is turned off in the first half of the n-th horizontal period Hn, the current flowing through the driving switching element Tr_DR is substantially close to zero.

On the other hand, the voltage (Vref + | Vth |) of the anode electrode An is supplied to the analog-digital converter (ADC) through the turn-on detection switching element SW_det and the mth sensing line. Here, since the reference voltage Vref is 0, the voltage supplied to the analog-to-digital converter ADC corresponds to the threshold voltage Vth.

The analog-to-digital converter ADC converts the threshold voltage Vth into a digital signal in the first half of the n-th horizontal period Hn and provides it to the timing controller TC. Then, the timing controller TC generates the compensated image data by adding the image data (digital signal) corresponding to the nth pixel PXn to the digitally converted threshold voltage Vth and stores it in an internal memory do. On the other hand, the timing controller TC stores the deterioration compensation value (digital signal) corresponding to the deteriorated data (digital signal) of the n-th pixel PXn generated in the previous frame, (digital image data corresponding to the nth horizontal period Hn) of the n pixels PXn. That is, the compensated image data may be generated by adding both the deterioration compensation value generated in the previous frame and the threshold voltage generated in the current frame to the image data.

Here, the operation of the n-th pixel PXn in the first half (fh) of the n-th horizontal period Hn is defined as a third operation (3).

On the other hand, in the first half (fh) of the n-th horizontal period (Hn), the pixels of the other horizontal lines connected to the m-th data line DLm individually perform operations corresponding to the horizontal period. For example, in the first half (fh) of the nth horizontal period Hn, the (n-1) th pixel PXn-1 maintains the light emitting state and the Receives the reference voltage Vref and performs an operation corresponding to the preparation period Tpr.

3) Deterioration data detection period ( Td )

Next, the operation of the n-th pixel PXn in the deteriorated data detection period Td will be described with reference to Figs. 3 and 4D.

Here, the deteriorated data detection period Td of the n-th pixel PXn is a period corresponding to the second half (sh) of the n-th horizontal period Hn described above.

As shown in Fig. 3, the nth variable driving voltage VDDn is maintained at a high voltage of 12 [V] at the second half portion sh of the nth horizontal period Hn, and the nth gate signal GSn is activated And the nth scan signal SSn is maintained in the active state, and the n th data voltage Dn is applied to the m th data line DLm. The n-th data voltage Dn is an analog signal for the video data of the n-th pixel PXn compensated by the timing controller TC (hereinafter referred to as n-th video data) in the above-described threshold voltage detection period Tth , And the nth data voltage Dn can be regarded as a voltage obtained by adding the threshold voltage Vth to the original nth data voltage. That is, the timing controller TC supplies the n-th image data (compensated n-th image data) stored in the internal memory to the data driver DD at the latter half portion sh of the n-th horizontal period Hn The data driver DD converts the n-th image data supplied from the timing controller TC into an analog signal using preset gamma voltages. That is, the data driver DD generates the n-th data voltage Dn (analog signal) for the n-th image data and provides the generated n-th data voltage Dn to the m-th data line DLm do.

4D, the data switching element SW_data and the detection switching element SW_det are both turned on by the signals in this state. Then, the n-th data voltage Dn is applied to the gate electrode of the driving switching element Tr_DR through the turn-on data switching element SW_data. On the other hand, since the nth variable driving voltage VDDn of 12 [V] is higher than the voltage Vth of the anode electrode An during this period, the driving switching element Tr_DR connected to the nth variable driving power supply line VDLn Electrode serves as the source electrode and the electrode connected to the anode electrode An serves as the drain electrode. Then, the voltage (hereinafter, gate-source voltage) between the gate electrode and the source electrode of the driving switching element Tr_DR becomes larger than 0, and the driving switching element Tr_DR is turned on. Thus, a current Ioled flowing in the direction from the nth variable driving power supply line VDDn to the anode electrode An is generated through the turned-on switching element Tr_DR. The current Ioled is a driving current Ioled for causing the light emitting diode OLED to emit light and the magnitude of the driving current Ioled is equal to the magnitude of the nth data voltage Dn applied to the gate electrode of the driving switching transistor Tr_DR ). This driving current Ioled is supplied to the light emitting diode OLED, so that the light emitting diode OLED starts to emit light. On the other hand, the n-th data voltage Dn supplied to the gate electrode of the driving switching element Tr_DR is stored by the storage capacitor Cst. The nth data voltage Dn stored by this storage capacitor Cst is held until another reference voltage Vref or a data voltage in the next frame is applied thereto.

On the other hand, the voltage of the anode electrode An is supplied to the analog-digital converter ADC through the turn-on detection switching element SW_det and the m-th sensing line PLm. The voltage of the anode electrode An at this time is affected by the driving current Ioled flowing to the light emitting diode OLED. The voltage of the anode electrode An that is detected in the second half portion sh of the nth horizontal period Hn is higher than the voltage of the anode electrode An Is degraded data D_oled indicating the degree of deterioration of the light emitting diode (OLED). The deteriorated data D_oled is supplied to an analog-to-digital converter (ADC) and converted into a digital signal. The digitally converted deteriorated data D_oled is supplied to the timing controller TC. The timing controller TC stores the deteriorated data D_oled in advance in an internal lookup table based on the deteriorated data D_oled. And selects one deterioration compensation value set according to the value of the deteriorated data D_oled among the deterioration compensation values. The final compensation value is calculated by summing the deterioration compensation value (digital signal) and the stored threshold voltage (digital signal) detected in the previous period (i.e., the first half of the nth horizontal period Hn). The final compensation value is added to the nth image data (digital signal) of the next frame to compensate the nth image data of the next frame, and the compensated nth image data is stored in the internal memory.

At this time, prior to selecting the deterioration compensation value, the timing controller TC first compares the deteriorated data D_oled with preset reference data. For example, if the n-th image data has a value corresponding to 250 gradations, the reference data set based on the same 250-gradation value is compared with the detected degradation data D_oled. If the deteriorated data D_oled has a value higher than the reference data by several percent or more, it is determined that the light emitting diode OLED is deteriorated, and deterioration is detected based on the magnitude of the difference between the deteriorated data D_oled and the reference data Select the compensation value. That is, the larger this difference is, the higher the value of the deterioration compensation value can be selected.

Here, the reference data for the above-mentioned 250 gradations is a normal sample light-emitting diode in which the n-th data voltage Dn (the compensated n-th data voltage Dn) corresponding to the n-th image data of 250 gradations is not deteriorated When the sample light emitting diode OLED is supplied with the sample pixel having the organic light emitting element OLED, the voltage detected from the anode electrode An of the sample pixel while the sample light emitting diode OLED is emitting light.

On the other hand, the above-described lookup table can be configured for each color information of the image data. That is, the image data can be classified into red image data supplied to the red pixel R, green image data supplied to the green pixel G, and blue image data supplied to the blue pixel B, A lookup table for green image data, and a lookup table for blue image data may be separately prepared.

Here, the operation of the n-th pixel PXn in the second half portion sh of the n-th horizontal period Hn is defined as a fourth operation (4).

On the other hand, in the second half (sh) of the nth horizontal period Hn, the pixels of the other horizontal lines connected to the mth data line DLm individually perform operations corresponding to the horizontal period. For example, in the second half (sh) of the nth horizontal period Hn, the (n-1) th pixel PXn-1 maintains the light emitting state and the Receives the data voltage Dn and performs an operation corresponding to the preparation period Tpr.

4) Luminescence retention period ( Te )

Next, with reference to FIG. 3 and FIG. 4E, let us consider the operation of the n-th pixel PXn in the light emission sustain period Te.

Here, the light emission sustain period Te of the n-th pixel PXn is set so that the n-th gate signal GSn of the next frame becomes active again from the first half (fh) of the (n + 1) The operation of the n-th pixel PXn in each of the horizontal periods included in the light emission sustain period Te is the same as the period immediately before the (n + 1) th horizontal period Hn + 1, Only the operation will be described.

As shown in Fig. 3, the n-th variable driving voltage VDDn is maintained at a high voltage of 12 [V] at the first half portion fh of the (n + 1) -th horizontal period Hn + The nth scan signal SSn is held inactive and the reference voltage Vref is applied to the mth data line DLm. This reference voltage Vref is a reference voltage Vref necessary for the (n + 1) th pixel PXn + 1.

By the signals in such a state, both the data switching element SW_data and the detection switching element SW_det are turned off as shown in FIG. 4E. At this time, the n-th data voltage Dn provided in the previous period (that is, the latter half sh of the n-th horizontal period Hn) is held by the storage capacitor Cst at the gate electrode of the drive switching element Tr_DR have. In addition, the nth variable driving voltage VDDn is maintained at a voltage of 12 [V] which is still higher than the voltage of the anode electrode An. Accordingly, the driving switching element Tr_DR maintains the turned-on state, and the driving current Ioled described above is supplied to the light emitting diode OLED through the turned-on driving switching element Tr_DR. Therefore, the light emitting diode OLED of the nth pixel PXn maintains the light emitting state in the first half (fh) of the (n + 1) -th horizontal period Hn + 1.

Here, the operation of the n-th pixel PXn in the first half (fh) of the (n + 1) -th horizontal period Hn + 1 is defined as a fifth operation (5).

On the other hand, in the first half (fh) of the (n + 1) -th horizontal period (Hn + 1), the pixels of the other horizontal lines connected to the m-th data line DLm individually perform operations corresponding to the horizontal period. For example, in the first half (fh) of the (n + 1) -th horizontal period Hn + 1, the n-1th pixel PXn- The threshold voltage of the drive switching element Tr_DR is detected and provided to the timing controller.

Thus, the operation of one frame for the n-th pixel PXn is completed. This n-th pixel PXn operates in the manner described above also in the following frame.

The remaining pixels PX operate in the same manner as the n-th pixel PXn.

On the other hand, the reference voltage Vref described above can be defined by the following equation (1).

&Quot; (1) &quot; 0 Vref <VSS + Vth_oled - Vth_Dr

Vth_oled is the threshold voltage of the light emitting diode OLED, and Vth_Dr is the threshold voltage Vth of the driving switching element Tr_DR. In this equation, Vref is the reference voltage Vref, VSS is the constant voltage VSS, Vth_oled is the threshold voltage of the light emitting diode OLED, it means.

As described above, according to the present invention, the voltage of the anode electrode An formed in the pixel is applied for a sufficient time using the reference voltages Vref applied during the previous horizontal periods before the pixel is supplied with the actual data voltage required for the pixel Can be reduced to the threshold voltage (Vth), so that the threshold voltage (Vth) of an accurate size can be detected.

In addition, since the pixels PX emit light in units of horizontal lines, it is possible to prevent a flicker phenomenon occurring in a structure in which light is emitted as a whole and light is not emitted as a whole.

In addition, since the number of the switching elements and the number of the capacitors Cst provided in one pixel PX are considerably small, they are advantageous for manufacturing a high-resolution panel.

In addition, during the preparation period Tpr during which the voltage of the anode electrode An is lowered to the threshold voltage Vth, the source electrode and the drain electrode of the driving switching element Tr_DR are reversed in direction so that the current is not the light emitting diode OLED So that unnecessary light emission from the light emitting diode OLED can be suppressed during the preparation period Tpr. Therefore, the lifetime of the light emitting diode OLED can be increased and the contrast can be improved.

On the other hand, according to the present invention, the fourth operation (4) in the deteriorated data detection period Td may be performed in the second half (sh) of the n-x-y horizontal period (y is a natural number smaller than k-x). This will be described in more detail with reference to FIG.

5 is a view for explaining another viewpoint of the deteriorated data detection period Td.

Generally, the light emitting diode (OLED) includes a capacitor component, and the larger the capacity of the capacitor, the slower the voltage of the anode electrode An rises. Therefore, if the capacitance of the capacitor is sufficiently large, the voltage of the anode electrode An can be sufficiently lowered during the second half (sh) of the nth horizontal line at which the film drive current Ioled starts to be supplied to the light emitting diode OLED . Accordingly, the voltage of the anode electrode An detected at the second half (sh) of the nth horizontal line may be unsuitable as the deterioration data D_oled for the light emitting diode OLED.

To prevent this, the fourth operation (4) in the deteriorated data detection period (Td) may be performed in the second half (sh) of the n-x-y horizontal period preceding this period. For example, the second half (sh) of the n-x-y horizontal period may be the second half (sh) of the n-4th horizontal period Hn-4 as shown in FIG. Thus, the n-th pixel PXn can detect the deteriorated data D_oled just before the preparation period Tpr. The second half (sh) of the (n-4) th horizontal period Hn-4 is a period in which the nth pixel PXn is sufficiently emitting light according to the nth data voltage supplied in the previous frame. That is, since the driving current Ioled has already been supplied to the light emitting diode OLED of the n-th pixel PXn for a sufficient time already in the latter half portion sh of the n-4th horizontal period Hn-4, And the voltage of the anode electrode An thereof is already maintained at the target voltage. Therefore, the voltage of the anode electrode An detected at the latter half (sh) of the (n-4) th horizontal period Hn-4 can accurately indicate the degree of deterioration with respect to the light emitting diode OLED.

In this case, the nth data voltage Dn of the current frame can be compensated based on the deteriorated data D_oled detected in the previous frame and the threshold voltage Vth detected in the current frame.

6 is a view illustrating a light emitting diode display device according to a second embodiment of the present invention.

6, a display unit DSP, a system SYS, a timing controller TC, a data driver DD, a gate driver GD, A scan driver SD, an analog-to-digital converter ADC, and a power supply PS.

The display unit DSP includes i * j pixels PX, i (i is a natural number greater than 1) gate lines and j (j is a natural number greater than 1) data lines DL1 to DLj ), And j sense lines PL1 to PLj. Here, the first to i-th gate lines GL1 to GLi are applied with first to i-th gate signals, respectively. The first to j-th data lines receive a reference voltage and a data voltage, Threshold voltages of the driving switching elements detected from each pixel PX and deterioration data of the light emitting diode are input to the first through j-th sensing lines PL1 through PLj. Here, the deteriorated data is an index indicating to what extent the light emitting diode is deteriorated. The greater the degradation, the higher the value of the degraded data.

These pixels PX are arranged in a matrix on the display unit DSP. These pixels PX are divided into a red pixel R for displaying red, a green pixel G for displaying green, and a blue pixel B for displaying blue. At this time, the red pixels, the green pixels and the blue pixels R, G, B adjacent in the horizontal direction are unit pixels for displaying one unit image.

On the other hand, although not shown in FIG. 6, the display unit DSP further includes first through i-th variable power supply lines and a constant power source line (VSL). Here, first through i-th variable driving voltages VDD1 through VDDi are applied to the first through i-th variable driving power supply lines, respectively, and a constant voltage VSS is applied to the positive power supply line VSL.

J pixels (hereinafter, the nth horizontal line pixels) arranged along the nth horizontal line (n is any one of 1 to i) are individually connected to each of the first to jth data lines. Further, the n-th horizontal line pixels are individually connected to each of the first to j-th detection lines. The n-th horizontal line pixels are commonly connected to the n-th gate line, the n-th variable driving power supply line, and the constant power source line. Accordingly, the n-th horizontal line pixels are supplied with the n-th gate signal, the n-th variable driving voltage, and the constant voltage in common. That is, all the j pixels arranged on the same horizontal line are supplied with the same gate signal and variable driving voltage, but pixels located on different horizontal lines are supplied with different gate signals and variable driving voltages. For example, both the red pixel R and the green pixel G located on the first horizontal line HL1 are supplied with the first gate signal and the first variable drive voltage VDD1, while the second horizontal line HL2 Are supplied with a second gate signal and a second variable driving voltage having different timings from those of the red pixel R and the green pixel G.

The above-described i gate signals and i variable drive voltages are actually the same type of pulses between signals of the same name, and differ only in output timing in terms of time.

Since the system SYS is the same as that of the first embodiment described above, a description thereof will be made with reference to the first embodiment.

The timing controller TC generates a data control signal, a gate control signal, and a power control signal by using a horizontal synchronizing signal, a vertical synchronizing signal, and a clock signal input to the timing controller TC, and supplies them to the data driver DD, the gate driver GD, And the power supply unit PS. The timing controller TC compensates the value of the image data to be supplied to each pixel based on the threshold voltage of the drive switching element detected from each pixel PX and outputs the compensated image data. At this time, the timing controller TC processes pixels on a horizontal line basis. For example, first, j threshold voltages for j pixels located in the first horizontal line HL1 are detected at the same time, j pieces of image data corresponding to the j pixels are corrected, and then, J threshold voltages for j pixels located in the pixel HL2 are simultaneously detected to correct j picture data corresponding to the j pixels. In addition, the timing controller TC may further receive deterioration data for the light emitting diodes from the respective pixels. At this time, the timing controller TC compensates the image data for each pixel based on the threshold voltage and the deteriorated data. For example, the timing controller (TC) compares preset reference data with deteriorated data, calculates a deterioration compensation value for the video data based on the comparison result, and compares the calculated deterioration compensation value and the threshold voltage Can be added to the image data to compensate the image data.

The data driver DD samples image data (compensated image data) in accordance with a data control signal from the timing controller TC, latches sampling image data corresponding to one horizontal line in each horizontal period And supplies the latched image data to the data lines DL1 to DLj. That is, the data driver DD converts the video data from the timing controller TC into an analog signal (data voltage) by using the gamma voltage input from the power supply unit PS and supplies the converted video data to the data lines DL1 to DLj do. The data driver DD outputs a reference voltage. At this time, the data driver DD applies the data voltage to each data line in each horizontal period of each frame, and applies the reference voltage to each data line DL1 to DLj in the blank period of each frame. That is, the data driver DD simultaneously supplies the j data voltages required for the n-th horizontal line pixels in the n-th horizontal period of the n-th frame to the j data lines DL1 to DLj, The j reference voltages Vref necessary for the nth horizontal line pixels are simultaneously supplied to the j data lines DL1 to DLj during the blanking period of the first horizontal line.

Since the reference voltage is the same as that of the first embodiment described above, a description thereof will be given with reference to the first embodiment described above.

Since the gate driver GD is the same as that of the first embodiment described above, a description thereof will be given with reference to the first embodiment described above.

Since the first to i-th gate signals are the same as those of the first embodiment described above, a description thereof will be given with reference to the first embodiment described above.

Since the analog-to-digital converter (ADC) is the same as that of the first embodiment described above, a description thereof will be referred to the first embodiment described above.

Since the power supply unit PS is the same as that of the first embodiment described above, the first embodiment described above will be described.

The n-th horizontal line pixels are supplied with the reference voltages in the blanking period of the n-th frame, and each of the n-th horizontal line pixels includes reference voltages applied to j data lines during the blanking period preceding the n-th horizontal period And detects the threshold voltage of the drive switching device provided inside the device. Since this blank period has a long time corresponding to the sum of several horizontal periods, the pixels in the second embodiment of the present invention use this blank period to drop the voltage of the anode electrode An to the threshold voltage This threshold voltage is also detected.

In other words, one n-th pixel connected to the m-th data line among the n-th horizontal line pixels will be described as an example.

The n-th pixel drops the voltage of the anode electrode based on the reference voltage supplied to the m-th data line in the blanking period of the n-th frame, and detects the threshold voltage of the driving switch element therein. And supplies the detected threshold voltage to the timing controller TC.

Here, the blank period is divided into a back porch period and a front porch period. The back porch period is a period between a start point of one frame and a first horizontal period (i.e., a first horizontal period) , And the front porch period is located between the last horizontal period (i.e., the i-th horizontal period) and the end of the one frame. At this time, the reference voltage may be supplied in one of the back porch period and the front porch period of the blank period.

For the above-described operation, each of the pixels according to the present invention may have the following circuit configuration. Since all the pixels have the same circuit configuration, they are located on the first horizontal line HL1 and are connected to the first data line DL1. A circuit configuration for one first pixel connected to the first pixel will be described.

7 is a diagram showing a circuit configuration of a first pixel according to a second embodiment of the present invention.

The first pixel PX1 includes a drive switching element Tr_DR, a data switching element SW_data, a detection switching element SW_det, a storage capacitor Cst and a light emitting diode OLED do.

Since the driving switching element Tr_DR is the same as that of the first embodiment described above, a description thereof will be given with reference to the first embodiment described above.

The data switching element SW_data applies the reference voltage Vref from the first data line DL1 to the gate electrode of the driving switching element Tr_DR in the blank period of the first frame. The data switching element SW_data applies the first data voltage from the first data line DL1 to the gate electrode of the driving switching element Tr_DR during the first horizontal period. To this end, the data switching element SW_data is controlled in accordance with the first gate signal GS1 from the first gate line GL1. The first gate signal GS1 is divided into a blank period of the first frame, 1 &lt; / RTI &gt; horizontal period, and remains inactive for the remaining horizontal period. Here, the data switching element SW_data may be turned on for some period other than the entire blank period of the first frame. In this case, the first gate signal GS1 may be turned on during a part of the blank period Only the active state is maintained.

The detection switching element SW_det detects the voltage of the anode electrode An in the blank period of the first frame as the threshold voltage of the driving switching element Tr_DR and provides it to the timing controller TC. The detection switching element SW_det detects the voltage of the anode electrode An as the deterioration data D_oled for the light emitting diode OLED during the first horizontal period and provides it to the timing controller TC. To this end, the data switching element SW_data is controlled in accordance with the first gate signal GS1 from the first gate line GL1 described above.

Since the storage capacitor Cst is the same as that of the first embodiment described above, a description thereof will be made with reference to the first embodiment described above.

Since the light emitting diode OLED is the same as that of the first embodiment described above, a description thereof will be made with reference to the first embodiment described above.

The operation of the first pixel PX1 will be described with reference to Figs. 8A and 9A to 9D.

8A to 8C illustrate various signals supplied to the first to third frames from the first to third horizontal line pixels connected in common to one first data line DL1 and their timing diagrams FIG. 9A to 9C are diagrams showing circuit states for each period of the pixel shown in FIG.

The pixel PX included in the LED display according to the second exemplary embodiment of the present invention includes a preparation period Tpr, a power supply change period Tc, a light emission / deterioration data detection period Te / d, And operates in accordance with the light emission sustain period Te. Accordingly, the gate signals and the scan signals change to the active state or the inactive state based on the sequential preparation period Tpr, the power source change period Tc, and the light emission / deterioration data detection period Te / d . The variable drive voltages are changed to a high voltage or a low voltage based on the sequentially prepared preparation period Tpr, power supply change period Tc, light emission / deterioration data detection period Te / d, and light emission sustain period Te do.

Here, the active state and the inactive state are the same as those of the first embodiment described above, and therefore, a description thereof will be made on the first embodiment described above. In the present invention, it is assumed that the above-described switching elements are all P-type transistors.

1) Preparation period ( Tpr )

First, with reference to FIGS. 8A and 9A, let us consider the operation of the first pixel PX1 in the preparation period Tpr.

Here, the preparation period Tpr of the first pixel PX1 is a period corresponding to the blank period BL of the first frame FR1 described above. For example, as shown in Fig. 8A, May be part of the back porch period included in the bit line BL.

8A, the first variable driving voltage VDD1 is held at a low voltage of 0 [V], the first gate signal GS1 is maintained in the active state, The reference voltage Vref is applied to one data line DL1. On the other hand, regardless of the horizontal period, the constant voltage VSS is always maintained at a constant value of 2 [V] during all horizontal periods.

With the signals in this state, both the data switching element SW_data and the detection switching element SW_det are turned on, as shown in Fig. 9A. Then, the reference voltage Vref is applied to the gate electrode of the drive switching element Tr_DR through the turn-on data switching element SW_data. On the other hand, since the voltage (2 [V] + Vth_oled (the threshold voltage of the light emitting diode OLED) of the anode electrode An is higher than the first variable drive voltage VDD1 of 0 [V] The electrode of the driving switching element Tr_DR connected to the first variable driving power supply line VDL1 becomes the source electrode and the electrode connected to the first variable driving power supply line VDL1 becomes the drain electrode. Then, the voltage (hereinafter, gate-source voltage) between the gate electrode and the source electrode of the driving switching element Tr_DR becomes smaller than 0, and the driving switching element Tr_DR is turned on. Thus, a current I flowing from the anode electrode An to the first variable drive power supply line VDL1 is generated through the turn-on drive switching element Tr_DR. Then, the voltage of the anode electrode An gradually decreases. That is, the voltage of the anode electrode An gradually decreases in the direction toward the threshold voltage Vth of the driving switching element Tr_DR, and eventually becomes equal to the threshold voltage at the end of the preparation period Tpr maintain. The driving switching element Tr_DR is turned off and the voltage of the anode electrode An is maintained at a value corresponding to the sum of the reference voltage Vref and the threshold voltage Vref + | Vth |. At this time, the voltage Vref + | Vth | of the anode electrode An is provided to the analog-to-digital converter ADC through the turn-on detection switching element SW_det and the first sensing line PL1. Here, since the reference voltage Vref is 0, the voltage of the anode electrode An at this time is substantially equal to the threshold voltage.

The analog-to-digital converter (ADC) converts the threshold voltage (Vth) into a digital signal and provides it to the timing controller (TC). At this time, the analog-to-digital converter ADC recognizes the voltage of the anode electrode An at the time when the first gate signal GS1 transitions from the active state to the inactive state as the threshold voltage Vth, Signal. Then, the timing controller TC generates the compensated image data by adding the digital converted threshold voltage to the image data (digital signal) corresponding to the nth pixel PXn, and stores it in an internal memory. On the other hand, the timing controller TC stores a deterioration compensation value (digital signal) corresponding to deterioration data (digital signal) of the first pixel PX1 generated in the previous frame, (Digital image data corresponding to the first horizontal period) of one pixel PX1. That is, the compensated image data may be generated by adding both the deterioration compensation value generated in the previous frame and the threshold voltage generated in the current frame to the image data.

2) Power change period ( Tc )

First, with reference to FIGS. 8A and 9B, let us consider the operation of the first pixel PX1 in the power supply change period Tc.

Here, the power supply change period Tc of the first pixel PX1 is a period included in the blank period BL of the first frame FR1 described above. For example, as shown in Fig. 8A, May be part of the back porch period included in the period BL. On the other hand, the power supply change period Tc is not completely included in the blank period BL but may be included only partially.

8A, the first variable drive voltage VDD1 is changed to a high voltage of 12 [V], the first gate signal GS1 is maintained in the inactive state, The reference voltage Vref is applied to the first data line DL1. Here, the first variable driving voltage VDD1 has to be changed to a high voltage before reaching the first horizontal period.

By the signals in such a state, both the data switching element SW_data and the detection switching element SW_det are turned off as shown in FIG. 9B. On the other hand, since the first variable drive voltage VDD1 of 12 [V] in this period is higher than the voltage Vth of the anode electrode An, the drive switching element Tr_DR connected to the first variable drive power supply line VDL1 Electrode serves as the source electrode and the electrode connected to the anode electrode An serves as the drain electrode. Then, the voltage (hereinafter, gate-source voltage) between the gate electrode and the source electrode of the driving switching element Tr_DR becomes larger than 0, and the driving switching element Tr_DR is turned on. Thus, a current I flowing from the first variable drive power supply line VDL1 toward the anode electrode An is generated through the turn-on drive switching element Tr_DR.

3) Luminescence / Deterioration data detection period ( Te / d)

First, with reference to FIGS. 8A and 9C, let us consider the operation of the first pixel PX1 in the light emission / deterioration data detection period Te / d.

Here, the light emission / deterioration data detection period Te / d of the first pixel PX1 is a period corresponding to one horizontal period of the first frame FR1. For example, as shown in FIG. 8A, 1 horizontal period (H1).

In the first horizontal period H1, the first variable drive voltage VDD1 is maintained at a high voltage of 12 [V], the first gate signal GS1 is changed to the active state, Then, the first data voltage D1 is applied to the first data line DL1. The first data voltage D1 is an analog signal for the video data of the first pixel PX1 compensated by the timing controller TC in the preparation period Tpr described above (hereinafter referred to as first video data) The first data voltage D1 can be regarded as a voltage obtained by adding the threshold voltage Vth to the original first data voltage. That is, in the first horizontal period H1, the timing controller TC supplies the first video data (compensated first video data) stored in the internal memory to the data driver DD, (DD) converts the first image data supplied from the timing controller TC into an analog signal using preset gamma voltages. That is, the data driver DD generates a first data voltage D1 (analog signal) for the first image data, and supplies the generated first data voltage D1 to the first data line DL1 do.

With the signals in this state, the data switching element SW_data and the detection switching element SW_det are both turned on, as shown in Fig. 9C. On the other hand, since the first variable drive voltage VDD1 of 12 [V] in this period is higher than the voltage Vth of the anode electrode An, the drive switching element Tr_DR connected to the first variable drive power supply line VDL1 Electrode serves as the source electrode and the electrode connected to the anode electrode An serves as the drain electrode. Then, the voltage (hereinafter, gate-source voltage) between the gate electrode and the source electrode of the driving switching element Tr_DR becomes larger than 0, and the driving switching element Tr_DR is turned on. Accordingly, a current Ioled flowing from the first variable drive power supply line VDL1 to the anode electrode An is generated through the turn-on drive switching element Tr_DR. This current is a drive current Ioled for causing the light emitting diode OLED to emit light and the magnitude of the drive current Ioled is the magnitude of the first data voltage D1 applied to the gate electrode of the drive switching device Tr_DR . This driving current Ioled is supplied to the light emitting diode OLED, so that the light emitting diode OLED starts to emit light. Meanwhile, the first data voltage (D1) supplied to the gate electrode of the driving switching element (Tr_DR) is stored by the storage capacitor (Cst). The first data voltage D1 stored by this storage capacitor Cst is held until another reference voltage Vref or a data voltage in the next frame is applied thereto.

On the other hand, the voltage of the anode electrode An is supplied to the analog-digital converter ADC through the turn-on detection switching element SW_det and the first sensing line PL1. The voltage of the anode electrode An at this time is affected by the driving current Ioled flowing to the light emitting diode OLED. The voltage of the anode electrode An detected in the first horizontal period H1 is lower than the voltage of the anode electrode An of the light emitting diode OLED, Degradation data D_oled indicating the degree of deterioration of the semiconductor memory device. The deteriorated data D_oled is supplied to an analog-to-digital converter (ADC) and converted into a digital signal. Then, the digitally converted deteriorated data D_oled is supplied to the timing controller TC. At this time, the timing controller TC calculates deterioration compensation values D_oled which are stored in advance in the internal look-up table based on the deteriorated data D_oled One deterioration compensation value set in accordance with the value of the deteriorated data D_oled is selected. Then, the final compensation value is calculated by adding the threshold voltage (digital signal) detected in the deterioration compensation value (digital signal) to the next period (i.e., the blank period BL of the (i + 1) th frame). Then, this final compensation value is added to the first image data (digital signal) of the (i + 1) -th frame to compensate the first image data of the (i + 1) -th frame, and the compensated first image data is stored in the internal memory do.

At this time, prior to selecting the deterioration compensation value, the timing controller TC first compares the deteriorated data D_oled with preset reference data. For example, if the n-th image data has a value corresponding to 250 gradations, the reference data set based on the same 250-gradation value is compared with the detected degradation data D_oled. If the deteriorated data D_oled has a value higher than the reference data by several percent or more, it is determined that the light emitting diode OLED is deteriorated, and deterioration is detected based on the magnitude of the difference between the deteriorated data D_oled and the reference data Select the compensation value. That is, the larger this difference is, the higher the value of the deterioration compensation value can be selected.

Here, the reference data for the above-mentioned 250 gradations is a sample having a normal sample light emitting diode (OLED) in which the n-th data voltage (compensated n-th data voltage) corresponding to the n-th image data of 250 gradations is not deteriorated It can be the voltage detected from the anode electrode An of the sample pixel while the sample light emitting diode OLED emits light.

On the other hand, the above-described lookup table can be configured for each color information of the image data. That is, the image data can be classified into red image data supplied to the red pixel R, green image data supplied to the green pixel G, and blue image data supplied to the blue pixel B, A lookup table for green image data, and a lookup table for blue image data may be separately prepared.

4) Luminescence retention period ( Te )

First, with reference to FIGS. 8A and 9D, let us consider the operation of the first pixel PX1 in the light emission sustain period Te.

Here, the light emission sustain period Te of the first pixel PX1 is a period from the second horizontal period H2 to just before the n-th gate signal GSn of the third frame becomes active again, Since the operation of the first pixel PX1 in each of the horizontal periods included in the period Te is the same, only the operation during the first half (fh) of the second horizontal period H2 will be representatively described.

In the second horizontal period H2, as shown in Fig. 8A, the first variable driving voltage VDD1 is maintained at a high voltage of 12 [V], and the first gate signal GS1 is maintained in an inactive state And the second data voltage D2 is applied to the first data line DL1. This second data voltage D2 is a data voltage required for the second pixel PX2 and this second data voltage D2 is data which has not yet been compensated for by the threshold voltage Vth. That is, in the first frame FR1, the second data voltage D2 is supplied to the second pixel PX2 in an uncorrected state, and is then corrected in the blank period BL of the second frame FR2.

With the signals in this state, the data switching element SW_data and the detection switching element SW_det are both turned off, as shown in Fig. 9D. At this time, the first data voltage D1 provided in the previous period (i.e., the first horizontal period H1) is held by the storage capacitor Cst in the gate electrode of the driving switching element Tr_DR. In addition, the first variable driving voltage VDD1 is maintained at a voltage of 12 [V] still higher than the voltage of the anode electrode An. Accordingly, the driving switching element Tr_DR maintains the turned-on state, and the driving current Ioled described above is supplied to the light emitting diode OLED through the turned-on driving switching element Tr_DR. Therefore, in this second horizontal period H2, the light emitting diode OLED of the nth pixel PXn maintains the light emitting state.

On the other hand, in the second horizontal period H2, the pixels of the second horizontal line HL2 connected to the first data line DL1 individually perform operations corresponding to the horizontal period. For example, in this second horizontal period H2, the second pixel PX2 starts to emit light in accordance with the second data voltage D2 (second data voltage which is not corrected).

Thus, the operation of one frame for the first pixel PX1 is completed. This first pixel PX1 also operates in the manner described above in the (i + 1) th frame.

The remaining pixels PX operate in the same manner as the first pixel PX1 in the frame. That is, the pixels of the nth horizontal line operate in the same manner as the first pixel PX1 in the nth frame. For example, as shown in FIG. 8B, the second pixel PX2 may reduce the voltage of the anode electrode An to a threshold voltage Vth during a part of the blank period BL of the second frame FR2 And detects the threshold voltage Vth and starts emitting light by the second data voltage D2 (the compensated second data voltage D2) in the second horizontal period H2 of the frame. The second pixel PX2 detects the threshold voltage Vth again in the blank period BL of the (i + 2) -th frame period.

8C, the third pixel PX3 drops the voltage of the anode electrode An to the threshold voltage Vth during a partial period of the blank period BL of the third frame FR3, And detects the threshold voltage Vth and starts emitting light by the third data voltage D3 (the compensated third data voltage D3) in the third horizontal period H3 of the frame. The third pixel PX3 detects the threshold voltage Vth again in the blank period BL of the (i + 3) -th frame period.

Thus, when the first to i-th frames have elapsed, the pixels of the first to i-th horizontal lines are all supplied with the data voltage compensated according to the threshold voltage. Since the data voltages are compensated in units of frames and horizontal lines, luminance deviations may occur for each pixel at least until the first to i-th frames have elapsed. This is because the data voltages are compensated by one horizontal line in frame units. However, since the first to i-th frames have elapsed, that is, after the (i + 1) -th frame, all the pixels are driven according to the compensated data voltage, so that the image quality is not degraded.

On the other hand, as another embodiment, a threshold voltage may be generated for a plurality of horizontal line pixels in the blank period BL of one frame. For example, the first pixel PX1 as well as the second pixel PX2 described above may simultaneously detect the threshold voltage Vth thereof in the blank period BL of the first frame FR1. To this end, one blank period BL is temporally divided into two preparation periods Tpr, and variable driving voltages and gate signals of different timings can be applied to each of the preparation periods Tpr. This will be described in detail with reference to FIG.

Fig. 10 is a diagram for explaining an example in which two preparation periods Tpr are set in one blank period BL.

The threshold voltage Vth can be sequentially detected in the first pixel PX1 and the second pixel PX2 in one blank period BL as shown in FIG. That is, in the first preparation period Tpr1 located in the first half of the blank period BL, the first pixel PX1 detects the threshold voltage Vth of the driving switching element Tr_DR provided in the first pixel PX1. The first variable driving voltage VDD1 is maintained at the low voltage and the first gate signal GS1 is maintained in the active state in the first preparation period Tpr1. The second pixel PX2 detects the threshold voltage Vth of the driving switching element Tr_DR provided in the second preparation period Tpr2 located in the latter half of the blank period BL. In the second preparation period Tpr2, the second variable driving voltage VDD2 is maintained at a low voltage and the second gate signal GS2 is maintained in an active state.

It is also possible to detect threshold voltages for three or more pixels by dividing one blank period BL temporally into three or more preparation periods, as shown in Fig.

According to the second embodiment of the present invention, since one gate signal is simultaneously applied to the data switching element SW_data and the detection switching element SW_det, no separate scan signal is required. Therefore, since the scan driver SD for generating a scan signal and the scan lines for transmitting the scan signals are not required, the manufacturing cost can be reduced and the wiring structure can be simplified.

11 is a diagram illustrating a result of a simulation test using a light emitting diode display device according to a first embodiment of the present invention.

At this time, a FHD (full high definition) class LED display device was used in this simulation, and one horizontal period (1H) was set to 13.5us. And the preparation period (Tpr) was set at 250us. On the other hand, a storage capacitor Cst having a capacitance of 200 fF was used for the pixel, and a capacitor of the light emitting diode OLED was set to 3 pF.

11 shows the waveforms of a plurality of reference voltages Vref and data voltages supplied to the m-th data line DLm, and the n-th pixel PXn has a first operation (1), a third operation The reference voltage Vref of 0 [V] is supplied to the m-th data line DLm and the n-th pixel PXn is driven in accordance with the second operation ((3)) and the fifth operation Data voltages of 5 [V] are supplied to the m-th data line DLm when driven according to the third operation (2) and the third operation (3). Here, the data voltage of the hatched portion is the n-th data voltage Dn necessary for the n-th pixel PXn, which is the n-th data voltage Dn when the n-th pixel PXn is driven according to the fourth operation DLm).

11 (b) shows the waveform of the n-th variable driving voltage VDDn. This is because the n-th pixel PXn is divided into the first operation (1), the second operation (2) And is maintained at a high voltage of 12 [V]. On the other hand, this is maintained at a low voltage of 0 [V] when the nth pixel PXn is driven according to the fourth operation (4) and the fifth operation (5).

11C shows the waveform of the n-th gate signal GSn. This is because the n-th pixel PXn is divided into the first operation (1), the second operation (2), the third operation And is kept in the active state of -5 [V] when driven according to the fourth operation (4). On the other hand, this is maintained in an inactive state of 13 [V] when the n-th pixel PXn is driven according to the fifth operation (5).

11 (d) shows the waveform of the n-th scan signal SSn. This is because when the n-th pixel PXn is driven according to the first operation (1) and the second operation (2) ]. &Lt; / RTI &gt; On the other hand, it remains in the active state of -5 [V] when the n-th pixel PXn is driven according to the third operation (3), the fourth operation (4) and the fifth operation (5).

11E shows the voltage waveforms of the anode electrode An for three different pixels. Each time when the n-th pixel PXn is driven by the first operation (1) The value is gradually decreasing. On the other hand, each time the n-th pixel PXn is driven in the second operation (2), the voltage value at the previous first operation (1) is maintained.

In FIG. 11 (f), the voltage waveforms of the sensing lines for three different pixels are shown, each of which corresponds to the threshold voltage when the n-th pixel PXn is driven according to the third operation . Then, each is raised to a value corresponding to the deteriorated data D_oled when the n-th pixel PXn is driven according to the fourth operation (4).

11 (g) shows waveforms of currents (currents supplied to the light emitting diodes OLED) for three different pixels, in which each of the n-th pixel PXn is in a first operation (1) And is maintained at a negative value when driven according to the second operation (2) and the third operation (3). On the other hand, each is held at a high positive value when the n-th pixel PXn is driven according to the fourth operation (4) and the fifth operation (5). Here, the negative polarity means that the current flows to the variable power line side, not the light emitting diode OLED. In this case, the light emitting diode OLED does not emit light. On the other hand, when the current is positive, current is supplied to the light emitting diode OLED, and the light emitting diode OLED emits light.

12 is a graph showing the magnitude of the threshold voltage detected according to the amount of variation of the threshold voltage based on the simulation in FIG.

12, when the threshold voltage of the driving switching element changes from the reference value (0.0 [V]) to a smaller value or to a higher value, the value of the threshold voltage detected from the anode electrode also changes with the variation? Vth (The amount of variation of the threshold voltage). At this time, it was observed that the value of this threshold voltage changed correctly as set in the simulation.

13 is a graph showing a deviation of the driving current Ioled for each gradation according to the amount of variation of the threshold voltage in the LED display device according to the first embodiment of the present invention.

As shown in Fig. 13, when the threshold voltage changes from the reference value (0.0 [V]) to a smaller value or to a higher value, the deviation between the driving currents Ioled generated according to the data voltage of black gradation And the deviation between the driving currents Ioled generated according to the data voltage of the gray gradation is about 2.835% and the driving current Ioled generated according to the data voltage of the white gradation is about 437.3% And the deviation between them is about 0.192%. That is, according to the present invention, it can be seen that the deviation between the driving currents Ioled in the white gradation is considerably small and the level of deviation is very good.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of.

SYS: System TC: Timing controller
DD: Data driver GD: Gate driver
SD: scan driver PS: power supply
ADC: analog-to-digital converter GL #: # gate line
DL #: Primary Data Line SL #: Primary Scan Line
PL #: No. # Detection Line DSP: Display
PX: pixel VDD #: variable drive voltage
VSS: Constant voltage HL #: No. # Horizontal line

Claims (23)

First to i &lt; th &gt; pixels (i is a natural number greater than 1) connected in common to the data lines;
A timing controller for compensating for the value of the image data to be supplied to the n-th pixel based on the threshold voltage of the drive switching element detected from the n-th pixel and outputting the compensated image data; And
And a data driver for generating a data voltage based on the video data from the timing controller and sequentially supplying a reference voltage and a data voltage necessary for the nth pixel in the nth horizontal period to the data line;
The n-th pixel includes the reference voltages and the data voltages supplied to the data line during the (n-1) -th horizontal period (x is a natural number smaller than 1 or k) to the n-1-th horizontal period, Wherein the threshold voltage of the driving switch element is detected based on the reference voltage supplied to the line, and the detected voltage is provided to the timing controller. The method according to claim 1,
Th pixel,
A driving switching element connected between an n-th variable driving power supply line for transmitting an n-th variable driving voltage and an anode electrode of the light emitting diode, the driving switching element being controlled according to a data voltage applied to its gate electrode;
A data switching element for applying reference voltages and data voltages from the data line to the gate electrode of the driving switching element during the nx-th horizontal period to the n-th horizontal period;
A detection switching element for detecting the voltage of the anode electrode as the threshold voltage of the driving switching element during the n-th horizontal period and providing it to the timing controller; And
And a storage capacitor connected between the gate electrode of the drive switching element and the n-th variable drive power supply line;
Wherein the cathode electrode of the light emitting diode is connected to a positive power supply line for transmitting a positive voltage. 3. The method of claim 2,
Each of the first through i-th horizontal periods is divided into a first half where a reference voltage is supplied to the data line and a second half in which a data voltage is applied to the data line; And,
Wherein the detection switching element provided in the nth pixel supplies the voltage of the anode electrode to the timing controller in the first half of the nth horizontal period. The method of claim 3,
The data driver supplies a data voltage corresponding to the n-th pixel to the data line in the second half of the n-th horizontal period; And,
Wherein the detection switching element included in the nth pixel further detects the voltage of the anode electrode in the second half of the nth horizontal period as deterioration data for the light emitting diode and provides the detected voltage to the timing controller Emitting diode display. 5. The method of claim 4,
First to i-th gate lines separately connected to the first to i-th pixels, and first to i-th scan lines individually connected to the first to i-th pixels, respectively;
A data switching element provided in the n-th pixel is controlled according to an n-th gate signal from an n-th gate line; And,
And the detection switching element provided in the n-th pixel is controlled according to an n-th scan signal from the n-th scan line. 6. The method of claim 5,
The n-th gate signal remains active during the n-th horizontal period to the n-th horizontal period, and remains inactive during the remaining horizontal periods; And,
Wherein the nth scan signal is maintained in an active state during the nth horizontal period and remains inactive during a remaining horizontal period. 5. The method of claim 4,
Wherein the timing controller compensates image data based on the threshold voltage and deterioration data. 8. The method of claim 7,
The timing controller includes:
Comparing the preset reference data with the deteriorated data, calculating a deterioration compensation value for the video data based on the comparison result, and adding the calculated deterioration compensation value and the threshold voltage to the video data, And compensates the data. The method of claim 3,
The data driver supplies a data voltage corresponding to the n-th pixel to the data line in the second half of the n-th horizontal period; And,
The detection switching element included in the nth pixel detects the voltage of the anode electrode as deterioration data for the light emitting diode in the second half of the n-th horizontal period (y is a natural number smaller than kx) and provides the detected voltage to the timing controller Wherein the operation of the light emitting diode is further performed. 10. The method of claim 9,
First to i-th gate lines separately connected to the first to i-th pixels, and first to i-th scan lines individually connected to the first to i-th pixels, respectively;
A data switching element provided in the n-th pixel is controlled according to an n-th gate signal from an n-th gate line; And,
And the detection switching element provided in the n-th pixel is controlled according to an n-th scan signal from the n-th scan line. 11. The method of claim 10,
The n-th gate signal remains active during the n-th horizontal period to the n-th horizontal period, and remains inactive during the remaining horizontal periods; And,
Wherein the n-th scan signal is maintained in an active state in a first half of the n-th horizontal period and a second half of the n-th horizontal period, and remains inactive during a remaining horizontal period. 3. The method of claim 2,
Further comprising first to i-th variable drive voltages for supplying the first to i-th pixels, and a power supply for generating the constant voltage; And,
Wherein the nth variable driving voltage supplied to the nth pixel is maintained at a value smaller than the constant voltage during the first nx horizontal period to the (n-1) th horizontal period and the first half of the nth horizontal period, Wherein the constant voltage is maintained at a value greater than the constant voltage from the second half. 13. The method of claim 12,
And the value of the nth variable driving voltage is equal to the reference voltage when the nth variable driving voltage is a value smaller than the constant voltage. 14. The method of claim 13,
The reference voltage is defined by the following equation (1);
&Quot; (1) &quot; 0 Vref <VSS + Vth_oled - Vth_Dr
Wherein Vref denotes a reference voltage, VSS denotes a constant voltage, Vth_oled denotes a threshold voltage of the light emitting diode, and Vth_Dr denotes a threshold voltage of the driving switching element. First to i &lt; th &gt; pixels (i is a natural number greater than 1) connected in common to the data lines;
A timing controller for compensating for the value of the image data to be supplied to the n-th pixel based on the threshold voltage of the drive switching element detected from the n-th pixel and outputting the compensated image data; And
And a data driver for generating a data voltage based on the video data from the timing controller and supplying a data voltage necessary for the n-th pixel to the data line in the n-th horizontal period;
Wherein the nth pixel detects the threshold voltage of the internal driving switch element based on the reference voltage supplied to the data line in a part of the blank period of the nth frame and provides the detected voltage to the timing controller. . 16. The method of claim 15,
Th pixel,
A driving switching element connected between an n-th variable driving power supply line for transmitting an n-th variable driving voltage and an anode electrode of the light emitting diode, the driving switching element being controlled according to a data voltage applied to its gate electrode;
N-th frame period during a n-th horizontal period, and applying a reference voltage from the data line to a gate electrode of the driving switching element in a part of a blank period of the n-th frame, A data switching element to be applied to the gate electrode of the device;
The voltage of the anode electrode is detected as a threshold voltage of the driving switching element during a part of the blank period of the n-th frame and provided to the timing controller, and the voltage of the anode electrode during the n- A detection switching element for detecting as deterioration data for a diode and providing it to the timing controller; And
And a storage capacitor connected between the gate electrode of the drive switching element and the n-th variable drive power supply line;
Wherein the cathode electrode of the light emitting diode is connected to a positive power supply line for transmitting a positive voltage. 17. The method of claim 16,
Further comprising first through i-th gate lines individually connected to the first through i-th pixels, respectively; And,
Wherein the data switching element and the detection switching element provided in the nth pixel are controlled according to an n-th gate signal from the n-th gate line. 18. The method of claim 17,
Wherein the n-th gate signal is maintained in an active state during a partial period of the blank period and the n-th horizontal period in the n-th frame, and remains inactive during the remaining horizontal period. 19. The method of claim 18,
Further comprising first to i-th variable drive voltages for supplying the first to i-th pixels, and a power supply for generating the constant voltage; And,
Wherein the n-th variable driving voltage supplied to the n-th pixel is maintained at a value smaller than the constant voltage during a part of the blank period in the n-th frame, and after a part of the blank period in the n- n is maintained at a value greater than the constant voltage before reaching the n horizontal period. 20. The method of claim 19,
And the value of the nth variable driving voltage is equal to the reference voltage when the nth variable driving voltage is a value smaller than the constant voltage. 21. The method of claim 20,
The reference voltage is defined by the following equation (1);
&Quot; (1) &quot; 0 Vref <VSS + Vth_oled - Vth_Dr
Wherein Vref denotes a reference voltage, VSS denotes a constant voltage, Vth_oled denotes a threshold voltage of the light emitting diode, and Vth_Dr denotes a threshold voltage of the driving switching element. 16. The method of claim 15,
Wherein the remaining blank periods except for the partial period of the blank period of the n-th frame are divided into at least two periods; And,
And at least two pixels connected to the data line and different from the n-th pixel are connected to the data line, and the threshold voltage of each of the driving switching elements provided in the data line, based on the reference voltage supplied to the data line during the at least two periods And sequentially provides the detected light to the timing controller. 16. The method of claim 15,
And the nth pixel detects a threshold voltage of the driving switching element at the end of the partial period.

Images