KR20140039393A - Doping method for semiconductor nanostructure - Google Patents

Abstract

The purpose of the present invention is to provide a doping method for easily performing a doping process in a semiconductor nanostructure. According to one aspect of the present invention, provided is a doping method of a semiconductor nanostructure which includes a step of preparing a substrate where a semiconductor nanostructure is formed on at one surface; a step of arranging a doping member where a coating layer which is separated from the substrate and includes dopants which is formed in the upper part of the semiconductor nanostructure is formed; a step of supplying the dopants included in the coating layer to the semiconductor nanostructure by a thermal process.

Description

Doping method for semiconductor nanostructure

The present invention relates to a method of doping a semiconductor, and more particularly, to a method of doping a predetermined dopant with a semiconductor nanostructure.

Conventional silicon-based semiconductor devices have successfully achieved line widths of several tens of nanometers (nm) using top-down lithography. It is expected that it will be very difficult to realize the line width of nm in terms of the difficulty of the process and the stability of the device characteristics. Recently, nanostructures of various shapes, such as nanoparticles, nanowires, nanowires (or nanorods), and nanobelts, have been proposed as a solution for solving these problems. For example, nanowires, one-dimensional nanostructures with very high aspect ratios, have new physical and chemical properties not only in size but also due to their single crystallinity, but also have area density, surface protection, electron injection, and device processing. Due to its ease of use, it has been the subject of intensive research by domestic and overseas nanotechnology research groups, and is recognized as a very promising building block for implementing bottom-up semiconductor nanodevices.

Among the nanostructures, semiconductor nanostructures are called semiconductor nanostructures, and these semiconductor nanostructures are building blocks that can be applied to various fields such as photodiode devices, piezoelectric devices, transistors, LEDs, and solar cells. In this case, since it is possible to realize high integration of semiconductor devices at low cost, it has emerged as an alternative to the existing silicon-based semiconductor devices.

1. Republic of Korea Patent Publication No. 10-2010-0088273 2. Korean Patent Publication No. 10-2011-0135293

However, nanostructures having various shapes have a problem that it is not easy to control the doping of the dopant in the device manufacturing step. For example, ZnO, an oxide semiconductor, generally exhibits n-type characteristics, and when it is implemented as a nanostructure such as nanowires, it is known to be difficult to dope it with p-type.

The present invention has been made to solve various problems including the above problems, and an object of the present invention is to provide a doping method for easily performing doping in a semiconductor nanostructure. However, these problems are exemplary and do not limit the scope of the present invention.

According to an aspect of the invention, preparing a substrate having a semiconductor nanostructure formed on at least one surface; Disposing a doping member having a coating layer including a dopant spaced apart from the substrate on the semiconductor nanostructure; And supplying the dopant included in the coating layer to the semiconductor nanostructure through heat treatment.

In this case, the doping member may be the coating layer formed on at least one surface of the support member, the coating layer is coated on at least one surface of the support member by the precursor coating containing the dopant by spin coating or spray coating method It may be prepared.

The semiconductor nanostructure may include 0-dimensional, 1-dimensional and 2-dimensional nanostructures.

 The semiconductor nanostructure may include any one of a single element, an oxide semiconductor, and a compound semiconductor.

At this time, it may include ZnO, MgO, CdO, and the compound semiconductor may include ZnSe, ZnS, BN, AlN, AlAs, AlP, GaN, GaP, GaAs, InN, InP, InAs. In addition, the dopant doped thereto may include N, P, As, Sb, Li, Na, K, Ag, Cu, B, Al, Ga, In.

Meanwhile, the method of doping the nanostructure of the semiconductor may further include disposing a spacer for maintaining a separation distance between the substrate and the doping member.

In addition, supplying the dopant to the semiconductor nanostructure may be performed in an oxygen atmosphere in which oxygen or an inert gas is mixed in a predetermined ratio.

According to one embodiment of the present invention made as described above, doping can be easily performed in various structures regardless of the shape of the nanostructures. In addition, it is possible to easily control the doping depth of the dopant by adjusting the temperature and time in the heat treatment process.

The effects of the present invention are not limited to those mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art from the following description.

1 is a flowchart of a doping method according to an embodiment of the present invention.
2 is a schematic diagram illustrating an implementation of a doping method according to an embodiment of the present invention.
Figure 3 is a surface and cross-sectional photographs observed the change of the ZnO nanowire structure according to the heat treatment temperature in the dopant supply step.
Figure 4 is a result of measuring the PL (Photoluminescence) spectrum of ZnO nanowires according to the heat treatment temperature in the dopant supply step.
5 is a result of observing the pn diode characteristics of the ZnO nanowires according to the experimental and comparative examples of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be understood, however, that the invention is not limited to the disclosed embodiments, but may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, Is provided to fully inform the user. Also, for convenience of explanation, the components may be exaggerated or reduced in size.

In the following embodiments, the semiconductor nanowire (or nanowire, nanorod) having a one-dimensional structure as an example of the semiconductor nanostructure is exemplified, but the present invention is not limited thereto. Of course, it can be applied to other semiconductor nanostructures such as two-dimensional nanostructures such as sheets.

1 is a flowchart illustrating a sequence of a doping method according to an embodiment of the present invention, and FIG. 2 schematically illustrates a state of implementing a doping method according to an embodiment of the present invention. In this case, the structures of FIG. 2 are disposed in a vacuum capable chamber (not shown), and the doping method of FIG. 2 may be performed in the vacuum chamber.

1 and 2, first, a substrate 100 having semiconductor nanowires 110 formed on at least one surface thereof is prepared (S1).

At least one surface of the substrate 100 constitutes a support surface that enables growth of the semiconductor nanowires 110 having a one-dimensional vertical structure. In this case, the substrate 10 may be used in a semiconductor process, and may be a conventional material as long as it is a thermally and chemically stable material. For example, a semiconductor, a metal, an insulator substrate, or the like may be used, and silicon, glass, plastic, or polymer may be used.

The semiconductor nanowire 110 has a diameter of 100 nm or less, has a length of several micrometers to several tens of micrometers, and has a one-dimensional structure having a high aspect ratio. The semiconductor nanowire 110 may be manufactured by forming a seed layer (not shown) on one surface of the substrate 100 and growing it in a direction perpendicular to one surface of the substrate 100 to the top of the seed layer. The semiconductor nanowires 110 may be manufactured by a method such as a vapor phase growth method or a hydrothermal synthesis method. At this time, the semiconductor nanowires 110 may be grown in a single crystal form by epitaxial growth from the seed layer.

The semiconductor nanowire 110 includes all materials having semiconductor characteristics, for example, a single element such as Si, Ge, an oxide semiconductor such as ZnO, MgO, CdO, ZnSe, ZnS, BN, AlN, AlAs, AlP, Compound semiconductors such as GaN, GaP, GaAs, InN, InP, InAs, etc. may be included.

 Next, the doping member 140 formed with a coating layer 120 including a dopant is disposed on the semiconductor nanowire 110 spaced apart from the substrate 100 (S2). In this case, the doping member 140 may have a coating layer 120 formed on at least one surface of the supporting member 130.

The coating layer 120 may be formed of the matrix 121 and the dopant 122 included in the matrix 121. In this case, the coating layer 120 may be prepared by spin coating or spray coating a precursor including the dopant 122 on one surface of the support member 130. The dopant 122 may be appropriately selected depending on the material of the semiconductor nanowire 110 to be doped and the desired doping type. For example, when the semiconductor nanowire 110 made of ZnO is to be doped with p-type, N, P, As, Sb, Li, Na, K, Ag, as a dopant 122 in the coating layer 120 Cu, B, Al, Ga, In may be included.

Next, the dopant 122 included in the coating layer 120 is externally diffused through the heat treatment to the outside of the coating layer 120 and then supplied to the semiconductor nanowires 110 formed on the substrate 100 as shown by the arrow D of FIG. 2. (S3). The dopant 122 supplied to the semiconductor nanowires 110 diffuses into the semiconductor nanowires 110 to dope the semiconductor nanowires 110 to change electrical characteristics. For example, when P is supplied to the semiconductor nanowire 110 made of n-type ZnO, the semiconductor nanowire 110 made of p-type ZnO may be obtained by P doping.

In this case, supplying the dopant 122 to the semiconductor nanowire 110 may be performed in an oxygen atmosphere chamber in which an inert gas such as oxygen, argon, or nitrogen is mixed.

 The supply amount and the doping depth of the dopant 122 can be controlled by adjusting the temperature and time during the heat treatment. That is, the dopant is diffused into the semiconductor nanowire 110, wherein the doping depth d due to diffusion may be expressed as a function of the diffusion coefficient D and the time t as shown in Equation 1 below, where the diffusion coefficient D is As a function, the depth of doping by diffusion can be controlled by controlling the temperature and time.

Equation 1:

The method may further include disposing a spacer 150 between the substrate 110 and the doping member 140 to maintain a proper spacing between the substrate 110 and the doping member 140. The distance between the semiconductor nanowire 120 of the substrate 110 and the coating layer 120 of the doping member 140 can be uniformly spaced due to the spacers 150 and thus the doping process can be performed stably.

According to the embodiment of the present invention, the doping member 140, which is a source of the dopant 122, is spaced from the semiconductor nanowire 110 to be doped by a certain distance. Therefore, after the heat treatment is completed, The doping process can be completed by moving the doping member 140 from above the semiconductor nanowire 110.

In order to dope the semiconductor nanowires, the coating layer containing the dopant is directly coated on the semiconductor nanowires, and when the dopant is diffused into the semiconductor nanowires by doping, the coating layer must be removed after the heat treatment is completed. You have to go through the steps. That is, the coating layer is a necessary element only for supplying the dopant, and is not an element constituting the actual semiconductor device, so it must be removed after the doping process.

In this case, the coating layer should be chemically removed using an etching material. In this case, the residue of the coating layer may remain even after etching, and if excessively etched, the semiconductor nanowire under the coating layer may be damaged. .

However, according to the embodiment of the present invention, the coating layer is not directly in direct contact with the nanowires, and the doping is performed in a spaced state. When the doping process is completed, the doping member only needs to move the coating layer to another area. As in the case of direct coating, there is no problem of removing the coating layer.

Hereinafter, experimental examples are provided to facilitate understanding of the present invention. It should be understood, however, that the following examples are for the purpose of promoting understanding of the present invention and are not intended to limit the scope of the present invention.

ZnO nanowires were grown on a substrate to prepare a specimen according to the experimental example, and then a doping process was performed according to the embodiment of the present invention. ZnO is a II-VI oxide semiconductor material, has a wide direct band gap of 3.37 eV and excitation binding energy of 60 mV, is easy to synthesize, and has excellent electrical and optical properties. It is used in semiconductor elements, optical elements, and the like. ZnO generally exhibits n-type semiconductor properties and is known to be difficult to dop p-type.

In order to manufacture the doping member, the support member used an n-type silicon substrate doped with P. The P or As dopant was placed on a 3 ml standard of 4 inch silicon substrate, and then coated at 3000 rpm for 1 minute by spin coating. Thereafter, a heat treatment was performed at 200 ° C. on a hot plate for 10 minutes to form a doping member having a coating layer formed thereon.

3 shows the surface and cross-sectional observation results of the ZnO nanowires formed on the substrate after the doping process is performed according to an embodiment of the present invention. Hereinafter, the coating layer of the doping member was manufactured by spin coating, and the doping process using the doping member may be referred to as a spin on doping (SOD) heat treatment in that the doping member is heated to supply the dopant from the coating layer. Can be.

3A and 3B are observation results immediately after ZnO is grown, and FIGS. 3C and 3D are observation results after performing a heat treatment at 450 ° C. during the doping process, and FIGS. 3E and 3F are observation results after performing at 500 ° C. Figure 3g, 3h is an observation result after performing at 550 ℃.

Referring to FIG. 3, when the heat treatment temperature is 550 ° C. during the doping process, ZnO is melted and the structures of the nanowires are melted together to be damaged. From this, the heat treatment temperature is maintained below 550 ° C. during the doping process. Was necessary.

Figure 4a shows the results of the PL spectrum measurement according to the heat treatment temperature during the doping process (ie, SOD heat treatment atmosphere) in the nitrogen (75wt%) and oxygen (25wt%) atmosphere, Figure 4b is a rapid heat treatment of the specimen complete SOD heat treatment Rapid thermal annealing (RTA) results in heat treatment at 800 ° C for 3 minutes in an Ar atmosphere.

Referring to FIG. 4A, ZnO doping did not occur in a temperature range of 400 ° C. or more and 475 ° C. or less after the heat treatment in an atmosphere of nitrogen (75 wt%) and oxygen (25 wt%) or Ar. p-type ZnO was formed and an FA peak was observed at 3.331 eV. This is considered to be because doping did not occur substantially at low temperatures.

Referring to FIG. 4B, since there is no change in the PL spectrum even after the RTA, it can be seen that doping and activation are simultaneously performed only by the SOD heat treatment. The p-ZnO layer made by another conventional method does not show p-type characteristics after activation after the doping process through an RTA process, but the nanowires manufactured through the experimental example of the present invention have a single doping process. It can be seen that only the p-type characteristic can be obtained. Therefore, there is an advantage that can reduce the process step compared to the prior art.

3 and 4, in the case of ZnO nanowires, considering the melting and doping of ZnO, the heat treatment temperature for supplying the dopant should be higher than 475 ° C and lower than 550 ° C.

Figure 5 shows the pn diode characteristics of p-type ZnO nanowires and n-type silicon heat-treated at 500 ℃. As a comparative example, the electrical properties of the undoped ZnO were compared.

Referring to FIG. 5, p-ZnO doped according to the present experimental example showed n-type silicon and pn diode characteristics, but pn diode characteristics were not shown in undoped ZnO, which is a comparative example.

While the present invention has been described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

100: substrate 110: semiconductor nanowire
120: coating layer 121: matrix
122: dopant 130: support member
140: doping member 150: spacer

Claims (10)

Preparing a substrate having a semiconductor nanostructure formed on at least one surface;
Disposing a doping member having a coating layer including a dopant spaced apart from the substrate on the semiconductor nanostructure; And
Supplying a dopant included in the coating layer to the semiconductor nanostructure through heat treatment;
Doping method of the semiconductor nanostructure, including. The method of claim 1,
The doping member is a semiconductor nanostructure doping method, wherein the coating layer is formed on at least one surface of the support member. 3. The method of claim 2,
The coating layer is prepared by coating a precursor including the dopant on at least one surface of the support member by a spin coating method or a spray coating method, the semiconductor nanostructure doping method. The method of claim 1,
The semiconductor nanostructure comprises a 0-dimensional, one-dimensional and two-dimensional nanostructures, semiconductor nanostructures doping method. 5. The method of claim 4,
The semiconductor nanostructure comprises any one of a single element, oxide semiconductor and compound semiconductor, doping method of a semiconductor nanostructure. 6. The method of claim 5,
The oxide semiconductor comprises ZnO, MgO, CdO, doping method of a semiconductor nanostructure. 6. The method of claim 5,
The compound semiconductor comprises ZnSe, ZnS, BN, AlN, AlAs, AlP, GaN, GaP, GaAs, InN, InP, InAs, semiconductor nanostructure doping method. The method according to claim 5 or 6,
The dopant includes N, P, As, Sb, Li, Na, K, Ag, Cu, B, Al, Ga, In. The method of claim 1,
And disposing a spacer for maintaining a separation distance between the substrate and the doping member. The method of claim 1,
The step of supplying the dopant to the semiconductor nanostructures is a method of doping semiconductor nanostructures is carried out in an oxygen atmosphere mixed oxygen or inert gas in a certain ratio.

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