KR20130104035A

KR20130104035A - Chip inductor and method of manufacturing the same

Info

Publication number: KR20130104035A
Application number: KR1020120025163A
Authority: KR
Inventors: 임봉섭
Original assignee: 삼성전기주식회사
Priority date: 2012-03-12
Filing date: 2012-03-12
Publication date: 2013-09-25

Abstract

The present invention relates to a chip inductor and a method of manufacturing the same. In a chip inductor including a stack including a coil electrode and a pair of external electrode terminals connected to both ends of the coil electrode, the stack includes an internal electrode pattern. A pair of external electrode patterns are formed of a plurality of insulating sheets printed on one surface, and the internal electrode patterns printed on the respective insulating sheets are connected to each other through vias to form coil electrodes, and the external electrodes printed on the respective insulating sheets. The pattern is connected to each other by lamination to provide a chip inductor and a method of manufacturing the same to form an external electrode terminal. Accordingly, the external electrode terminal does not need to be provided separately, thereby providing an effect of increasing inductance compared to the conventional chip inductor.

Description

CHIP INDUCTOR AND METHOD OF MANUFACTURING THE SAME

The present invention relates to a chip inductor and a method of manufacturing the same. More particularly, the present invention relates to a chip inductor printed with an internal electrode pattern and an external electrode pattern forming a coil electrode and an external electrode terminal, and a method of manufacturing the same.

An inductor is one of the important passive components that make up electronic circuits along with resistors and capacitors. It is used as a component to remove noise or form an LC resonant circuit. Such an inductor is classified into a winding type manufactured by winding a coil or printing on a ferrite core and forming electrodes at both ends, and a laminated type manufactured by laminating an internal electrode pattern on an insulating sheet of a magnetic material or a dielectric. Can be.

Conventionally, the winding inductor is mainly used, but in the case of the winding inductor, the ferrite core is manufactured by molding the ferrite powder by powder compression molding, etc., and then producing the ferrite core, which makes it difficult to mass-produce the size and volume of the finished product. There is a problem that can not be used in a small electronic device is large.

Accordingly, in recent years, multilayer inductors have been widely used. In the case of the wound inductor, unlike the wound inductor, its outer shape is small, and has a thin chip shape, corresponding to the miniaturization and thinning of electronic equipment. Such a multilayer inductor is widely used as a power inductor constituting a power supply circuit of an electronic device, for example, a DC-DC converter.

The structure of a general multilayer inductor is well shown, for example, in Korean Patent Laid-Open Publication No. 2001-0085376.

The conventional general multilayer inductor is manufactured in the form of a laminate in which a plurality of insulating sheets made of a ferrite or low dielectric constant dielectric material are laminated. On the insulating sheet, internal electrode patterns in the form of coils are printed. The internal electrode patterns printed on each insulating sheet are sequentially connected by conductive vias formed in each insulating sheet, and coils having a spiral structure are overlapped in the stacking direction. Form an electrode. Both ends of the coil electrode are drawn out to the outer surface of the laminate and electrically connected to a pair of external electrode terminals provided at both ends of the laminate. In addition, nickel (Ni) and tin (Sn) plating layers are sequentially formed on the external electrode terminals to protect the external electrode terminals from solder and to enhance solderability. That is, since the internal electrode pattern forming the coil electrode in the conventional multilayer inductor is connected to an external circuit through the external electrode terminal, the external electrode terminals must be provided at both ends of the laminate.

However, as the chip inductor is miniaturized, the external electrode terminal may cause a poor size or poor appearance of the inductor. Generally, the required size of the chip inductor is 0.4mm. If the thickness of the external electrode terminal is not controlled, the overall size of the chip inductor may lead to a size defect exceeding 0.4mm. Even if it is set to 0.4mm, the horizontal size of the external electrode terminal and the horizontal size of the laminate in which the coil electrode is formed may lead to appearance defects that do not meet the standard.

In the process of applying the conductive slurry for forming the external electrode terminals to both ends of the laminate, the conductive slurry is spread to the laminate in which the coil electrodes are formed, and thus, the internal electrode pattern to be electrically separated from the external electrode terminals. A short phenomenon connected to the external electrode terminal may occur. Such a short phenomenon between the internal electrode pattern and the external electrode terminal may often occur due to a misoperation not only in the external electrode terminal application process but also in the lamination process or the cutting process.

In addition, due to the presence of the external electrode terminal, the space of the laminate is inevitably reduced, which leads to a problem of lowering the capacity of the inductor.

In addition, in the case of the nickel (Ni) plated layer, a thickness of 1 to 7 μm and the tin (Sn) plated layer should be formed to have a thickness of 3 to 15 μm.

In addition, the presence of the external electrode terminal interferes with the flow of the magnetic field generated by the coil electrode, thereby causing a capacity reduction problem.

Patent Document: Republic of Korea Patent Publication No. 2001-0085376

An object of the present invention is to provide a chip inductor formed of an insulating sheet on which both an internal electrode pattern and an external electrode pattern are printed, and a method of manufacturing the same.

In order to achieve the above object, the present invention provides a chip inductor including a stack including a coil electrode and a pair of external electrode terminals connected to both ends of the coil electrode. A pair of external electrode patterns are formed of a plurality of insulating sheets printed on one surface, and the internal electrode patterns printed on each insulating sheet are connected through vias to form coil electrodes, and the external electrodes printed on the respective insulating sheets. The pattern provides a chip inductor, which is connected to each other by lamination to form external electrode terminals.

In this case, the external electrode patterns printed on the insulating sheets are printed such that a part thereof protrudes to the outside, and a part of the external electrode patterns which are connected to each other by lamination to form an external electrode terminal.

The chip inductor further includes a pair of metal layers covering a portion of the protruding external electrode patterns.

In addition, a lead pattern electrode printed on one surface of the insulating sheet positioned on the uppermost layer and connecting the inner electrode pattern and the first outer electrode pattern printed on the insulating sheet positioned on the uppermost layer; And a lead pattern electrode printed on one surface of the insulating sheet positioned on the lowermost layer and connecting the inner electrode pattern and the second external electrode pattern printed on the insulating sheet positioned on the lowermost layer.

In addition, the pair of external electrode patterns provide a chip inductor, which is printed on the same side of each insulating sheet.

In addition, the upper and lower outer cover sheets are provided on the upper surface of the insulating sheet positioned on the uppermost layer and the lower surface of the insulating sheet located on the lowermost layer; further provides a chip inductor.

In addition, an inner cover sheet having a pair of external electrode patterns printed on one surface between the insulating sheet and the upper outer cover sheet positioned on the uppermost layer and between the insulating sheet and the lower outer cover sheet positioned on the lowermost layer; Further comprising, a chip inductor is provided.

Also. The chip inductor further comprises a; marking pattern printed on one surface of each insulating sheet.

In order to achieve the above object, the present invention provides a chip inductor including a laminate including a coil electrode and an external electrode terminal connected to both ends of the coil electrode, wherein the laminate has an inner electrode pattern printed on one surface thereof. The first insulating sheet and the second insulating sheet printed on one surface of the pair of external electrode patterns are alternately stacked, and the internal electrode patterns printed on the first insulating sheet are connected to each other through vias to form a coil electrode. And forming external electrode patterns printed on the second insulating sheet and connected to each other by lamination to form external electrode terminals.

In this case, the external electrode pattern printed on the second insulating sheet is printed so that a part thereof protrudes to the outside, and the part protruding to the outside is connected to each other by lamination to provide a chip inductor.

In addition, a lead pattern printed on a second insulating sheet positioned on the uppermost layer and connecting the first external electrode pattern printed on the second insulating sheet positioned on the uppermost layer and the inner electrode pattern printed on the first insulating sheet positioned on the uppermost layer. electrode; And a lead pattern electrode connected to the second external electrode pattern printed on the second insulating sheet positioned on the lowermost layer and printed on the second insulating sheet positioned on the lowermost layer, and the inner electrode pattern printed on the first insulating sheet positioned on the lowest layer. It provides a chip inductor further comprising.

In addition, the pair of external electrode patterns, provided on the same side of the second insulating sheet, provides a chip inductor.

The chip inductor further includes a marking pattern printed on one surface of each insulating sheet.

The present invention devised to achieve the above object comprises the steps of (a) preparing a plurality of insulating sheets; (b) printing an internal electrode pattern and a pair of external electrode patterns on one surface of the insulating sheet, and forming a via at a predetermined position; (c) stacking the plurality of insulating sheets; And (d) pressing and stacking the plurality of stacked insulating sheets to form a laminate.

In this case, in step (b), a method of manufacturing a chip inductor which simultaneously prints the internal electrode pattern and a pair of external electrode patterns is provided.

In the step (b), a method of manufacturing a chip inductor is provided to print a portion of the external electrode pattern to protrude to the outside.

The method may further include plating a pair of metal layers on one surface of the laminate after the step (d) to cover a part of the protruding external electrode patterns.

Further, in the step (b), the lead pattern electrode connecting the inner electrode pattern and the first outer electrode pattern printed on the insulating sheet located on the uppermost layer is printed on one surface of the insulating sheet located on the uppermost layer, and positioned on the lowermost layer. A method of manufacturing a chip inductor is provided by printing a lead pattern electrode connecting an inner electrode pattern printed on an insulating sheet and a second outer electrode pattern to one surface of an insulating sheet positioned on the lowermost layer.

Further, in the step (b), there is provided a method of manufacturing a chip inductor, which prints the pair of external electrode patterns on the same side of each insulating sheet.

In addition, after the step (c), the step of laminating the upper and lower outer cover sheets on the upper surface of the insulating sheet positioned on the uppermost layer and the lower surface of the insulating sheet located on the lowermost layer; further comprising; To provide.

In addition, an inner cover sheet having a pair of external electrode patterns printed on one surface is laminated between the insulating sheet disposed on the uppermost layer and the upper outer cover sheet, and between the insulating sheet positioned on the lower layer and the lower outer cover sheet. It further comprises; providing a method of manufacturing a chip inductor.

In addition, in step (b), there is provided a method of manufacturing a chip inductor, further printing a marking pattern on one surface of each insulating sheet.

The present invention devised to achieve the above object comprises the steps of (a) preparing a plurality of insulating sheets; (b) printing an internal electrode pattern on one surface of the first insulating sheet, and printing a pair of external electrode patterns on one surface of the second insulating sheet; (c) stacking the first insulating sheet and the second insulating sheet alternately; And (d) pressing and stacking the plurality of stacked insulating sheets to form a laminate.

In this case, in the step (b), the lead pattern electrode connecting the first external electrode pattern printed on the second insulating sheet positioned on the uppermost layer and the internal electrode pattern printed on the first insulating sheet positioned on the uppermost layer is the uppermost layer. A lead pattern which is printed on one surface of the second insulating sheet positioned at the upper surface of the second insulating sheet, and connects the second external electrode pattern printed on the second insulating sheet positioned at the lowermost layer and the internal electrode pattern printed on the first insulating sheet positioned at the lowermost layer. Provided is a method of manufacturing a chip inductor, wherein an electrode is printed on one surface of a second insulating sheet positioned on the lowermost layer.

According to the chip inductor and the manufacturing method thereof according to the present invention, since the external electrode pattern printed on each insulating sheet forms the external electrode terminal by lamination, unlike the conventional chip inductor, the external electrode terminal need not be provided separately, and accordingly In addition, since the space of the laminate in which the coil electrode is formed can be expanded, the inductance of the conventional chip inductor can be increased.

In addition, due to the presence of the externally formed external electrode terminal, it is possible to fundamentally block an electrical short between the internal electrode pattern and the external electrode terminal, which may occur in the conventional chip inductor, and cause a poor size and appearance defect of the chip inductor. It is advantageous for the thinner implementation of chip inductors.

In addition, according to the chip inductor and the manufacturing method thereof according to the present invention, since the position where the external electrode terminals are formed can be freely determined, a high degree of freedom can be given when designing the circuit.

1 is an exploded perspective view of a chip inductor according to the present invention.
2 is an external perspective view of a chip inductor according to the present invention.
3 is an exploded perspective view of a chip inductor according to another exemplary embodiment of the present invention.

The advantages and features of the present invention and the techniques for achieving them will be apparent from the following detailed description taken in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. The present embodiments are provided so that the disclosure of the present invention is not only limited thereto, but also may enable others skilled in the art to fully understand the scope of the invention. Like reference numerals refer to like elements throughout the specification.

The terms used herein are intended to illustrate the embodiments and are not intended to limit the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. It is to be understood that the terms 'comprise', and / or 'comprising' as used herein may be used to refer to the presence or absence of one or more other components, steps, operations, and / Or additions.

Hereinafter, the configuration and operation effects of the present invention will be described in more detail with reference to the accompanying drawings.

1 is an exploded perspective view of a chip inductor according to the present invention, Figure 2 is an external perspective view of the chip inductor according to the present invention.

Referring to FIGS. 1 and 2, the chip inductor 100 according to the present invention may include a laminate in which insulating sheets 210, 220, and 230 having internal electrode patterns 211, 221, 231 and a pair of external electrode patterns 212, 213, 222, 223, 232, 233 printed on one surface thereof are stacked. 200.

Here, the insulating sheets 210, 220, and 230 are preferably made of a magnetic material having a high permeability, high quality factor, and high frequency impedance so that a magnetic path can be formed. Specifically, it may be made of at least one material selected from aluminum oxide (Al ₂ O ₃ ), aluminum nitride (AlN), glass, quartz, quartz, Ferrite, or a mixture of at least two materials.

FIG. 1 illustrates a laminate 200 composed of three insulating sheets 210, 220, and 230, but this is only an example of the present invention, and the laminate 200 may have a final thickness of a chip inductor and a thickness of an insulating sheet. And, it may be composed of various numbers of insulating sheets according to the required capacity of the chip inductor. However, the insulating sheet 230 disposed on the uppermost layer should be composed of at least one layer electrically connecting the internal electrode pattern 231 and the first external electrode pattern 233. The same applies to the insulating sheet 210 connected to the inner electrode pattern 211 and the second outer electrode pattern 212 and positioned at the lowermost layer.

On one surface of the insulating sheet 230 disposed on the uppermost layer, a lead electrode pattern 234 connecting the inner electrode pattern 231 and the first outer electrode pattern 233 may be printed. Similarly, the lowermost layer may be located at the lowermost layer. On one surface of the insulating sheet 210, a lead electrode pattern 214 connecting the internal electrode pattern 211 and the second external electrode pattern 212 may be printed. On the contrary, a lead electrode pattern connecting the internal electrode pattern and the second external electrode pattern is printed on one surface of the insulating sheet disposed on the uppermost layer, and the inner electrode pattern and the first external electrode pattern are connected to one surface of the insulating sheet located on the lowermost layer. Of course, the lead electrode pattern can be printed.

The internal electrode patterns 211, 221, and 231 printed on the insulating sheets 210, 220, and 230 may be sequentially connected through vias 211a, 221a, 221b, and 231a formed at predetermined positions to form a spiral coil electrode.

In detail, as illustrated in FIG. 1, the internal electrode pattern 231 printed on the insulating sheet 230 positioned on the uppermost layer may have the internal electrode pattern printed on the insulating sheet 220 through vias 231a and 221b. The internal electrode pattern 221 connected to the 221 and printed on the insulating sheet 220 is connected to the internal electrode pattern 211 printed on the insulating sheet 210 through vias 221a and 211a to form one coil electrode. To form. Herein, the case where the number of the insulating sheets 220 between the insulating sheet 230 positioned on the uppermost layer and the insulating sheet 210 positioned on the lowermost layer is assumed to be one is explained. However, the insulating sheet 230 and the lowermost layer positioned on the uppermost layer are described. Even when the number of the insulating sheets 220 between the insulating sheets 210 positioned in the configuration is at least two or more, the same manner may be connected to form one coil electrode.

Meanwhile, the chip inductor 100 according to the present invention may further include marking patterns 215, 224, and 235 printed on one surface of each of the insulating sheets 210, 220, and 230. The marking patterns 215, 224, and 235 indicate the direction of the chip inductor 100 according to the present invention. In addition, since the marking patterns 215, 224, 235 are adjacent to the internal electrode patterns 211, 221, 231 on the insulating sheet, the marking patterns 215, 224, 235 are made of a non-conductive material to prevent a short connection with the internal electrode patterns 211, 221, 231. desirable.

A pair of external electrode patterns 212 and 213 printed on the insulating sheet 210, a pair of external electrode patterns 222 and 223 printed on the insulating sheet 220, and a pair of external electrodes printed on the insulating sheet 230. The patterns 232 and 233 may be connected by stacking to form the external electrode terminals 240 and 250. That is, the first external electrode pattern 213 printed on the insulating sheet 210, the first external electrode pattern 223 printed on the insulating sheet 220, and the first external printed on the insulating sheet 230. The electrode patterns 233 are sequentially connected by lamination to form the first external electrode terminal 250. The second external electrode pattern 212 printed on the insulating sheet 210, the second external electrode pattern 222 printed on the insulating sheet 220, and the second external printed on the insulating sheet 230 are formed. The electrode patterns 232 are sequentially connected by lamination to form the second external electrode terminal 240.

The pair of external electrode patterns 212, 213, 222, 223, 232, 233 printed on each of the insulating sheets 210, 220, and 230 are printed so that a part thereof protrudes to the outside, and thus, the part protruding outwards is sequentially connected by stacking to the external electrode terminal. 240 and 250 may be formed. In order to strengthen the electrical connection, a metal layer (not shown) covering a portion of each protruding external electrode pattern may be further provided.

The pair of external electrode patterns 212, 213, 222, 223, 232, and 233 may be printed on the same side of each insulating sheet 210, 220, or 230. In this case, the external electrode terminals 240 and 250 are formed on the same side of the stack 200 as shown in FIG.

As described above, since the chip inductor 100 according to the present invention has no limitation on the position of the external electrode pattern forming the external electrode terminal, the external electrode terminal must be provided with the external electrode terminal at both ends of the stack. Compared with the conventional chip inductor, the degree of freedom in circuit design can be increased.

In addition, in the chip inductor 100 according to the present invention, since the external electrode patterns printed on the respective insulating sheets form the external electrode terminals by lamination, unlike the conventional chip inductors, the external electrode terminals need not be separately provided. Since the space of the laminate in which the coil electrode is formed can be expanded, the inductance can be increased compared to the conventional chip inductor.

In addition, it is possible to fundamentally block the electrical short (short) between the internal electrode pattern and the external electrode terminal that can occur in the conventional chip inductor, there is no fear of poor size and appearance defects of the chip inductor, and to reduce the thickness of the chip inductor It is advantageous.

Meanwhile, the chip inductor 100 according to the present invention includes upper and lower outer cover sheets 280 and 260 respectively provided on the upper surface of the insulating sheet 230 positioned on the uppermost layer and the lower surface of the insulating sheet 210 positioned on the lowermost layer. It may further comprise. The outer cover sheets 280 and 260 protect the insulating sheets 230 and 210 positioned at the top and bottom layers from an external environment.

In addition, the chip inductor 100 according to the present invention may include an insulating sheet 230 and a lower outer cover sheet 260 disposed between the insulating sheet 210 and the lower outer cover sheet 260 positioned at the lowermost layer and the upper outer cover sheet (uppermost). The inner cover sheets 250 and 270 may be further provided between the 280. One surface of the inner cover sheets 240 and 250 may be provided with a pair of external electrode patterns for enhancing electrical connection.

Now, a chip inductor 300 according to another embodiment of the present invention will be described. The structure and function of the chip inductor 100 according to the present invention described above will be omitted since the description thereof will be duplicated.

3 is an exploded perspective view of a chip inductor according to another exemplary embodiment of the present invention.

Referring to FIG. 3, the chip inductor 300 according to another exemplary embodiment of the present invention may include a first insulating sheet 420 and 440 printed on one surface of the internal electrode patterns 421 and 441, and a pair of external electrode patterns ( The second insulating sheets 410, 430, and 450 printed on one surface of 411, 412, 431, 432, 451, and 452 may be formed of a laminate 400 alternately stacked.

FIG. 3 illustrates a laminate 400 composed of two first insulating sheets 420 and 440 and three second insulating sheets 410, 430 and 450, but this is only an example of the present invention. According to the final thickness of the chip inductor, the thickness of the insulating sheet, and the required capacity of the chip inductor may be composed of various numbers of first and second insulating sheets.

As described above, in the chip inductor 400 according to another exemplary embodiment of the present invention, the internal electrode pattern and the external electrode pattern are separately printed on separate insulating sheets, thereby printing both the internal electrode pattern and the external electrode pattern on one surface of the insulating sheet. On the other hand, it is possible to exclude the possibility that the inner electrode pattern and the outer electrode pattern are electrically connected to each other (Short) on one surface. In addition, since the internal electrode pattern can be extended to the outermost edge of the insulating sheet to the maximum, it is advantageous to realize the maximum capacity in the same area.

A lead connecting the inner electrode pattern 441 and the first outer electrode pattern 451 printed on the first insulating sheet 440 on the lower surface of one surface of the second insulating sheet 450 positioned on the uppermost layer. The electrode pattern 453 can be printed. Likewise, the inner electrode pattern 421 and the second outer electrode pattern 412 printed on the first insulating sheet 420 disposed on the upper surface of the second insulating sheet 410 positioned on the lowermost layer are connected to each other. The lead electrode pattern 413 may be printed.

Each of the internal electrode patterns 421 and 441 printed on the first insulating sheets 420 and 440 are connected to each other through vias 413a, 421a, 421b, 433, 441a, 441b and 453a formed at predetermined positions on the respective insulating sheets. Thus, one coil electrode can be formed.

In detail, as illustrated in FIG. 3, the internal electrode patterns 441 printed on the first insulating sheet 440 may have the internal electrode patterns printed on the first insulating sheet 420 through vias 441b, 433, and 421b. It is connected to 421 to form one coil electrode. The internal electrode pattern 441 printed on the first insulating sheet 440 is electrically connected to the first external electrode pattern 451 through vias 441a and 453a and the first insulating sheet 420. The internal electrode pattern 421 printed on the second electrode electrode 421 is electrically connected to the second external electrode pattern 412 through vias 421a and 413a.

Meanwhile, the chip inductor 400 according to another exemplary embodiment of the present invention may further include marking patterns 414, 422, 434, 442, and 454 printed on one surface of each of the first and second insulating sheets 410, 420, 430, 440, and 450. Since the marking patterns 414, 422, 434, 442 and 454 are adjacent to the internal electrode patterns 421 and 441 on the insulating sheet, the marking patterns 414, 422, 434, 442 and 454 are made of a non-conductive material to prevent a short connection with the internal electrode patterns 421 and 441. It is preferable.

A pair of external electrode patterns 411 and 412 printed on the second insulating sheet 410 and a pair of external electrode patterns 431 and 432 printed on the second insulating sheet 430 are printed on the second insulating sheet 450. The pair of external electrode patterns 451 and 452 may sequentially form external electrode terminals by lamination.

The external electrode patterns 411, 412, 431, 432, 451, and 452 printed on the second insulating sheets 410, 430, and 450 are printed so that a part thereof protrudes to the outside. Accordingly, the parts protruding to the outside are sequentially connected by lamination to form external electrode terminals. Can be. In order to strengthen the electrical connection, a metal layer (not shown) covering a portion of each protruding external electrode pattern may be further provided.

In the chip inductor 300 according to another exemplary embodiment, the upper and lower portions of the upper and lower surfaces of the second insulating sheet 450 disposed on the uppermost layer and the lower surface of the second insulating sheet 410 positioned on the lowermost layer are respectively provided. The outer cover sheets 490 and 480 may be further included. In addition, the inner cover sheets 470 and 460 are disposed between the insulating sheet 450 disposed on the uppermost layer and the upper outer cover sheet 490 and between the insulating sheet 410 and the lower outer cover sheet 480 disposed on the lowermost layer. May be further provided.

Now, a method of manufacturing the chip inductor 100 according to the present invention will be described. Since the chip inductor 100 manufactured by the method of manufacturing a chip inductor according to the present invention is the same as the chip inductor 100 of FIGS. 1 and 2, the reference numerals of the drawings used below are the symbols of FIGS. 1 and 2. Reveal.

In the method of manufacturing a chip inductor 100 according to the present invention, first, a step of preparing a plurality of insulating sheets 210, 220, and 230 is performed.

To this end, first, a slurry containing magnetic powder is prepared. In addition to the magnetic powder, the slurry may further include a dielectric powder, a binder, a plasticizer, and the like. Such magnetic powders, dielectric powders, binders, plasticizers, etc., may be used in two-roll mills, three-roll mills, ball mills, trom mills, dispersers, kneaders, corneaders, arcs. The mixture is pulverized and mixed with a mortarizer, blender, single screw or twin screw extruder.

The resulting slurry is cast on a carrier film. In the present invention, a doctor blade tape casting method is exemplified. PET film may be used as the carrier film. The carrier film is removed when the insulating sheets 210, 220 and 230 are completed by applying a slurry.

Next, an inner electrode pattern 211, 221, 231 and a pair of external electrode patterns 212, 213, 222, 223, 232, 233 are printed on one surface of each insulating sheet 210, 220, 230, and vias 211 a, 221 a, 231 a are formed at predetermined positions. To perform.

The internal electrode patterns 211, 221, and 231 printed on the insulation sheets 210, 220, and 230 are connected to each other through vias 211a, 221a, and 231a formed in the insulation sheets 210, 220, and 230 to form coil electrodes. Accordingly, the vias 211a, 221a, and 231a are processed at appropriate positions so that the internal electrode patterns 211, 221, and 231 may be sequentially connected. The vias 211a, 221a, and 231a may be processed using laser punching or mechanical punching.

The internal electrode patterns 211, 221, 231 and the pair of external electrode patterns 212, 213, 222, 223, 232, 233 have excellent conductivity such as silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), and gold (Au). It may be formed of at least one material selected from copper (Cu) or platinum (Pt) or a mixture of at least two materials.

The internal electrode patterns 211, 221, 231 and the pair of external electrode patterns 212, 213, 222, 223, 232, 233 are generally known to those skilled in the art to which the present invention belongs, such as photolithography, electron beam, or ion beam. To be printed on each insulating sheet 210,220,230 by any one of a beamed ion bean lithography, dry etching, wet etching, nano-imprint. Can be.

The internal electrode patterns 211, 221, 231 and the pair of external electrode patterns 212, 213, 222, 223, 232, 233 may be printed separately, but at the same time, it is preferable to print at the same time.

Meanwhile, in the manufacture of the chip inductor 300 according to another embodiment of the present invention, the internal electrode pattern and the external electrode pattern may be divided into one surface of the first insulating sheet 420 and 440 of FIG. 421 and 441 of FIG. 3 may be printed, and a pair of external electrode patterns 411, 412, 431, 432, 451 and 452 of FIG. 3 may be printed on one surface of the second insulating sheet 410, 430 and 450 of FIG. The first insulating sheets 420 and 440 of FIG. 3 and the second insulating sheets 410, 430 and 450 of FIG. 3 may be alternately stacked.

When printing the pair of external electrode patterns 212, 213, 222, 223, 232, 233, a part of the external electrode patterns 212, 213, 222, 223, 232, 233 may be printed to protrude to the outside. When the pair of external electrode patterns 212, 213, 222, 223, 232, 233 are printed such that a part thereof protrudes outwardly, the pair of external electrode patterns 212, 213, 222, 223, 232, 233 are electrically connected by the protruding portion to form the external electrode terminals 240, 250. do. In addition, in order to strengthen the electrical connection, the method may further include applying a metal layer (not shown) on one surface of the stack 200 to cover a part of each protruding external electrode pattern. have. In order to electrically connect the external electrode patterns 212, 213, 222, 223, 232, and 233, and to enhance the solderability, it is preferable to sequentially apply nickel (Ni) and tin (Sn) metal layers.

When printing the internal electrode patterns 211, 221, 231 and the pair of external electrode patterns 212, 213, 222, 223, 232, 233, the marking patterns 215, 224, 235 may be printed on one surface of each of the insulating sheets 210, 220, 230. Since the chip inductor affects peripheral components when mounting the substrate according to the stacking direction of the internal electrode pattern, a marking pattern indicating the directivity of the chip inductor should be formed. In the conventional chip inductor, the chip inductor is marked after completion of the stack. The process of forming a must be performed separately. However, in the method of manufacturing the chip inductor 100 according to the present invention, as described above, when the marking patterns 210, 220, and 230 are printed on the insulating sheets 210, 220, and 230 when the electrode pattern is printed, the direction of the chip inductor may be changed by a stacking process that is performed afterwards. The marking marking is naturally formed. As a result, the production cost can be reduced and the process can be simplified, thereby improving product productivity.

Next, the stacking of the plurality of insulating sheets 210, 220, and 230 is performed.

Here, the upper and lower outer cover sheets 280 and 260 may be additionally stacked on the upper surface of the insulating sheet 230 positioned on the uppermost layer and the lower surface of the insulating sheet 210 positioned on the lowermost layer, respectively. The outer cover sheets 280 and 260 may use the insulating sheets formed in the preparing of the insulating sheets 210, 220 and 230 as they are.

In addition, between the insulating sheet 230 and the upper outer cover sheet 280 positioned on the uppermost layer, and between the insulating sheet 210 and the lower outer cover sheet 260 positioned on the lowermost layer, The inner cover sheets 250 and 270 printed on one surface of the external electrode pattern may be stacked.

Thereafter, the stacked plurality of insulating sheets 210, 220, and 230 are pressed, followed by firing to form the laminate 200 to complete the chip inductor 100 according to the present invention.

The foregoing detailed description is illustrative of the present invention. In addition, the foregoing description merely shows and describes preferred embodiments of the present invention, and the present invention can be used in various other combinations, modifications, and environments. That is, it is possible to make changes or modifications within the scope of the concept of the invention disclosed in this specification, the disclosure and the equivalents of the disclosure and / or the scope of the art or knowledge of the present invention. The foregoing embodiments are intended to illustrate the best mode contemplated for carrying out the invention and are not intended to limit the scope of the present invention to other modes of operation known in the art for utilizing other inventions such as the present invention, Various changes are possible. Accordingly, the foregoing description of the invention is not intended to limit the invention to the precise embodiments disclosed. It is also to be understood that the appended claims are intended to cover such other embodiments.

100 chip inductor according to the present invention
300: chip inductor according to another embodiment of the present invention
Insulation sheet: 210,220,230,410,420,430,440,450
211,221,231,421,441: Internal electrode pattern
212,213,222,223,232,233,411,412,431,432,451,452: External electrode pattern 250,270,460,470: Inner cover sheet
260,280,480,490: Outer cover sheet
200, 400: laminated body

Claims

A chip inductor comprising a stack including a coil electrode and a pair of external electrode terminals connected to both ends of the coil electrode,
The laminate consists of a plurality of insulating sheets printed on one surface of the internal electrode pattern and a pair of external electrode patterns,
The internal electrode patterns printed on the insulating sheets are connected through vias to form coil electrodes,
The external electrode patterns printed on the insulating sheets are connected to each other by lamination to form external electrode terminals.
Chip inductor.

The method of claim 1,
The external electrode patterns printed on the insulating sheets,
A part of which is printed to protrude to the outside, and a part of which protrudes to the outside is connected to each other by lamination to form an external electrode terminal,
Chip inductor.

3. The method of claim 2,
A pair of metal layers covering a part of each protruding external electrode pattern;
&Lt; / RTI >
Chip inductor.

The method of claim 1,
A lead pattern electrode printed on one surface of the insulating sheet on the uppermost layer and connecting the inner electrode pattern and the first outer electrode pattern printed on the insulating sheet on the uppermost layer; And
A lead pattern electrode printed on one surface of the insulating sheet on the lowermost layer and connecting the inner electrode pattern and the second external electrode pattern printed on the insulating sheet on the lowermost layer;
&Lt; / RTI >
Chip inductor.

The method of claim 1,
The pair of external electrode patterns,
Printed on the same side of each insulation sheet,
Chip inductor.

The method of claim 1,
Upper and lower outer cover sheets respectively provided on an upper surface of the insulating sheet positioned on an uppermost layer and a lower surface of the insulating sheet positioned on a lowermost layer;
&Lt; / RTI >
Chip inductor.

The method according to claim 6,
An inner cover sheet having a pair of external electrode patterns printed on one surface between the insulating sheet disposed on an uppermost layer and the upper outer cover sheet and between the insulating sheet disposed on a lower layer and the lower outer cover sheet;
&Lt; / RTI >
Chip inductor.

The method of claim 1,
A marking pattern printed on one surface of each insulating sheet;
&Lt; / RTI >
Chip inductor.

A chip inductor comprising a stack including a coil electrode and an external electrode terminal connected to both ends of the coil electrode,
The laminate is formed by alternately stacking a first insulating sheet printed on one surface of an internal electrode pattern and a second insulating sheet printed on one surface of a pair of external electrode patterns,
The internal electrode patterns printed on the first insulating sheet are connected to each other through vias to form coil electrodes,
The external electrode patterns printed on the second insulating sheet are connected to each other by lamination to form external electrode terminals.
Chip inductor.

The method of claim 9,
The external electrode pattern printed on the second insulating sheet,
A part of which is printed to protrude to the outside, and a part of which protrudes to the outside is connected to each other by lamination to form an external electrode terminal,
Chip inductor.

The method of claim 9,
A pair of metal layers covering a part of each protruding external electrode pattern;
&Lt; / RTI >
Chip inductor.

The method of claim 9,
A lead pattern electrode printed on a second insulating sheet positioned on an uppermost layer and connecting a first external electrode pattern printed on a second insulating sheet positioned on the uppermost layer and an inner electrode pattern printed on the first insulating sheet positioned on an uppermost layer; And
A lead pattern electrode connected to a second external electrode pattern printed on a second insulating sheet positioned on a lowermost layer and printed on a second insulating sheet positioned on a lowermost layer and an internal electrode pattern printed on a first insulating sheet positioned on a lowermost layer;
Further comprising
Chip inductor.

The method of claim 9,
The pair of external electrode patterns,
Formed on the same side of the second insulating sheet,
Chip inductor.

The method of claim 9,
Upper and lower outer cover sheets respectively provided on an upper surface of the insulating sheet positioned on an uppermost layer and a lower surface of the insulating sheet positioned on a lowermost layer;
&Lt; / RTI >
Chip inductor.

15. The method of claim 14,
An inner cover sheet having a pair of external electrode patterns printed on one surface between the insulating sheet disposed on an uppermost layer and the upper outer cover sheet and between the insulating sheet disposed on a lower layer and the lower outer cover sheet;
&Lt; / RTI >
Chip inductor.

The method of claim 9,
A marking pattern printed on one surface of each insulating sheet;
&Lt; / RTI >
Chip inductor.

(a) preparing a plurality of insulating sheets;
(b) printing an internal electrode pattern and a pair of external electrode patterns on one surface of the insulating sheet, and forming a via at a predetermined position;
(c) stacking the plurality of insulating sheets; And
(d) pressing and stacking the plurality of stacked insulating sheets to form a laminate;
/ RTI >
Method of manufacturing a chip inductor.

The method of claim 17,
In the step (b)
Simultaneously printing the inner electrode pattern and a pair of outer electrode patterns;
Method of manufacturing a chip inductor.

The method of claim 17,
In the step (b)
When printing the external electrode pattern to print a part of which protrudes to the outside,
Method of manufacturing a chip inductor.

The method of claim 19,
Plating a pair of metal layers on one surface of the laminate to cover a part of the protruding external electrode patterns;
&Lt; / RTI >
Method of manufacturing a chip inductor.

The method of claim 17,
In the step (b)
A lead pattern electrode connecting the inner electrode pattern printed on the insulating sheet positioned on the uppermost layer and the first outer electrode pattern is printed on one surface of the insulating sheet positioned on the uppermost layer,
A lead pattern electrode connecting the inner electrode pattern and the second outer electrode pattern printed on the insulating sheet located on the lowermost layer is printed on one surface of the insulating sheet located on the lowermost layer,
Method of manufacturing a chip inductor.

The method of claim 17,
In the step (b)
Printing the pair of external electrode patterns on the same side of each insulating sheet;
Method of manufacturing a chip inductor.

The method of claim 17,
After the step (c)
Stacking upper and lower outer cover sheets on the upper surface of the insulating sheet positioned on the uppermost layer and the lower surface of the insulating sheet positioned on the lowermost layer, respectively;
&Lt; / RTI >
Method of manufacturing a chip inductor.

24. The method of claim 23,
Stacking an inner cover sheet having a pair of external electrode patterns printed on one surface between the insulating sheet positioned on the uppermost layer and the upper outer cover sheet, and between the insulating sheet positioned on the lowermost layer and the lower outer cover sheet. ;
&Lt; / RTI >
Method of manufacturing a chip inductor.

The method of claim 17,
In the step (b)
To further print the marking pattern on one surface of each insulating sheet,
Method of manufacturing a chip inductor.

(a) preparing a plurality of insulating sheets;
(b) printing an internal electrode pattern on one surface of the first insulating sheet, and printing a pair of external electrode patterns on one surface of the second insulating sheet;
(c) stacking the first insulating sheet and the second insulating sheet alternately; And
(d) pressing and stacking the plurality of stacked insulating sheets to form a laminate;
/ RTI >
Method of manufacturing a chip inductor.

The method of claim 26,
In the step (b)
One surface of a second insulating sheet positioned on the uppermost layer is a lead pattern electrode connecting the first external electrode pattern printed on the second insulating sheet positioned on the uppermost layer and the internal electrode pattern printed on the first insulating sheet positioned on the uppermost layer. Print on,
One surface of the second insulating sheet positioned at the lowermost layer is a lead pattern electrode connecting the second external electrode pattern printed on the second insulating sheet positioned on the lowermost layer and the internal electrode pattern printed on the first insulating sheet positioned on the lowermost layer. Printed on,
Method of manufacturing a chip inductor.

The method of claim 26,
In the step (b)
When printing the external electrode pattern to print a part of which protrudes to the outside,
Method of manufacturing a chip inductor.

The method of claim 26,
After the step (c)
Stacking upper and lower outer cover sheets on the upper surface of the insulating sheet positioned on the uppermost layer and the lower surface of the insulating sheet positioned on the lowermost layer, respectively;
&Lt; / RTI >
Method of manufacturing a chip inductor.

30. The method of claim 29,
Between the insulating sheet located on the uppermost layer and the upper outer cover sheet; and
Stacking an inner cover sheet having a pair of external electrode patterns printed on one surface between the insulating sheet disposed on the lowermost layer and the lower outer cover sheet;
&Lt; / RTI >
Manufacturing method of chip inductor